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authorPhilippe Begnic <philippe.begnic@st.com>2013-05-27 08:41:31 -0400
committerMike Turquette <mturquette@linaro.org>2013-06-06 21:17:16 -0400
commit54e300339cce6d4be665e6bbd736123dd0f15888 (patch)
treec3b59f5ae060ab1a5b20fa99f9d594f9c46c5ffd /drivers/mfd/db8500-prcmu.c
parent852bbba96773777efc2b932f2c5939c6fbf252da (diff)
mfd: db8500: Update BML clock register for db8580
BML clock register address in DB8580 has changed.Defined a new address under different name for DB8580. Signed-off-by: Philippe Begnic <philippe.begnic@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/mfd/db8500-prcmu.c')
-rw-r--r--drivers/mfd/db8500-prcmu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 66f80973596b..a292a1deff9a 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -480,6 +480,7 @@ struct clk_mgt clk_mgt[PRCMU_NUM_REG_CLOCKS] = {
480 CLK_MGT_ENTRY(PER6CLK, PLL_DIV, true), 480 CLK_MGT_ENTRY(PER6CLK, PLL_DIV, true),
481 CLK_MGT_ENTRY(PER7CLK, PLL_DIV, true), 481 CLK_MGT_ENTRY(PER7CLK, PLL_DIV, true),
482 CLK_MGT_ENTRY(LCDCLK, PLL_FIX, true), 482 CLK_MGT_ENTRY(LCDCLK, PLL_FIX, true),
483 CLK_MGT_ENTRY(BML8580CLK, PLL_DIV, true),
483 CLK_MGT_ENTRY(BMLCLK, PLL_DIV, true), 484 CLK_MGT_ENTRY(BMLCLK, PLL_DIV, true),
484 CLK_MGT_ENTRY(HSITXCLK, PLL_DIV, true), 485 CLK_MGT_ENTRY(HSITXCLK, PLL_DIV, true),
485 CLK_MGT_ENTRY(HSIRXCLK, PLL_DIV, true), 486 CLK_MGT_ENTRY(HSIRXCLK, PLL_DIV, true),