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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/message/fusion/lsi
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/message/fusion/lsi')
-rw-r--r--drivers/message/fusion/lsi/fc_log.h89
-rw-r--r--drivers/message/fusion/lsi/mpi.h746
-rw-r--r--drivers/message/fusion/lsi/mpi_cnfg.h2105
-rw-r--r--drivers/message/fusion/lsi/mpi_fc.h363
-rw-r--r--drivers/message/fusion/lsi/mpi_history.txt276
-rw-r--r--drivers/message/fusion/lsi/mpi_inb.h220
-rw-r--r--drivers/message/fusion/lsi/mpi_init.h362
-rw-r--r--drivers/message/fusion/lsi/mpi_ioc.h770
-rw-r--r--drivers/message/fusion/lsi/mpi_lan.h212
-rw-r--r--drivers/message/fusion/lsi/mpi_raid.h232
-rw-r--r--drivers/message/fusion/lsi/mpi_sas.h181
-rw-r--r--drivers/message/fusion/lsi/mpi_targ.h435
-rw-r--r--drivers/message/fusion/lsi/mpi_tool.h305
-rw-r--r--drivers/message/fusion/lsi/mpi_type.h86
14 files changed, 6382 insertions, 0 deletions
diff --git a/drivers/message/fusion/lsi/fc_log.h b/drivers/message/fusion/lsi/fc_log.h
new file mode 100644
index 000000000000..dc98d46f9071
--- /dev/null
+++ b/drivers/message/fusion/lsi/fc_log.h
@@ -0,0 +1,89 @@
1/*
2 * Copyright (c) 2000-2001 LSI Logic Corporation. All rights reserved.
3 *
4 * NAME: fc_log.h
5 * SUMMARY: MPI IocLogInfo definitions for the SYMFC9xx chips
6 * DESCRIPTION: Contains the enumerated list of values that may be returned
7 * in the IOCLogInfo field of a MPI Default Reply Message.
8 *
9 * CREATION DATE: 6/02/2000
10 * ID: $Id: fc_log.h,v 4.6 2001/07/26 14:41:33 sschremm Exp $
11 */
12
13
14/*
15 * MpiIocLogInfo_t enum
16 *
17 * These 32 bit values are used in the IOCLogInfo field of the MPI reply
18 * messages.
19 * The value is 0xabcccccc where
20 * a = The type of log info as per the MPI spec. Since these codes are
21 * all for Fibre Channel this value will always be 2.
22 * b = Specifies a subclass of the firmware where
23 * 0 = FCP Initiator
24 * 1 = FCP Target
25 * 2 = LAN
26 * 3 = MPI Message Layer
27 * 4 = FC Link
28 * 5 = Context Manager
29 * 6 = Invalid Field Offset
30 * 7 = State Change Info
31 * all others are reserved for future use
32 * c = A specific value within the subclass.
33 *
34 * NOTE: Any new values should be added to the end of each subclass so that the
35 * codes remain consistent across firmware releases.
36 */
37typedef enum _MpiIocLogInfoFc
38{
39 MPI_IOCLOGINFO_FC_INIT_BASE = 0x20000000,
40 MPI_IOCLOGINFO_FC_INIT_ERROR_OUT_OF_ORDER_FRAME = 0x20000001, /* received an out of order frame - unsupported */
41 MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_START_OF_FRAME = 0x20000002, /* Bad Rx Frame, bad start of frame primative */
42 MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_END_OF_FRAME = 0x20000003, /* Bad Rx Frame, bad end of frame primative */
43 MPI_IOCLOGINFO_FC_INIT_ERROR_OVER_RUN = 0x20000004, /* Bad Rx Frame, overrun */
44 MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OTHER = 0x20000005, /* Other errors caught by IOC which require retries */
45 MPI_IOCLOGINFO_FC_INIT_ERROR_SUBPROC_DEAD = 0x20000006, /* Main processor could not initialize sub-processor */
46 MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OVERRUN = 0x20000007, /* Scatter Gather overrun */
47 MPI_IOCLOGINFO_FC_INIT_ERROR_RX_BAD_STATUS = 0x20000008, /* Receiver detected context mismatch via invalid header */
48 MPI_IOCLOGINFO_FC_INIT_ERROR_RX_UNEXPECTED_FRAME= 0x20000009, /* CtxMgr detected unsupported frame type */
49 MPI_IOCLOGINFO_FC_INIT_ERROR_LINK_FAILURE = 0x2000000A, /* Link failure occurred */
50 MPI_IOCLOGINFO_FC_INIT_ERROR_TX_TIMEOUT = 0x2000000B, /* Transmitter timeout error */
51
52 MPI_IOCLOGINFO_FC_TARGET_BASE = 0x21000000,
53 MPI_IOCLOGINFO_FC_TARGET_NO_PDISC = 0x21000001, /* not sent because we are waiting for a PDISC from the initiator */
54 MPI_IOCLOGINFO_FC_TARGET_NO_LOGIN = 0x21000002, /* not sent because we are not logged in to the remote node */
55 MPI_IOCLOGINFO_FC_TARGET_DOAR_KILLED_BY_LIP = 0x21000003, /* Data Out, Auto Response, not sent due to a LIP */
56 MPI_IOCLOGINFO_FC_TARGET_DIAR_KILLED_BY_LIP = 0x21000004, /* Data In, Auto Response, not sent due to a LIP */
57 MPI_IOCLOGINFO_FC_TARGET_DIAR_MISSING_DATA = 0x21000005, /* Data In, Auto Response, missing data frames */
58 MPI_IOCLOGINFO_FC_TARGET_DONR_KILLED_BY_LIP = 0x21000006, /* Data Out, No Response, not sent due to a LIP */
59 MPI_IOCLOGINFO_FC_TARGET_WRSP_KILLED_BY_LIP = 0x21000007, /* Auto-response after a write not sent due to a LIP */
60 MPI_IOCLOGINFO_FC_TARGET_DINR_KILLED_BY_LIP = 0x21000008, /* Data In, No Response, not completed due to a LIP */
61 MPI_IOCLOGINFO_FC_TARGET_DINR_MISSING_DATA = 0x21000009, /* Data In, No Response, missing data frames */
62 MPI_IOCLOGINFO_FC_TARGET_MRSP_KILLED_BY_LIP = 0x2100000a, /* Manual Response not sent due to a LIP */
63 MPI_IOCLOGINFO_FC_TARGET_NO_CLASS_3 = 0x2100000b, /* not sent because remote node does not support Class 3 */
64 MPI_IOCLOGINFO_FC_TARGET_LOGIN_NOT_VALID = 0x2100000c, /* not sent because login to remote node not validated */
65 MPI_IOCLOGINFO_FC_TARGET_FROM_OUTBOUND = 0x2100000e, /* cleared from the outbound queue after a logout */
66 MPI_IOCLOGINFO_FC_TARGET_WAITING_FOR_DATA_IN = 0x2100000f, /* cleared waiting for data after a logout */
67
68 MPI_IOCLOGINFO_FC_LAN_BASE = 0x22000000,
69 MPI_IOCLOGINFO_FC_LAN_TRANS_SGL_MISSING = 0x22000001, /* Transaction Context Sgl Missing */
70 MPI_IOCLOGINFO_FC_LAN_TRANS_WRONG_PLACE = 0x22000002, /* Transaction Context found before an EOB */
71 MPI_IOCLOGINFO_FC_LAN_TRANS_RES_BITS_SET = 0x22000003, /* Transaction Context value has reserved bits set */
72 MPI_IOCLOGINFO_FC_LAN_WRONG_SGL_FLAG = 0x22000004, /* Invalid SGL Flags */
73
74 MPI_IOCLOGINFO_FC_MSG_BASE = 0x23000000,
75
76 MPI_IOCLOGINFO_FC_LINK_BASE = 0x24000000,
77 MPI_IOCLOGINFO_FC_LINK_LOOP_INIT_TIMEOUT = 0x24000001, /* Loop initialization timed out */
78 MPI_IOCLOGINFO_FC_LINK_ALREADY_INITIALIZED = 0x24000002, /* Another system controller already initialized the loop */
79 MPI_IOCLOGINFO_FC_LINK_LINK_NOT_ESTABLISHED = 0x24000003, /* Not synchronized to signal or still negotiating (possible cable problem) */
80 MPI_IOCLOGINFO_FC_LINK_CRC_ERROR = 0x24000004, /* CRC check detected error on received frame */
81
82 MPI_IOCLOGINFO_FC_CTX_BASE = 0x25000000,
83
84 MPI_IOCLOGINFO_FC_INVALID_FIELD_BYTE_OFFSET = 0x26000000, /* The lower 24 bits give the byte offset of the field in the request message that is invalid */
85 MPI_IOCLOGINFO_FC_INVALID_FIELD_MAX_OFFSET = 0x26ffffff,
86
87 MPI_IOCLOGINFO_FC_STATE_CHANGE = 0x27000000 /* The lower 24 bits give additional information concerning state change */
88
89} MpiIocLogInfoFc_t;
diff --git a/drivers/message/fusion/lsi/mpi.h b/drivers/message/fusion/lsi/mpi.h
new file mode 100644
index 000000000000..9dbb061265fe
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi.h
@@ -0,0 +1,746 @@
1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi.h
6 * Title: MPI Message independent structures and definitions
7 * Creation Date: July 27, 2000
8 *
9 * mpi.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 05-24-00 00.10.02 Added MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH definition.
18 * 06-06-00 01.00.01 Update MPI_VERSION_MAJOR and MPI_VERSION_MINOR.
19 * 06-22-00 01.00.02 Added MPI_IOCSTATUS_LAN_ definitions.
20 * Removed LAN_SUSPEND function definition.
21 * Added MPI_MSGFLAGS_CONTINUATION_REPLY definition.
22 * 06-30-00 01.00.03 Added MPI_CONTEXT_REPLY_TYPE_LAN definition.
23 * Added MPI_GET/SET_CONTEXT_REPLY_TYPE macros.
24 * 07-27-00 01.00.04 Added MPI_FAULT_ definitions.
25 * Removed MPI_IOCSTATUS_MSG/DATA_XFER_ERROR definitions.
26 * Added MPI_IOCSTATUS_INTERNAL_ERROR definition.
27 * Added MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH.
28 * 11-02-00 01.01.01 Original release for post 1.0 work.
29 * 12-04-00 01.01.02 Added new function codes.
30 * 01-09-01 01.01.03 Added more definitions to the system interface section
31 * Added MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT.
32 * 01-25-01 01.01.04 Changed MPI_VERSION_MINOR from 0x00 to 0x01.
33 * 02-20-01 01.01.05 Started using MPI_POINTER.
34 * Fixed value for MPI_DIAG_RW_ENABLE.
35 * Added defines for MPI_DIAG_PREVENT_IOC_BOOT and
36 * MPI_DIAG_CLEAR_FLASH_BAD_SIG.
37 * Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines.
38 * 02-27-01 01.01.06 Removed MPI_HOST_INDEX_REGISTER define.
39 * Added function codes for RAID.
40 * 04-09-01 01.01.07 Added alternate define for MPI_DOORBELL_ACTIVE,
41 * MPI_DOORBELL_USED, to better match the spec.
42 * 08-08-01 01.02.01 Original release for v1.2 work.
43 * Changed MPI_VERSION_MINOR from 0x01 to 0x02.
44 * Added define MPI_FUNCTION_TOOLBOX.
45 * 09-28-01 01.02.02 New function code MPI_SCSI_ENCLOSURE_PROCESSOR.
46 * 11-01-01 01.02.03 Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR.
47 * 03-14-02 01.02.04 Added MPI_HEADER_VERSION_ defines.
48 * 05-31-02 01.02.05 Bumped MPI_HEADER_VERSION_UNIT.
49 * 07-12-02 01.02.06 Added define for MPI_FUNCTION_MAILBOX.
50 * 09-16-02 01.02.07 Bumped value for MPI_HEADER_VERSION_UNIT.
51 * 11-15-02 01.02.08 Added define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX and
52 * obsoleted define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX.
53 * 04-01-03 01.02.09 New IOCStatus code: MPI_IOCSTATUS_FC_EXCHANGE_CANCELED
54 * 06-26-03 01.02.10 Bumped MPI_HEADER_VERSION_UNIT value.
55 * --------------------------------------------------------------------------
56 */
57
58#ifndef MPI_H
59#define MPI_H
60
61
62/*****************************************************************************
63*
64* M P I V e r s i o n D e f i n i t i o n s
65*
66*****************************************************************************/
67
68#define MPI_VERSION_MAJOR (0x01)
69#define MPI_VERSION_MINOR (0x05)
70#define MPI_VERSION_MAJOR_MASK (0xFF00)
71#define MPI_VERSION_MAJOR_SHIFT (8)
72#define MPI_VERSION_MINOR_MASK (0x00FF)
73#define MPI_VERSION_MINOR_SHIFT (0)
74#define MPI_VERSION ((MPI_VERSION_MAJOR << MPI_VERSION_MAJOR_SHIFT) | \
75 MPI_VERSION_MINOR)
76
77#define MPI_VERSION_01_00 (0x0100)
78#define MPI_VERSION_01_01 (0x0101)
79#define MPI_VERSION_01_02 (0x0102)
80#define MPI_VERSION_01_03 (0x0103)
81#define MPI_VERSION_01_05 (0x0105)
82/* Note: The major versions of 0xe0 through 0xff are reserved */
83
84/* versioning for this MPI header set */
85#define MPI_HEADER_VERSION_UNIT (0x00)
86#define MPI_HEADER_VERSION_DEV (0x00)
87#define MPI_HEADER_VERSION_UNIT_MASK (0xFF00)
88#define MPI_HEADER_VERSION_UNIT_SHIFT (8)
89#define MPI_HEADER_VERSION_DEV_MASK (0x00FF)
90#define MPI_HEADER_VERSION_DEV_SHIFT (0)
91#define MPI_HEADER_VERSION ((MPI_HEADER_VERSION_UNIT << 8) | MPI_HEADER_VERSION_DEV)
92
93/*****************************************************************************
94*
95* I O C S t a t e D e f i n i t i o n s
96*
97*****************************************************************************/
98
99#define MPI_IOC_STATE_RESET (0x00000000)
100#define MPI_IOC_STATE_READY (0x10000000)
101#define MPI_IOC_STATE_OPERATIONAL (0x20000000)
102#define MPI_IOC_STATE_FAULT (0x40000000)
103
104#define MPI_IOC_STATE_MASK (0xF0000000)
105#define MPI_IOC_STATE_SHIFT (28)
106
107/* Fault state codes (product independent range 0x8000-0xFFFF) */
108
109#define MPI_FAULT_REQUEST_MESSAGE_PCI_PARITY_ERROR (0x8111)
110#define MPI_FAULT_REQUEST_MESSAGE_PCI_BUS_FAULT (0x8112)
111#define MPI_FAULT_REPLY_MESSAGE_PCI_PARITY_ERROR (0x8113)
112#define MPI_FAULT_REPLY_MESSAGE_PCI_BUS_FAULT (0x8114)
113#define MPI_FAULT_DATA_SEND_PCI_PARITY_ERROR (0x8115)
114#define MPI_FAULT_DATA_SEND_PCI_BUS_FAULT (0x8116)
115#define MPI_FAULT_DATA_RECEIVE_PCI_PARITY_ERROR (0x8117)
116#define MPI_FAULT_DATA_RECEIVE_PCI_BUS_FAULT (0x8118)
117
118
119/*****************************************************************************
120*
121* P C I S y s t e m I n t e r f a c e R e g i s t e r s
122*
123*****************************************************************************/
124
125/* S y s t e m D o o r b e l l */
126#define MPI_DOORBELL_OFFSET (0x00000000)
127#define MPI_DOORBELL_ACTIVE (0x08000000) /* DoorbellUsed */
128#define MPI_DOORBELL_USED (MPI_DOORBELL_ACTIVE)
129#define MPI_DOORBELL_ACTIVE_SHIFT (27)
130#define MPI_DOORBELL_WHO_INIT_MASK (0x07000000)
131#define MPI_DOORBELL_WHO_INIT_SHIFT (24)
132#define MPI_DOORBELL_FUNCTION_MASK (0xFF000000)
133#define MPI_DOORBELL_FUNCTION_SHIFT (24)
134#define MPI_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
135#define MPI_DOORBELL_ADD_DWORDS_SHIFT (16)
136#define MPI_DOORBELL_DATA_MASK (0x0000FFFF)
137
138
139#define MPI_WRITE_SEQUENCE_OFFSET (0x00000004)
140#define MPI_WRSEQ_KEY_VALUE_MASK (0x0000000F)
141#define MPI_WRSEQ_1ST_KEY_VALUE (0x04)
142#define MPI_WRSEQ_2ND_KEY_VALUE (0x0B)
143#define MPI_WRSEQ_3RD_KEY_VALUE (0x02)
144#define MPI_WRSEQ_4TH_KEY_VALUE (0x07)
145#define MPI_WRSEQ_5TH_KEY_VALUE (0x0D)
146
147#define MPI_DIAGNOSTIC_OFFSET (0x00000008)
148#define MPI_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
149#define MPI_DIAG_PREVENT_IOC_BOOT (0x00000200)
150#define MPI_DIAG_DRWE (0x00000080)
151#define MPI_DIAG_FLASH_BAD_SIG (0x00000040)
152#define MPI_DIAG_RESET_HISTORY (0x00000020)
153#define MPI_DIAG_RW_ENABLE (0x00000010)
154#define MPI_DIAG_RESET_ADAPTER (0x00000004)
155#define MPI_DIAG_DISABLE_ARM (0x00000002)
156#define MPI_DIAG_MEM_ENABLE (0x00000001)
157
158#define MPI_TEST_BASE_ADDRESS_OFFSET (0x0000000C)
159
160#define MPI_DIAG_RW_DATA_OFFSET (0x00000010)
161
162#define MPI_DIAG_RW_ADDRESS_OFFSET (0x00000014)
163
164#define MPI_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
165#define MPI_HIS_IOP_DOORBELL_STATUS (0x80000000)
166#define MPI_HIS_REPLY_MESSAGE_INTERRUPT (0x00000008)
167#define MPI_HIS_DOORBELL_INTERRUPT (0x00000001)
168
169#define MPI_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
170#define MPI_HIM_RIM (0x00000008)
171#define MPI_HIM_DIM (0x00000001)
172
173#define MPI_REQUEST_QUEUE_OFFSET (0x00000040)
174#define MPI_REQUEST_POST_FIFO_OFFSET (0x00000040)
175
176#define MPI_REPLY_QUEUE_OFFSET (0x00000044)
177#define MPI_REPLY_POST_FIFO_OFFSET (0x00000044)
178#define MPI_REPLY_FREE_FIFO_OFFSET (0x00000044)
179
180#define MPI_HI_PRI_REQUEST_QUEUE_OFFSET (0x00000048)
181
182
183
184/*****************************************************************************
185*
186* M e s s a g e F r a m e D e s c r i p t o r s
187*
188*****************************************************************************/
189
190#define MPI_REQ_MF_DESCRIPTOR_NB_MASK (0x00000003)
191#define MPI_REQ_MF_DESCRIPTOR_F_BIT (0x00000004)
192#define MPI_REQ_MF_DESCRIPTOR_ADDRESS_MASK (0xFFFFFFF8)
193
194#define MPI_ADDRESS_REPLY_A_BIT (0x80000000)
195#define MPI_ADDRESS_REPLY_ADDRESS_MASK (0x7FFFFFFF)
196
197#define MPI_CONTEXT_REPLY_A_BIT (0x80000000)
198#define MPI_CONTEXT_REPLY_TYPE_MASK (0x60000000)
199#define MPI_CONTEXT_REPLY_TYPE_SCSI_INIT (0x00)
200#define MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET (0x01)
201#define MPI_CONTEXT_REPLY_TYPE_LAN (0x02)
202#define MPI_CONTEXT_REPLY_TYPE_SHIFT (29)
203#define MPI_CONTEXT_REPLY_CONTEXT_MASK (0x1FFFFFFF)
204
205
206/****************************************************************************/
207/* Context Reply macros */
208/****************************************************************************/
209
210#define MPI_GET_CONTEXT_REPLY_TYPE(x) (((x) & MPI_CONTEXT_REPLY_TYPE_MASK) \
211 >> MPI_CONTEXT_REPLY_TYPE_SHIFT)
212
213#define MPI_SET_CONTEXT_REPLY_TYPE(x, typ) \
214 ((x) = ((x) & ~MPI_CONTEXT_REPLY_TYPE_MASK) | \
215 (((typ) << MPI_CONTEXT_REPLY_TYPE_SHIFT) & \
216 MPI_CONTEXT_REPLY_TYPE_MASK))
217
218
219/*****************************************************************************
220*
221* M e s s a g e F u n c t i o n s
222* 0x80 -> 0x8F reserved for private message use per product
223*
224*
225*****************************************************************************/
226
227#define MPI_FUNCTION_SCSI_IO_REQUEST (0x00)
228#define MPI_FUNCTION_SCSI_TASK_MGMT (0x01)
229#define MPI_FUNCTION_IOC_INIT (0x02)
230#define MPI_FUNCTION_IOC_FACTS (0x03)
231#define MPI_FUNCTION_CONFIG (0x04)
232#define MPI_FUNCTION_PORT_FACTS (0x05)
233#define MPI_FUNCTION_PORT_ENABLE (0x06)
234#define MPI_FUNCTION_EVENT_NOTIFICATION (0x07)
235#define MPI_FUNCTION_EVENT_ACK (0x08)
236#define MPI_FUNCTION_FW_DOWNLOAD (0x09)
237#define MPI_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
238#define MPI_FUNCTION_TARGET_ASSIST (0x0B)
239#define MPI_FUNCTION_TARGET_STATUS_SEND (0x0C)
240#define MPI_FUNCTION_TARGET_MODE_ABORT (0x0D)
241#define MPI_FUNCTION_FC_LINK_SRVC_BUF_POST (0x0E)
242#define MPI_FUNCTION_FC_LINK_SRVC_RSP (0x0F)
243#define MPI_FUNCTION_FC_EX_LINK_SRVC_SEND (0x10)
244#define MPI_FUNCTION_FC_ABORT (0x11)
245#define MPI_FUNCTION_FW_UPLOAD (0x12)
246#define MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND (0x13)
247#define MPI_FUNCTION_FC_PRIMITIVE_SEND (0x14)
248
249#define MPI_FUNCTION_RAID_ACTION (0x15)
250#define MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16)
251
252#define MPI_FUNCTION_TOOLBOX (0x17)
253
254#define MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18)
255
256#define MPI_FUNCTION_MAILBOX (0x19)
257
258#define MPI_FUNCTION_SMP_PASSTHROUGH (0x1A)
259#define MPI_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B)
260
261#define MPI_DIAG_BUFFER_POST (0x1D)
262#define MPI_DIAG_RELEASE (0x1E)
263
264#define MPI_FUNCTION_SCSI_IO_32 (0x1F)
265
266#define MPI_FUNCTION_LAN_SEND (0x20)
267#define MPI_FUNCTION_LAN_RECEIVE (0x21)
268#define MPI_FUNCTION_LAN_RESET (0x22)
269
270#define MPI_FUNCTION_INBAND_BUFFER_POST (0x28)
271#define MPI_FUNCTION_INBAND_SEND (0x29)
272#define MPI_FUNCTION_INBAND_RSP (0x2A)
273#define MPI_FUNCTION_INBAND_ABORT (0x2B)
274
275#define MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
276#define MPI_FUNCTION_IO_UNIT_RESET (0x41)
277#define MPI_FUNCTION_HANDSHAKE (0x42)
278#define MPI_FUNCTION_REPLY_FRAME_REMOVAL (0x43)
279
280
281/* standard version format */
282typedef struct _MPI_VERSION_STRUCT
283{
284 U8 Dev; /* 00h */
285 U8 Unit; /* 01h */
286 U8 Minor; /* 02h */
287 U8 Major; /* 03h */
288} MPI_VERSION_STRUCT, MPI_POINTER PTR_MPI_VERSION_STRUCT,
289 MpiVersionStruct_t, MPI_POINTER pMpiVersionStruct;
290
291typedef union _MPI_VERSION_FORMAT
292{
293 MPI_VERSION_STRUCT Struct;
294 U32 Word;
295} MPI_VERSION_FORMAT, MPI_POINTER PTR_MPI_VERSION_FORMAT,
296 MpiVersionFormat_t, MPI_POINTER pMpiVersionFormat_t;
297
298
299/*****************************************************************************
300*
301* S c a t t e r G a t h e r E l e m e n t s
302*
303*****************************************************************************/
304
305/****************************************************************************/
306/* Simple element structures */
307/****************************************************************************/
308
309typedef struct _SGE_SIMPLE32
310{
311 U32 FlagsLength;
312 U32 Address;
313} SGE_SIMPLE32, MPI_POINTER PTR_SGE_SIMPLE32,
314 SGESimple32_t, MPI_POINTER pSGESimple32_t;
315
316typedef struct _SGE_SIMPLE64
317{
318 U32 FlagsLength;
319 U64 Address;
320} SGE_SIMPLE64, MPI_POINTER PTR_SGE_SIMPLE64,
321 SGESimple64_t, MPI_POINTER pSGESimple64_t;
322
323typedef struct _SGE_SIMPLE_UNION
324{
325 U32 FlagsLength;
326 union
327 {
328 U32 Address32;
329 U64 Address64;
330 }u;
331} SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t,
332 SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION;
333
334/****************************************************************************/
335/* Chain element structures */
336/****************************************************************************/
337
338typedef struct _SGE_CHAIN32
339{
340 U16 Length;
341 U8 NextChainOffset;
342 U8 Flags;
343 U32 Address;
344} SGE_CHAIN32, MPI_POINTER PTR_SGE_CHAIN32,
345 SGEChain32_t, MPI_POINTER pSGEChain32_t;
346
347typedef struct _SGE_CHAIN64
348{
349 U16 Length;
350 U8 NextChainOffset;
351 U8 Flags;
352 U64 Address;
353} SGE_CHAIN64, MPI_POINTER PTR_SGE_CHAIN64,
354 SGEChain64_t, MPI_POINTER pSGEChain64_t;
355
356typedef struct _SGE_CHAIN_UNION
357{
358 U16 Length;
359 U8 NextChainOffset;
360 U8 Flags;
361 union
362 {
363 U32 Address32;
364 U64 Address64;
365 }u;
366} SGE_CHAIN_UNION, MPI_POINTER PTR_SGE_CHAIN_UNION,
367 SGEChainUnion_t, MPI_POINTER pSGEChainUnion_t;
368
369/****************************************************************************/
370/* Transaction Context element */
371/****************************************************************************/
372
373typedef struct _SGE_TRANSACTION32
374{
375 U8 Reserved;
376 U8 ContextSize;
377 U8 DetailsLength;
378 U8 Flags;
379 U32 TransactionContext[1];
380 U32 TransactionDetails[1];
381} SGE_TRANSACTION32, MPI_POINTER PTR_SGE_TRANSACTION32,
382 SGETransaction32_t, MPI_POINTER pSGETransaction32_t;
383
384typedef struct _SGE_TRANSACTION64
385{
386 U8 Reserved;
387 U8 ContextSize;
388 U8 DetailsLength;
389 U8 Flags;
390 U32 TransactionContext[2];
391 U32 TransactionDetails[1];
392} SGE_TRANSACTION64, MPI_POINTER PTR_SGE_TRANSACTION64,
393 SGETransaction64_t, MPI_POINTER pSGETransaction64_t;
394
395typedef struct _SGE_TRANSACTION96
396{
397 U8 Reserved;
398 U8 ContextSize;
399 U8 DetailsLength;
400 U8 Flags;
401 U32 TransactionContext[3];
402 U32 TransactionDetails[1];
403} SGE_TRANSACTION96, MPI_POINTER PTR_SGE_TRANSACTION96,
404 SGETransaction96_t, MPI_POINTER pSGETransaction96_t;
405
406typedef struct _SGE_TRANSACTION128
407{
408 U8 Reserved;
409 U8 ContextSize;
410 U8 DetailsLength;
411 U8 Flags;
412 U32 TransactionContext[4];
413 U32 TransactionDetails[1];
414} SGE_TRANSACTION128, MPI_POINTER PTR_SGE_TRANSACTION128,
415 SGETransaction_t128, MPI_POINTER pSGETransaction_t128;
416
417typedef struct _SGE_TRANSACTION_UNION
418{
419 U8 Reserved;
420 U8 ContextSize;
421 U8 DetailsLength;
422 U8 Flags;
423 union
424 {
425 U32 TransactionContext32[1];
426 U32 TransactionContext64[2];
427 U32 TransactionContext96[3];
428 U32 TransactionContext128[4];
429 }u;
430 U32 TransactionDetails[1];
431} SGE_TRANSACTION_UNION, MPI_POINTER PTR_SGE_TRANSACTION_UNION,
432 SGETransactionUnion_t, MPI_POINTER pSGETransactionUnion_t;
433
434
435/****************************************************************************/
436/* SGE IO types union for IO SGL's */
437/****************************************************************************/
438
439typedef struct _SGE_IO_UNION
440{
441 union
442 {
443 SGE_SIMPLE_UNION Simple;
444 SGE_CHAIN_UNION Chain;
445 } u;
446} SGE_IO_UNION, MPI_POINTER PTR_SGE_IO_UNION,
447 SGEIOUnion_t, MPI_POINTER pSGEIOUnion_t;
448
449/****************************************************************************/
450/* SGE union for SGL's with Simple and Transaction elements */
451/****************************************************************************/
452
453typedef struct _SGE_TRANS_SIMPLE_UNION
454{
455 union
456 {
457 SGE_SIMPLE_UNION Simple;
458 SGE_TRANSACTION_UNION Transaction;
459 } u;
460} SGE_TRANS_SIMPLE_UNION, MPI_POINTER PTR_SGE_TRANS_SIMPLE_UNION,
461 SGETransSimpleUnion_t, MPI_POINTER pSGETransSimpleUnion_t;
462
463/****************************************************************************/
464/* All SGE types union */
465/****************************************************************************/
466
467typedef struct _SGE_MPI_UNION
468{
469 union
470 {
471 SGE_SIMPLE_UNION Simple;
472 SGE_CHAIN_UNION Chain;
473 SGE_TRANSACTION_UNION Transaction;
474 } u;
475} SGE_MPI_UNION, MPI_POINTER PTR_SGE_MPI_UNION,
476 MPI_SGE_UNION_t, MPI_POINTER pMPI_SGE_UNION_t,
477 SGEAllUnion_t, MPI_POINTER pSGEAllUnion_t;
478
479
480/****************************************************************************/
481/* SGE field definition and masks */
482/****************************************************************************/
483
484/* Flags field bit definitions */
485
486#define MPI_SGE_FLAGS_LAST_ELEMENT (0x80)
487#define MPI_SGE_FLAGS_END_OF_BUFFER (0x40)
488#define MPI_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
489#define MPI_SGE_FLAGS_LOCAL_ADDRESS (0x08)
490#define MPI_SGE_FLAGS_DIRECTION (0x04)
491#define MPI_SGE_FLAGS_ADDRESS_SIZE (0x02)
492#define MPI_SGE_FLAGS_END_OF_LIST (0x01)
493
494#define MPI_SGE_FLAGS_SHIFT (24)
495
496#define MPI_SGE_LENGTH_MASK (0x00FFFFFF)
497#define MPI_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
498
499/* Element Type */
500
501#define MPI_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
502#define MPI_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
503#define MPI_SGE_FLAGS_CHAIN_ELEMENT (0x30)
504#define MPI_SGE_FLAGS_ELEMENT_MASK (0x30)
505
506/* Address location */
507
508#define MPI_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
509
510/* Direction */
511
512#define MPI_SGE_FLAGS_IOC_TO_HOST (0x00)
513#define MPI_SGE_FLAGS_HOST_TO_IOC (0x04)
514
515/* Address Size */
516
517#define MPI_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
518#define MPI_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
519
520/* Context Size */
521
522#define MPI_SGE_FLAGS_32_BIT_CONTEXT (0x00)
523#define MPI_SGE_FLAGS_64_BIT_CONTEXT (0x02)
524#define MPI_SGE_FLAGS_96_BIT_CONTEXT (0x04)
525#define MPI_SGE_FLAGS_128_BIT_CONTEXT (0x06)
526
527#define MPI_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
528#define MPI_SGE_CHAIN_OFFSET_SHIFT (16)
529
530
531/****************************************************************************/
532/* SGE operation Macros */
533/****************************************************************************/
534
535 /* SIMPLE FlagsLength manipulations... */
536#define MPI_SGE_SET_FLAGS(f) ((U32)(f) << MPI_SGE_FLAGS_SHIFT)
537#define MPI_SGE_GET_FLAGS(fl) (((fl) & ~MPI_SGE_LENGTH_MASK) >> MPI_SGE_FLAGS_SHIFT)
538#define MPI_SGE_LENGTH(fl) ((fl) & MPI_SGE_LENGTH_MASK)
539#define MPI_SGE_CHAIN_LENGTH(fl) ((fl) & MPI_SGE_CHAIN_LENGTH_MASK)
540
541#define MPI_SGE_SET_FLAGS_LENGTH(f,l) (MPI_SGE_SET_FLAGS(f) | MPI_SGE_LENGTH(l))
542
543#define MPI_pSGE_GET_FLAGS(psg) MPI_SGE_GET_FLAGS((psg)->FlagsLength)
544#define MPI_pSGE_GET_LENGTH(psg) MPI_SGE_LENGTH((psg)->FlagsLength)
545#define MPI_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI_SGE_SET_FLAGS_LENGTH(f,l)
546 /* CAUTION - The following are READ-MODIFY-WRITE! */
547#define MPI_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI_SGE_SET_FLAGS(f)
548#define MPI_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI_SGE_LENGTH(l)
549
550#define MPI_GET_CHAIN_OFFSET(x) ((x&MPI_SGE_CHAIN_OFFSET_MASK)>>MPI_SGE_CHAIN_OFFSET_SHIFT)
551
552
553
554/*****************************************************************************
555*
556* S t a n d a r d M e s s a g e S t r u c t u r e s
557*
558*****************************************************************************/
559
560/****************************************************************************/
561/* Standard message request header for all request messages */
562/****************************************************************************/
563
564typedef struct _MSG_REQUEST_HEADER
565{
566 U8 Reserved[2]; /* function specific */
567 U8 ChainOffset;
568 U8 Function;
569 U8 Reserved1[3]; /* function specific */
570 U8 MsgFlags;
571 U32 MsgContext;
572} MSG_REQUEST_HEADER, MPI_POINTER PTR_MSG_REQUEST_HEADER,
573 MPIHeader_t, MPI_POINTER pMPIHeader_t;
574
575
576/****************************************************************************/
577/* Default Reply */
578/****************************************************************************/
579
580typedef struct _MSG_DEFAULT_REPLY
581{
582 U8 Reserved[2]; /* function specific */
583 U8 MsgLength;
584 U8 Function;
585 U8 Reserved1[3]; /* function specific */
586 U8 MsgFlags;
587 U32 MsgContext;
588 U8 Reserved2[2]; /* function specific */
589 U16 IOCStatus;
590 U32 IOCLogInfo;
591} MSG_DEFAULT_REPLY, MPI_POINTER PTR_MSG_DEFAULT_REPLY,
592 MPIDefaultReply_t, MPI_POINTER pMPIDefaultReply_t;
593
594
595/* MsgFlags definition for all replies */
596
597#define MPI_MSGFLAGS_CONTINUATION_REPLY (0x80)
598
599
600/*****************************************************************************
601*
602* I O C S t a t u s V a l u e s
603*
604*****************************************************************************/
605
606/****************************************************************************/
607/* Common IOCStatus values for all replies */
608/****************************************************************************/
609
610#define MPI_IOCSTATUS_SUCCESS (0x0000)
611#define MPI_IOCSTATUS_INVALID_FUNCTION (0x0001)
612#define MPI_IOCSTATUS_BUSY (0x0002)
613#define MPI_IOCSTATUS_INVALID_SGL (0x0003)
614#define MPI_IOCSTATUS_INTERNAL_ERROR (0x0004)
615#define MPI_IOCSTATUS_RESERVED (0x0005)
616#define MPI_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
617#define MPI_IOCSTATUS_INVALID_FIELD (0x0007)
618#define MPI_IOCSTATUS_INVALID_STATE (0x0008)
619#define MPI_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
620
621/****************************************************************************/
622/* Config IOCStatus values */
623/****************************************************************************/
624
625#define MPI_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
626#define MPI_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
627#define MPI_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
628#define MPI_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
629#define MPI_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
630#define MPI_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
631
632/****************************************************************************/
633/* SCSIIO Reply (SPI & FCP) initiator values */
634/****************************************************************************/
635
636#define MPI_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
637#define MPI_IOCSTATUS_SCSI_INVALID_BUS (0x0041)
638#define MPI_IOCSTATUS_SCSI_INVALID_TARGETID (0x0042)
639#define MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
640#define MPI_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
641#define MPI_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
642#define MPI_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
643#define MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
644#define MPI_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
645#define MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
646#define MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
647#define MPI_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
648#define MPI_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
649
650/****************************************************************************/
651/* For use by SCSI Initiator and SCSI Target end-to-end data protection */
652/****************************************************************************/
653
654#define MPI_IOCSTATUS_EEDP_CRC_ERROR (0x004D)
655#define MPI_IOCSTATUS_EEDP_LBA_TAG_ERROR (0x004E)
656#define MPI_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
657
658
659/****************************************************************************/
660/* SCSI (SPI & FCP) target values */
661/****************************************************************************/
662
663#define MPI_IOCSTATUS_TARGET_PRIORITY_IO (0x0060)
664#define MPI_IOCSTATUS_TARGET_INVALID_PORT (0x0061)
665#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062) /* obsolete */
666#define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
667#define MPI_IOCSTATUS_TARGET_ABORTED (0x0063)
668#define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
669#define MPI_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
670#define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
671#define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT (0x006B)
672
673/****************************************************************************/
674/* Additional FCP target values (obsolete) */
675/****************************************************************************/
676
677#define MPI_IOCSTATUS_TARGET_FC_ABORTED (0x0066) /* obsolete */
678#define MPI_IOCSTATUS_TARGET_FC_RX_ID_INVALID (0x0067) /* obsolete */
679#define MPI_IOCSTATUS_TARGET_FC_DID_INVALID (0x0068) /* obsolete */
680#define MPI_IOCSTATUS_TARGET_FC_NODE_LOGGED_OUT (0x0069) /* obsolete */
681
682/****************************************************************************/
683/* Fibre Channel Direct Access values */
684/****************************************************************************/
685
686#define MPI_IOCSTATUS_FC_ABORTED (0x0066)
687#define MPI_IOCSTATUS_FC_RX_ID_INVALID (0x0067)
688#define MPI_IOCSTATUS_FC_DID_INVALID (0x0068)
689#define MPI_IOCSTATUS_FC_NODE_LOGGED_OUT (0x0069)
690#define MPI_IOCSTATUS_FC_EXCHANGE_CANCELED (0x006C)
691
692/****************************************************************************/
693/* LAN values */
694/****************************************************************************/
695
696#define MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND (0x0080)
697#define MPI_IOCSTATUS_LAN_DEVICE_FAILURE (0x0081)
698#define MPI_IOCSTATUS_LAN_TRANSMIT_ERROR (0x0082)
699#define MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED (0x0083)
700#define MPI_IOCSTATUS_LAN_RECEIVE_ERROR (0x0084)
701#define MPI_IOCSTATUS_LAN_RECEIVE_ABORTED (0x0085)
702#define MPI_IOCSTATUS_LAN_PARTIAL_PACKET (0x0086)
703#define MPI_IOCSTATUS_LAN_CANCELED (0x0087)
704
705/****************************************************************************/
706/* Serial Attached SCSI values */
707/****************************************************************************/
708
709#define MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
710
711/****************************************************************************/
712/* Inband values */
713/****************************************************************************/
714
715#define MPI_IOCSTATUS_INBAND_ABORTED (0x0098)
716#define MPI_IOCSTATUS_INBAND_NO_CONNECTION (0x0099)
717
718/****************************************************************************/
719/* Diagnostic Tools values */
720/****************************************************************************/
721
722#define MPI_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
723
724
725/****************************************************************************/
726/* IOCStatus flag to indicate that log info is available */
727/****************************************************************************/
728
729#define MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
730#define MPI_IOCSTATUS_MASK (0x7FFF)
731
732/****************************************************************************/
733/* LogInfo Types */
734/****************************************************************************/
735
736#define MPI_IOCLOGINFO_TYPE_MASK (0xF0000000)
737#define MPI_IOCLOGINFO_TYPE_SHIFT (28)
738#define MPI_IOCLOGINFO_TYPE_NONE (0x0)
739#define MPI_IOCLOGINFO_TYPE_SCSI (0x1)
740#define MPI_IOCLOGINFO_TYPE_FC (0x2)
741#define MPI_IOCLOGINFO_TYPE_SAS (0x3)
742#define MPI_IOCLOGINFO_TYPE_ISCSI (0x4)
743#define MPI_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
744
745
746#endif
diff --git a/drivers/message/fusion/lsi/mpi_cnfg.h b/drivers/message/fusion/lsi/mpi_cnfg.h
new file mode 100644
index 000000000000..a5680d864bf0
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_cnfg.h
@@ -0,0 +1,2105 @@
1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_cnfg.h
6 * Title: MPI Config message, structures, and Pages
7 * Creation Date: July 27, 2000
8 *
9 * mpi_cnfg.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 06-06-00 01.00.01 Update version number for 1.0 release.
18 * 06-08-00 01.00.02 Added _PAGEVERSION definitions for all pages.
19 * Added FcPhLowestVersion, FcPhHighestVersion, Reserved2
20 * fields to FC_DEVICE_0 page, updated the page version.
21 * Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in
22 * SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages
23 * and updated the page versions.
24 * Added _RESPONSE_ID_MASK definition to SCSI_PORT_1
25 * page and updated the page version.
26 * Added Information field and _INFO_PARAMS_NEGOTIATED
27 * definitionto SCSI_DEVICE_0 page.
28 * 06-22-00 01.00.03 Removed batch controls from LAN_0 page and updated the
29 * page version.
30 * Added BucketsRemaining to LAN_1 page, redefined the
31 * state values, and updated the page version.
32 * Revised bus width definitions in SCSI_PORT_0,
33 * SCSI_DEVICE_0 and SCSI_DEVICE_1 pages.
34 * 06-30-00 01.00.04 Added MaxReplySize to LAN_1 page and updated the page
35 * version.
36 * Moved FC_DEVICE_0 PageAddress description to spec.
37 * 07-27-00 01.00.05 Corrected the SubsystemVendorID and SubsystemID field
38 * widths in IOC_0 page and updated the page version.
39 * 11-02-00 01.01.01 Original release for post 1.0 work
40 * Added Manufacturing pages, IO Unit Page 2, SCSI SPI
41 * Port Page 2, FC Port Page 4, FC Port Page 5
42 * 11-15-00 01.01.02 Interim changes to match proposals
43 * 12-04-00 01.01.03 Config page changes to match MPI rev 1.00.01.
44 * 12-05-00 01.01.04 Modified config page actions.
45 * 01-09-01 01.01.05 Added defines for page address formats.
46 * Data size for Manufacturing pages 2 and 3 no longer
47 * defined here.
48 * Io Unit Page 2 size is fixed at 4 adapters and some
49 * flags were changed.
50 * SCSI Port Page 2 Device Settings modified.
51 * New fields added to FC Port Page 0 and some flags
52 * cleaned up.
53 * Removed impedance flash from FC Port Page 1.
54 * Added FC Port pages 6 and 7.
55 * 01-25-01 01.01.06 Added MaxInitiators field to FcPortPage0.
56 * 01-29-01 01.01.07 Changed some defines to make them 32 character unique.
57 * Added some LinkType defines for FcPortPage0.
58 * 02-20-01 01.01.08 Started using MPI_POINTER.
59 * 02-27-01 01.01.09 Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with
60 * MPI_CONFIG_PAGETYPE_RAID_VOLUME.
61 * Added definitions and structures for IOC Page 2 and
62 * RAID Volume Page 2.
63 * 03-27-01 01.01.10 Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9.
64 * CONFIG_PAGE_FC_PORT_3 now supports persistent by DID.
65 * Added VendorId and ProductRevLevel fields to
66 * RAIDVOL2_IM_PHYS_ID struct.
67 * Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_
68 * defines to make them compatible to MPI version 1.0.
69 * Added structure offset comments.
70 * 04-09-01 01.01.11 Added some new defines for the PageAddress field and
71 * removed some obsolete ones.
72 * Added IO Unit Page 3.
73 * Modified defines for Scsi Port Page 2.
74 * Modified RAID Volume Pages.
75 * 08-08-01 01.02.01 Original release for v1.2 work.
76 * Added SepID and SepBus to RVP2 IMPhysicalDisk struct.
77 * Added defines for the SEP bits in RVP2 VolumeSettings.
78 * Modified the DeviceSettings field in RVP2 to use the
79 * proper structure.
80 * Added defines for SES, SAF-TE, and cross channel for
81 * IOCPage2 CapabilitiesFlags.
82 * Removed define for MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE.
83 * Removed define for
84 * MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE.
85 * Added define for MPI_CONFIG_PAGEATTR_RO_PERSISTENT.
86 * 08-29-01 01.02.02 Fixed value for MPI_MANUFACTPAGE_DEVID_53C1035.
87 * Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY
88 * and MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY.
89 * Removed MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS,
90 * MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS, and
91 * MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS, and
92 * MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED.
93 * Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED
94 * and MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED.
95 * Added OnBusTimerValue to CONFIG_PAGE_SCSI_PORT_1.
96 * Added rejected bits to SCSI Device Page 0 Information.
97 * Increased size of ALPA array in FC Port Page 2 by one
98 * and removed a one byte reserved field.
99 * 09-28-01 01.02.03 Swapped NegWireSpeedLow and NegWireSpeedLow in
100 * CONFIG_PAGE_LAN_1 to match preferred 64-bit ordering.
101 * Added structures for Manufacturing Page 4, IO Unit
102 * Page 3, IOC Page 3, IOC Page 4, RAID Volume Page 0, and
103 * RAID PhysDisk Page 0.
104 * 10-04-01 01.02.04 Added define for MPI_CONFIG_PAGETYPE_RAID_PHYSDISK.
105 * Modified some of the new defines to make them 32
106 * character unique.
107 * Modified how variable length pages (arrays) are defined.
108 * Added generic defines for hot spare pools and RAID
109 * volume types.
110 * 11-01-01 01.02.05 Added define for MPI_IOUNITPAGE1_DISABLE_IR.
111 * 03-14-02 01.02.06 Added PCISlotNum field to CONFIG_PAGE_IOC_1 along with
112 * related define, and bumped the page version define.
113 * 05-31-02 01.02.07 Added a Flags field to CONFIG_PAGE_IOC_2_RAID_VOL in a
114 * reserved byte and added a define.
115 * Added define for
116 * MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE.
117 * Added new config page: CONFIG_PAGE_IOC_5.
118 * Added MaxAliases, MaxHardAliases, and NumCurrentAliases
119 * fields to CONFIG_PAGE_FC_PORT_0.
120 * Added AltConnector and NumRequestedAliases fields to
121 * CONFIG_PAGE_FC_PORT_1.
122 * Added new config page: CONFIG_PAGE_FC_PORT_10.
123 * 07-12-02 01.02.08 Added more MPI_MANUFACTPAGE_DEVID_ defines.
124 * Added additional MPI_SCSIDEVPAGE0_NP_ defines.
125 * Added more MPI_SCSIDEVPAGE1_RP_ defines.
126 * Added define for
127 * MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE.
128 * Added new config page: CONFIG_PAGE_SCSI_DEVICE_3.
129 * Modified MPI_FCPORTPAGE5_FLAGS_ defines.
130 * 09-16-02 01.02.09 Added MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG define.
131 * 11-15-02 01.02.10 Added ConnectedID defines for CONFIG_PAGE_SCSI_PORT_0.
132 * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
133 * Added more Flags defines for CONFIG_PAGE_FC_DEVICE_0.
134 * 04-01-03 01.02.11 Added RR_TOV field and additional Flags defines for
135 * CONFIG_PAGE_FC_PORT_1.
136 * Added define MPI_FCPORTPAGE5_FLAGS_DISABLE to disable
137 * an alias.
138 * Added more device id defines.
139 * 06-26-03 01.02.12 Added MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID define.
140 * Added TargetConfig and IDConfig fields to
141 * CONFIG_PAGE_SCSI_PORT_1.
142 * Added more PortFlags defines for CONFIG_PAGE_SCSI_PORT_2
143 * to control DV.
144 * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
145 * In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
146 * with ADISCHardALPA.
147 * Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
148 * --------------------------------------------------------------------------
149 */
150
151#ifndef MPI_CNFG_H
152#define MPI_CNFG_H
153
154
155/*****************************************************************************
156*
157* C o n f i g M e s s a g e a n d S t r u c t u r e s
158*
159*****************************************************************************/
160
161typedef struct _CONFIG_PAGE_HEADER
162{
163 U8 PageVersion; /* 00h */
164 U8 PageLength; /* 01h */
165 U8 PageNumber; /* 02h */
166 U8 PageType; /* 03h */
167} fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
168 ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
169
170typedef union _CONFIG_PAGE_HEADER_UNION
171{
172 ConfigPageHeader_t Struct;
173 U8 Bytes[4];
174 U16 Word16[2];
175 U32 Word32;
176} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
177 fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
178
179typedef struct _CONFIG_EXTENDED_PAGE_HEADER
180{
181 U8 PageVersion; /* 00h */
182 U8 Reserved1; /* 01h */
183 U8 PageNumber; /* 02h */
184 U8 PageType; /* 03h */
185 U16 ExtPageLength; /* 04h */
186 U8 ExtPageType; /* 06h */
187 U8 Reserved2; /* 07h */
188} fCONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER,
189 ConfigExtendedPageHeader_t, MPI_POINTER pConfigExtendedPageHeader_t;
190
191
192
193/****************************************************************************
194* PageType field values
195****************************************************************************/
196#define MPI_CONFIG_PAGEATTR_READ_ONLY (0x00)
197#define MPI_CONFIG_PAGEATTR_CHANGEABLE (0x10)
198#define MPI_CONFIG_PAGEATTR_PERSISTENT (0x20)
199#define MPI_CONFIG_PAGEATTR_RO_PERSISTENT (0x30)
200#define MPI_CONFIG_PAGEATTR_MASK (0xF0)
201
202#define MPI_CONFIG_PAGETYPE_IO_UNIT (0x00)
203#define MPI_CONFIG_PAGETYPE_IOC (0x01)
204#define MPI_CONFIG_PAGETYPE_BIOS (0x02)
205#define MPI_CONFIG_PAGETYPE_SCSI_PORT (0x03)
206#define MPI_CONFIG_PAGETYPE_SCSI_DEVICE (0x04)
207#define MPI_CONFIG_PAGETYPE_FC_PORT (0x05)
208#define MPI_CONFIG_PAGETYPE_FC_DEVICE (0x06)
209#define MPI_CONFIG_PAGETYPE_LAN (0x07)
210#define MPI_CONFIG_PAGETYPE_RAID_VOLUME (0x08)
211#define MPI_CONFIG_PAGETYPE_MANUFACTURING (0x09)
212#define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A)
213#define MPI_CONFIG_PAGETYPE_INBAND (0x0B)
214#define MPI_CONFIG_PAGETYPE_EXTENDED (0x0F)
215#define MPI_CONFIG_PAGETYPE_MASK (0x0F)
216
217#define MPI_CONFIG_TYPENUM_MASK (0x0FFF)
218
219
220/****************************************************************************
221* ExtPageType field values
222****************************************************************************/
223#define MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10)
224#define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11)
225#define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12)
226#define MPI_CONFIG_EXTPAGETYPE_SAS_PHY (0x13)
227
228
229/****************************************************************************
230* PageAddress field values
231****************************************************************************/
232#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
233
234#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
235#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
236#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
237#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
238
239#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
240#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
241#define MPI_FC_PORT_PGAD_FORM_MASK (0x0F000000)
242#define MPI_FC_PORT_PGAD_FORM_INDEX (0x01000000)
243#define MPI_FC_PORT_PGAD_INDEX_MASK (0x0000FFFF)
244#define MPI_FC_PORT_PGAD_INDEX_SHIFT (0)
245
246#define MPI_FC_DEVICE_PGAD_PORT_MASK (0xF0000000)
247#define MPI_FC_DEVICE_PGAD_PORT_SHIFT (28)
248#define MPI_FC_DEVICE_PGAD_FORM_MASK (0x0F000000)
249#define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID (0x00000000)
250#define MPI_FC_DEVICE_PGAD_ND_PORT_MASK (0xF0000000)
251#define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT (28)
252#define MPI_FC_DEVICE_PGAD_ND_DID_MASK (0x00FFFFFF)
253#define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT (0)
254#define MPI_FC_DEVICE_PGAD_FORM_BUS_TID (0x01000000)
255#define MPI_FC_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00)
256#define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT (8)
257#define MPI_FC_DEVICE_PGAD_BT_TID_MASK (0x000000FF)
258#define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT (0)
259
260#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
261#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0)
262
263#define MPI_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000)
264#define MPI_SAS_DEVICE_PGAD_FORM_SHIFT (28)
265#define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
266#define MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID (0x00000001)
267#define MPI_SAS_DEVICE_PGAD_FORM_HANDLE (0x00000002)
268#define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_MASK (0x0000FFFF)
269#define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_SHIFT (0)
270#define MPI_SAS_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00)
271#define MPI_SAS_DEVICE_PGAD_BT_BUS_SHIFT (8)
272#define MPI_SAS_DEVICE_PGAD_BT_TID_MASK (0x000000FF)
273#define MPI_SAS_DEVICE_PGAD_BT_TID_SHIFT (0)
274#define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK (0x0000FFFF)
275#define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT (0)
276
277#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x00FF0000)
278#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (16)
279#define MPI_SAS_PHY_PGAD_DEVHANDLE_MASK (0x0000FFFF)
280#define MPI_SAS_PHY_PGAD_DEVHANDLE_SHIFT (0)
281
282
283/****************************************************************************
284* Config Request Message
285****************************************************************************/
286typedef struct _MSG_CONFIG
287{
288 U8 Action; /* 00h */
289 U8 Reserved; /* 01h */
290 U8 ChainOffset; /* 02h */
291 U8 Function; /* 03h */
292 U16 ExtPageLength; /* 04h */
293 U8 ExtPageType; /* 06h */
294 U8 MsgFlags; /* 07h */
295 U32 MsgContext; /* 08h */
296 U8 Reserved2[8]; /* 0Ch */
297 fCONFIG_PAGE_HEADER Header; /* 14h */
298 U32 PageAddress; /* 18h */
299 SGE_IO_UNION PageBufferSGE; /* 1Ch */
300} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
301 Config_t, MPI_POINTER pConfig_t;
302
303
304/****************************************************************************
305* Action field values
306****************************************************************************/
307#define MPI_CONFIG_ACTION_PAGE_HEADER (0x00)
308#define MPI_CONFIG_ACTION_PAGE_READ_CURRENT (0x01)
309#define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02)
310#define MPI_CONFIG_ACTION_PAGE_DEFAULT (0x03)
311#define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04)
312#define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05)
313#define MPI_CONFIG_ACTION_PAGE_READ_NVRAM (0x06)
314
315
316/* Config Reply Message */
317typedef struct _MSG_CONFIG_REPLY
318{
319 U8 Action; /* 00h */
320 U8 Reserved; /* 01h */
321 U8 MsgLength; /* 02h */
322 U8 Function; /* 03h */
323 U16 ExtPageLength; /* 04h */
324 U8 ExtPageType; /* 06h */
325 U8 MsgFlags; /* 07h */
326 U32 MsgContext; /* 08h */
327 U8 Reserved2[2]; /* 0Ch */
328 U16 IOCStatus; /* 0Eh */
329 U32 IOCLogInfo; /* 10h */
330 fCONFIG_PAGE_HEADER Header; /* 14h */
331} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
332 ConfigReply_t, MPI_POINTER pConfigReply_t;
333
334
335
336/*****************************************************************************
337*
338* C o n f i g u r a t i o n P a g e s
339*
340*****************************************************************************/
341
342/****************************************************************************
343* Manufacturing Config pages
344****************************************************************************/
345#define MPI_MANUFACTPAGE_VENDORID_LSILOGIC (0x1000)
346/* Fibre Channel */
347#define MPI_MANUFACTPAGE_DEVICEID_FC909 (0x0621)
348#define MPI_MANUFACTPAGE_DEVICEID_FC919 (0x0624)
349#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)
350#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)
351#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)
352/* SCSI */
353#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)
354#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)
355#define MPI_MANUFACTPAGE_DEVID_1030_53C1035 (0x0032)
356#define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 (0x0033)
357#define MPI_MANUFACTPAGE_DEVID_53C1035 (0x0040)
358#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)
359/* SAS */
360#define MPI_MANUFACTPAGE_DEVID_SAS1064 (0x0050)
361
362
363typedef struct _CONFIG_PAGE_MANUFACTURING_0
364{
365 fCONFIG_PAGE_HEADER Header; /* 00h */
366 U8 ChipName[16]; /* 04h */
367 U8 ChipRevision[8]; /* 14h */
368 U8 BoardName[16]; /* 1Ch */
369 U8 BoardAssembly[16]; /* 2Ch */
370 U8 BoardTracerNumber[16]; /* 3Ch */
371
372} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
373 ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
374
375#define MPI_MANUFACTURING0_PAGEVERSION (0x00)
376
377
378typedef struct _CONFIG_PAGE_MANUFACTURING_1
379{
380 fCONFIG_PAGE_HEADER Header; /* 00h */
381 U8 VPD[256]; /* 04h */
382} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
383 ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
384
385#define MPI_MANUFACTURING1_PAGEVERSION (0x00)
386
387
388typedef struct _MPI_CHIP_REVISION_ID
389{
390 U16 DeviceID; /* 00h */
391 U8 PCIRevisionID; /* 02h */
392 U8 Reserved; /* 03h */
393} MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID,
394 MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t;
395
396
397/*
398 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
399 * one and check Header.PageLength at runtime.
400 */
401#ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS
402#define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS (1)
403#endif
404
405typedef struct _CONFIG_PAGE_MANUFACTURING_2
406{
407 fCONFIG_PAGE_HEADER Header; /* 00h */
408 MPI_CHIP_REVISION_ID ChipId; /* 04h */
409 U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */
410} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
411 ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
412
413#define MPI_MANUFACTURING2_PAGEVERSION (0x00)
414
415
416/*
417 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
418 * one and check Header.PageLength at runtime.
419 */
420#ifndef MPI_MAN_PAGE_3_INFO_WORDS
421#define MPI_MAN_PAGE_3_INFO_WORDS (1)
422#endif
423
424typedef struct _CONFIG_PAGE_MANUFACTURING_3
425{
426 fCONFIG_PAGE_HEADER Header; /* 00h */
427 MPI_CHIP_REVISION_ID ChipId; /* 04h */
428 U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */
429} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
430 ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
431
432#define MPI_MANUFACTURING3_PAGEVERSION (0x00)
433
434
435typedef struct _CONFIG_PAGE_MANUFACTURING_4
436{
437 fCONFIG_PAGE_HEADER Header; /* 00h */
438 U32 Reserved1; /* 04h */
439 U8 InfoOffset0; /* 08h */
440 U8 InfoSize0; /* 09h */
441 U8 InfoOffset1; /* 0Ah */
442 U8 InfoSize1; /* 0Bh */
443 U8 InquirySize; /* 0Ch */
444 U8 Flags; /* 0Dh */
445 U16 Reserved2; /* 0Eh */
446 U8 InquiryData[56]; /* 10h */
447 U32 ISVolumeSettings; /* 48h */
448 U32 IMEVolumeSettings; /* 4Ch */
449 U32 IMVolumeSettings; /* 50h */
450} fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
451 ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
452
453#define MPI_MANUFACTURING4_PAGEVERSION (0x01)
454
455/* defines for the Flags field */
456#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01)
457
458
459typedef struct _CONFIG_PAGE_MANUFACTURING_5
460{
461 fCONFIG_PAGE_HEADER Header; /* 00h */
462 U64 BaseWWID; /* 04h */
463} fCONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5,
464 ManufacturingPage5_t, MPI_POINTER pManufacturingPage5_t;
465
466#define MPI_MANUFACTURING5_PAGEVERSION (0x00)
467
468
469typedef struct _CONFIG_PAGE_MANUFACTURING_6
470{
471 fCONFIG_PAGE_HEADER Header; /* 00h */
472 U32 ProductSpecificInfo;/* 04h */
473} fCONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6,
474 ManufacturingPage6_t, MPI_POINTER pManufacturingPage6_t;
475
476#define MPI_MANUFACTURING6_PAGEVERSION (0x00)
477
478
479/****************************************************************************
480* IO Unit Config Pages
481****************************************************************************/
482
483typedef struct _CONFIG_PAGE_IO_UNIT_0
484{
485 fCONFIG_PAGE_HEADER Header; /* 00h */
486 U64 UniqueValue; /* 04h */
487} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
488 IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
489
490#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)
491
492
493typedef struct _CONFIG_PAGE_IO_UNIT_1
494{
495 fCONFIG_PAGE_HEADER Header; /* 00h */
496 U32 Flags; /* 04h */
497} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
498 IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
499
500#define MPI_IOUNITPAGE1_PAGEVERSION (0x01)
501
502/* IO Unit Page 1 Flags defines */
503#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)
504#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)
505#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)
506#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)
507#define MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004)
508#define MPI_IOUNITPAGE1_DISABLE_QUEUE_FULL_HANDLING (0x00000020)
509#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)
510#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)
511#define MPI_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100)
512
513
514typedef struct _MPI_ADAPTER_INFO
515{
516 U8 PciBusNumber; /* 00h */
517 U8 PciDeviceAndFunctionNumber; /* 01h */
518 U16 AdapterFlags; /* 02h */
519} MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO,
520 MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;
521
522#define MPI_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)
523#define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)
524
525typedef struct _CONFIG_PAGE_IO_UNIT_2
526{
527 fCONFIG_PAGE_HEADER Header; /* 00h */
528 U32 Flags; /* 04h */
529 U32 BiosVersion; /* 08h */
530 MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */
531} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
532 IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
533
534#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)
535
536#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)
537#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)
538#define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008)
539#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010)
540
541#define MPI_IOUNITPAGE2_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0)
542#define MPI_IOUNITPAGE2_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000)
543#define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DISPLAY (0x00000020)
544#define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040)
545
546
547/*
548 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
549 * one and check Header.PageLength at runtime.
550 */
551#ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX
552#define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1)
553#endif
554
555typedef struct _CONFIG_PAGE_IO_UNIT_3
556{
557 fCONFIG_PAGE_HEADER Header; /* 00h */
558 U8 GPIOCount; /* 04h */
559 U8 Reserved1; /* 05h */
560 U16 Reserved2; /* 06h */
561 U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */
562} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
563 IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
564
565#define MPI_IOUNITPAGE3_PAGEVERSION (0x01)
566
567#define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFC)
568#define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2)
569#define MPI_IOUNITPAGE3_GPIO_SETTING_OFF (0x00)
570#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)
571
572
573/****************************************************************************
574* IOC Config Pages
575****************************************************************************/
576
577typedef struct _CONFIG_PAGE_IOC_0
578{
579 fCONFIG_PAGE_HEADER Header; /* 00h */
580 U32 TotalNVStore; /* 04h */
581 U32 FreeNVStore; /* 08h */
582 U16 VendorID; /* 0Ch */
583 U16 DeviceID; /* 0Eh */
584 U8 RevisionID; /* 10h */
585 U8 Reserved[3]; /* 11h */
586 U32 ClassCode; /* 14h */
587 U16 SubsystemVendorID; /* 18h */
588 U16 SubsystemID; /* 1Ah */
589} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
590 IOCPage0_t, MPI_POINTER pIOCPage0_t;
591
592#define MPI_IOCPAGE0_PAGEVERSION (0x01)
593
594
595typedef struct _CONFIG_PAGE_IOC_1
596{
597 fCONFIG_PAGE_HEADER Header; /* 00h */
598 U32 Flags; /* 04h */
599 U32 CoalescingTimeout; /* 08h */
600 U8 CoalescingDepth; /* 0Ch */
601 U8 PCISlotNum; /* 0Dh */
602 U8 Reserved[2]; /* 0Eh */
603} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
604 IOCPage1_t, MPI_POINTER pIOCPage1_t;
605
606#define MPI_IOCPAGE1_PAGEVERSION (0x01)
607
608/* defines for the Flags field */
609#define MPI_IOCPAGE1_EEDP_HOST_SUPPORTS_DIF (0x08000000)
610#define MPI_IOCPAGE1_EEDP_MODE_MASK (0x07000000)
611#define MPI_IOCPAGE1_EEDP_MODE_OFF (0x00000000)
612#define MPI_IOCPAGE1_EEDP_MODE_T10 (0x01000000)
613#define MPI_IOCPAGE1_EEDP_MODE_LSI_1 (0x02000000)
614#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)
615
616#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)
617
618
619typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
620{
621 U8 VolumeID; /* 00h */
622 U8 VolumeBus; /* 01h */
623 U8 VolumeIOC; /* 02h */
624 U8 VolumePageNumber; /* 03h */
625 U8 VolumeType; /* 04h */
626 U8 Flags; /* 05h */
627 U16 Reserved3; /* 06h */
628} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
629 ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
630
631/* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */
632
633#define MPI_RAID_VOL_TYPE_IS (0x00)
634#define MPI_RAID_VOL_TYPE_IME (0x01)
635#define MPI_RAID_VOL_TYPE_IM (0x02)
636
637/* IOC Page 2 Volume Flags values */
638
639#define MPI_IOCPAGE2_FLAG_VOLUME_INACTIVE (0x08)
640
641/*
642 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
643 * one and check Header.PageLength at runtime.
644 */
645#ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX
646#define MPI_IOC_PAGE_2_RAID_VOLUME_MAX (1)
647#endif
648
649typedef struct _CONFIG_PAGE_IOC_2
650{
651 fCONFIG_PAGE_HEADER Header; /* 00h */
652 U32 CapabilitiesFlags; /* 04h */
653 U8 NumActiveVolumes; /* 08h */
654 U8 MaxVolumes; /* 09h */
655 U8 NumActivePhysDisks; /* 0Ah */
656 U8 MaxPhysDisks; /* 0Bh */
657 fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
658} fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
659 IOCPage2_t, MPI_POINTER pIOCPage2_t;
660
661#define MPI_IOCPAGE2_PAGEVERSION (0x02)
662
663/* IOC Page 2 Capabilities flags */
664
665#define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT (0x00000001)
666#define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT (0x00000002)
667#define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT (0x00000004)
668#define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT (0x20000000)
669#define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT (0x40000000)
670#define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT (0x80000000)
671
672
673typedef struct _IOC_3_PHYS_DISK
674{
675 U8 PhysDiskID; /* 00h */
676 U8 PhysDiskBus; /* 01h */
677 U8 PhysDiskIOC; /* 02h */
678 U8 PhysDiskNum; /* 03h */
679} IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK,
680 Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t;
681
682/*
683 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
684 * one and check Header.PageLength at runtime.
685 */
686#ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX
687#define MPI_IOC_PAGE_3_PHYSDISK_MAX (1)
688#endif
689
690typedef struct _CONFIG_PAGE_IOC_3
691{
692 fCONFIG_PAGE_HEADER Header; /* 00h */
693 U8 NumPhysDisks; /* 04h */
694 U8 Reserved1; /* 05h */
695 U16 Reserved2; /* 06h */
696 IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */
697} fCONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3,
698 IOCPage3_t, MPI_POINTER pIOCPage3_t;
699
700#define MPI_IOCPAGE3_PAGEVERSION (0x00)
701
702
703typedef struct _IOC_4_SEP
704{
705 U8 SEPTargetID; /* 00h */
706 U8 SEPBus; /* 01h */
707 U16 Reserved; /* 02h */
708} IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP,
709 Ioc4Sep_t, MPI_POINTER pIoc4Sep_t;
710
711/*
712 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
713 * one and check Header.PageLength at runtime.
714 */
715#ifndef MPI_IOC_PAGE_4_SEP_MAX
716#define MPI_IOC_PAGE_4_SEP_MAX (1)
717#endif
718
719typedef struct _CONFIG_PAGE_IOC_4
720{
721 fCONFIG_PAGE_HEADER Header; /* 00h */
722 U8 ActiveSEP; /* 04h */
723 U8 MaxSEP; /* 05h */
724 U16 Reserved1; /* 06h */
725 IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */
726} fCONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4,
727 IOCPage4_t, MPI_POINTER pIOCPage4_t;
728
729#define MPI_IOCPAGE4_PAGEVERSION (0x00)
730
731
732typedef struct _IOC_5_HOT_SPARE
733{
734 U8 PhysDiskNum; /* 00h */
735 U8 Reserved; /* 01h */
736 U8 HotSparePool; /* 02h */
737 U8 Flags; /* 03h */
738} IOC_5_HOT_SPARE, MPI_POINTER PTR_IOC_5_HOT_SPARE,
739 Ioc5HotSpare_t, MPI_POINTER pIoc5HotSpare_t;
740
741/* IOC Page 5 HotSpare Flags */
742#define MPI_IOC_PAGE_5_HOT_SPARE_ACTIVE (0x01)
743
744/*
745 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
746 * one and check Header.PageLength at runtime.
747 */
748#ifndef MPI_IOC_PAGE_5_HOT_SPARE_MAX
749#define MPI_IOC_PAGE_5_HOT_SPARE_MAX (1)
750#endif
751
752typedef struct _CONFIG_PAGE_IOC_5
753{
754 fCONFIG_PAGE_HEADER Header; /* 00h */
755 U32 Reserved1; /* 04h */
756 U8 NumHotSpares; /* 08h */
757 U8 Reserved2; /* 09h */
758 U16 Reserved3; /* 0Ah */
759 IOC_5_HOT_SPARE HotSpare[MPI_IOC_PAGE_5_HOT_SPARE_MAX]; /* 0Ch */
760} fCONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5,
761 IOCPage5_t, MPI_POINTER pIOCPage5_t;
762
763#define MPI_IOCPAGE5_PAGEVERSION (0x00)
764
765
766/****************************************************************************
767* BIOS Port Config Pages
768****************************************************************************/
769
770typedef struct _CONFIG_PAGE_BIOS_1
771{
772 fCONFIG_PAGE_HEADER Header; /* 00h */
773 U32 BiosOptions; /* 04h */
774 U32 IOCSettings; /* 08h */
775 U32 Reserved1; /* 0Ch */
776 U32 DeviceSettings; /* 10h */
777 U16 NumberOfDevices; /* 14h */
778 U16 Reserved2; /* 16h */
779 U16 IOTimeoutBlockDevicesNonRM; /* 18h */
780 U16 IOTimeoutSequential; /* 1Ah */
781 U16 IOTimeoutOther; /* 1Ch */
782 U16 IOTimeoutBlockDevicesRM; /* 1Eh */
783} fCONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1,
784 BIOSPage1_t, MPI_POINTER pBIOSPage1_t;
785
786#define MPI_BIOSPAGE1_PAGEVERSION (0x00)
787
788/* values for the BiosOptions field */
789#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400)
790#define MPI_BIOSPAGE1_OPTIONS_FC_ENABLE (0x00000200)
791#define MPI_BIOSPAGE1_OPTIONS_SAS_ENABLE (0x00000100)
792#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
793
794/* values for the IOCSettings field */
795#define MPI_BIOSPAGE1_IOCSET_MASK_SPINUP_DELAY (0x00000F00)
796#define MPI_BIOSPAGE1_IOCSET_SHIFT_SPINUP_DELAY (8)
797
798#define MPI_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0)
799#define MPI_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000)
800#define MPI_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040)
801#define MPI_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080)
802
803#define MPI_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030)
804#define MPI_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000)
805#define MPI_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010)
806#define MPI_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020)
807#define MPI_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030)
808
809#define MPI_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008)
810
811/* values for the DeviceSettings field */
812#define MPI_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008)
813#define MPI_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004)
814#define MPI_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002)
815#define MPI_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001)
816
817
818/****************************************************************************
819* SCSI Port Config Pages
820****************************************************************************/
821
822typedef struct _CONFIG_PAGE_SCSI_PORT_0
823{
824 fCONFIG_PAGE_HEADER Header; /* 00h */
825 U32 Capabilities; /* 04h */
826 U32 PhysicalInterface; /* 08h */
827} fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
828 SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
829
830#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x01)
831
832#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001)
833#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002)
834#define MPI_SCSIPORTPAGE0_CAP_QAS (0x00000004)
835#define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK (0x0000FF00)
836#define MPI_SCSIPORTPAGE0_SYNC_ASYNC (0x00)
837#define MPI_SCSIPORTPAGE0_SYNC_5 (0x32)
838#define MPI_SCSIPORTPAGE0_SYNC_10 (0x19)
839#define MPI_SCSIPORTPAGE0_SYNC_20 (0x0C)
840#define MPI_SCSIPORTPAGE0_SYNC_33_33 (0x0B)
841#define MPI_SCSIPORTPAGE0_SYNC_40 (0x0A)
842#define MPI_SCSIPORTPAGE0_SYNC_80 (0x09)
843#define MPI_SCSIPORTPAGE0_SYNC_160 (0x08)
844#define MPI_SCSIPORTPAGE0_SYNC_UNKNOWN (0xFF)
845
846#define MPI_SCSIPORTPAGE0_CAP_SHIFT_MIN_SYNC_PERIOD (8)
847#define MPI_SCSIPORTPAGE0_CAP_GET_MIN_SYNC_PERIOD(Cap) \
848 ( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MASK_MIN_SYNC_PERIOD) \
849 >> MPI_SCSIPORTPAGE0_CAP_SHIFT_MIN_SYNC_PERIOD \
850 )
851#define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
852#define MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET (16)
853#define MPI_SCSIPORTPAGE0_CAP_GET_MAX_SYNC_OFFSET(Cap) \
854 ( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MASK_MAX_SYNC_OFFSET) \
855 >> MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET \
856 )
857#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000)
858#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000)
859
860#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK (0x00000003)
861#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD (0x01)
862#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE (0x02)
863#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD (0x03)
864#define MPI_SCSIPORTPAGE0_PHY_MASK_CONNECTED_ID (0xFF000000)
865#define MPI_SCSIPORTPAGE0_PHY_SHIFT_CONNECTED_ID (24)
866#define MPI_SCSIPORTPAGE0_PHY_BUS_FREE_CONNECTED_ID (0xFE)
867#define MPI_SCSIPORTPAGE0_PHY_UNKNOWN_CONNECTED_ID (0xFF)
868
869
870typedef struct _CONFIG_PAGE_SCSI_PORT_1
871{
872 fCONFIG_PAGE_HEADER Header; /* 00h */
873 U32 Configuration; /* 04h */
874 U32 OnBusTimerValue; /* 08h */
875 U8 TargetConfig; /* 0Ch */
876 U8 Reserved1; /* 0Dh */
877 U16 IDConfig; /* 0Eh */
878} fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
879 SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
880
881#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x03)
882
883/* Configuration values */
884#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF)
885#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000)
886#define MPI_SCSIPORTPAGE1_CFG_SHIFT_PORT_RESPONSE_ID (16)
887
888/* TargetConfig values */
889#define MPI_SCSIPORTPAGE1_TARGCONFIG_TARG_ONLY (0x01)
890#define MPI_SCSIPORTPAGE1_TARGCONFIG_INIT_TARG (0x02)
891
892
893typedef struct _MPI_DEVICE_INFO
894{
895 U8 Timeout; /* 00h */
896 U8 SyncFactor; /* 01h */
897 U16 DeviceFlags; /* 02h */
898} MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO,
899 MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;
900
901typedef struct _CONFIG_PAGE_SCSI_PORT_2
902{
903 fCONFIG_PAGE_HEADER Header; /* 00h */
904 U32 PortFlags; /* 04h */
905 U32 PortSettings; /* 08h */
906 MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */
907} fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
908 SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
909
910#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x02)
911
912/* PortFlags values */
913#define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW (0x00000001)
914#define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET (0x00000004)
915#define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS (0x00000008)
916#define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE (0x00000010)
917
918#define MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK (0x00000060)
919#define MPI_SCSIPORTPAGE2_PORT_FLAGS_FULL_DV (0x00000000)
920#define MPI_SCSIPORTPAGE2_PORT_FLAGS_BASIC_DV_ONLY (0x00000020)
921#define MPI_SCSIPORTPAGE2_PORT_FLAGS_OFF_DV (0x00000060)
922
923
924/* PortSettings values */
925#define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F)
926#define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030)
927#define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA (0x00000000)
928#define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA (0x00000010)
929#define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020)
930#define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030)
931#define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0)
932#define MPI_SCSIPORTPAGE2_PORT_RM_NONE (0x00000000)
933#define MPI_SCSIPORTPAGE2_PORT_RM_BOOT_ONLY (0x00000040)
934#define MPI_SCSIPORTPAGE2_PORT_RM_WITH_MEDIA (0x00000080)
935#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00)
936#define MPI_SCSIPORTPAGE2_PORT_SHIFT_SPINUP_DELAY (8)
937#define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS (0x00003000)
938#define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS (0x00000000)
939#define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00001000)
940#define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS (0x00003000)
941
942#define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE (0x0001)
943#define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE (0x0002)
944#define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE (0x0004)
945#define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE (0x0008)
946#define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE (0x0010)
947#define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE (0x0020)
948
949
950/****************************************************************************
951* SCSI Target Device Config Pages
952****************************************************************************/
953
954typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
955{
956 fCONFIG_PAGE_HEADER Header; /* 00h */
957 U32 NegotiatedParameters; /* 04h */
958 U32 Information; /* 08h */
959} fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
960 SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
961
962#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x03)
963
964#define MPI_SCSIDEVPAGE0_NP_IU (0x00000001)
965#define MPI_SCSIDEVPAGE0_NP_DT (0x00000002)
966#define MPI_SCSIDEVPAGE0_NP_QAS (0x00000004)
967#define MPI_SCSIDEVPAGE0_NP_HOLD_MCS (0x00000008)
968#define MPI_SCSIDEVPAGE0_NP_WR_FLOW (0x00000010)
969#define MPI_SCSIDEVPAGE0_NP_RD_STRM (0x00000020)
970#define MPI_SCSIDEVPAGE0_NP_RTI (0x00000040)
971#define MPI_SCSIDEVPAGE0_NP_PCOMP_EN (0x00000080)
972#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK (0x0000FF00)
973#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_PERIOD (8)
974#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000)
975#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_OFFSET (16)
976#define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000)
977#define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000)
978
979#define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED (0x00000001)
980#define MPI_SCSIDEVPAGE0_INFO_SDTR_REJECTED (0x00000002)
981#define MPI_SCSIDEVPAGE0_INFO_WDTR_REJECTED (0x00000004)
982#define MPI_SCSIDEVPAGE0_INFO_PPR_REJECTED (0x00000008)
983
984
985typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
986{
987 fCONFIG_PAGE_HEADER Header; /* 00h */
988 U32 RequestedParameters; /* 04h */
989 U32 Reserved; /* 08h */
990 U32 Configuration; /* 0Ch */
991} fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
992 SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
993
994#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x04)
995
996#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001)
997#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002)
998#define MPI_SCSIDEVPAGE1_RP_QAS (0x00000004)
999#define MPI_SCSIDEVPAGE1_RP_HOLD_MCS (0x00000008)
1000#define MPI_SCSIDEVPAGE1_RP_WR_FLOW (0x00000010)
1001#define MPI_SCSIDEVPAGE1_RP_RD_STRM (0x00000020)
1002#define MPI_SCSIDEVPAGE1_RP_RTI (0x00000040)
1003#define MPI_SCSIDEVPAGE1_RP_PCOMP_EN (0x00000080)
1004#define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK (0x0000FF00)
1005#define MPI_SCSIDEVPAGE1_RP_SHIFT_MIN_SYNC_PERIOD (8)
1006#define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
1007#define MPI_SCSIDEVPAGE1_RP_SHIFT_MAX_SYNC_OFFSET (16)
1008#define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000)
1009#define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000)
1010
1011#define MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED (0x00000002)
1012#define MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED (0x00000004)
1013#define MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE (0x00000008)
1014#define MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG (0x00000010)
1015
1016
1017typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
1018{
1019 fCONFIG_PAGE_HEADER Header; /* 00h */
1020 U32 DomainValidation; /* 04h */
1021 U32 ParityPipeSelect; /* 08h */
1022 U32 DataPipeSelect; /* 0Ch */
1023} fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
1024 SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t;
1025
1026#define MPI_SCSIDEVPAGE2_PAGEVERSION (0x01)
1027
1028#define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE (0x00000010)
1029#define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE (0x00000020)
1030#define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL (0x00000380)
1031#define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL (0x00001C00)
1032#define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL (0x0000E000)
1033#define MPI_SCSIDEVPAGE2_DV_XCLKH_ST (0x10000000)
1034#define MPI_SCSIDEVPAGE2_DV_XCLKS_ST (0x20000000)
1035#define MPI_SCSIDEVPAGE2_DV_XCLKH_DT (0x40000000)
1036#define MPI_SCSIDEVPAGE2_DV_XCLKS_DT (0x80000000)
1037
1038#define MPI_SCSIDEVPAGE2_PPS_PPS_MASK (0x00000003)
1039
1040#define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK (0x00000003)
1041#define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK (0x0000000C)
1042#define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK (0x00000030)
1043#define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK (0x000000C0)
1044#define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK (0x00000300)
1045#define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK (0x00000C00)
1046#define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK (0x00003000)
1047#define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK (0x0000C000)
1048#define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK (0x00030000)
1049#define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK (0x000C0000)
1050#define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK (0x00300000)
1051#define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK (0x00C00000)
1052#define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK (0x03000000)
1053#define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK (0x0C000000)
1054#define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK (0x30000000)
1055#define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK (0xC0000000)
1056
1057
1058typedef struct _CONFIG_PAGE_SCSI_DEVICE_3
1059{
1060 fCONFIG_PAGE_HEADER Header; /* 00h */
1061 U16 MsgRejectCount; /* 04h */
1062 U16 PhaseErrorCount; /* 06h */
1063 U16 ParityErrorCount; /* 08h */
1064 U16 Reserved; /* 0Ah */
1065} fCONFIG_PAGE_SCSI_DEVICE_3, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_3,
1066 SCSIDevicePage3_t, MPI_POINTER pSCSIDevicePage3_t;
1067
1068#define MPI_SCSIDEVPAGE3_PAGEVERSION (0x00)
1069
1070#define MPI_SCSIDEVPAGE3_MAX_COUNTER (0xFFFE)
1071#define MPI_SCSIDEVPAGE3_UNSUPPORTED_COUNTER (0xFFFF)
1072
1073
1074/****************************************************************************
1075* FC Port Config Pages
1076****************************************************************************/
1077
1078typedef struct _CONFIG_PAGE_FC_PORT_0
1079{
1080 fCONFIG_PAGE_HEADER Header; /* 00h */
1081 U32 Flags; /* 04h */
1082 U8 MPIPortNumber; /* 08h */
1083 U8 LinkType; /* 09h */
1084 U8 PortState; /* 0Ah */
1085 U8 Reserved; /* 0Bh */
1086 U32 PortIdentifier; /* 0Ch */
1087 U64 WWNN; /* 10h */
1088 U64 WWPN; /* 18h */
1089 U32 SupportedServiceClass; /* 20h */
1090 U32 SupportedSpeeds; /* 24h */
1091 U32 CurrentSpeed; /* 28h */
1092 U32 MaxFrameSize; /* 2Ch */
1093 U64 FabricWWNN; /* 30h */
1094 U64 FabricWWPN; /* 38h */
1095 U32 DiscoveredPortsCount; /* 40h */
1096 U32 MaxInitiators; /* 44h */
1097 U8 MaxAliasesSupported; /* 48h */
1098 U8 MaxHardAliasesSupported; /* 49h */
1099 U8 NumCurrentAliases; /* 4Ah */
1100 U8 Reserved1; /* 4Bh */
1101} fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
1102 FCPortPage0_t, MPI_POINTER pFCPortPage0_t;
1103
1104#define MPI_FCPORTPAGE0_PAGEVERSION (0x02)
1105
1106#define MPI_FCPORTPAGE0_FLAGS_PROT_MASK (0x0000000F)
1107#define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_INIT (MPI_PORTFACTS_PROTOCOL_INITIATOR)
1108#define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_TARG (MPI_PORTFACTS_PROTOCOL_TARGET)
1109#define MPI_FCPORTPAGE0_FLAGS_PROT_LAN (MPI_PORTFACTS_PROTOCOL_LAN)
1110#define MPI_FCPORTPAGE0_FLAGS_PROT_LOGBUSADDR (MPI_PORTFACTS_PROTOCOL_LOGBUSADDR)
1111
1112#define MPI_FCPORTPAGE0_FLAGS_ALIAS_ALPA_SUPPORTED (0x00000010)
1113#define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED (0x00000020)
1114#define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID (0x00000040)
1115
1116#define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK (0x00000F00)
1117#define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT (0x00000000)
1118#define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT (0x00000100)
1119#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP (0x00000200)
1120#define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT (0x00000400)
1121#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP (0x00000800)
1122
1123#define MPI_FCPORTPAGE0_LTYPE_RESERVED (0x00)
1124#define MPI_FCPORTPAGE0_LTYPE_OTHER (0x01)
1125#define MPI_FCPORTPAGE0_LTYPE_UNKNOWN (0x02)
1126#define MPI_FCPORTPAGE0_LTYPE_COPPER (0x03)
1127#define MPI_FCPORTPAGE0_LTYPE_SINGLE_1300 (0x04)
1128#define MPI_FCPORTPAGE0_LTYPE_SINGLE_1500 (0x05)
1129#define MPI_FCPORTPAGE0_LTYPE_50_LASER_MULTI (0x06)
1130#define MPI_FCPORTPAGE0_LTYPE_50_LED_MULTI (0x07)
1131#define MPI_FCPORTPAGE0_LTYPE_62_LASER_MULTI (0x08)
1132#define MPI_FCPORTPAGE0_LTYPE_62_LED_MULTI (0x09)
1133#define MPI_FCPORTPAGE0_LTYPE_MULTI_LONG_WAVE (0x0A)
1134#define MPI_FCPORTPAGE0_LTYPE_MULTI_SHORT_WAVE (0x0B)
1135#define MPI_FCPORTPAGE0_LTYPE_LASER_SHORT_WAVE (0x0C)
1136#define MPI_FCPORTPAGE0_LTYPE_LED_SHORT_WAVE (0x0D)
1137#define MPI_FCPORTPAGE0_LTYPE_1300_LONG_WAVE (0x0E)
1138#define MPI_FCPORTPAGE0_LTYPE_1500_LONG_WAVE (0x0F)
1139
1140#define MPI_FCPORTPAGE0_PORTSTATE_UNKNOWN (0x01) /*(SNIA)HBA_PORTSTATE_UNKNOWN 1 Unknown */
1141#define MPI_FCPORTPAGE0_PORTSTATE_ONLINE (0x02) /*(SNIA)HBA_PORTSTATE_ONLINE 2 Operational */
1142#define MPI_FCPORTPAGE0_PORTSTATE_OFFLINE (0x03) /*(SNIA)HBA_PORTSTATE_OFFLINE 3 User Offline */
1143#define MPI_FCPORTPAGE0_PORTSTATE_BYPASSED (0x04) /*(SNIA)HBA_PORTSTATE_BYPASSED 4 Bypassed */
1144#define MPI_FCPORTPAGE0_PORTSTATE_DIAGNOST (0x05) /*(SNIA)HBA_PORTSTATE_DIAGNOSTICS 5 In diagnostics mode */
1145#define MPI_FCPORTPAGE0_PORTSTATE_LINKDOWN (0x06) /*(SNIA)HBA_PORTSTATE_LINKDOWN 6 Link Down */
1146#define MPI_FCPORTPAGE0_PORTSTATE_ERROR (0x07) /*(SNIA)HBA_PORTSTATE_ERROR 7 Port Error */
1147#define MPI_FCPORTPAGE0_PORTSTATE_LOOPBACK (0x08) /*(SNIA)HBA_PORTSTATE_LOOPBACK 8 Loopback */
1148
1149#define MPI_FCPORTPAGE0_SUPPORT_CLASS_1 (0x00000001)
1150#define MPI_FCPORTPAGE0_SUPPORT_CLASS_2 (0x00000002)
1151#define MPI_FCPORTPAGE0_SUPPORT_CLASS_3 (0x00000004)
1152
1153#define MPI_FCPORTPAGE0_SUPPORT_SPEED_UKNOWN (0x00000000) /* (SNIA)HBA_PORTSPEED_UNKNOWN 0 Unknown - transceiver incapable of reporting */
1154#define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED (0x00000001) /* (SNIA)HBA_PORTSPEED_1GBIT 1 1 GBit/sec */
1155#define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED (0x00000002) /* (SNIA)HBA_PORTSPEED_2GBIT 2 2 GBit/sec */
1156#define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED (0x00000004) /* (SNIA)HBA_PORTSPEED_10GBIT 4 10 GBit/sec */
1157#define MPI_FCPORTPAGE0_SUPPORT_4GBIT_SPEED (0x00000008) /* (SNIA)HBA_PORTSPEED_4GBIT 8 4 GBit/sec */
1158
1159#define MPI_FCPORTPAGE0_CURRENT_SPEED_UKNOWN MPI_FCPORTPAGE0_SUPPORT_SPEED_UKNOWN
1160#define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED
1161#define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED
1162#define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED
1163#define MPI_FCPORTPAGE0_CURRENT_SPEED_4GBIT MPI_FCPORTPAGE0_SUPPORT_4GBIT_SPEED
1164#define MPI_FCPORTPAGE0_CURRENT_SPEED_NOT_NEGOTIATED (0x00008000) /* (SNIA)HBA_PORTSPEED_NOT_NEGOTIATED (1<<15) Speed not established */
1165
1166
1167
1168typedef struct _CONFIG_PAGE_FC_PORT_1
1169{
1170 fCONFIG_PAGE_HEADER Header; /* 00h */
1171 U32 Flags; /* 04h */
1172 U64 NoSEEPROMWWNN; /* 08h */
1173 U64 NoSEEPROMWWPN; /* 10h */
1174 U8 HardALPA; /* 18h */
1175 U8 LinkConfig; /* 19h */
1176 U8 TopologyConfig; /* 1Ah */
1177 U8 AltConnector; /* 1Bh */
1178 U8 NumRequestedAliases; /* 1Ch */
1179 U8 RR_TOV; /* 1Dh */
1180 U8 InitiatorDeviceTimeout; /* 1Eh */
1181 U8 InitiatorIoPendTimeout; /* 1Fh */
1182} fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
1183 FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
1184
1185#define MPI_FCPORTPAGE1_PAGEVERSION (0x06)
1186
1187#define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN (0x08000000)
1188#define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY (0x04000000)
1189#define MPI_FCPORTPAGE1_FLAGS_FORCE_USE_NOSEEPROM_WWNS (0x02000000)
1190#define MPI_FCPORTPAGE1_FLAGS_VERBOSE_RESCAN_EVENTS (0x01000000)
1191#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000)
1192#define MPI_FCPORTPAGE1_FLAGS_PORT_OFFLINE (0x00400000)
1193#define MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK (0x00200000)
1194#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070)
1195#define MPI_FCPORTPAGE1_FLAGS_SUPPRESS_PROT_REG (0x00000008)
1196#define MPI_FCPORTPAGE1_FLAGS_PLOGI_ON_LOGO (0x00000004)
1197#define MPI_FCPORTPAGE1_FLAGS_MAINTAIN_LOGINS (0x00000002)
1198#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID (0x00000001)
1199#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN (0x00000000)
1200
1201#define MPI_FCPORTPAGE1_FLAGS_PROT_MASK (0xF0000000)
1202#define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT (28)
1203#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
1204#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
1205#define MPI_FCPORTPAGE1_FLAGS_PROT_LAN ((U32)MPI_PORTFACTS_PROTOCOL_LAN << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
1206#define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR ((U32)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
1207
1208#define MPI_FCPORTPAGE1_FLAGS_NONE_RR_TOV_UNITS (0x00000000)
1209#define MPI_FCPORTPAGE1_FLAGS_THOUSANDTH_RR_TOV_UNITS (0x00000010)
1210#define MPI_FCPORTPAGE1_FLAGS_TENTH_RR_TOV_UNITS (0x00000030)
1211#define MPI_FCPORTPAGE1_FLAGS_TEN_RR_TOV_UNITS (0x00000050)
1212
1213#define MPI_FCPORTPAGE1_HARD_ALPA_NOT_USED (0xFF)
1214
1215#define MPI_FCPORTPAGE1_LCONFIG_SPEED_MASK (0x0F)
1216#define MPI_FCPORTPAGE1_LCONFIG_SPEED_1GIG (0x00)
1217#define MPI_FCPORTPAGE1_LCONFIG_SPEED_2GIG (0x01)
1218#define MPI_FCPORTPAGE1_LCONFIG_SPEED_4GIG (0x02)
1219#define MPI_FCPORTPAGE1_LCONFIG_SPEED_10GIG (0x03)
1220#define MPI_FCPORTPAGE1_LCONFIG_SPEED_AUTO (0x0F)
1221
1222#define MPI_FCPORTPAGE1_TOPOLOGY_MASK (0x0F)
1223#define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT (0x01)
1224#define MPI_FCPORTPAGE1_TOPOLOGY_NPORT (0x02)
1225#define MPI_FCPORTPAGE1_TOPOLOGY_AUTO (0x0F)
1226
1227#define MPI_FCPORTPAGE1_ALT_CONN_UNKNOWN (0x00)
1228
1229#define MPI_FCPORTPAGE1_INITIATOR_DEV_TIMEOUT_MASK (0x7F)
1230
1231
1232typedef struct _CONFIG_PAGE_FC_PORT_2
1233{
1234 fCONFIG_PAGE_HEADER Header; /* 00h */
1235 U8 NumberActive; /* 04h */
1236 U8 ALPA[127]; /* 05h */
1237} fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
1238 FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
1239
1240#define MPI_FCPORTPAGE2_PAGEVERSION (0x01)
1241
1242
1243typedef struct _WWN_FORMAT
1244{
1245 U64 WWNN; /* 00h */
1246 U64 WWPN; /* 08h */
1247} WWN_FORMAT, MPI_POINTER PTR_WWN_FORMAT,
1248 WWNFormat, MPI_POINTER pWWNFormat;
1249
1250typedef union _FC_PORT_PERSISTENT_PHYSICAL_ID
1251{
1252 WWN_FORMAT WWN;
1253 U32 Did;
1254} FC_PORT_PERSISTENT_PHYSICAL_ID, MPI_POINTER PTR_FC_PORT_PERSISTENT_PHYSICAL_ID,
1255 PersistentPhysicalId_t, MPI_POINTER pPersistentPhysicalId_t;
1256
1257typedef struct _FC_PORT_PERSISTENT
1258{
1259 FC_PORT_PERSISTENT_PHYSICAL_ID PhysicalIdentifier; /* 00h */
1260 U8 TargetID; /* 10h */
1261 U8 Bus; /* 11h */
1262 U16 Flags; /* 12h */
1263} FC_PORT_PERSISTENT, MPI_POINTER PTR_FC_PORT_PERSISTENT,
1264 PersistentData_t, MPI_POINTER pPersistentData_t;
1265
1266#define MPI_PERSISTENT_FLAGS_SHIFT (16)
1267#define MPI_PERSISTENT_FLAGS_ENTRY_VALID (0x0001)
1268#define MPI_PERSISTENT_FLAGS_SCAN_ID (0x0002)
1269#define MPI_PERSISTENT_FLAGS_SCAN_LUNS (0x0004)
1270#define MPI_PERSISTENT_FLAGS_BOOT_DEVICE (0x0008)
1271#define MPI_PERSISTENT_FLAGS_BY_DID (0x0080)
1272
1273/*
1274 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1275 * one and check Header.PageLength at runtime.
1276 */
1277#ifndef MPI_FC_PORT_PAGE_3_ENTRY_MAX
1278#define MPI_FC_PORT_PAGE_3_ENTRY_MAX (1)
1279#endif
1280
1281typedef struct _CONFIG_PAGE_FC_PORT_3
1282{
1283 fCONFIG_PAGE_HEADER Header; /* 00h */
1284 FC_PORT_PERSISTENT Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX]; /* 04h */
1285} fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
1286 FCPortPage3_t, MPI_POINTER pFCPortPage3_t;
1287
1288#define MPI_FCPORTPAGE3_PAGEVERSION (0x01)
1289
1290
1291typedef struct _CONFIG_PAGE_FC_PORT_4
1292{
1293 fCONFIG_PAGE_HEADER Header; /* 00h */
1294 U32 PortFlags; /* 04h */
1295 U32 PortSettings; /* 08h */
1296} fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
1297 FCPortPage4_t, MPI_POINTER pFCPortPage4_t;
1298
1299#define MPI_FCPORTPAGE4_PAGEVERSION (0x00)
1300
1301#define MPI_FCPORTPAGE4_PORT_FLAGS_ALTERNATE_CHS (0x00000008)
1302
1303#define MPI_FCPORTPAGE4_PORT_MASK_INIT_HBA (0x00000030)
1304#define MPI_FCPORTPAGE4_PORT_DISABLE_INIT_HBA (0x00000000)
1305#define MPI_FCPORTPAGE4_PORT_BIOS_INIT_HBA (0x00000010)
1306#define MPI_FCPORTPAGE4_PORT_OS_INIT_HBA (0x00000020)
1307#define MPI_FCPORTPAGE4_PORT_BIOS_OS_INIT_HBA (0x00000030)
1308#define MPI_FCPORTPAGE4_PORT_REMOVABLE_MEDIA (0x000000C0)
1309#define MPI_FCPORTPAGE4_PORT_SPINUP_DELAY_MASK (0x00000F00)
1310
1311
1312typedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO
1313{
1314 U8 Flags; /* 00h */
1315 U8 AliasAlpa; /* 01h */
1316 U16 Reserved; /* 02h */
1317 U64 AliasWWNN; /* 04h */
1318 U64 AliasWWPN; /* 0Ch */
1319} fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
1320 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
1321 FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t;
1322
1323typedef struct _CONFIG_PAGE_FC_PORT_5
1324{
1325 fCONFIG_PAGE_HEADER Header; /* 00h */
1326 fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo; /* 04h */
1327} fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
1328 FCPortPage5_t, MPI_POINTER pFCPortPage5_t;
1329
1330#define MPI_FCPORTPAGE5_PAGEVERSION (0x02)
1331
1332#define MPI_FCPORTPAGE5_FLAGS_ALPA_ACQUIRED (0x01)
1333#define MPI_FCPORTPAGE5_FLAGS_HARD_ALPA (0x02)
1334#define MPI_FCPORTPAGE5_FLAGS_HARD_WWNN (0x04)
1335#define MPI_FCPORTPAGE5_FLAGS_HARD_WWPN (0x08)
1336#define MPI_FCPORTPAGE5_FLAGS_DISABLE (0x10)
1337
1338typedef struct _CONFIG_PAGE_FC_PORT_6
1339{
1340 fCONFIG_PAGE_HEADER Header; /* 00h */
1341 U32 Reserved; /* 04h */
1342 U64 TimeSinceReset; /* 08h */
1343 U64 TxFrames; /* 10h */
1344 U64 RxFrames; /* 18h */
1345 U64 TxWords; /* 20h */
1346 U64 RxWords; /* 28h */
1347 U64 LipCount; /* 30h */
1348 U64 NosCount; /* 38h */
1349 U64 ErrorFrames; /* 40h */
1350 U64 DumpedFrames; /* 48h */
1351 U64 LinkFailureCount; /* 50h */
1352 U64 LossOfSyncCount; /* 58h */
1353 U64 LossOfSignalCount; /* 60h */
1354 U64 PrimativeSeqErrCount; /* 68h */
1355 U64 InvalidTxWordCount; /* 70h */
1356 U64 InvalidCrcCount; /* 78h */
1357 U64 FcpInitiatorIoCount; /* 80h */
1358} fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
1359 FCPortPage6_t, MPI_POINTER pFCPortPage6_t;
1360
1361#define MPI_FCPORTPAGE6_PAGEVERSION (0x00)
1362
1363
1364typedef struct _CONFIG_PAGE_FC_PORT_7
1365{
1366 fCONFIG_PAGE_HEADER Header; /* 00h */
1367 U32 Reserved; /* 04h */
1368 U8 PortSymbolicName[256]; /* 08h */
1369} fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
1370 FCPortPage7_t, MPI_POINTER pFCPortPage7_t;
1371
1372#define MPI_FCPORTPAGE7_PAGEVERSION (0x00)
1373
1374
1375typedef struct _CONFIG_PAGE_FC_PORT_8
1376{
1377 fCONFIG_PAGE_HEADER Header; /* 00h */
1378 U32 BitVector[8]; /* 04h */
1379} fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
1380 FCPortPage8_t, MPI_POINTER pFCPortPage8_t;
1381
1382#define MPI_FCPORTPAGE8_PAGEVERSION (0x00)
1383
1384
1385typedef struct _CONFIG_PAGE_FC_PORT_9
1386{
1387 fCONFIG_PAGE_HEADER Header; /* 00h */
1388 U32 Reserved; /* 04h */
1389 U64 GlobalWWPN; /* 08h */
1390 U64 GlobalWWNN; /* 10h */
1391 U32 UnitType; /* 18h */
1392 U32 PhysicalPortNumber; /* 1Ch */
1393 U32 NumAttachedNodes; /* 20h */
1394 U16 IPVersion; /* 24h */
1395 U16 UDPPortNumber; /* 26h */
1396 U8 IPAddress[16]; /* 28h */
1397 U16 Reserved1; /* 38h */
1398 U16 TopologyDiscoveryFlags; /* 3Ah */
1399} fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
1400 FCPortPage9_t, MPI_POINTER pFCPortPage9_t;
1401
1402#define MPI_FCPORTPAGE9_PAGEVERSION (0x00)
1403
1404
1405typedef struct _CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA
1406{
1407 U8 Id; /* 10h */
1408 U8 ExtId; /* 11h */
1409 U8 Connector; /* 12h */
1410 U8 Transceiver[8]; /* 13h */
1411 U8 Encoding; /* 1Bh */
1412 U8 BitRate_100mbs; /* 1Ch */
1413 U8 Reserved1; /* 1Dh */
1414 U8 Length9u_km; /* 1Eh */
1415 U8 Length9u_100m; /* 1Fh */
1416 U8 Length50u_10m; /* 20h */
1417 U8 Length62p5u_10m; /* 21h */
1418 U8 LengthCopper_m; /* 22h */
1419 U8 Reseverved2; /* 22h */
1420 U8 VendorName[16]; /* 24h */
1421 U8 Reserved3; /* 34h */
1422 U8 VendorOUI[3]; /* 35h */
1423 U8 VendorPN[16]; /* 38h */
1424 U8 VendorRev[4]; /* 48h */
1425 U16 Reserved4; /* 4Ch */
1426 U8 Reserved5; /* 4Eh */
1427 U8 CC_BASE; /* 4Fh */
1428} fCONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
1429 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
1430 FCPortPage10BaseSfpData_t, MPI_POINTER pFCPortPage10BaseSfpData_t;
1431
1432#define MPI_FCPORT10_BASE_ID_UNKNOWN (0x00)
1433#define MPI_FCPORT10_BASE_ID_GBIC (0x01)
1434#define MPI_FCPORT10_BASE_ID_FIXED (0x02)
1435#define MPI_FCPORT10_BASE_ID_SFP (0x03)
1436#define MPI_FCPORT10_BASE_ID_SFP_MIN (0x04)
1437#define MPI_FCPORT10_BASE_ID_SFP_MAX (0x7F)
1438#define MPI_FCPORT10_BASE_ID_VEND_SPEC_MASK (0x80)
1439
1440#define MPI_FCPORT10_BASE_EXTID_UNKNOWN (0x00)
1441#define MPI_FCPORT10_BASE_EXTID_MODDEF1 (0x01)
1442#define MPI_FCPORT10_BASE_EXTID_MODDEF2 (0x02)
1443#define MPI_FCPORT10_BASE_EXTID_MODDEF3 (0x03)
1444#define MPI_FCPORT10_BASE_EXTID_SEEPROM (0x04)
1445#define MPI_FCPORT10_BASE_EXTID_MODDEF5 (0x05)
1446#define MPI_FCPORT10_BASE_EXTID_MODDEF6 (0x06)
1447#define MPI_FCPORT10_BASE_EXTID_MODDEF7 (0x07)
1448#define MPI_FCPORT10_BASE_EXTID_VNDSPC_MASK (0x80)
1449
1450#define MPI_FCPORT10_BASE_CONN_UNKNOWN (0x00)
1451#define MPI_FCPORT10_BASE_CONN_SC (0x01)
1452#define MPI_FCPORT10_BASE_CONN_COPPER1 (0x02)
1453#define MPI_FCPORT10_BASE_CONN_COPPER2 (0x03)
1454#define MPI_FCPORT10_BASE_CONN_BNC_TNC (0x04)
1455#define MPI_FCPORT10_BASE_CONN_COAXIAL (0x05)
1456#define MPI_FCPORT10_BASE_CONN_FIBERJACK (0x06)
1457#define MPI_FCPORT10_BASE_CONN_LC (0x07)
1458#define MPI_FCPORT10_BASE_CONN_MT_RJ (0x08)
1459#define MPI_FCPORT10_BASE_CONN_MU (0x09)
1460#define MPI_FCPORT10_BASE_CONN_SG (0x0A)
1461#define MPI_FCPORT10_BASE_CONN_OPT_PIGT (0x0B)
1462#define MPI_FCPORT10_BASE_CONN_RSV1_MIN (0x0C)
1463#define MPI_FCPORT10_BASE_CONN_RSV1_MAX (0x1F)
1464#define MPI_FCPORT10_BASE_CONN_HSSDC_II (0x20)
1465#define MPI_FCPORT10_BASE_CONN_CPR_PIGT (0x21)
1466#define MPI_FCPORT10_BASE_CONN_RSV2_MIN (0x22)
1467#define MPI_FCPORT10_BASE_CONN_RSV2_MAX (0x7F)
1468#define MPI_FCPORT10_BASE_CONN_VNDSPC_MASK (0x80)
1469
1470#define MPI_FCPORT10_BASE_ENCODE_UNSPEC (0x00)
1471#define MPI_FCPORT10_BASE_ENCODE_8B10B (0x01)
1472#define MPI_FCPORT10_BASE_ENCODE_4B5B (0x02)
1473#define MPI_FCPORT10_BASE_ENCODE_NRZ (0x03)
1474#define MPI_FCPORT10_BASE_ENCODE_MANCHESTER (0x04)
1475
1476
1477typedef struct _CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA
1478{
1479 U8 Options[2]; /* 50h */
1480 U8 BitRateMax; /* 52h */
1481 U8 BitRateMin; /* 53h */
1482 U8 VendorSN[16]; /* 54h */
1483 U8 DateCode[8]; /* 64h */
1484 U8 Reserved5[3]; /* 6Ch */
1485 U8 CC_EXT; /* 6Fh */
1486} fCONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
1487 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
1488 FCPortPage10ExtendedSfpData_t, MPI_POINTER pFCPortPage10ExtendedSfpData_t;
1489
1490#define MPI_FCPORT10_EXT_OPTION1_RATESEL (0x20)
1491#define MPI_FCPORT10_EXT_OPTION1_TX_DISABLE (0x10)
1492#define MPI_FCPORT10_EXT_OPTION1_TX_FAULT (0x08)
1493#define MPI_FCPORT10_EXT_OPTION1_LOS_INVERT (0x04)
1494#define MPI_FCPORT10_EXT_OPTION1_LOS (0x02)
1495
1496
1497typedef struct _CONFIG_PAGE_FC_PORT_10
1498{
1499 fCONFIG_PAGE_HEADER Header; /* 00h */
1500 U8 Flags; /* 04h */
1501 U8 Reserved1; /* 05h */
1502 U16 Reserved2; /* 06h */
1503 U32 HwConfig1; /* 08h */
1504 U32 HwConfig2; /* 0Ch */
1505 fCONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */
1506 fCONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */
1507 U8 VendorSpecific[32]; /* 70h */
1508} fCONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10,
1509 FCPortPage10_t, MPI_POINTER pFCPortPage10_t;
1510
1511#define MPI_FCPORTPAGE10_PAGEVERSION (0x00)
1512
1513/* standard MODDEF pin definitions (from GBIC spec.) */
1514#define MPI_FCPORTPAGE10_FLAGS_MODDEF_MASK (0x00000007)
1515#define MPI_FCPORTPAGE10_FLAGS_MODDEF2 (0x00000001)
1516#define MPI_FCPORTPAGE10_FLAGS_MODDEF1 (0x00000002)
1517#define MPI_FCPORTPAGE10_FLAGS_MODDEF0 (0x00000004)
1518#define MPI_FCPORTPAGE10_FLAGS_MODDEF_NOGBIC (0x00000007)
1519#define MPI_FCPORTPAGE10_FLAGS_MODDEF_CPR_IEEE_CX (0x00000006)
1520#define MPI_FCPORTPAGE10_FLAGS_MODDEF_COPPER (0x00000005)
1521#define MPI_FCPORTPAGE10_FLAGS_MODDEF_OPTICAL_LW (0x00000004)
1522#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SEEPROM (0x00000003)
1523#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SW_OPTICAL (0x00000002)
1524#define MPI_FCPORTPAGE10_FLAGS_MODDEF_LX_IEEE_OPT_LW (0x00000001)
1525#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SX_IEEE_OPT_SW (0x00000000)
1526
1527#define MPI_FCPORTPAGE10_FLAGS_CC_BASE_OK (0x00000010)
1528#define MPI_FCPORTPAGE10_FLAGS_CC_EXT_OK (0x00000020)
1529
1530
1531/****************************************************************************
1532* FC Device Config Pages
1533****************************************************************************/
1534
1535typedef struct _CONFIG_PAGE_FC_DEVICE_0
1536{
1537 fCONFIG_PAGE_HEADER Header; /* 00h */
1538 U64 WWNN; /* 04h */
1539 U64 WWPN; /* 0Ch */
1540 U32 PortIdentifier; /* 14h */
1541 U8 Protocol; /* 18h */
1542 U8 Flags; /* 19h */
1543 U16 BBCredit; /* 1Ah */
1544 U16 MaxRxFrameSize; /* 1Ch */
1545 U8 ADISCHardALPA; /* 1Eh */
1546 U8 PortNumber; /* 1Fh */
1547 U8 FcPhLowestVersion; /* 20h */
1548 U8 FcPhHighestVersion; /* 21h */
1549 U8 CurrentTargetID; /* 22h */
1550 U8 CurrentBus; /* 23h */
1551} fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
1552 FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
1553
1554#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x03)
1555
1556#define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID (0x01)
1557#define MPI_FC_DEVICE_PAGE0_FLAGS_PLOGI_INVALID (0x02)
1558#define MPI_FC_DEVICE_PAGE0_FLAGS_PRLI_INVALID (0x04)
1559
1560#define MPI_FC_DEVICE_PAGE0_PROT_IP (0x01)
1561#define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET (0x02)
1562#define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR (0x04)
1563#define MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY (0x08)
1564
1565#define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK (MPI_FC_DEVICE_PGAD_PORT_MASK)
1566#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK (MPI_FC_DEVICE_PGAD_FORM_MASK)
1567#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
1568#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID (MPI_FC_DEVICE_PGAD_FORM_BUS_TID)
1569#define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK (MPI_FC_DEVICE_PGAD_ND_DID_MASK)
1570#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK (MPI_FC_DEVICE_PGAD_BT_BUS_MASK)
1571#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT)
1572#define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK (MPI_FC_DEVICE_PGAD_BT_TID_MASK)
1573
1574#define MPI_FC_DEVICE_PAGE0_HARD_ALPA_UNKNOWN (0xFF)
1575
1576/****************************************************************************
1577* RAID Volume Config Pages
1578****************************************************************************/
1579
1580typedef struct _RAID_VOL0_PHYS_DISK
1581{
1582 U16 Reserved; /* 00h */
1583 U8 PhysDiskMap; /* 02h */
1584 U8 PhysDiskNum; /* 03h */
1585} RAID_VOL0_PHYS_DISK, MPI_POINTER PTR_RAID_VOL0_PHYS_DISK,
1586 RaidVol0PhysDisk_t, MPI_POINTER pRaidVol0PhysDisk_t;
1587
1588#define MPI_RAIDVOL0_PHYSDISK_PRIMARY (0x01)
1589#define MPI_RAIDVOL0_PHYSDISK_SECONDARY (0x02)
1590
1591typedef struct _RAID_VOL0_STATUS
1592{
1593 U8 Flags; /* 00h */
1594 U8 State; /* 01h */
1595 U16 Reserved; /* 02h */
1596} RAID_VOL0_STATUS, MPI_POINTER PTR_RAID_VOL0_STATUS,
1597 RaidVol0Status_t, MPI_POINTER pRaidVol0Status_t;
1598
1599/* RAID Volume Page 0 VolumeStatus defines */
1600
1601#define MPI_RAIDVOL0_STATUS_FLAG_ENABLED (0x01)
1602#define MPI_RAIDVOL0_STATUS_FLAG_QUIESCED (0x02)
1603#define MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x04)
1604#define MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x08)
1605
1606#define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00)
1607#define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01)
1608#define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02)
1609
1610typedef struct _RAID_VOL0_SETTINGS
1611{
1612 U16 Settings; /* 00h */
1613 U8 HotSparePool; /* 01h */ /* MPI_RAID_HOT_SPARE_POOL_ */
1614 U8 Reserved; /* 02h */
1615} RAID_VOL0_SETTINGS, MPI_POINTER PTR_RAID_VOL0_SETTINGS,
1616 RaidVol0Settings, MPI_POINTER pRaidVol0Settings;
1617
1618/* RAID Volume Page 0 VolumeSettings defines */
1619
1620#define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001)
1621#define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002)
1622#define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004)
1623#define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008)
1624#define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010)
1625#define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000)
1626
1627/* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */
1628#define MPI_RAID_HOT_SPARE_POOL_0 (0x01)
1629#define MPI_RAID_HOT_SPARE_POOL_1 (0x02)
1630#define MPI_RAID_HOT_SPARE_POOL_2 (0x04)
1631#define MPI_RAID_HOT_SPARE_POOL_3 (0x08)
1632#define MPI_RAID_HOT_SPARE_POOL_4 (0x10)
1633#define MPI_RAID_HOT_SPARE_POOL_5 (0x20)
1634#define MPI_RAID_HOT_SPARE_POOL_6 (0x40)
1635#define MPI_RAID_HOT_SPARE_POOL_7 (0x80)
1636
1637/*
1638 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1639 * one and check Header.PageLength at runtime.
1640 */
1641#ifndef MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX
1642#define MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX (1)
1643#endif
1644
1645typedef struct _CONFIG_PAGE_RAID_VOL_0
1646{
1647 fCONFIG_PAGE_HEADER Header; /* 00h */
1648 U8 VolumeID; /* 04h */
1649 U8 VolumeBus; /* 05h */
1650 U8 VolumeIOC; /* 06h */
1651 U8 VolumeType; /* 07h */ /* MPI_RAID_VOL_TYPE_ */
1652 RAID_VOL0_STATUS VolumeStatus; /* 08h */
1653 RAID_VOL0_SETTINGS VolumeSettings; /* 0Ch */
1654 U32 MaxLBA; /* 10h */
1655 U32 Reserved1; /* 14h */
1656 U32 StripeSize; /* 18h */
1657 U32 Reserved2; /* 1Ch */
1658 U32 Reserved3; /* 20h */
1659 U8 NumPhysDisks; /* 24h */
1660 U8 Reserved4; /* 25h */
1661 U16 Reserved5; /* 26h */
1662 RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */
1663} fCONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
1664 RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
1665
1666#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x01)
1667
1668
1669/****************************************************************************
1670* RAID Physical Disk Config Pages
1671****************************************************************************/
1672
1673typedef struct _RAID_PHYS_DISK0_ERROR_DATA
1674{
1675 U8 ErrorCdbByte; /* 00h */
1676 U8 ErrorSenseKey; /* 01h */
1677 U16 Reserved; /* 02h */
1678 U16 ErrorCount; /* 04h */
1679 U8 ErrorASC; /* 06h */
1680 U8 ErrorASCQ; /* 07h */
1681 U16 SmartCount; /* 08h */
1682 U8 SmartASC; /* 0Ah */
1683 U8 SmartASCQ; /* 0Bh */
1684} RAID_PHYS_DISK0_ERROR_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_ERROR_DATA,
1685 RaidPhysDisk0ErrorData_t, MPI_POINTER pRaidPhysDisk0ErrorData_t;
1686
1687typedef struct _RAID_PHYS_DISK_INQUIRY_DATA
1688{
1689 U8 VendorID[8]; /* 00h */
1690 U8 ProductID[16]; /* 08h */
1691 U8 ProductRevLevel[4]; /* 18h */
1692 U8 Info[32]; /* 1Ch */
1693} RAID_PHYS_DISK0_INQUIRY_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_INQUIRY_DATA,
1694 RaidPhysDisk0InquiryData, MPI_POINTER pRaidPhysDisk0InquiryData;
1695
1696typedef struct _RAID_PHYS_DISK0_SETTINGS
1697{
1698 U8 SepID; /* 00h */
1699 U8 SepBus; /* 01h */
1700 U8 HotSparePool; /* 02h */ /* MPI_RAID_HOT_SPARE_POOL_ */
1701 U8 PhysDiskSettings; /* 03h */
1702} RAID_PHYS_DISK0_SETTINGS, MPI_POINTER PTR_RAID_PHYS_DISK0_SETTINGS,
1703 RaidPhysDiskSettings_t, MPI_POINTER pRaidPhysDiskSettings_t;
1704
1705typedef struct _RAID_PHYS_DISK0_STATUS
1706{
1707 U8 Flags; /* 00h */
1708 U8 State; /* 01h */
1709 U16 Reserved; /* 02h */
1710} RAID_PHYS_DISK0_STATUS, MPI_POINTER PTR_RAID_PHYS_DISK0_STATUS,
1711 RaidPhysDiskStatus_t, MPI_POINTER pRaidPhysDiskStatus_t;
1712
1713/* RAID Volume 2 IM Physical Disk DiskStatus flags */
1714
1715#define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01)
1716#define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02)
1717
1718#define MPI_PHYSDISK0_STATUS_ONLINE (0x00)
1719#define MPI_PHYSDISK0_STATUS_MISSING (0x01)
1720#define MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE (0x02)
1721#define MPI_PHYSDISK0_STATUS_FAILED (0x03)
1722#define MPI_PHYSDISK0_STATUS_INITIALIZING (0x04)
1723#define MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED (0x05)
1724#define MPI_PHYSDISK0_STATUS_FAILED_REQUESTED (0x06)
1725#define MPI_PHYSDISK0_STATUS_OTHER_OFFLINE (0xFF)
1726
1727typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0
1728{
1729 fCONFIG_PAGE_HEADER Header; /* 00h */
1730 U8 PhysDiskID; /* 04h */
1731 U8 PhysDiskBus; /* 05h */
1732 U8 PhysDiskIOC; /* 06h */
1733 U8 PhysDiskNum; /* 07h */
1734 RAID_PHYS_DISK0_SETTINGS PhysDiskSettings; /* 08h */
1735 U32 Reserved1; /* 0Ch */
1736 U32 Reserved2; /* 10h */
1737 U32 Reserved3; /* 14h */
1738 U8 DiskIdentifier[16]; /* 18h */
1739 RAID_PHYS_DISK0_INQUIRY_DATA InquiryData; /* 28h */
1740 RAID_PHYS_DISK0_STATUS PhysDiskStatus; /* 64h */
1741 U32 MaxLBA; /* 68h */
1742 RAID_PHYS_DISK0_ERROR_DATA ErrorData; /* 6Ch */
1743} fCONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0,
1744 RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t;
1745
1746#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x00)
1747
1748
1749/****************************************************************************
1750* LAN Config Pages
1751****************************************************************************/
1752
1753typedef struct _CONFIG_PAGE_LAN_0
1754{
1755 ConfigPageHeader_t Header; /* 00h */
1756 U16 TxRxModes; /* 04h */
1757 U16 Reserved; /* 06h */
1758 U32 PacketPrePad; /* 08h */
1759} fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
1760 LANPage0_t, MPI_POINTER pLANPage0_t;
1761
1762#define MPI_LAN_PAGE0_PAGEVERSION (0x01)
1763
1764#define MPI_LAN_PAGE0_RETURN_LOOPBACK (0x0000)
1765#define MPI_LAN_PAGE0_SUPPRESS_LOOPBACK (0x0001)
1766#define MPI_LAN_PAGE0_LOOPBACK_MASK (0x0001)
1767
1768typedef struct _CONFIG_PAGE_LAN_1
1769{
1770 ConfigPageHeader_t Header; /* 00h */
1771 U16 Reserved; /* 04h */
1772 U8 CurrentDeviceState; /* 06h */
1773 U8 Reserved1; /* 07h */
1774 U32 MinPacketSize; /* 08h */
1775 U32 MaxPacketSize; /* 0Ch */
1776 U32 HardwareAddressLow; /* 10h */
1777 U32 HardwareAddressHigh; /* 14h */
1778 U32 MaxWireSpeedLow; /* 18h */
1779 U32 MaxWireSpeedHigh; /* 1Ch */
1780 U32 BucketsRemaining; /* 20h */
1781 U32 MaxReplySize; /* 24h */
1782 U32 NegWireSpeedLow; /* 28h */
1783 U32 NegWireSpeedHigh; /* 2Ch */
1784} fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
1785 LANPage1_t, MPI_POINTER pLANPage1_t;
1786
1787#define MPI_LAN_PAGE1_PAGEVERSION (0x03)
1788
1789#define MPI_LAN_PAGE1_DEV_STATE_RESET (0x00)
1790#define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL (0x01)
1791
1792
1793/****************************************************************************
1794* Inband Config Pages
1795****************************************************************************/
1796
1797typedef struct _CONFIG_PAGE_INBAND_0
1798{
1799 fCONFIG_PAGE_HEADER Header; /* 00h */
1800 MPI_VERSION_FORMAT InbandVersion; /* 04h */
1801 U16 MaximumBuffers; /* 08h */
1802 U16 Reserved1; /* 0Ah */
1803} fCONFIG_PAGE_INBAND_0, MPI_POINTER PTR_CONFIG_PAGE_INBAND_0,
1804 InbandPage0_t, MPI_POINTER pInbandPage0_t;
1805
1806#define MPI_INBAND_PAGEVERSION (0x00)
1807
1808
1809
1810/****************************************************************************
1811* SAS IO Unit Config Pages
1812****************************************************************************/
1813
1814typedef struct _MPI_SAS_IO_UNIT0_PHY_DATA
1815{
1816 U8 Port; /* 00h */
1817 U8 PortFlags; /* 01h */
1818 U8 PhyFlags; /* 02h */
1819 U8 NegotiatedLinkRate; /* 03h */
1820 U32 ControllerPhyDeviceInfo;/* 04h */
1821 U16 AttachedDeviceHandle; /* 08h */
1822 U16 ControllerDevHandle; /* 0Ah */
1823 U32 Reserved2; /* 0Ch */
1824} MPI_SAS_IO_UNIT0_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT0_PHY_DATA,
1825 SasIOUnit0PhyData, MPI_POINTER pSasIOUnit0PhyData;
1826
1827/*
1828 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1829 * one and check Header.PageLength at runtime.
1830 */
1831#ifndef MPI_SAS_IOUNIT0_PHY_MAX
1832#define MPI_SAS_IOUNIT0_PHY_MAX (1)
1833#endif
1834
1835typedef struct _CONFIG_PAGE_SAS_IO_UNIT_0
1836{
1837 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1838 U32 Reserved1; /* 08h */
1839 U8 NumPhys; /* 0Ch */
1840 U8 Reserved2; /* 0Dh */
1841 U16 Reserved3; /* 0Eh */
1842 MPI_SAS_IO_UNIT0_PHY_DATA PhyData[MPI_SAS_IOUNIT0_PHY_MAX]; /* 10h */
1843} fCONFIG_PAGE_SAS_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_0,
1844 SasIOUnitPage0_t, MPI_POINTER pSasIOUnitPage0_t;
1845
1846#define MPI_SASIOUNITPAGE0_PAGEVERSION (0x00)
1847
1848/* values for SAS IO Unit Page 0 PortFlags */
1849#define MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS (0x08)
1850#define MPI_SAS_IOUNIT0_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
1851#define MPI_SAS_IOUNIT0_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
1852#define MPI_SAS_IOUNIT0_PORT_FLAGS_WAIT_FOR_PORTENABLE (0x02)
1853#define MPI_SAS_IOUNIT0_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
1854
1855/* values for SAS IO Unit Page 0 PhyFlags */
1856#define MPI_SAS_IOUNIT0_PHY_FLAGS_PHY_DISABLED (0x04)
1857#define MPI_SAS_IOUNIT0_PHY_FLAGS_TX_INVERT (0x02)
1858#define MPI_SAS_IOUNIT0_PHY_FLAGS_RX_INVERT (0x01)
1859
1860/* values for SAS IO Unit Page 0 NegotiatedLinkRate */
1861#define MPI_SAS_IOUNIT0_RATE_UNKNOWN (0x00)
1862#define MPI_SAS_IOUNIT0_RATE_PHY_DISABLED (0x01)
1863#define MPI_SAS_IOUNIT0_RATE_FAILED_SPEED_NEGOTIATION (0x02)
1864#define MPI_SAS_IOUNIT0_RATE_SATA_OOB_COMPLETE (0x03)
1865#define MPI_SAS_IOUNIT0_RATE_1_5 (0x08)
1866#define MPI_SAS_IOUNIT0_RATE_3_0 (0x09)
1867
1868/* see mpi_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */
1869
1870
1871typedef struct _MPI_SAS_IO_UNIT1_PHY_DATA
1872{
1873 U8 Port; /* 00h */
1874 U8 PortFlags; /* 01h */
1875 U8 PhyFlags; /* 02h */
1876 U8 MaxMinLinkRate; /* 03h */
1877 U32 ControllerPhyDeviceInfo;/* 04h */
1878 U32 Reserved1; /* 08h */
1879} MPI_SAS_IO_UNIT1_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT1_PHY_DATA,
1880 SasIOUnit1PhyData, MPI_POINTER pSasIOUnit1PhyData;
1881
1882/*
1883 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1884 * one and check Header.PageLength at runtime.
1885 */
1886#ifndef MPI_SAS_IOUNIT1_PHY_MAX
1887#define MPI_SAS_IOUNIT1_PHY_MAX (1)
1888#endif
1889
1890typedef struct _CONFIG_PAGE_SAS_IO_UNIT_1
1891{
1892 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1893 U32 Reserved1; /* 08h */
1894 U8 NumPhys; /* 0Ch */
1895 U8 Reserved2; /* 0Dh */
1896 U16 Reserved3; /* 0Eh */
1897 MPI_SAS_IO_UNIT1_PHY_DATA PhyData[MPI_SAS_IOUNIT1_PHY_MAX]; /* 10h */
1898} fCONFIG_PAGE_SAS_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_1,
1899 SasIOUnitPage1_t, MPI_POINTER pSasIOUnitPage1_t;
1900
1901#define MPI_SASIOUNITPAGE1_PAGEVERSION (0x00)
1902
1903/* values for SAS IO Unit Page 0 PortFlags */
1904#define MPI_SAS_IOUNIT1_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
1905#define MPI_SAS_IOUNIT1_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
1906#define MPI_SAS_IOUNIT1_PORT_FLAGS_WAIT_FOR_PORTENABLE (0x02)
1907#define MPI_SAS_IOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
1908
1909/* values for SAS IO Unit Page 0 PhyFlags */
1910#define MPI_SAS_IOUNIT1_PHY_FLAGS_PHY_DISABLE (0x04)
1911#define MPI_SAS_IOUNIT1_PHY_FLAGS_TX_INVERT (0x02)
1912#define MPI_SAS_IOUNIT1_PHY_FLAGS_RX_INVERT (0x01)
1913
1914/* values for SAS IO Unit Page 0 MaxMinLinkRate */
1915#define MPI_SAS_IOUNIT1_MAX_RATE_MASK (0xF0)
1916#define MPI_SAS_IOUNIT1_MAX_RATE_1_5 (0x80)
1917#define MPI_SAS_IOUNIT1_MAX_RATE_3_0 (0x90)
1918#define MPI_SAS_IOUNIT1_MIN_RATE_MASK (0x0F)
1919#define MPI_SAS_IOUNIT1_MIN_RATE_1_5 (0x08)
1920#define MPI_SAS_IOUNIT1_MIN_RATE_3_0 (0x09)
1921
1922/* see mpi_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
1923
1924
1925typedef struct _CONFIG_PAGE_SAS_IO_UNIT_2
1926{
1927 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1928 U32 Reserved1; /* 08h */
1929 U16 MaxPersistentIDs; /* 0Ch */
1930 U16 NumPersistentIDsUsed; /* 0Eh */
1931 U8 Status; /* 10h */
1932 U8 Flags; /* 11h */
1933 U16 Reserved2; /* 12h */
1934} fCONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2,
1935 SasIOUnitPage2_t, MPI_POINTER pSasIOUnitPage2_t;
1936
1937#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x00)
1938
1939/* values for SAS IO Unit Page 2 Status field */
1940#define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS (0x02)
1941#define MPI_SAS_IOUNIT2_STATUS_FULL_PERSISTENT_MAPPINGS (0x01)
1942
1943/* values for SAS IO Unit Page 2 Flags field */
1944#define MPI_SAS_IOUNIT2_FLAGS_DISABLE_PERSISTENT_MAPPINGS (0x01)
1945
1946
1947typedef struct _CONFIG_PAGE_SAS_IO_UNIT_3
1948{
1949 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1950 U32 Reserved1; /* 08h */
1951 U32 MaxInvalidDwordCount; /* 0Ch */
1952 U32 InvalidDwordCountTime; /* 10h */
1953 U32 MaxRunningDisparityErrorCount; /* 14h */
1954 U32 RunningDisparityErrorTime; /* 18h */
1955 U32 MaxLossDwordSynchCount; /* 1Ch */
1956 U32 LossDwordSynchCountTime; /* 20h */
1957 U32 MaxPhyResetProblemCount; /* 24h */
1958 U32 PhyResetProblemTime; /* 28h */
1959} fCONFIG_PAGE_SAS_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_3,
1960 SasIOUnitPage3_t, MPI_POINTER pSasIOUnitPage3_t;
1961
1962#define MPI_SASIOUNITPAGE3_PAGEVERSION (0x00)
1963
1964
1965typedef struct _CONFIG_PAGE_SAS_EXPANDER_0
1966{
1967 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1968 U32 Reserved1; /* 08h */
1969 U64 SASAddress; /* 0Ch */
1970 U32 Reserved2; /* 14h */
1971 U16 DevHandle; /* 18h */
1972 U16 ParentDevHandle; /* 1Ah */
1973 U16 ExpanderChangeCount; /* 1Ch */
1974 U16 ExpanderRouteIndexes; /* 1Eh */
1975 U8 NumPhys; /* 20h */
1976 U8 SASLevel; /* 21h */
1977 U8 Flags; /* 22h */
1978 U8 Reserved3; /* 23h */
1979} fCONFIG_PAGE_SAS_EXPANDER_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_0,
1980 SasExpanderPage0_t, MPI_POINTER pSasExpanderPage0_t;
1981
1982#define MPI_SASEXPANDER0_PAGEVERSION (0x00)
1983
1984/* values for SAS Expander Page 0 Flags field */
1985#define MPI_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x02)
1986#define MPI_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x01)
1987
1988
1989typedef struct _CONFIG_PAGE_SAS_DEVICE_0
1990{
1991 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
1992 U32 Reserved1; /* 08h */
1993 U64 SASAddress; /* 0Ch */
1994 U32 Reserved2; /* 14h */
1995 U16 DevHandle; /* 18h */
1996 U8 TargetID; /* 1Ah */
1997 U8 Bus; /* 1Bh */
1998 U32 DeviceInfo; /* 1Ch */
1999 U16 Flags; /* 20h */
2000 U8 PhysicalPort; /* 22h */
2001 U8 Reserved3; /* 23h */
2002} fCONFIG_PAGE_SAS_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_0,
2003 SasDevicePage0_t, MPI_POINTER pSasDevicePage0_t;
2004
2005#define MPI_SASDEVICE0_PAGEVERSION (0x00)
2006
2007/* values for SAS Device Page 0 Flags field */
2008#define MPI_SAS_DEVICE0_FLAGS_MAPPING_PERSISTENT (0x04)
2009#define MPI_SAS_DEVICE0_FLAGS_DEVICE_MAPPED (0x02)
2010#define MPI_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x01)
2011
2012/* see mpi_sas.h for values for SAS Device Page 0 DeviceInfo values */
2013
2014
2015typedef struct _CONFIG_PAGE_SAS_DEVICE_1
2016{
2017 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2018 U32 Reserved1; /* 08h */
2019 U64 SASAddress; /* 0Ch */
2020 U32 Reserved2; /* 14h */
2021 U16 DevHandle; /* 18h */
2022 U8 TargetID; /* 1Ah */
2023 U8 Bus; /* 1Bh */
2024 U8 InitialRegDeviceFIS[20];/* 1Ch */
2025} fCONFIG_PAGE_SAS_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_1,
2026 SasDevicePage1_t, MPI_POINTER pSasDevicePage1_t;
2027
2028#define MPI_SASDEVICE1_PAGEVERSION (0x00)
2029
2030
2031typedef struct _CONFIG_PAGE_SAS_PHY_0
2032{
2033 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2034 U32 Reserved1; /* 08h */
2035 U64 SASAddress; /* 0Ch */
2036 U16 AttachedDevHandle; /* 14h */
2037 U8 AttachedPhyIdentifier; /* 16h */
2038 U8 Reserved2; /* 17h */
2039 U32 AttachedDeviceInfo; /* 18h */
2040 U8 ProgrammedLinkRate; /* 20h */
2041 U8 HwLinkRate; /* 21h */
2042 U8 ChangeCount; /* 22h */
2043 U8 Reserved3; /* 23h */
2044 U32 PhyInfo; /* 24h */
2045} fCONFIG_PAGE_SAS_PHY_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_0,
2046 SasPhyPage0_t, MPI_POINTER pSasPhyPage0_t;
2047
2048#define MPI_SASPHY0_PAGEVERSION (0x00)
2049
2050/* values for SAS PHY Page 0 ProgrammedLinkRate field */
2051#define MPI_SAS_PHY0_PRATE_MAX_RATE_MASK (0xF0)
2052#define MPI_SAS_PHY0_PRATE_MAX_RATE_NOT_PROGRAMMABLE (0x00)
2053#define MPI_SAS_PHY0_PRATE_MAX_RATE_1_5 (0x80)
2054#define MPI_SAS_PHY0_PRATE_MAX_RATE_3_0 (0x90)
2055#define MPI_SAS_PHY0_PRATE_MIN_RATE_MASK (0x0F)
2056#define MPI_SAS_PHY0_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00)
2057#define MPI_SAS_PHY0_PRATE_MIN_RATE_1_5 (0x08)
2058#define MPI_SAS_PHY0_PRATE_MIN_RATE_3_0 (0x09)
2059
2060/* values for SAS PHY Page 0 HwLinkRate field */
2061#define MPI_SAS_PHY0_HWRATE_MAX_RATE_MASK (0xF0)
2062#define MPI_SAS_PHY0_HWRATE_MAX_RATE_1_5 (0x80)
2063#define MPI_SAS_PHY0_HWRATE_MAX_RATE_3_0 (0x90)
2064#define MPI_SAS_PHY0_HWRATE_MIN_RATE_MASK (0x0F)
2065#define MPI_SAS_PHY0_HWRATE_MIN_RATE_1_5 (0x08)
2066#define MPI_SAS_PHY0_HWRATE_MIN_RATE_3_0 (0x09)
2067
2068/* values for SAS PHY Page 0 PhyInfo field */
2069#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_ACTIVE (0x00004000)
2070#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_SELECTOR (0x00002000)
2071#define MPI_SAS_PHY0_PHYINFO_VIRTUAL_PHY (0x00001000)
2072
2073#define MPI_SAS_PHY0_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00)
2074#define MPI_SAS_PHY0_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8)
2075
2076#define MPI_SAS_PHY0_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0)
2077#define MPI_SAS_PHY0_PHYINFO_DIRECT_ROUTING (0x00000000)
2078#define MPI_SAS_PHY0_PHYINFO_SUBTRACTIVE_ROUTING (0x00000010)
2079#define MPI_SAS_PHY0_PHYINFO_TABLE_ROUTING (0x00000020)
2080
2081#define MPI_SAS_PHY0_PHYINFO_MASK_LINK_RATE (0x0000000F)
2082#define MPI_SAS_PHY0_PHYINFO_UNKNOWN_LINK_RATE (0x00000000)
2083#define MPI_SAS_PHY0_PHYINFO_PHY_DISABLED (0x00000001)
2084#define MPI_SAS_PHY0_PHYINFO_NEGOTIATION_FAILED (0x00000002)
2085#define MPI_SAS_PHY0_PHYINFO_SATA_OOB_COMPLETE (0x00000003)
2086#define MPI_SAS_PHY0_PHYINFO_RATE_1_5 (0x00000008)
2087#define MPI_SAS_PHY0_PHYINFO_RATE_3_0 (0x00000009)
2088
2089
2090typedef struct _CONFIG_PAGE_SAS_PHY_1
2091{
2092 fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2093 U32 Reserved1; /* 08h */
2094 U32 InvalidDwordCount; /* 0Ch */
2095 U32 RunningDisparityErrorCount; /* 10h */
2096 U32 LossDwordSynchCount; /* 14h */
2097 U32 PhyResetProblemCount; /* 18h */
2098} fCONFIG_PAGE_SAS_PHY_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_1,
2099 SasPhyPage1_t, MPI_POINTER pSasPhyPage1_t;
2100
2101#define MPI_SASPHY1_PAGEVERSION (0x00)
2102
2103
2104#endif
2105
diff --git a/drivers/message/fusion/lsi/mpi_fc.h b/drivers/message/fusion/lsi/mpi_fc.h
new file mode 100644
index 000000000000..ea266b236c1f
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_fc.h
@@ -0,0 +1,363 @@
1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_fc.h
6 * Title: MPI Fibre Channel messages and structures
7 * Creation Date: June 12, 2000
8 *
9 * mpi_fc.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 06-06-00 01.00.01 Update version number for 1.0 release.
18 * 06-12-00 01.00.02 Added _MSG_FC_ABORT_REPLY structure.
19 * 11-02-00 01.01.01 Original release for post 1.0 work
20 * 12-04-00 01.01.02 Added messages for Common Transport Send and
21 * Primitive Send.
22 * 01-09-01 01.01.03 Modifed some of the new flags to have an MPI prefix
23 * and modified the FcPrimitiveSend flags.
24 * 01-25-01 01.01.04 Move InitiatorIndex in LinkServiceRsp reply to a larger
25 * field.
26 * Added FC_ABORT_TYPE_CT_SEND_REQUEST and
27 * FC_ABORT_TYPE_EXLINKSEND_REQUEST for FcAbort request.
28 * Added MPI_FC_PRIM_SEND_FLAGS_STOP_SEND.
29 * 02-20-01 01.01.05 Started using MPI_POINTER.
30 * 03-27-01 01.01.06 Added Flags field to MSG_LINK_SERVICE_BUFFER_POST_REPLY
31 * and defined MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED.
32 * Added MPI_FC_PRIM_SEND_FLAGS_RESET_LINK define.
33 * Added structure offset comments.
34 * 04-09-01 01.01.07 Added RspLength field to MSG_LINK_SERVICE_RSP_REQUEST.
35 * 08-08-01 01.02.01 Original release for v1.2 work.
36 * 09-28-01 01.02.02 Change name of reserved field in
37 * MSG_LINK_SERVICE_RSP_REPLY.
38 * 05-31-02 01.02.03 Adding AliasIndex to FC Direct Access requests.
39 * --------------------------------------------------------------------------
40 */
41
42#ifndef MPI_FC_H
43#define MPI_FC_H
44
45
46/*****************************************************************************
47*
48* F C D i r e c t A c c e s s M e s s a g e s
49*
50*****************************************************************************/
51
52/****************************************************************************/
53/* Link Service Buffer Post messages */
54/****************************************************************************/
55
56typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REQUEST
57{
58 U8 BufferPostFlags; /* 00h */
59 U8 BufferCount; /* 01h */
60 U8 ChainOffset; /* 02h */
61 U8 Function; /* 03h */
62 U16 Reserved; /* 04h */
63 U8 Reserved1; /* 06h */
64 U8 MsgFlags; /* 07h */
65 U32 MsgContext; /* 08h */
66 SGE_TRANS_SIMPLE_UNION SGL;
67} MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
68 MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
69 LinkServiceBufferPostRequest_t, MPI_POINTER pLinkServiceBufferPostRequest_t;
70
71#define LINK_SERVICE_BUFFER_POST_FLAGS_PORT_MASK (0x01)
72
73typedef struct _WWNFORMAT
74{
75 U32 PortNameHigh; /* 00h */
76 U32 PortNameLow; /* 04h */
77 U32 NodeNameHigh; /* 08h */
78 U32 NodeNameLow; /* 0Ch */
79} WWNFORMAT,
80 WwnFormat_t;
81
82/* Link Service Buffer Post Reply */
83typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REPLY
84{
85 U8 Flags; /* 00h */
86 U8 Reserved; /* 01h */
87 U8 MsgLength; /* 02h */
88 U8 Function; /* 03h */
89 U16 Reserved1; /* 04h */
90 U8 PortNumber; /* 06h */
91 U8 MsgFlags; /* 07h */
92 U32 MsgContext; /* 08h */
93 U16 Reserved2; /* 0Ch */
94 U16 IOCStatus; /* 0Eh */
95 U32 IOCLogInfo; /* 10h */
96 U32 TransferLength; /* 14h */
97 U32 TransactionContext; /* 18h */
98 U32 Rctl_Did; /* 1Ch */
99 U32 Csctl_Sid; /* 20h */
100 U32 Type_Fctl; /* 24h */
101 U16 SeqCnt; /* 28h */
102 U8 Dfctl; /* 2Ah */
103 U8 SeqId; /* 2Bh */
104 U16 Rxid; /* 2Ch */
105 U16 Oxid; /* 2Eh */
106 U32 Parameter; /* 30h */
107 WWNFORMAT Wwn; /* 34h */
108} MSG_LINK_SERVICE_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REPLY,
109 LinkServiceBufferPostReply_t, MPI_POINTER pLinkServiceBufferPostReply_t;
110
111#define MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED (0x80)
112
113#define MPI_FC_DID_MASK (0x00FFFFFF)
114#define MPI_FC_DID_SHIFT (0)
115#define MPI_FC_RCTL_MASK (0xFF000000)
116#define MPI_FC_RCTL_SHIFT (24)
117#define MPI_FC_SID_MASK (0x00FFFFFF)
118#define MPI_FC_SID_SHIFT (0)
119#define MPI_FC_CSCTL_MASK (0xFF000000)
120#define MPI_FC_CSCTL_SHIFT (24)
121#define MPI_FC_FCTL_MASK (0x00FFFFFF)
122#define MPI_FC_FCTL_SHIFT (0)
123#define MPI_FC_TYPE_MASK (0xFF000000)
124#define MPI_FC_TYPE_SHIFT (24)
125
126/* obsolete name for the above */
127#define FCP_TARGET_DID_MASK (0x00FFFFFF)
128#define FCP_TARGET_DID_SHIFT (0)
129#define FCP_TARGET_RCTL_MASK (0xFF000000)
130#define FCP_TARGET_RCTL_SHIFT (24)
131#define FCP_TARGET_SID_MASK (0x00FFFFFF)
132#define FCP_TARGET_SID_SHIFT (0)
133#define FCP_TARGET_CSCTL_MASK (0xFF000000)
134#define FCP_TARGET_CSCTL_SHIFT (24)
135#define FCP_TARGET_FCTL_MASK (0x00FFFFFF)
136#define FCP_TARGET_FCTL_SHIFT (0)
137#define FCP_TARGET_TYPE_MASK (0xFF000000)
138#define FCP_TARGET_TYPE_SHIFT (24)
139
140
141/****************************************************************************/
142/* Link Service Response messages */
143/****************************************************************************/
144
145typedef struct _MSG_LINK_SERVICE_RSP_REQUEST
146{
147 U8 RspFlags; /* 00h */
148 U8 RspLength; /* 01h */
149 U8 ChainOffset; /* 02h */
150 U8 Function; /* 03h */
151 U16 Reserved1; /* 04h */
152 U8 Reserved2; /* 06h */
153 U8 MsgFlags; /* 07h */
154 U32 MsgContext; /* 08h */
155 U32 Rctl_Did; /* 0Ch */
156 U32 Csctl_Sid; /* 10h */
157 U32 Type_Fctl; /* 14h */
158 U16 SeqCnt; /* 18h */
159 U8 Dfctl; /* 1Ah */
160 U8 SeqId; /* 1Bh */
161 U16 Rxid; /* 1Ch */
162 U16 Oxid; /* 1Eh */
163 U32 Parameter; /* 20h */
164 SGE_SIMPLE_UNION SGL; /* 24h */
165} MSG_LINK_SERVICE_RSP_REQUEST, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REQUEST,
166 LinkServiceRspRequest_t, MPI_POINTER pLinkServiceRspRequest_t;
167
168#define LINK_SERVICE_RSP_FLAGS_IMMEDIATE (0x80)
169#define LINK_SERVICE_RSP_FLAGS_PORT_MASK (0x01)
170
171
172/* Link Service Response Reply */
173typedef struct _MSG_LINK_SERVICE_RSP_REPLY
174{
175 U16 Reserved; /* 00h */
176 U8 MsgLength; /* 02h */
177 U8 Function; /* 03h */
178 U16 Reserved1; /* 04h */
179 U8 Reserved_0100_InitiatorIndex; /* 06h */ /* obsolete InitiatorIndex */
180 U8 MsgFlags; /* 07h */
181 U32 MsgContext; /* 08h */
182 U16 Reserved3; /* 0Ch */
183 U16 IOCStatus; /* 0Eh */
184 U32 IOCLogInfo; /* 10h */
185 U32 InitiatorIndex; /* 14h */
186} MSG_LINK_SERVICE_RSP_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REPLY,
187 LinkServiceRspReply_t, MPI_POINTER pLinkServiceRspReply_t;
188
189
190/****************************************************************************/
191/* Extended Link Service Send messages */
192/****************************************************************************/
193
194typedef struct _MSG_EXLINK_SERVICE_SEND_REQUEST
195{
196 U8 SendFlags; /* 00h */
197 U8 AliasIndex; /* 01h */
198 U8 ChainOffset; /* 02h */
199 U8 Function; /* 03h */
200 U32 MsgFlags_Did; /* 04h */
201 U32 MsgContext; /* 08h */
202 U32 ElsCommandCode; /* 0Ch */
203 SGE_SIMPLE_UNION SGL; /* 10h */
204} MSG_EXLINK_SERVICE_SEND_REQUEST, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REQUEST,
205 ExLinkServiceSendRequest_t, MPI_POINTER pExLinkServiceSendRequest_t;
206
207#define EX_LINK_SERVICE_SEND_DID_MASK (0x00FFFFFF)
208#define EX_LINK_SERVICE_SEND_DID_SHIFT (0)
209#define EX_LINK_SERVICE_SEND_MSGFLAGS_MASK (0xFF000000)
210#define EX_LINK_SERVICE_SEND_MSGFLAGS_SHIFT (24)
211
212
213/* Extended Link Service Send Reply */
214typedef struct _MSG_EXLINK_SERVICE_SEND_REPLY
215{
216 U8 Reserved; /* 00h */
217 U8 AliasIndex; /* 01h */
218 U8 MsgLength; /* 02h */
219 U8 Function; /* 03h */
220 U16 Reserved1; /* 04h */
221 U8 Reserved2; /* 06h */
222 U8 MsgFlags; /* 07h */
223 U32 MsgContext; /* 08h */
224 U16 Reserved3; /* 0Ch */
225 U16 IOCStatus; /* 0Eh */
226 U32 IOCLogInfo; /* 10h */
227 U32 ResponseLength; /* 14h */
228} MSG_EXLINK_SERVICE_SEND_REPLY, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REPLY,
229 ExLinkServiceSendReply_t, MPI_POINTER pExLinkServiceSendReply_t;
230
231/****************************************************************************/
232/* FC Abort messages */
233/****************************************************************************/
234
235typedef struct _MSG_FC_ABORT_REQUEST
236{
237 U8 AbortFlags; /* 00h */
238 U8 AbortType; /* 01h */
239 U8 ChainOffset; /* 02h */
240 U8 Function; /* 03h */
241 U16 Reserved1; /* 04h */
242 U8 Reserved2; /* 06h */
243 U8 MsgFlags; /* 07h */
244 U32 MsgContext; /* 08h */
245 U32 TransactionContextToAbort; /* 0Ch */
246} MSG_FC_ABORT_REQUEST, MPI_POINTER PTR_MSG_FC_ABORT_REQUEST,
247 FcAbortRequest_t, MPI_POINTER pFcAbortRequest_t;
248
249#define FC_ABORT_FLAG_PORT_MASK (0x01)
250
251#define FC_ABORT_TYPE_ALL_FC_BUFFERS (0x00)
252#define FC_ABORT_TYPE_EXACT_FC_BUFFER (0x01)
253#define FC_ABORT_TYPE_CT_SEND_REQUEST (0x02)
254#define FC_ABORT_TYPE_EXLINKSEND_REQUEST (0x03)
255
256/* FC Abort Reply */
257typedef struct _MSG_FC_ABORT_REPLY
258{
259 U16 Reserved; /* 00h */
260 U8 MsgLength; /* 02h */
261 U8 Function; /* 03h */
262 U16 Reserved1; /* 04h */
263 U8 Reserved2; /* 06h */
264 U8 MsgFlags; /* 07h */
265 U32 MsgContext; /* 08h */
266 U16 Reserved3; /* 0Ch */
267 U16 IOCStatus; /* 0Eh */
268 U32 IOCLogInfo; /* 10h */
269} MSG_FC_ABORT_REPLY, MPI_POINTER PTR_MSG_FC_ABORT_REPLY,
270 FcAbortReply_t, MPI_POINTER pFcAbortReply_t;
271
272
273/****************************************************************************/
274/* FC Common Transport Send messages */
275/****************************************************************************/
276
277typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REQUEST
278{
279 U8 SendFlags; /* 00h */
280 U8 AliasIndex; /* 01h */
281 U8 ChainOffset; /* 02h */
282 U8 Function; /* 03h */
283 U32 MsgFlags_Did; /* 04h */
284 U32 MsgContext; /* 08h */
285 U16 CTCommandCode; /* 0Ch */
286 U8 FsType; /* 0Eh */
287 U8 Reserved1; /* 0Fh */
288 SGE_SIMPLE_UNION SGL; /* 10h */
289} MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
290 MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
291 FcCommonTransportSendRequest_t, MPI_POINTER pFcCommonTransportSendRequest_t;
292
293#define MPI_FC_CT_SEND_DID_MASK (0x00FFFFFF)
294#define MPI_FC_CT_SEND_DID_SHIFT (0)
295#define MPI_FC_CT_SEND_MSGFLAGS_MASK (0xFF000000)
296#define MPI_FC_CT_SEND_MSGFLAGS_SHIFT (24)
297
298
299/* FC Common Transport Send Reply */
300typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REPLY
301{
302 U8 Reserved; /* 00h */
303 U8 AliasIndex; /* 01h */
304 U8 MsgLength; /* 02h */
305 U8 Function; /* 03h */
306 U16 Reserved1; /* 04h */
307 U8 Reserved2; /* 06h */
308 U8 MsgFlags; /* 07h */
309 U32 MsgContext; /* 08h */
310 U16 Reserved3; /* 0Ch */
311 U16 IOCStatus; /* 0Eh */
312 U32 IOCLogInfo; /* 10h */
313 U32 ResponseLength; /* 14h */
314} MSG_FC_COMMON_TRANSPORT_SEND_REPLY, MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REPLY,
315 FcCommonTransportSendReply_t, MPI_POINTER pFcCommonTransportSendReply_t;
316
317
318/****************************************************************************/
319/* FC Primitive Send messages */
320/****************************************************************************/
321
322typedef struct _MSG_FC_PRIMITIVE_SEND_REQUEST
323{
324 U8 SendFlags; /* 00h */
325 U8 Reserved; /* 01h */
326 U8 ChainOffset; /* 02h */
327 U8 Function; /* 03h */
328 U16 Reserved1; /* 04h */
329 U8 Reserved2; /* 06h */
330 U8 MsgFlags; /* 07h */
331 U32 MsgContext; /* 08h */
332 U8 FcPrimitive[4]; /* 0Ch */
333} MSG_FC_PRIMITIVE_SEND_REQUEST, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REQUEST,
334 FcPrimitiveSendRequest_t, MPI_POINTER pFcPrimitiveSendRequest_t;
335
336#define MPI_FC_PRIM_SEND_FLAGS_PORT_MASK (0x01)
337#define MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK (0x02)
338#define MPI_FC_PRIM_SEND_FLAGS_RESET_LINK (0x04)
339#define MPI_FC_PRIM_SEND_FLAGS_STOP_SEND (0x08)
340#define MPI_FC_PRIM_SEND_FLAGS_SEND_ONCE (0x10)
341#define MPI_FC_PRIM_SEND_FLAGS_SEND_AROUND (0x20)
342#define MPI_FC_PRIM_SEND_FLAGS_UNTIL_FULL (0x40)
343#define MPI_FC_PRIM_SEND_FLAGS_FOREVER (0x80)
344
345/* FC Primitive Send Reply */
346typedef struct _MSG_FC_PRIMITIVE_SEND_REPLY
347{
348 U8 SendFlags; /* 00h */
349 U8 Reserved; /* 01h */
350 U8 MsgLength; /* 02h */
351 U8 Function; /* 03h */
352 U16 Reserved1; /* 04h */
353 U8 Reserved2; /* 06h */
354 U8 MsgFlags; /* 07h */
355 U32 MsgContext; /* 08h */
356 U16 Reserved3; /* 0Ch */
357 U16 IOCStatus; /* 0Eh */
358 U32 IOCLogInfo; /* 10h */
359} MSG_FC_PRIMITIVE_SEND_REPLY, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REPLY,
360 FcPrimitiveSendReply_t, MPI_POINTER pFcPrimitiveSendReply_t;
361
362#endif
363
diff --git a/drivers/message/fusion/lsi/mpi_history.txt b/drivers/message/fusion/lsi/mpi_history.txt
new file mode 100644
index 000000000000..0deb7721e936
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_history.txt
@@ -0,0 +1,276 @@
1
2 ==============================
3 MPI Header File Change History
4 ==============================
5
6 Copyright (c) 2000-2001 LSI Logic Corporation.
7
8 ---------------------------------------
9 Header Set Release Version: 01.01.10
10 Header Set Release Date: 04-09-01
11 ---------------------------------------
12
13 Filename Current version Prior version
14 ---------- --------------- -------------
15 mpi.h 01.01.07 01.01.06
16 mpi_ioc.h 01.01.07 01.01.06
17 mpi_cnfg.h 01.01.11 01.01.10
18 mpi_init.h 01.01.05 01.01.04
19 mpi_targ.h 01.01.04 01.01.04
20 mpi_fc.h 01.01.07 01.01.06
21 mpi_lan.h 01.01.03 01.01.03
22 mpi_raid.h 01.01.02 01.01.02
23 mpi_type.h 01.01.02 01.01.02
24 mpi_history.txt 01.01.09 01.01.09
25
26
27 * Date Version Description
28 * -------- -------- ------------------------------------------------------
29
30mpi.h
31 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
32 * 05-24-00 00.10.02 Added MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH definition.
33 * 06-06-00 01.00.01 Update MPI_VERSION_MAJOR and MPI_VERSION_MINOR.
34 * 06-22-00 01.00.02 Added MPI_IOCSTATUS_LAN_ definitions.
35 * Removed LAN_SUSPEND function definition.
36 * Added MPI_MSGFLAGS_CONTINUATION_REPLY definition.
37 * 06-30-00 01.00.03 Added MPI_CONTEXT_REPLY_TYPE_LAN definition.
38 * Added MPI_GET/SET_CONTEXT_REPLY_TYPE macros.
39 * 07-27-00 01.00.04 Added MPI_FAULT_ definitions.
40 * Removed MPI_IOCSTATUS_MSG/DATA_XFER_ERROR definitions.
41 * Added MPI_IOCSTATUS_INTERNAL_ERROR definition.
42 * Added MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH.
43 * 11-02-00 01.01.01 Original release for post 1.0 work
44 * 12-04-00 01.01.02 Added new function codes.
45 * 01-09-01 01.01.03 Added more definitions to the system interface section
46 * Added MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT.
47 * 01-25-01 01.01.04 Changed MPI_VERSION_MINOR from 0x00 to 0x01.
48 * 02-20-01 01.01.05 Started using MPI_POINTER.
49 * Added defines for MPI_DIAG_PREVENT_IOC_BOOT and
50 * MPI_DIAG_CLEAR_FLASH_BAD_SIG.
51 * Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines.
52 * 02-27-01 01.01.06 Removed MPI_HOST_INDEX_REGISTER define.
53 * Added function codes for RAID.
54 * 04-09-01 01.01.07 Added alternate define for MPI_DOORBELL_ACTIVE,
55 * MPI_DOORBELL_USED, to better match the spec.
56 * --------------------------------------------------------------------------
57
58mpi_ioc.h
59 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
60 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
61 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
62 * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
63 * Added _MSG_EVENT_ACK_REPLY structure.
64 * Added _MSG_FW_DOWNLOAD_REPLY structure.
65 * Added _MSG_TOOLBOX_REPLY structure.
66 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
67 * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
68 * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
69 * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
70 * _MSG_EVENT_ACK_REPLY structure to match specification.
71 * 11-02-00 01.01.01 Original release for post 1.0 work
72 * Added a value for Manufacturer to WhoInit
73 * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
74 * removed toolbox message.
75 * 01-09-01 01.01.03 Added event enabled and disabled defines.
76 * Added structures for FwHeader and DataHeader.
77 * Added ImageType to FwUpload reply.
78 * 02-20-01 01.01.04 Started using MPI_POINTER.
79 * 02-27-01 01.01.05 Added event for RAID status change and its event data.
80 * Added IocNumber field to MSG_IOC_FACTS_REPLY.
81 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
82 * Added structure offset comments.
83 * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
84 * --------------------------------------------------------------------------
85
86mpi_cnfg.h
87 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
88 * 06-06-00 01.00.01 Update version number for 1.0 release.
89 * 06-08-00 01.00.02 Added _PAGEVERSION definitions for all pages.
90 * Added FcPhLowestVersion, FcPhHighestVersion, Reserved2
91 * fields to FC_DEVICE_0 page, updated the page version.
92 * Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in
93 * SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages
94 * and updated the page versions.
95 * Added _RESPONSE_ID_MASK definition to SCSI_PORT_1
96 * page and updated the page version.
97 * Added Information field and _INFO_PARAMS_NEGOTIATED
98 * definitionto SCSI_DEVICE_0 page.
99 * 06-22-00 01.00.03 Removed batch controls from LAN_0 page and updated the
100 * page version.
101 * Added BucketsRemaining to LAN_1 page, redefined the
102 * state values, and updated the page version.
103 * Revised bus width definitions in SCSI_PORT_0,
104 * SCSI_DEVICE_0 and SCSI_DEVICE_1 pages.
105 * 06-30-00 01.00.04 Added MaxReplySize to LAN_1 page and updated the page
106 * version.
107 * Moved FC_DEVICE_0 PageAddress description to spec.
108 * 07-27-00 01.00.05 Corrected the SubsystemVendorID and SubsystemID field
109 * widths in IOC_0 page and updated the page version.
110 * 11-02-00 01.01.01 Original release for post 1.0 work
111 * Added Manufacturing pages, IO Unit Page 2, SCSI SPI
112 * Port Page 2, FC Port Page 4, FC Port Page 5
113 * 12-04-00 01.01.03 Config page changes to match MPI rev 1.00.01.
114 * 12-05-00 01.01.04 Modified config page actions.
115 * 01-09-01 01.01.05 Added defines for page address formats.
116 * Data size for Manufacturing pages 2 and 3 no longer
117 * defined here.
118 * Io Unit Page 2 size is fixed at 4 adapters and some
119 * flags were changed.
120 * SCSI Port Page 2 Device Settings modified.
121 * New fields added to FC Port Page 0 and some flags
122 * cleaned up.
123 * Removed impedance flash from FC Port Page 1.
124 * Added FC Port pages 6 and 7.
125 * 01-25-01 01.01.06 Added MaxInitiators field to FcPortPage0.
126 * 01-29-01 01.01.07 Changed some defines to make them 32 character unique.
127 * Added some LinkType defines for FcPortPage0.
128 * 02-20-01 01.01.08 Started using MPI_POINTER.
129 * 02-27-01 01.01.09 Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with
130 * MPI_CONFIG_PAGETYPE_RAID_VOLUME.
131 * Added definitions and structures for IOC Page 2 and
132 * RAID Volume Page 2.
133 * 03-27-01 01.01.10 Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9.
134 * CONFIG_PAGE_FC_PORT_3 now supports persistent by DID.
135 * Added VendorId and ProductRevLevel fields to
136 * RAIDVOL2_IM_PHYS_ID struct.
137 * Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_
138 * defines to make them compatible to MPI version 1.0.
139 * Added structure offset comments.
140 * 04-09-01 01.01.11 Added some new defines for the PageAddress field and
141 * removed some obsolete ones.
142 * Added IO Unit Page 3.
143 * Modified defines for Scsi Port Page 2.
144 * Modified RAID Volume Pages.
145 * --------------------------------------------------------------------------
146
147mpi_init.h
148 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
149 * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY.
150 * 06-06-00 01.00.01 Update version number for 1.0 release.
151 * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions.
152 * 11-02-00 01.01.01 Original release for post 1.0 work
153 * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT.
154 * 02-20-01 01.01.03 Started using MPI_POINTER.
155 * 03-27-01 01.01.04 Added structure offset comments.
156 * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT.
157 * --------------------------------------------------------------------------
158
159mpi_targ.h
160 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
161 * 06-06-00 01.00.01 Update version number for 1.0 release.
162 * 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure.
163 * Corrected DECSRIPTOR typo to DESCRIPTOR.
164 * 11-02-00 01.01.01 Original release for post 1.0 work
165 * Modified target mode to use IoIndex instead of
166 * HostIndex and IocIndex. Added Alias.
167 * 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER
168 * and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER.
169 * 02-20-01 01.01.03 Started using MPI_POINTER.
170 * Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
171 * MPI_TARGET_FCP_CMD_BUFFER.
172 * 03-27-01 01.01.04 Added structure offset comments.
173 * --------------------------------------------------------------------------
174
175mpi_fc.h
176 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
177 * 06-06-00 01.00.01 Update version number for 1.0 release.
178 * 06-12-00 01.00.02 Added _MSG_FC_ABORT_REPLY structure.
179 * 11-02-00 01.01.01 Original release for post 1.0 work
180 * 12-04-00 01.01.02 Added messages for Common Transport Send and
181 * Primitive Send.
182 * 01-09-01 01.01.03 Modifed some of the new flags to have an MPI prefix
183 * and modified the FcPrimitiveSend flags.
184 * 01-25-01 01.01.04 Move InitiatorIndex in LinkServiceRsp reply to a larger
185 * field.
186 * Added FC_ABORT_TYPE_CT_SEND_REQUEST and
187 * FC_ABORT_TYPE_EXLINKSEND_REQUEST for FcAbort request.
188 * Added MPI_FC_PRIM_SEND_FLAGS_STOP_SEND.
189 * 02-20-01 01.01.05 Started using MPI_POINTER.
190 * 03-27-01 01.01.06 Added Flags field to MSG_LINK_SERVICE_BUFFER_POST_REPLY
191 * and defined MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED.
192 * Added MPI_FC_PRIM_SEND_FLAGS_RESET_LINK define.
193 * Added structure offset comments.
194 * 04-09-01 01.01.07 Added RspLength field to MSG_LINK_SERVICE_RSP_REQUEST.
195 * --------------------------------------------------------------------------
196
197mpi_lan.h
198 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
199 * 05-24-00 00.10.02 Added LANStatus field to _MSG_LAN_SEND_REPLY.
200 * Added LANStatus field to _MSG_LAN_RECEIVE_POST_REPLY.
201 * Moved ListCount field in _MSG_LAN_RECEIVE_POST_REPLY.
202 * 06-06-00 01.00.01 Update version number for 1.0 release.
203 * 06-12-00 01.00.02 Added MPI_ to BUCKETSTATUS_ definitions.
204 * 06-22-00 01.00.03 Major changes to match new LAN definition in 1.0 spec.
205 * 06-30-00 01.00.04 Added Context Reply definitions per revised proposal.
206 * Changed transaction context usage to bucket/buffer.
207 * 07-05-00 01.00.05 Removed LAN_RECEIVE_POST_BUCKET_CONTEXT_MASK definition
208 * to lan private header file
209 * 11-02-00 01.01.01 Original release for post 1.0 work
210 * 02-20-01 01.01.02 Started using MPI_POINTER.
211 * 03-27-01 01.01.03 Added structure offset comments.
212 * --------------------------------------------------------------------------
213
214mpi_raid.h
215 * 02-27-01 01.01.01 Original release for this file.
216 * 03-27-01 01.01.02 Added structure offset comments.
217 * --------------------------------------------------------------------------
218
219mpi_type.h
220 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
221 * 06-06-00 01.00.01 Update version number for 1.0 release.
222 * 11-02-00 01.01.01 Original release for post 1.0 work
223 * 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
224 * --------------------------------------------------------------------------
225
226mpi_history.txt Parts list history
227
228Filename 01.01.10
229---------- --------
230mpi.h 01.01.07
231mpi_ioc.h 01.01.07
232mpi_cnfg.h 01.01.11
233mpi_init.h 01.01.05
234mpi_targ.h 01.01.04
235mpi_fc.h 01.01.07
236mpi_lan.h 01.01.03
237mpi_raid.h 01.01.02
238mpi_type.h 01.01.02
239
240Filename 01.01.09 01.01.08 01.01.07 01.01.06 01.01.05 01.01.04
241---------- -------- -------- -------- -------- -------- --------
242mpi.h 01.01.06 01.01.06 01.01.05 01.01.04 01.01.04 01.01.03
243mpi_ioc.h 01.01.06 01.01.05 01.01.04 01.01.03 01.01.03 01.01.03
244mpi_cnfg.h 01.01.10 01.01.09 01.01.08 01.01.07 01.01.06 01.01.05
245mpi_init.h 01.01.04 01.01.03 01.01.03 01.01.02 01.01.02 01.01.02
246mpi_targ.h 01.01.04 01.01.03 01.01.03 01.01.02 01.01.02 01.01.02
247mpi_fc.h 01.01.06 01.01.05 01.01.05 01.01.04 01.01.04 01.01.03
248mpi_lan.h 01.01.03 01.01.02 01.01.02 01.01.01 01.01.01 01.01.01
249mpi_raid.h 01.01.02 01.01.01
250mpi_type.h 01.01.02 01.01.02 01.01.02 01.01.01 01.01.01 01.01.01
251
252Filename 01.01.03 01.01.02 01.01.01 01.00.07 01.00.06 01.00.05
253---------- -------- -------- -------- -------- -------- --------
254mpi.h 01.01.02 01.01.02 01.01.01 01.00.04 01.00.04 01.00.03
255mpi_ioc.h 01.01.02 01.01.02 01.01.01 01.00.05 01.00.04 01.00.03
256mpi_cnfg.h 01.01.04 01.01.03 01.01.01 01.00.05 01.00.05 01.00.04
257mpi_init.h 01.01.02 01.01.02 01.01.01 01.00.02 01.00.02 01.00.02
258mpi_targ.h 01.01.01 01.01.01 01.01.01 01.00.02 01.00.02 01.00.02
259mpi_fc.h 01.01.02 01.01.02 01.01.01 01.00.02 01.00.02 01.00.02
260mpi_lan.h 01.01.01 01.01.01 01.01.01 01.00.05 01.00.05 01.00.05
261mpi_type.h 01.01.01 01.01.01 01.01.01 01.00.01 01.00.01 01.00.01
262
263Filename 01.00.04 01.00.03 01.00.02 01.00.01 00.10.02 00.10.01
264---------- -------- -------- -------- -------- -------- --------
265mpi.h 01.00.02 01.00.01 01.00.01 01.00.01 00.10.02 00.10.01
266mpi_ioc.h 01.00.02 01.00.02 01.00.01 01.00.01 00.10.02 00.10.01
267mpi_cnfg.h 01.00.03 01.00.02 01.00.02 01.00.01 00.10.01 00.10.01
268mpi_init.h 01.00.02 01.00.02 01.00.02 01.00.01 00.10.02 00.10.01
269mpi_targ.h 01.00.02 01.00.01 01.00.01 01.00.01 00.10.01 00.10.01
270mpi_fc.h 01.00.02 01.00.02 01.00.01 01.00.01 00.10.01 00.10.01
271mpi_lan.h 01.00.03 01.00.02 01.00.01 01.00.01 00.10.02 00.10.01
272mpi_type.h 01.00.01 01.00.01 01.00.01 01.00.01 00.10.01 00.10.01
273
274
275 * --------------------------------------------------------------------------
276
diff --git a/drivers/message/fusion/lsi/mpi_inb.h b/drivers/message/fusion/lsi/mpi_inb.h
new file mode 100644
index 000000000000..dae29fbed56f
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_inb.h
@@ -0,0 +1,220 @@
1/*
2 * Copyright (c) 2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_inb.h
6 * Title: MPI Inband structures and definitions
7 * Creation Date: September 30, 2003
8 *
9 * mpi_inb.h Version: 01.03.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * ??-??-?? 01.03.01 Original release.
17 * --------------------------------------------------------------------------
18 */
19
20#ifndef MPI_INB_H
21#define MPI_INB_H
22
23/******************************************************************************
24*
25* I n b a n d M e s s a g e s
26*
27*******************************************************************************/
28
29
30/****************************************************************************/
31/* Inband Buffer Post Request */
32/****************************************************************************/
33
34typedef struct _MSG_INBAND_BUFFER_POST_REQUEST
35{
36 U8 Reserved1; /* 00h */
37 U8 BufferCount; /* 01h */
38 U8 ChainOffset; /* 02h */
39 U8 Function; /* 03h */
40 U16 Reserved2; /* 04h */
41 U8 Reserved3; /* 06h */
42 U8 MsgFlags; /* 07h */
43 U32 MsgContext; /* 08h */
44 U32 Reserved4; /* 0Ch */
45 SGE_TRANS_SIMPLE_UNION SGL; /* 10h */
46} MSG_INBAND_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_INBAND_BUFFER_POST_REQUEST,
47 MpiInbandBufferPostRequest_t , MPI_POINTER pMpiInbandBufferPostRequest_t;
48
49
50typedef struct _WWN_FC_FORMAT
51{
52 U64 NodeName; /* 00h */
53 U64 PortName; /* 08h */
54} WWN_FC_FORMAT, MPI_POINTER PTR_WWN_FC_FORMAT,
55 WwnFcFormat_t, MPI_POINTER pWwnFcFormat_t;
56
57typedef struct _WWN_SAS_FORMAT
58{
59 U64 WorldWideID; /* 00h */
60 U32 Reserved1; /* 08h */
61 U32 Reserved2; /* 0Ch */
62} WWN_SAS_FORMAT, MPI_POINTER PTR_WWN_SAS_FORMAT,
63 WwnSasFormat_t, MPI_POINTER pWwnSasFormat_t;
64
65typedef union _WWN_INBAND_FORMAT
66{
67 WWN_FC_FORMAT Fc;
68 WWN_SAS_FORMAT Sas;
69} WWN_INBAND_FORMAT, MPI_POINTER PTR_WWN_INBAND_FORMAT,
70 WwnInbandFormat, MPI_POINTER pWwnInbandFormat;
71
72
73/* Inband Buffer Post reply message */
74
75typedef struct _MSG_INBAND_BUFFER_POST_REPLY
76{
77 U16 Reserved1; /* 00h */
78 U8 MsgLength; /* 02h */
79 U8 Function; /* 03h */
80 U16 Reserved2; /* 04h */
81 U8 Reserved3; /* 06h */
82 U8 MsgFlags; /* 07h */
83 U32 MsgContext; /* 08h */
84 U16 Reserved4; /* 0Ch */
85 U16 IOCStatus; /* 0Eh */
86 U32 IOCLogInfo; /* 10h */
87 U32 TransferLength; /* 14h */
88 U32 TransactionContext; /* 18h */
89 WWN_INBAND_FORMAT Wwn; /* 1Ch */
90 U32 IOCIdentifier[4]; /* 2Ch */
91} MSG_INBAND_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_INBAND_BUFFER_POST_REPLY,
92 MpiInbandBufferPostReply_t, MPI_POINTER pMpiInbandBufferPostReply_t;
93
94
95/****************************************************************************/
96/* Inband Send Request */
97/****************************************************************************/
98
99typedef struct _MSG_INBAND_SEND_REQUEST
100{
101 U16 Reserved1; /* 00h */
102 U8 ChainOffset; /* 02h */
103 U8 Function; /* 03h */
104 U16 Reserved2; /* 04h */
105 U8 Reserved3; /* 06h */
106 U8 MsgFlags; /* 07h */
107 U32 MsgContext; /* 08h */
108 U32 Reserved4; /* 0Ch */
109 WWN_INBAND_FORMAT Wwn; /* 10h */
110 U32 Reserved5; /* 20h */
111 SGE_IO_UNION SGL; /* 24h */
112} MSG_INBAND_SEND_REQUEST, MPI_POINTER PTR_MSG_INBAND_SEND_REQUEST,
113 MpiInbandSendRequest_t , MPI_POINTER pMpiInbandSendRequest_t;
114
115
116/* Inband Send reply message */
117
118typedef struct _MSG_INBAND_SEND_REPLY
119{
120 U16 Reserved1; /* 00h */
121 U8 MsgLength; /* 02h */
122 U8 Function; /* 03h */
123 U16 Reserved2; /* 04h */
124 U8 Reserved3; /* 06h */
125 U8 MsgFlags; /* 07h */
126 U32 MsgContext; /* 08h */
127 U16 Reserved4; /* 0Ch */
128 U16 IOCStatus; /* 0Eh */
129 U32 IOCLogInfo; /* 10h */
130 U32 ResponseLength; /* 14h */
131} MSG_INBAND_SEND_REPLY, MPI_POINTER PTR_MSG_INBAND_SEND_REPLY,
132 MpiInbandSendReply_t, MPI_POINTER pMpiInbandSendReply_t;
133
134
135/****************************************************************************/
136/* Inband Response Request */
137/****************************************************************************/
138
139typedef struct _MSG_INBAND_RSP_REQUEST
140{
141 U16 Reserved1; /* 00h */
142 U8 ChainOffset; /* 02h */
143 U8 Function; /* 03h */
144 U16 Reserved2; /* 04h */
145 U8 Reserved3; /* 06h */
146 U8 MsgFlags; /* 07h */
147 U32 MsgContext; /* 08h */
148 U32 Reserved4; /* 0Ch */
149 WWN_INBAND_FORMAT Wwn; /* 10h */
150 U32 IOCIdentifier[4]; /* 20h */
151 U32 ResponseLength; /* 30h */
152 SGE_IO_UNION SGL; /* 34h */
153} MSG_INBAND_RSP_REQUEST, MPI_POINTER PTR_MSG_INBAND_RSP_REQUEST,
154 MpiInbandRspRequest_t , MPI_POINTER pMpiInbandRspRequest_t;
155
156
157/* Inband Response reply message */
158
159typedef struct _MSG_INBAND_RSP_REPLY
160{
161 U16 Reserved1; /* 00h */
162 U8 MsgLength; /* 02h */
163 U8 Function; /* 03h */
164 U16 Reserved2; /* 04h */
165 U8 Reserved3; /* 06h */
166 U8 MsgFlags; /* 07h */
167 U32 MsgContext; /* 08h */
168 U16 Reserved4; /* 0Ch */
169 U16 IOCStatus; /* 0Eh */
170 U32 IOCLogInfo; /* 10h */
171} MSG_INBAND_RSP_REPLY, MPI_POINTER PTR_MSG_INBAND_RSP_REPLY,
172 MpiInbandRspReply_t, MPI_POINTER pMpiInbandRspReply_t;
173
174
175/****************************************************************************/
176/* Inband Abort Request */
177/****************************************************************************/
178
179typedef struct _MSG_INBAND_ABORT_REQUEST
180{
181 U8 Reserved1; /* 00h */
182 U8 AbortType; /* 01h */
183 U8 ChainOffset; /* 02h */
184 U8 Function; /* 03h */
185 U16 Reserved2; /* 04h */
186 U8 Reserved3; /* 06h */
187 U8 MsgFlags; /* 07h */
188 U32 MsgContext; /* 08h */
189 U32 Reserved4; /* 0Ch */
190 U32 ContextToAbort; /* 10h */
191} MSG_INBAND_ABORT_REQUEST, MPI_POINTER PTR_MSG_INBAND_ABORT_REQUEST,
192 MpiInbandAbortRequest_t , MPI_POINTER pMpiInbandAbortRequest_t;
193
194#define MPI_INBAND_ABORT_TYPE_ALL_BUFFERS (0x00)
195#define MPI_INBAND_ABORT_TYPE_EXACT_BUFFER (0x01)
196#define MPI_INBAND_ABORT_TYPE_SEND_REQUEST (0x02)
197#define MPI_INBAND_ABORT_TYPE_RESPONSE_REQUEST (0x03)
198
199
200/* Inband Abort reply message */
201
202typedef struct _MSG_INBAND_ABORT_REPLY
203{
204 U8 Reserved1; /* 00h */
205 U8 AbortType; /* 01h */
206 U8 MsgLength; /* 02h */
207 U8 Function; /* 03h */
208 U16 Reserved2; /* 04h */
209 U8 Reserved3; /* 06h */
210 U8 MsgFlags; /* 07h */
211 U32 MsgContext; /* 08h */
212 U16 Reserved4; /* 0Ch */
213 U16 IOCStatus; /* 0Eh */
214 U32 IOCLogInfo; /* 10h */
215} MSG_INBAND_ABORT_REPLY, MPI_POINTER PTR_MSG_INBAND_ABORT_REPLY,
216 MpiInbandAbortReply_t, MPI_POINTER pMpiInbandAbortReply_t;
217
218
219#endif
220
diff --git a/drivers/message/fusion/lsi/mpi_init.h b/drivers/message/fusion/lsi/mpi_init.h
new file mode 100644
index 000000000000..b3c95fd7256f
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_init.h
@@ -0,0 +1,362 @@
1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_init.h
6 * Title: MPI initiator mode messages and structures
7 * Creation Date: June 8, 2000
8 *
9 * mpi_init.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY.
18 * 06-06-00 01.00.01 Update version number for 1.0 release.
19 * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions.
20 * 11-02-00 01.01.01 Original release for post 1.0 work.
21 * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT.
22 * 02-20-01 01.01.03 Started using MPI_POINTER.
23 * 03-27-01 01.01.04 Added structure offset comments.
24 * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT.
25 * 08-08-01 01.02.01 Original release for v1.2 work.
26 * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET.
27 * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for
28 * MSG_SCSI_IO_REPLY.
29 * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure
30 * Processor messages.
31 * 10-04-01 01.02.04 Added defines for SEP request Action field.
32 * 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define
33 * for SCSI IO requests.
34 * 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP.
35 * 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
36 * --------------------------------------------------------------------------
37 */
38
39#ifndef MPI_INIT_H
40#define MPI_INIT_H
41
42
43/*****************************************************************************
44*
45* S C S I I n i t i a t o r M e s s a g e s
46*
47*****************************************************************************/
48
49/****************************************************************************/
50/* SCSI IO messages and associated structures */
51/****************************************************************************/
52
53typedef struct _MSG_SCSI_IO_REQUEST
54{
55 U8 TargetID; /* 00h */
56 U8 Bus; /* 01h */
57 U8 ChainOffset; /* 02h */
58 U8 Function; /* 03h */
59 U8 CDBLength; /* 04h */
60 U8 SenseBufferLength; /* 05h */
61 U8 Reserved; /* 06h */
62 U8 MsgFlags; /* 07h */
63 U32 MsgContext; /* 08h */
64 U8 LUN[8]; /* 0Ch */
65 U32 Control; /* 14h */
66 U8 CDB[16]; /* 18h */
67 U32 DataLength; /* 28h */
68 U32 SenseBufferLowAddr; /* 2Ch */
69 SGE_IO_UNION SGL; /* 30h */
70} MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
71 SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
72
73
74/* SCSI IO MsgFlags bits */
75
76#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
77#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
78#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
79#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
80#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
81#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
82#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
83#define MPI_SCSIIO_MSGFLGS_EEDP_TYPE_MASK (0xE0)
84#define MPI_SCSIIO_MSGFLGS_EEDP_NONE (0x00)
85#define MPI_SCSIIO_MSGFLGS_EEDP_RDPROTECT_T10 (0x20)
86#define MPI_SCSIIO_MSGFLGS_EEDP_VRPROTECT_T10 (0x40)
87#define MPI_SCSIIO_MSGFLGS_EEDP_WRPROTECT_T10 (0x60)
88#define MPI_SCSIIO_MSGFLGS_EEDP_520_READ_MODE1 (0x20)
89#define MPI_SCSIIO_MSGFLGS_EEDP_520_WRITE_MODE1 (0x40)
90#define MPI_SCSIIO_MSGFLGS_EEDP_8_9_READ_MODE1 (0x60)
91#define MPI_SCSIIO_MSGFLGS_EEDP_8_9_WRITE_MODE1 (0x80)
92
93
94/* SCSI IO LUN fields */
95
96#define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
97#define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
98#define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
99#define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
100#define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00)
101#define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00)
102
103/* SCSI IO Control bits */
104
105#define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
106#define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
107#define MPI_SCSIIO_CONTROL_WRITE (0x01000000)
108#define MPI_SCSIIO_CONTROL_READ (0x02000000)
109
110#define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000)
111#define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
112
113#define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
114#define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
115#define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100)
116#define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
117#define MPI_SCSIIO_CONTROL_ACAQ (0x00000400)
118#define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500)
119#define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700)
120
121#define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000)
122#define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000)
123#define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000)
124#define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000)
125#define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000)
126#define MPI_SCSIIO_CONTROL_RESERVED (0x00080000)
127#define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000)
128#define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000)
129#define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000)
130
131
132/* SCSI IO reply structure */
133typedef struct _MSG_SCSI_IO_REPLY
134{
135 U8 TargetID; /* 00h */
136 U8 Bus; /* 01h */
137 U8 MsgLength; /* 02h */
138 U8 Function; /* 03h */
139 U8 CDBLength; /* 04h */
140 U8 SenseBufferLength; /* 05h */
141 U8 Reserved; /* 06h */
142 U8 MsgFlags; /* 07h */
143 U32 MsgContext; /* 08h */
144 U8 SCSIStatus; /* 0Ch */
145 U8 SCSIState; /* 0Dh */
146 U16 IOCStatus; /* 0Eh */
147 U32 IOCLogInfo; /* 10h */
148 U32 TransferCount; /* 14h */
149 U32 SenseCount; /* 18h */
150 U32 ResponseInfo; /* 1Ch */
151} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
152 SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
153
154
155/* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */
156
157#define MPI_SCSI_STATUS_SUCCESS (0x00)
158#define MPI_SCSI_STATUS_CHECK_CONDITION (0x02)
159#define MPI_SCSI_STATUS_CONDITION_MET (0x04)
160#define MPI_SCSI_STATUS_BUSY (0x08)
161#define MPI_SCSI_STATUS_INTERMEDIATE (0x10)
162#define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
163#define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
164#define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22)
165#define MPI_SCSI_STATUS_TASK_SET_FULL (0x28)
166#define MPI_SCSI_STATUS_ACA_ACTIVE (0x30)
167
168#define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80)
169#define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81)
170#define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82)
171
172
173/* SCSI IO Reply SCSIState values */
174
175#define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01)
176#define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02)
177#define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04)
178#define MPI_SCSI_STATE_TERMINATED (0x08)
179#define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
180#define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20)
181
182/* SCSI IO Reply ResponseInfo values */
183/* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */
184
185#define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000)
186#define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000)
187#define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000)
188#define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000)
189#define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
190#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
191#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
192
193
194/****************************************************************************/
195/* SCSI IO 32 Request message structure */
196/****************************************************************************/
197
198typedef struct _MSG_SCSI_IO32_REQUEST
199{
200 U8 TargetID; /* 00h */
201 U8 Bus; /* 01h */
202 U8 ChainOffset; /* 02h */
203 U8 Function; /* 03h */
204 U8 CDBLength; /* 04h */
205 U8 SenseBufferLength; /* 05h */
206 U8 Reserved; /* 06h */
207 U8 MsgFlags; /* 07h */
208 U32 MsgContext; /* 08h */
209 U8 LUN[8]; /* 0Ch */
210 U32 Control; /* 14h */
211 U8 CDB[32]; /* 18h */
212 U32 DataLength; /* 38h */
213 U32 SenseBufferLowAddr; /* 3Ch */
214 SGE_IO_UNION SGL; /* 40h */
215} MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
216 SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
217
218/* SCSI IO 32 uses the same defines as above for SCSI IO */
219
220
221/****************************************************************************/
222/* SCSI Task Management messages */
223/****************************************************************************/
224
225typedef struct _MSG_SCSI_TASK_MGMT
226{
227 U8 TargetID; /* 00h */
228 U8 Bus; /* 01h */
229 U8 ChainOffset; /* 02h */
230 U8 Function; /* 03h */
231 U8 Reserved; /* 04h */
232 U8 TaskType; /* 05h */
233 U8 Reserved1; /* 06h */
234 U8 MsgFlags; /* 07h */
235 U32 MsgContext; /* 08h */
236 U8 LUN[8]; /* 0Ch */
237 U32 Reserved2[7]; /* 14h */
238 U32 TaskMsgContext; /* 30h */
239} MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
240 SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
241
242/* TaskType values */
243
244#define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
245#define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
246#define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
247#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
248#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
249#define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
250
251/* MsgFlags bits */
252#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
253#define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02)
254#define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
255
256/* SCSI Task Management Reply */
257typedef struct _MSG_SCSI_TASK_MGMT_REPLY
258{
259 U8 TargetID; /* 00h */
260 U8 Bus; /* 01h */
261 U8 MsgLength; /* 02h */
262 U8 Function; /* 03h */
263 U8 Reserved; /* 04h */
264 U8 TaskType; /* 05h */
265 U8 Reserved1; /* 06h */
266 U8 MsgFlags; /* 07h */
267 U32 MsgContext; /* 08h */
268 U8 Reserved2[2]; /* 0Ch */
269 U16 IOCStatus; /* 0Eh */
270 U32 IOCLogInfo; /* 10h */
271 U32 TerminationCount; /* 14h */
272} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
273 SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
274
275
276/****************************************************************************/
277/* SCSI Enclosure Processor messages */
278/****************************************************************************/
279
280typedef struct _MSG_SEP_REQUEST
281{
282 U8 TargetID; /* 00h */
283 U8 Bus; /* 01h */
284 U8 ChainOffset; /* 02h */
285 U8 Function; /* 03h */
286 U8 Action; /* 04h */
287 U8 Reserved1; /* 05h */
288 U8 Reserved2; /* 06h */
289 U8 MsgFlags; /* 07h */
290 U32 MsgContext; /* 08h */
291 U32 SlotStatus; /* 0Ch */
292} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
293 SEPRequest_t, MPI_POINTER pSEPRequest_t;
294
295/* Action defines */
296#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
297#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
298
299/* SlotStatus bits for MSG_SEP_REQUEST */
300#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
301#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
302#define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
303#define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
304#define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
305#define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020)
306#define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
307#define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
308#define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
309#define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
310#define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
311#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
312#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
313#define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
314#define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
315#define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
316#define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
317#define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000)
318
319
320typedef struct _MSG_SEP_REPLY
321{
322 U8 TargetID; /* 00h */
323 U8 Bus; /* 01h */
324 U8 MsgLength; /* 02h */
325 U8 Function; /* 03h */
326 U8 Action; /* 04h */
327 U8 Reserved1; /* 05h */
328 U8 Reserved2; /* 06h */
329 U8 MsgFlags; /* 07h */
330 U32 MsgContext; /* 08h */
331 U16 Reserved3; /* 0Ch */
332 U16 IOCStatus; /* 0Eh */
333 U32 IOCLogInfo; /* 10h */
334 U32 SlotStatus; /* 14h */
335} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
336 SEPReply_t, MPI_POINTER pSEPReply_t;
337
338/* SlotStatus bits for MSG_SEP_REPLY */
339#define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
340#define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
341#define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
342#define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
343#define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
344#define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020)
345#define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
346#define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
347#define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
348#define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
349#define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
350#define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
351#define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
352#define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
353#define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
354#define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
355#define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
356#define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
357#define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
358#define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000)
359#define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000)
360#define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000)
361
362#endif
diff --git a/drivers/message/fusion/lsi/mpi_ioc.h b/drivers/message/fusion/lsi/mpi_ioc.h
new file mode 100644
index 000000000000..82445d18b4d5
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_ioc.h
@@ -0,0 +1,770 @@
1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_ioc.h
6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
7 * Creation Date: August 11, 2000
8 *
9 * mpi_ioc.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
18 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
19 * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
20 * Added _MSG_EVENT_ACK_REPLY structure.
21 * Added _MSG_FW_DOWNLOAD_REPLY structure.
22 * Added _MSG_TOOLBOX_REPLY structure.
23 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
24 * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
25 * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
26 * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
27 * _MSG_EVENT_ACK_REPLY structure to match specification.
28 * 11-02-00 01.01.01 Original release for post 1.0 work.
29 * Added a value for Manufacturer to WhoInit.
30 * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
31 * removed toolbox message.
32 * 01-09-01 01.01.03 Added event enabled and disabled defines.
33 * Added structures for FwHeader and DataHeader.
34 * Added ImageType to FwUpload reply.
35 * 02-20-01 01.01.04 Started using MPI_POINTER.
36 * 02-27-01 01.01.05 Added event for RAID status change and its event data.
37 * Added IocNumber field to MSG_IOC_FACTS_REPLY.
38 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
39 * Added structure offset comments.
40 * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
41 * 08-08-01 01.02.01 Original release for v1.2 work.
42 * New format for FWVersion and ProductId in
43 * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
44 * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
45 * related structure and defines.
46 * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
47 * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
48 * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
49 * IOCExceptions and changed DataImageSize to reserved.
50 * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
51 * MPI_FW_UPLOAD_ITYPE_NVDATA.
52 * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
53 * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
54 * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
55 * 05-31-02 01.02.06 Added define for
56 * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
57 * Added AliasIndex to EVENT_DATA_LOGOUT structure.
58 * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
59 * 06-26-03 01.02.08 Added new values to the product family defines.
60 * --------------------------------------------------------------------------
61 */
62
63#ifndef MPI_IOC_H
64#define MPI_IOC_H
65
66
67/*****************************************************************************
68*
69* I O C M e s s a g e s
70*
71*****************************************************************************/
72
73/****************************************************************************/
74/* IOCInit message */
75/****************************************************************************/
76
77typedef struct _MSG_IOC_INIT
78{
79 U8 WhoInit; /* 00h */
80 U8 Reserved; /* 01h */
81 U8 ChainOffset; /* 02h */
82 U8 Function; /* 03h */
83 U8 Flags; /* 04h */
84 U8 MaxDevices; /* 05h */
85 U8 MaxBuses; /* 06h */
86 U8 MsgFlags; /* 07h */
87 U32 MsgContext; /* 08h */
88 U16 ReplyFrameSize; /* 0Ch */
89 U8 Reserved1[2]; /* 0Eh */
90 U32 HostMfaHighAddr; /* 10h */
91 U32 SenseBufferHighAddr; /* 14h */
92 U32 ReplyFifoHostSignalingAddr; /* 18h */
93} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
94 IOCInit_t, MPI_POINTER pIOCInit_t;
95
96/* WhoInit values */
97#define MPI_WHOINIT_NO_ONE (0x00)
98#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
99#define MPI_WHOINIT_ROM_BIOS (0x02)
100#define MPI_WHOINIT_PCI_PEER (0x03)
101#define MPI_WHOINIT_HOST_DRIVER (0x04)
102#define MPI_WHOINIT_MANUFACTURER (0x05)
103
104/* Flags values */
105#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
106#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
107
108typedef struct _MSG_IOC_INIT_REPLY
109{
110 U8 WhoInit; /* 00h */
111 U8 Reserved; /* 01h */
112 U8 MsgLength; /* 02h */
113 U8 Function; /* 03h */
114 U8 Flags; /* 04h */
115 U8 MaxDevices; /* 05h */
116 U8 MaxBuses; /* 06h */
117 U8 MsgFlags; /* 07h */
118 U32 MsgContext; /* 08h */
119 U16 Reserved2; /* 0Ch */
120 U16 IOCStatus; /* 0Eh */
121 U32 IOCLogInfo; /* 10h */
122} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
123 IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
124
125
126
127/****************************************************************************/
128/* IOC Facts message */
129/****************************************************************************/
130
131typedef struct _MSG_IOC_FACTS
132{
133 U8 Reserved[2]; /* 00h */
134 U8 ChainOffset; /* 01h */
135 U8 Function; /* 02h */
136 U8 Reserved1[3]; /* 03h */
137 U8 MsgFlags; /* 04h */
138 U32 MsgContext; /* 08h */
139} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
140 IOCFacts_t, MPI_POINTER pIOCFacts_t;
141
142typedef struct _MPI_FW_VERSION_STRUCT
143{
144 U8 Dev; /* 00h */
145 U8 Unit; /* 01h */
146 U8 Minor; /* 02h */
147 U8 Major; /* 03h */
148} MPI_FW_VERSION_STRUCT;
149
150typedef union _MPI_FW_VERSION
151{
152 MPI_FW_VERSION_STRUCT Struct;
153 U32 Word;
154} MPI_FW_VERSION;
155
156/* IOC Facts Reply */
157typedef struct _MSG_IOC_FACTS_REPLY
158{
159 U16 MsgVersion; /* 00h */
160 U8 MsgLength; /* 02h */
161 U8 Function; /* 03h */
162 U16 HeaderVersion; /* 04h */
163 U8 IOCNumber; /* 06h */
164 U8 MsgFlags; /* 07h */
165 U32 MsgContext; /* 08h */
166 U16 IOCExceptions; /* 0Ch */
167 U16 IOCStatus; /* 0Eh */
168 U32 IOCLogInfo; /* 10h */
169 U8 MaxChainDepth; /* 14h */
170 U8 WhoInit; /* 15h */
171 U8 BlockSize; /* 16h */
172 U8 Flags; /* 17h */
173 U16 ReplyQueueDepth; /* 18h */
174 U16 RequestFrameSize; /* 1Ah */
175 U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
176 U16 ProductID; /* 1Eh */
177 U32 CurrentHostMfaHighAddr; /* 20h */
178 U16 GlobalCredits; /* 24h */
179 U8 NumberOfPorts; /* 26h */
180 U8 EventState; /* 27h */
181 U32 CurrentSenseBufferHighAddr; /* 28h */
182 U16 CurReplyFrameSize; /* 2Ch */
183 U8 MaxDevices; /* 2Eh */
184 U8 MaxBuses; /* 2Fh */
185 U32 FWImageSize; /* 30h */
186 U32 IOCCapabilities; /* 34h */
187 MPI_FW_VERSION FWVersion; /* 38h */
188 U16 HighPriorityQueueDepth; /* 3Ch */
189 U16 Reserved2; /* 3Eh */
190} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
191 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
192
193#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
194#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
195
196#define MPI_IOCFACTS_HEADERVERSION_UNIT_MASK (0xFF00)
197#define MPI_IOCFACTS_HEADERVERSION_DEV_MASK (0x00FF)
198
199#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
200#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
201#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
202#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
203
204#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
205
206#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
207#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
208
209#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
210#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
211#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
212#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
213#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
214#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
215#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
216
217
218
219/*****************************************************************************
220*
221* P o r t M e s s a g e s
222*
223*****************************************************************************/
224
225/****************************************************************************/
226/* Port Facts message and Reply */
227/****************************************************************************/
228
229typedef struct _MSG_PORT_FACTS
230{
231 U8 Reserved[2]; /* 00h */
232 U8 ChainOffset; /* 02h */
233 U8 Function; /* 03h */
234 U8 Reserved1[2]; /* 04h */
235 U8 PortNumber; /* 06h */
236 U8 MsgFlags; /* 07h */
237 U32 MsgContext; /* 08h */
238} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
239 PortFacts_t, MPI_POINTER pPortFacts_t;
240
241typedef struct _MSG_PORT_FACTS_REPLY
242{
243 U16 Reserved; /* 00h */
244 U8 MsgLength; /* 02h */
245 U8 Function; /* 03h */
246 U16 Reserved1; /* 04h */
247 U8 PortNumber; /* 06h */
248 U8 MsgFlags; /* 07h */
249 U32 MsgContext; /* 08h */
250 U16 Reserved2; /* 0Ch */
251 U16 IOCStatus; /* 0Eh */
252 U32 IOCLogInfo; /* 10h */
253 U8 Reserved3; /* 14h */
254 U8 PortType; /* 15h */
255 U16 MaxDevices; /* 16h */
256 U16 PortSCSIID; /* 18h */
257 U16 ProtocolFlags; /* 1Ah */
258 U16 MaxPostedCmdBuffers; /* 1Ch */
259 U16 MaxPersistentIDs; /* 1Eh */
260 U16 MaxLanBuckets; /* 20h */
261 U16 Reserved4; /* 22h */
262 U32 Reserved5; /* 24h */
263} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
264 PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
265
266
267/* PortTypes values */
268
269#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
270#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
271#define MPI_PORTFACTS_PORTTYPE_FC (0x10)
272#define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
273#define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
274
275/* ProtocolFlags values */
276
277#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
278#define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
279#define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
280#define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
281
282
283/****************************************************************************/
284/* Port Enable Message */
285/****************************************************************************/
286
287typedef struct _MSG_PORT_ENABLE
288{
289 U8 Reserved[2]; /* 00h */
290 U8 ChainOffset; /* 02h */
291 U8 Function; /* 03h */
292 U8 Reserved1[2]; /* 04h */
293 U8 PortNumber; /* 06h */
294 U8 MsgFlags; /* 07h */
295 U32 MsgContext; /* 08h */
296} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
297 PortEnable_t, MPI_POINTER pPortEnable_t;
298
299typedef struct _MSG_PORT_ENABLE_REPLY
300{
301 U8 Reserved[2]; /* 00h */
302 U8 MsgLength; /* 02h */
303 U8 Function; /* 03h */
304 U8 Reserved1[2]; /* 04h */
305 U8 PortNumber; /* 05h */
306 U8 MsgFlags; /* 07h */
307 U32 MsgContext; /* 08h */
308 U16 Reserved2; /* 0Ch */
309 U16 IOCStatus; /* 0Eh */
310 U32 IOCLogInfo; /* 10h */
311} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
312 PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
313
314
315/*****************************************************************************
316*
317* E v e n t M e s s a g e s
318*
319*****************************************************************************/
320
321/****************************************************************************/
322/* Event Notification messages */
323/****************************************************************************/
324
325typedef struct _MSG_EVENT_NOTIFY
326{
327 U8 Switch; /* 00h */
328 U8 Reserved; /* 01h */
329 U8 ChainOffset; /* 02h */
330 U8 Function; /* 03h */
331 U8 Reserved1[3]; /* 04h */
332 U8 MsgFlags; /* 07h */
333 U32 MsgContext; /* 08h */
334} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
335 EventNotification_t, MPI_POINTER pEventNotification_t;
336
337/* Event Notification Reply */
338
339typedef struct _MSG_EVENT_NOTIFY_REPLY
340{
341 U16 EventDataLength; /* 00h */
342 U8 MsgLength; /* 02h */
343 U8 Function; /* 03h */
344 U8 Reserved1[2]; /* 04h */
345 U8 AckRequired; /* 06h */
346 U8 MsgFlags; /* 07h */
347 U32 MsgContext; /* 08h */
348 U8 Reserved2[2]; /* 0Ch */
349 U16 IOCStatus; /* 0Eh */
350 U32 IOCLogInfo; /* 10h */
351 U32 Event; /* 14h */
352 U32 EventContext; /* 18h */
353 U32 Data[1]; /* 1Ch */
354} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
355 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
356
357/* Event Acknowledge */
358
359typedef struct _MSG_EVENT_ACK
360{
361 U8 Reserved[2]; /* 00h */
362 U8 ChainOffset; /* 02h */
363 U8 Function; /* 03h */
364 U8 Reserved1[3]; /* 04h */
365 U8 MsgFlags; /* 07h */
366 U32 MsgContext; /* 08h */
367 U32 Event; /* 0Ch */
368 U32 EventContext; /* 10h */
369} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
370 EventAck_t, MPI_POINTER pEventAck_t;
371
372typedef struct _MSG_EVENT_ACK_REPLY
373{
374 U8 Reserved[2]; /* 00h */
375 U8 MsgLength; /* 02h */
376 U8 Function; /* 03h */
377 U8 Reserved1[3]; /* 04h */
378 U8 MsgFlags; /* 07h */
379 U32 MsgContext; /* 08h */
380 U16 Reserved2; /* 0Ch */
381 U16 IOCStatus; /* 0Eh */
382 U32 IOCLogInfo; /* 10h */
383} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
384 EventAckReply_t, MPI_POINTER pEventAckReply_t;
385
386/* Switch */
387
388#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
389#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
390
391/* Event */
392
393#define MPI_EVENT_NONE (0x00000000)
394#define MPI_EVENT_LOG_DATA (0x00000001)
395#define MPI_EVENT_STATE_CHANGE (0x00000002)
396#define MPI_EVENT_UNIT_ATTENTION (0x00000003)
397#define MPI_EVENT_IOC_BUS_RESET (0x00000004)
398#define MPI_EVENT_EXT_BUS_RESET (0x00000005)
399#define MPI_EVENT_RESCAN (0x00000006)
400#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
401#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
402#define MPI_EVENT_LOGOUT (0x00000009)
403#define MPI_EVENT_EVENT_CHANGE (0x0000000A)
404#define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
405#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
406#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
407#define MPI_EVENT_QUEUE_FULL (0x0000000E)
408#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
409#define MPI_EVENT_SAS_SES (0x00000010)
410#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
411
412/* AckRequired field values */
413
414#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
415#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
416
417/* EventChange Event data */
418
419typedef struct _EVENT_DATA_EVENT_CHANGE
420{
421 U8 EventState; /* 00h */
422 U8 Reserved; /* 01h */
423 U16 Reserved1; /* 02h */
424} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
425 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
426
427/* SCSI Event data for Port, Bus and Device forms */
428
429typedef struct _EVENT_DATA_SCSI
430{
431 U8 TargetID; /* 00h */
432 U8 BusPort; /* 01h */
433 U16 Reserved; /* 02h */
434} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
435 EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
436
437/* SCSI Device Status Change Event data */
438
439typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
440{
441 U8 TargetID; /* 00h */
442 U8 Bus; /* 01h */
443 U8 ReasonCode; /* 02h */
444 U8 LUN; /* 03h */
445 U8 ASC; /* 04h */
446 U8 ASCQ; /* 05h */
447 U16 Reserved; /* 06h */
448} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
449 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
450 MpiEventDataScsiDeviceStatusChange_t,
451 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
452
453/* MPI SCSI Device Status Change Event data ReasonCode values */
454#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
455#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
456#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
457
458/* SAS Device Status Change Event data */
459
460typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
461{
462 U8 TargetID; /* 00h */
463 U8 Bus; /* 01h */
464 U8 ReasonCode; /* 02h */
465 U8 Reserved; /* 03h */
466 U8 ASC; /* 04h */
467 U8 ASCQ; /* 05h */
468 U16 DevHandle; /* 06h */
469 U32 DeviceInfo; /* 08h */
470} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
471 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
472 MpiEventDataSasDeviceStatusChange_t,
473 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
474
475/* MPI SAS Device Status Change Event data ReasonCode values */
476#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
477#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
478#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
479#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
480
481/* SCSI Event data for Queue Full event */
482
483typedef struct _EVENT_DATA_QUEUE_FULL
484{
485 U8 TargetID; /* 00h */
486 U8 Bus; /* 01h */
487 U16 CurrentDepth; /* 02h */
488} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
489 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
490
491/* MPI Link Status Change Event data */
492
493typedef struct _EVENT_DATA_LINK_STATUS
494{
495 U8 State; /* 00h */
496 U8 Reserved; /* 01h */
497 U16 Reserved1; /* 02h */
498 U8 Reserved2; /* 04h */
499 U8 Port; /* 05h */
500 U16 Reserved3; /* 06h */
501} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
502 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
503
504#define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
505#define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
506
507/* MPI Loop State Change Event data */
508
509typedef struct _EVENT_DATA_LOOP_STATE
510{
511 U8 Character4; /* 00h */
512 U8 Character3; /* 01h */
513 U8 Type; /* 02h */
514 U8 Reserved; /* 03h */
515 U8 Reserved1; /* 04h */
516 U8 Port; /* 05h */
517 U16 Reserved2; /* 06h */
518} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
519 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
520
521#define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
522#define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
523#define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
524
525/* MPI LOGOUT Event data */
526
527typedef struct _EVENT_DATA_LOGOUT
528{
529 U32 NPortID; /* 00h */
530 U8 AliasIndex; /* 04h */
531 U8 Port; /* 05h */
532 U16 Reserved1; /* 06h */
533} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
534 EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
535
536#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
537
538
539/* MPI Integrated RAID Event data */
540
541typedef struct _EVENT_DATA_RAID
542{
543 U8 VolumeID; /* 00h */
544 U8 VolumeBus; /* 01h */
545 U8 ReasonCode; /* 02h */
546 U8 PhysDiskNum; /* 03h */
547 U8 ASC; /* 04h */
548 U8 ASCQ; /* 05h */
549 U16 Reserved; /* 06h */
550 U32 SettingsStatus; /* 08h */
551} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
552 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
553
554/* MPI Integrated RAID Event data ReasonCode values */
555#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
556#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
557#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
558#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
559#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
560#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
561#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
562#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
563#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
564#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
565#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
566#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
567
568
569/*****************************************************************************
570*
571* F i r m w a r e L o a d M e s s a g e s
572*
573*****************************************************************************/
574
575/****************************************************************************/
576/* Firmware Download message and associated structures */
577/****************************************************************************/
578
579typedef struct _MSG_FW_DOWNLOAD
580{
581 U8 ImageType; /* 00h */
582 U8 Reserved; /* 01h */
583 U8 ChainOffset; /* 02h */
584 U8 Function; /* 03h */
585 U8 Reserved1[3]; /* 04h */
586 U8 MsgFlags; /* 07h */
587 U32 MsgContext; /* 08h */
588 SGE_MPI_UNION SGL; /* 0Ch */
589} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
590 FWDownload_t, MPI_POINTER pFWDownload_t;
591
592#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
593#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
594#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
595#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
596#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
597
598
599typedef struct _FWDownloadTCSGE
600{
601 U8 Reserved; /* 00h */
602 U8 ContextSize; /* 01h */
603 U8 DetailsLength; /* 02h */
604 U8 Flags; /* 03h */
605 U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
606 U32 ImageOffset; /* 08h */
607 U32 ImageSize; /* 0Ch */
608} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
609 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
610
611/* Firmware Download reply */
612typedef struct _MSG_FW_DOWNLOAD_REPLY
613{
614 U8 ImageType; /* 00h */
615 U8 Reserved; /* 01h */
616 U8 MsgLength; /* 02h */
617 U8 Function; /* 03h */
618 U8 Reserved1[3]; /* 04h */
619 U8 MsgFlags; /* 07h */
620 U32 MsgContext; /* 08h */
621 U16 Reserved2; /* 0Ch */
622 U16 IOCStatus; /* 0Eh */
623 U32 IOCLogInfo; /* 10h */
624} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
625 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
626
627
628/****************************************************************************/
629/* Firmware Upload message and associated structures */
630/****************************************************************************/
631
632typedef struct _MSG_FW_UPLOAD
633{
634 U8 ImageType; /* 00h */
635 U8 Reserved; /* 01h */
636 U8 ChainOffset; /* 02h */
637 U8 Function; /* 03h */
638 U8 Reserved1[3]; /* 04h */
639 U8 MsgFlags; /* 07h */
640 U32 MsgContext; /* 08h */
641 SGE_MPI_UNION SGL; /* 0Ch */
642} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
643 FWUpload_t, MPI_POINTER pFWUpload_t;
644
645#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
646#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
647#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
648#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
649#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
650
651typedef struct _FWUploadTCSGE
652{
653 U8 Reserved; /* 00h */
654 U8 ContextSize; /* 01h */
655 U8 DetailsLength; /* 02h */
656 U8 Flags; /* 03h */
657 U32 Reserved1; /* 04h */
658 U32 ImageOffset; /* 08h */
659 U32 ImageSize; /* 0Ch */
660} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
661 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
662
663/* Firmware Upload reply */
664typedef struct _MSG_FW_UPLOAD_REPLY
665{
666 U8 ImageType; /* 00h */
667 U8 Reserved; /* 01h */
668 U8 MsgLength; /* 02h */
669 U8 Function; /* 03h */
670 U8 Reserved1[3]; /* 04h */
671 U8 MsgFlags; /* 07h */
672 U32 MsgContext; /* 08h */
673 U16 Reserved2; /* 0Ch */
674 U16 IOCStatus; /* 0Eh */
675 U32 IOCLogInfo; /* 10h */
676 U32 ActualImageSize; /* 14h */
677} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
678 FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
679
680
681typedef struct _MPI_FW_HEADER
682{
683 U32 ArmBranchInstruction0; /* 00h */
684 U32 Signature0; /* 04h */
685 U32 Signature1; /* 08h */
686 U32 Signature2; /* 0Ch */
687 U32 ArmBranchInstruction1; /* 10h */
688 U32 ArmBranchInstruction2; /* 14h */
689 U32 Reserved; /* 18h */
690 U32 Checksum; /* 1Ch */
691 U16 VendorId; /* 20h */
692 U16 ProductId; /* 22h */
693 MPI_FW_VERSION FWVersion; /* 24h */
694 U32 SeqCodeVersion; /* 28h */
695 U32 ImageSize; /* 2Ch */
696 U32 NextImageHeaderOffset; /* 30h */
697 U32 LoadStartAddress; /* 34h */
698 U32 IopResetVectorValue; /* 38h */
699 U32 IopResetRegAddr; /* 3Ch */
700 U32 VersionNameWhat; /* 40h */
701 U8 VersionName[32]; /* 44h */
702 U32 VendorNameWhat; /* 64h */
703 U8 VendorName[32]; /* 68h */
704} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
705 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
706
707#define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
708
709/* defines for using the ProductId field */
710#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
711#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
712#define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
713#define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
714
715#define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
716#define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
717#define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
718
719#define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
720#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
721#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
722#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
723#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
724#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
725#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
726
727#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
728/* SCSI */
729#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
730#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
731#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
732#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
733#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
734#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
735#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
736#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
737#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
738#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
739#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
740#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
741/* Fibre Channel */
742#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
743#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001)
744#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002)
745#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003)
746#define MPI_FW_HEADER_PID_FAMILY_949_FC (0x0004)
747#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
748/* SAS */
749#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
750
751typedef struct _MPI_EXT_IMAGE_HEADER
752{
753 U8 ImageType; /* 00h */
754 U8 Reserved; /* 01h */
755 U16 Reserved1; /* 02h */
756 U32 Checksum; /* 04h */
757 U32 ImageSize; /* 08h */
758 U32 NextImageHeaderOffset; /* 0Ch */
759 U32 LoadStartAddress; /* 10h */
760 U32 Reserved2; /* 14h */
761} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
762 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
763
764/* defines for the ImageType field */
765#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
766#define MPI_EXT_IMAGE_TYPE_FW (0x01)
767#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
768#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
769
770#endif
diff --git a/drivers/message/fusion/lsi/mpi_lan.h b/drivers/message/fusion/lsi/mpi_lan.h
new file mode 100644
index 000000000000..3ced12784ee8
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_lan.h
@@ -0,0 +1,212 @@
1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_lan.h
6 * Title: MPI LAN messages and structures
7 * Creation Date: June 30, 2000
8 *
9 * mpi_lan.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 05-24-00 00.10.02 Added LANStatus field to _MSG_LAN_SEND_REPLY.
18 * Added LANStatus field to _MSG_LAN_RECEIVE_POST_REPLY.
19 * Moved ListCount field in _MSG_LAN_RECEIVE_POST_REPLY.
20 * 06-06-00 01.00.01 Update version number for 1.0 release.
21 * 06-12-00 01.00.02 Added MPI_ to BUCKETSTATUS_ definitions.
22 * 06-22-00 01.00.03 Major changes to match new LAN definition in 1.0 spec.
23 * 06-30-00 01.00.04 Added Context Reply definitions per revised proposal.
24 * Changed transaction context usage to bucket/buffer.
25 * 07-05-00 01.00.05 Removed LAN_RECEIVE_POST_BUCKET_CONTEXT_MASK definition
26 * to lan private header file
27 * 11-02-00 01.01.01 Original release for post 1.0 work
28 * 02-20-01 01.01.02 Started using MPI_POINTER.
29 * 03-27-01 01.01.03 Added structure offset comments.
30 * 08-08-01 01.02.01 Original release for v1.2 work.
31 * --------------------------------------------------------------------------
32 */
33
34#ifndef MPI_LAN_H
35#define MPI_LAN_H
36
37
38/******************************************************************************
39*
40* L A N M e s s a g e s
41*
42*******************************************************************************/
43
44/* LANSend messages */
45
46typedef struct _MSG_LAN_SEND_REQUEST
47{
48 U16 Reserved; /* 00h */
49 U8 ChainOffset; /* 02h */
50 U8 Function; /* 03h */
51 U16 Reserved2; /* 04h */
52 U8 PortNumber; /* 06h */
53 U8 MsgFlags; /* 07h */
54 U32 MsgContext; /* 08h */
55 SGE_MPI_UNION SG_List[1]; /* 0Ch */
56} MSG_LAN_SEND_REQUEST, MPI_POINTER PTR_MSG_LAN_SEND_REQUEST,
57 LANSendRequest_t, MPI_POINTER pLANSendRequest_t;
58
59
60typedef struct _MSG_LAN_SEND_REPLY
61{
62 U16 Reserved; /* 00h */
63 U8 MsgLength; /* 02h */
64 U8 Function; /* 03h */
65 U8 Reserved2; /* 04h */
66 U8 NumberOfContexts; /* 05h */
67 U8 PortNumber; /* 06h */
68 U8 MsgFlags; /* 07h */
69 U32 MsgContext; /* 08h */
70 U16 Reserved3; /* 0Ch */
71 U16 IOCStatus; /* 0Eh */
72 U32 IOCLogInfo; /* 10h */
73 U32 BufferContext; /* 14h */
74} MSG_LAN_SEND_REPLY, MPI_POINTER PTR_MSG_LAN_SEND_REPLY,
75 LANSendReply_t, MPI_POINTER pLANSendReply_t;
76
77
78/* LANReceivePost */
79
80typedef struct _MSG_LAN_RECEIVE_POST_REQUEST
81{
82 U16 Reserved; /* 00h */
83 U8 ChainOffset; /* 02h */
84 U8 Function; /* 03h */
85 U16 Reserved2; /* 04h */
86 U8 PortNumber; /* 06h */
87 U8 MsgFlags; /* 07h */
88 U32 MsgContext; /* 08h */
89 U32 BucketCount; /* 0Ch */
90 SGE_MPI_UNION SG_List[1]; /* 10h */
91} MSG_LAN_RECEIVE_POST_REQUEST, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REQUEST,
92 LANReceivePostRequest_t, MPI_POINTER pLANReceivePostRequest_t;
93
94
95typedef struct _MSG_LAN_RECEIVE_POST_REPLY
96{
97 U16 Reserved; /* 00h */
98 U8 MsgLength; /* 02h */
99 U8 Function; /* 03h */
100 U8 Reserved2; /* 04h */
101 U8 NumberOfContexts; /* 05h */
102 U8 PortNumber; /* 06h */
103 U8 MsgFlags; /* 07h */
104 U32 MsgContext; /* 08h */
105 U16 Reserved3; /* 0Ch */
106 U16 IOCStatus; /* 0Eh */
107 U32 IOCLogInfo; /* 10h */
108 U32 BucketsRemaining; /* 14h */
109 U32 PacketOffset; /* 18h */
110 U32 PacketLength; /* 1Ch */
111 U32 BucketContext[1]; /* 20h */
112} MSG_LAN_RECEIVE_POST_REPLY, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REPLY,
113 LANReceivePostReply_t, MPI_POINTER pLANReceivePostReply_t;
114
115
116/* LANReset */
117
118typedef struct _MSG_LAN_RESET_REQUEST
119{
120 U16 Reserved; /* 00h */
121 U8 ChainOffset; /* 02h */
122 U8 Function; /* 03h */
123 U16 Reserved2; /* 04h */
124 U8 PortNumber; /* 05h */
125 U8 MsgFlags; /* 07h */
126 U32 MsgContext; /* 08h */
127} MSG_LAN_RESET_REQUEST, MPI_POINTER PTR_MSG_LAN_RESET_REQUEST,
128 LANResetRequest_t, MPI_POINTER pLANResetRequest_t;
129
130
131typedef struct _MSG_LAN_RESET_REPLY
132{
133 U16 Reserved; /* 00h */
134 U8 MsgLength; /* 02h */
135 U8 Function; /* 03h */
136 U16 Reserved2; /* 04h */
137 U8 PortNumber; /* 06h */
138 U8 MsgFlags; /* 07h */
139 U32 MsgContext; /* 08h */
140 U16 Reserved3; /* 0Ch */
141 U16 IOCStatus; /* 0Eh */
142 U32 IOCLogInfo; /* 10h */
143} MSG_LAN_RESET_REPLY, MPI_POINTER PTR_MSG_LAN_RESET_REPLY,
144 LANResetReply_t, MPI_POINTER pLANResetReply_t;
145
146
147/****************************************************************************/
148/* LAN Context Reply defines and macros */
149/****************************************************************************/
150
151#define LAN_REPLY_PACKET_LENGTH_MASK (0x0000FFFF)
152#define LAN_REPLY_PACKET_LENGTH_SHIFT (0)
153#define LAN_REPLY_BUCKET_CONTEXT_MASK (0x07FF0000)
154#define LAN_REPLY_BUCKET_CONTEXT_SHIFT (16)
155#define LAN_REPLY_BUFFER_CONTEXT_MASK (0x07FFFFFF)
156#define LAN_REPLY_BUFFER_CONTEXT_SHIFT (0)
157#define LAN_REPLY_FORM_MASK (0x18000000)
158#define LAN_REPLY_FORM_RECEIVE_SINGLE (0x00)
159#define LAN_REPLY_FORM_RECEIVE_MULTIPLE (0x01)
160#define LAN_REPLY_FORM_SEND_SINGLE (0x02)
161#define LAN_REPLY_FORM_MESSAGE_CONTEXT (0x03)
162#define LAN_REPLY_FORM_SHIFT (27)
163
164#define GET_LAN_PACKET_LENGTH(x) (((x) & LAN_REPLY_PACKET_LENGTH_MASK) \
165 >> LAN_REPLY_PACKET_LENGTH_SHIFT)
166
167#define SET_LAN_PACKET_LENGTH(x, lth) \
168 ((x) = ((x) & ~LAN_REPLY_PACKET_LENGTH_MASK) | \
169 (((lth) << LAN_REPLY_PACKET_LENGTH_SHIFT) & \
170 LAN_REPLY_PACKET_LENGTH_MASK))
171
172#define GET_LAN_BUCKET_CONTEXT(x) (((x) & LAN_REPLY_BUCKET_CONTEXT_MASK) \
173 >> LAN_REPLY_BUCKET_CONTEXT_SHIFT)
174
175#define SET_LAN_BUCKET_CONTEXT(x, ctx) \
176 ((x) = ((x) & ~LAN_REPLY_BUCKET_CONTEXT_MASK) | \
177 (((ctx) << LAN_REPLY_BUCKET_CONTEXT_SHIFT) & \
178 LAN_REPLY_BUCKET_CONTEXT_MASK))
179
180#define GET_LAN_BUFFER_CONTEXT(x) (((x) & LAN_REPLY_BUFFER_CONTEXT_MASK) \
181 >> LAN_REPLY_BUFFER_CONTEXT_SHIFT)
182
183#define SET_LAN_BUFFER_CONTEXT(x, ctx) \
184 ((x) = ((x) & ~LAN_REPLY_BUFFER_CONTEXT_MASK) | \
185 (((ctx) << LAN_REPLY_BUFFER_CONTEXT_SHIFT) & \
186 LAN_REPLY_BUFFER_CONTEXT_MASK))
187
188#define GET_LAN_FORM(x) (((x) & LAN_REPLY_FORM_MASK) \
189 >> LAN_REPLY_FORM_SHIFT)
190
191#define SET_LAN_FORM(x, frm) \
192 ((x) = ((x) & ~LAN_REPLY_FORM_MASK) | \
193 (((frm) << LAN_REPLY_FORM_SHIFT) & \
194 LAN_REPLY_FORM_MASK))
195
196
197/****************************************************************************/
198/* LAN Current Device State defines */
199/****************************************************************************/
200
201#define MPI_LAN_DEVICE_STATE_RESET (0x00)
202#define MPI_LAN_DEVICE_STATE_OPERATIONAL (0x01)
203
204
205/****************************************************************************/
206/* LAN Loopback defines */
207/****************************************************************************/
208
209#define MPI_LAN_TX_MODES_ENABLE_LOOPBACK_SUPPRESSION (0x01)
210
211#endif
212
diff --git a/drivers/message/fusion/lsi/mpi_raid.h b/drivers/message/fusion/lsi/mpi_raid.h
new file mode 100644
index 000000000000..9580a9de7fd2
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_raid.h
@@ -0,0 +1,232 @@
1/*
2 * Copyright (c) 2001-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_raid.h
6 * Title: MPI RAID message and structures
7 * Creation Date: February 27, 2001
8 *
9 * mpi_raid.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 02-27-01 01.01.01 Original release for this file.
17 * 03-27-01 01.01.02 Added structure offset comments.
18 * 08-08-01 01.02.01 Original release for v1.2 work.
19 * 09-28-01 01.02.02 Major rework for MPI v1.2 Integrated RAID changes.
20 * 10-04-01 01.02.03 Added ActionData defines for
21 * MPI_RAID_ACTION_DELETE_VOLUME action.
22 * 11-01-01 01.02.04 Added define for MPI_RAID_ACTION_ADATA_DO_NOT_SYNC.
23 * 03-14-02 01.02.05 Added define for MPI_RAID_ACTION_ADATA_LOW_LEVEL_INIT.
24 * 05-07-02 01.02.06 Added define for MPI_RAID_ACTION_ACTIVATE_VOLUME,
25 * MPI_RAID_ACTION_INACTIVATE_VOLUME, and
26 * MPI_RAID_ACTION_ADATA_INACTIVATE_ALL.
27 * 07-12-02 01.02.07 Added structures for Mailbox request and reply.
28 * 11-15-02 01.02.08 Added missing MsgContext field to MSG_MAILBOX_REQUEST.
29 * 04-01-03 01.02.09 New action data option flag for
30 * MPI_RAID_ACTION_DELETE_VOLUME.
31 * --------------------------------------------------------------------------
32 */
33
34#ifndef MPI_RAID_H
35#define MPI_RAID_H
36
37
38/******************************************************************************
39*
40* R A I D M e s s a g e s
41*
42*******************************************************************************/
43
44
45/****************************************************************************/
46/* RAID Action Request */
47/****************************************************************************/
48
49typedef struct _MSG_RAID_ACTION
50{
51 U8 Action; /* 00h */
52 U8 Reserved1; /* 01h */
53 U8 ChainOffset; /* 02h */
54 U8 Function; /* 03h */
55 U8 VolumeID; /* 04h */
56 U8 VolumeBus; /* 05h */
57 U8 PhysDiskNum; /* 06h */
58 U8 MsgFlags; /* 07h */
59 U32 MsgContext; /* 08h */
60 U32 Reserved2; /* 0Ch */
61 U32 ActionDataWord; /* 10h */
62 SGE_SIMPLE_UNION ActionDataSGE; /* 14h */
63} MSG_RAID_ACTION_REQUEST, MPI_POINTER PTR_MSG_RAID_ACTION_REQUEST,
64 MpiRaidActionRequest_t , MPI_POINTER pMpiRaidActionRequest_t;
65
66
67/* RAID Action request Action values */
68
69#define MPI_RAID_ACTION_STATUS (0x00)
70#define MPI_RAID_ACTION_INDICATOR_STRUCT (0x01)
71#define MPI_RAID_ACTION_CREATE_VOLUME (0x02)
72#define MPI_RAID_ACTION_DELETE_VOLUME (0x03)
73#define MPI_RAID_ACTION_DISABLE_VOLUME (0x04)
74#define MPI_RAID_ACTION_ENABLE_VOLUME (0x05)
75#define MPI_RAID_ACTION_QUIESCE_PHYS_IO (0x06)
76#define MPI_RAID_ACTION_ENABLE_PHYS_IO (0x07)
77#define MPI_RAID_ACTION_CHANGE_VOLUME_SETTINGS (0x08)
78#define MPI_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
79#define MPI_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
80#define MPI_RAID_ACTION_CHANGE_PHYSDISK_SETTINGS (0x0C)
81#define MPI_RAID_ACTION_CREATE_PHYSDISK (0x0D)
82#define MPI_RAID_ACTION_DELETE_PHYSDISK (0x0E)
83#define MPI_RAID_ACTION_FAIL_PHYSDISK (0x0F)
84#define MPI_RAID_ACTION_REPLACE_PHYSDISK (0x10)
85#define MPI_RAID_ACTION_ACTIVATE_VOLUME (0x11)
86#define MPI_RAID_ACTION_INACTIVATE_VOLUME (0x12)
87
88/* ActionDataWord defines for use with MPI_RAID_ACTION_CREATE_VOLUME action */
89#define MPI_RAID_ACTION_ADATA_DO_NOT_SYNC (0x00000001)
90#define MPI_RAID_ACTION_ADATA_LOW_LEVEL_INIT (0x00000002)
91
92/* ActionDataWord defines for use with MPI_RAID_ACTION_DELETE_VOLUME action */
93#define MPI_RAID_ACTION_ADATA_KEEP_PHYS_DISKS (0x00000000)
94#define MPI_RAID_ACTION_ADATA_DEL_PHYS_DISKS (0x00000001)
95
96#define MPI_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
97#define MPI_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000002)
98
99/* ActionDataWord defines for use with MPI_RAID_ACTION_ACTIVATE_VOLUME action */
100#define MPI_RAID_ACTION_ADATA_INACTIVATE_ALL (0x00000001)
101
102
103/* RAID Action reply message */
104
105typedef struct _MSG_RAID_ACTION_REPLY
106{
107 U8 Action; /* 00h */
108 U8 Reserved; /* 01h */
109 U8 MsgLength; /* 02h */
110 U8 Function; /* 03h */
111 U8 VolumeID; /* 04h */
112 U8 VolumeBus; /* 05h */
113 U8 PhysDiskNum; /* 06h */
114 U8 MsgFlags; /* 07h */
115 U32 MsgContext; /* 08h */
116 U16 ActionStatus; /* 0Ch */
117 U16 IOCStatus; /* 0Eh */
118 U32 IOCLogInfo; /* 10h */
119 U32 VolumeStatus; /* 14h */
120 U32 ActionData; /* 18h */
121} MSG_RAID_ACTION_REPLY, MPI_POINTER PTR_MSG_RAID_ACTION_REPLY,
122 MpiRaidActionReply_t, MPI_POINTER pMpiRaidActionReply_t;
123
124
125/* RAID Volume reply ActionStatus values */
126
127#define MPI_RAID_ACTION_ASTATUS_SUCCESS (0x0000)
128#define MPI_RAID_ACTION_ASTATUS_INVALID_ACTION (0x0001)
129#define MPI_RAID_ACTION_ASTATUS_FAILURE (0x0002)
130#define MPI_RAID_ACTION_ASTATUS_IN_PROGRESS (0x0003)
131
132
133/* RAID Volume reply RAID Volume Indicator structure */
134
135typedef struct _MPI_RAID_VOL_INDICATOR
136{
137 U64 TotalBlocks; /* 00h */
138 U64 BlocksRemaining; /* 08h */
139} MPI_RAID_VOL_INDICATOR, MPI_POINTER PTR_MPI_RAID_VOL_INDICATOR,
140 MpiRaidVolIndicator_t, MPI_POINTER pMpiRaidVolIndicator_t;
141
142
143/****************************************************************************/
144/* SCSI IO RAID Passthrough Request */
145/****************************************************************************/
146
147typedef struct _MSG_SCSI_IO_RAID_PT_REQUEST
148{
149 U8 PhysDiskNum; /* 00h */
150 U8 Reserved1; /* 01h */
151 U8 ChainOffset; /* 02h */
152 U8 Function; /* 03h */
153 U8 CDBLength; /* 04h */
154 U8 SenseBufferLength; /* 05h */
155 U8 Reserved2; /* 06h */
156 U8 MsgFlags; /* 07h */
157 U32 MsgContext; /* 08h */
158 U8 LUN[8]; /* 0Ch */
159 U32 Control; /* 14h */
160 U8 CDB[16]; /* 18h */
161 U32 DataLength; /* 28h */
162 U32 SenseBufferLowAddr; /* 2Ch */
163 SGE_IO_UNION SGL; /* 30h */
164} MSG_SCSI_IO_RAID_PT_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_RAID_PT_REQUEST,
165 SCSIIORaidPassthroughRequest_t, MPI_POINTER pSCSIIORaidPassthroughRequest_t;
166
167
168/* SCSI IO RAID Passthrough reply structure */
169
170typedef struct _MSG_SCSI_IO_RAID_PT_REPLY
171{
172 U8 PhysDiskNum; /* 00h */
173 U8 Reserved1; /* 01h */
174 U8 MsgLength; /* 02h */
175 U8 Function; /* 03h */
176 U8 CDBLength; /* 04h */
177 U8 SenseBufferLength; /* 05h */
178 U8 Reserved2; /* 06h */
179 U8 MsgFlags; /* 07h */
180 U32 MsgContext; /* 08h */
181 U8 SCSIStatus; /* 0Ch */
182 U8 SCSIState; /* 0Dh */
183 U16 IOCStatus; /* 0Eh */
184 U32 IOCLogInfo; /* 10h */
185 U32 TransferCount; /* 14h */
186 U32 SenseCount; /* 18h */
187 U32 ResponseInfo; /* 1Ch */
188} MSG_SCSI_IO_RAID_PT_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_RAID_PT_REPLY,
189 SCSIIORaidPassthroughReply_t, MPI_POINTER pSCSIIORaidPassthroughReply_t;
190
191
192/****************************************************************************/
193/* Mailbox reqeust structure */
194/****************************************************************************/
195
196typedef struct _MSG_MAILBOX_REQUEST
197{
198 U16 Reserved1;
199 U8 ChainOffset;
200 U8 Function;
201 U16 Reserved2;
202 U8 Reserved3;
203 U8 MsgFlags;
204 U32 MsgContext;
205 U8 Command[10];
206 U16 Reserved4;
207 SGE_IO_UNION SGL;
208} MSG_MAILBOX_REQUEST, MPI_POINTER PTR_MSG_MAILBOX_REQUEST,
209 MailboxRequest_t, MPI_POINTER pMailboxRequest_t;
210
211
212/* Mailbox reply structure */
213typedef struct _MSG_MAILBOX_REPLY
214{
215 U16 Reserved1; /* 00h */
216 U8 MsgLength; /* 02h */
217 U8 Function; /* 03h */
218 U16 Reserved2; /* 04h */
219 U8 Reserved3; /* 06h */
220 U8 MsgFlags; /* 07h */
221 U32 MsgContext; /* 08h */
222 U16 MailboxStatus; /* 0Ch */
223 U16 IOCStatus; /* 0Eh */
224 U32 IOCLogInfo; /* 10h */
225 U32 Reserved4; /* 14h */
226} MSG_MAILBOX_REPLY, MPI_POINTER PTR_MSG_MAILBOX_REPLY,
227 MailboxReply_t, MPI_POINTER pMailboxReply_t;
228
229#endif
230
231
232
diff --git a/drivers/message/fusion/lsi/mpi_sas.h b/drivers/message/fusion/lsi/mpi_sas.h
new file mode 100644
index 000000000000..cb878f9c65de
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_sas.h
@@ -0,0 +1,181 @@
1/*
2 * Copyright (c) 2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_sas.h
6 * Title: MPI Serial Attached SCSI structures and definitions
7 * Creation Date: April 23, 2003
8 *
9 * mpi_sas.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * xx-yy-zz 01.05.01 Original release.
17 * --------------------------------------------------------------------------
18 */
19
20#ifndef MPI_SAS_H
21#define MPI_SAS_H
22
23/*****************************************************************************
24*
25* S e r i a l A t t a c h e d S C S I M e s s a g e s
26*
27*****************************************************************************/
28
29/****************************************************************************/
30/* Serial Management Protocol Passthrough Request */
31/****************************************************************************/
32
33typedef struct _MSG_SMP_PASSTHROUGH_REQUEST
34{
35 U8 PassthroughFlags; /* 00h */
36 U8 PhysicalPort; /* 01h */
37 U8 ChainOffset; /* 02h */
38 U8 Function; /* 03h */
39 U16 RequestDataLength; /* 04h */
40 U8 ConnectionRate; /* 06h */
41 U8 MsgFlags; /* 07h */
42 U32 MsgContext; /* 08h */
43 U32 Reserved1; /* 0Ch */
44 U64 SASAddress; /* 10h */
45 U32 Reserved2; /* 18h */
46 U32 Reserved3; /* 1Ch */
47 SGE_SIMPLE_UNION SGL; /* 20h */
48} MSG_SMP_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REQUEST,
49 SmpPassthroughRequest_t, MPI_POINTER pSmpPassthroughRequest_t;
50
51#define MPI_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
52
53#define MPI_SMP_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
54#define MPI_SMP_PT_REQ_CONNECT_RATE_1_5 (0x08)
55#define MPI_SMP_PT_REQ_CONNECT_RATE_3_0 (0x09)
56
57
58/* Serial Management Protocol Passthrough Reply */
59typedef struct _MSG_SMP_PASSTHROUGH_REPLY
60{
61 U8 PassthroughFlags; /* 00h */
62 U8 PhysicalPort; /* 01h */
63 U8 MsgLength; /* 02h */
64 U8 Function; /* 03h */
65 U16 ResponseDataLength; /* 04h */
66 U8 Reserved1; /* 06h */
67 U8 MsgFlags; /* 07h */
68 U32 MsgContext; /* 08h */
69 U8 Reserved2; /* 0Ch */
70 U8 SASStatus; /* 0Dh */
71 U16 IOCStatus; /* 0Eh */
72 U32 IOCLogInfo; /* 10h */
73 U32 Reserved3; /* 14h */
74 U8 ResponseData[4]; /* 18h */
75} MSG_SMP_PASSTHROUGH_REPLY, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REPLY,
76 SmpPassthroughReply_t, MPI_POINTER pSmpPassthroughReply_t;
77
78#define MPI_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
79
80/* values for the SASStatus field */
81#define MPI_SASSTATUS_SUCCESS (0x00)
82#define MPI_SASSTATUS_UNKNOWN_ERROR (0x01)
83#define MPI_SASSTATUS_INVALID_FRAME (0x02)
84#define MPI_SASSTATUS_UTC_BAD_DEST (0x03)
85#define MPI_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
86#define MPI_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
87#define MPI_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
88#define MPI_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
89#define MPI_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
90#define MPI_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
91#define MPI_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
92#define MPI_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
93#define MPI_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
94#define MPI_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
95#define MPI_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
96#define MPI_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
97#define MPI_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
98#define MPI_SASSTATUS_DATA_OFFSET_ERROR (0x11)
99#define MPI_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
100#define MPI_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
101#define MPI_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
102
103
104/*
105 * Values for the SAS DeviceInfo field used in SAS Device Status Change Event
106 * data and SAS IO Unit Configuration pages.
107 */
108#define MPI_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
109#define MPI_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
110#define MPI_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
111#define MPI_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
112#define MPI_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
113#define MPI_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
114#define MPI_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
115#define MPI_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
116#define MPI_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
117#define MPI_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
118#define MPI_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
119
120#define MPI_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
121#define MPI_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
122#define MPI_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
123#define MPI_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
124#define MPI_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
125
126
127/****************************************************************************/
128/* SAS IO Unit Control Request */
129/****************************************************************************/
130
131typedef struct _MSG_SAS_IOUNIT_CONTROL_REQUEST
132{
133 U8 Operation; /* 00h */
134 U8 Reserved1; /* 01h */
135 U8 ChainOffset; /* 02h */
136 U8 Function; /* 03h */
137 U16 Reserved2; /* 04h */
138 U8 Reserved3; /* 06h */
139 U8 MsgFlags; /* 07h */
140 U32 MsgContext; /* 08h */
141 U8 TargetID; /* 0Ch */
142 U8 Bus; /* 0Dh */
143 U8 PhyNum; /* 0Eh */
144 U8 Reserved4; /* 0Fh */
145 U32 Reserved5; /* 10h */
146 U64 SASAddress; /* 14h */
147 U32 Reserved6; /* 1Ch */
148} MSG_SAS_IOUNIT_CONTROL_REQUEST, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REQUEST,
149 SasIoUnitControlRequest_t, MPI_POINTER pSasIoUnitControlRequest_t;
150
151/* values for the ... field */
152#define MPI_SAS_OP_CLEAR_NOT_PRESENT (0x01)
153#define MPI_SAS_OP_CLEAR_ALL (0x02)
154#define MPI_SAS_OP_MAP (0x03)
155#define MPI_SAS_OP_MOVE (0x04)
156#define MPI_SAS_OP_CLEAR (0x05)
157#define MPI_SAS_OP_PHY_LINK_RESET (0x06)
158#define MPI_SAS_OP_PHY_HARD_RESET (0x07)
159#define MPI_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
160
161
162/* SAS IO Unit Control Reply */
163typedef struct _MSG_SAS_IOUNIT_CONTROL_REPLY
164{
165 U8 Operation; /* 00h */
166 U8 Reserved1; /* 01h */
167 U8 MsgLength; /* 02h */
168 U8 Function; /* 03h */
169 U16 Reserved2; /* 04h */
170 U8 Reserved3; /* 06h */
171 U8 MsgFlags; /* 07h */
172 U32 MsgContext; /* 08h */
173 U16 Reserved4; /* 0Ch */
174 U16 IOCStatus; /* 0Eh */
175 U32 IOCLogInfo; /* 10h */
176} MSG_SAS_IOUNIT_CONTROL_REPLY, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REPLY,
177 SasIoUnitControlReply_t, MPI_POINTER pSasIoUnitControlReply_t;
178
179#endif
180
181
diff --git a/drivers/message/fusion/lsi/mpi_targ.h b/drivers/message/fusion/lsi/mpi_targ.h
new file mode 100644
index 000000000000..804dc85426c1
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_targ.h
@@ -0,0 +1,435 @@
1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_targ.h
6 * Title: MPI Target mode messages and structures
7 * Creation Date: June 22, 2000
8 *
9 * mpi_targ.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 06-06-00 01.00.01 Update version number for 1.0 release.
18 * 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure.
19 * Corrected DECSRIPTOR typo to DESCRIPTOR.
20 * 11-02-00 01.01.01 Original release for post 1.0 work
21 * Modified target mode to use IoIndex instead of
22 * HostIndex and IocIndex. Added Alias.
23 * 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER
24 * and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER.
25 * 02-20-01 01.01.03 Started using MPI_POINTER.
26 * Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
27 * MPI_TARGET_FCP_CMD_BUFFER.
28 * 03-27-01 01.01.04 Added structure offset comments.
29 * 08-08-01 01.02.01 Original release for v1.2 work.
30 * 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU.
31 * Added PriorityReason field to some replies and
32 * defined more PriorityReason codes.
33 * Added some defines for to support previous version
34 * of MPI.
35 * 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY.
36 * 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY.
37 * 03-14-02 01.02.05 Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper
38 * byte ordering.
39 * 05-31-02 01.02.06 Modified TARGET_MODE_REPLY_ALIAS_MASK to only include
40 * one bit.
41 * Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER.
42 * 09-16-02 01.02.07 Added flags for confirmed completion.
43 * Added PRIORITY_REASON_TARGET_BUSY.
44 * 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
45 * 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
46 * --------------------------------------------------------------------------
47 */
48
49#ifndef MPI_TARG_H
50#define MPI_TARG_H
51
52
53/******************************************************************************
54*
55* S C S I T a r g e t M e s s a g e s
56*
57*******************************************************************************/
58
59typedef struct _CMD_BUFFER_DESCRIPTOR
60{
61 U16 IoIndex; /* 00h */
62 U16 Reserved; /* 02h */
63 union /* 04h */
64 {
65 U32 PhysicalAddress32;
66 U64 PhysicalAddress64;
67 } u;
68} CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR,
69 CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t;
70
71
72/****************************************************************************/
73/* Target Command Buffer Post Request */
74/****************************************************************************/
75
76typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST
77{
78 U8 BufferPostFlags; /* 00h */
79 U8 BufferCount; /* 01h */
80 U8 ChainOffset; /* 02h */
81 U8 Function; /* 03h */
82 U8 BufferLength; /* 04h */
83 U8 Reserved; /* 05h */
84 U8 Reserved1; /* 06h */
85 U8 MsgFlags; /* 07h */
86 U32 MsgContext; /* 08h */
87 CMD_BUFFER_DESCRIPTOR Buffer[1]; /* 0Ch */
88} MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST,
89 TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t;
90
91#define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01)
92#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80)
93#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0)
94#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1)
95#define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80)
96
97#define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF)
98#define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF) /* obsolete */
99
100
101typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY
102{
103 U8 BufferPostFlags; /* 00h */
104 U8 BufferCount; /* 01h */
105 U8 MsgLength; /* 02h */
106 U8 Function; /* 03h */
107 U8 BufferLength; /* 04h */
108 U8 Reserved; /* 05h */
109 U8 Reserved1; /* 06h */
110 U8 MsgFlags; /* 07h */
111 U32 MsgContext; /* 08h */
112 U16 Reserved2; /* 0Ch */
113 U16 IOCStatus; /* 0Eh */
114 U32 IOCLogInfo; /* 10h */
115} MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY,
116 TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t;
117
118/* the following structure is obsolete as of MPI v1.2 */
119typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
120{
121 U16 Reserved; /* 00h */
122 U8 MsgLength; /* 02h */
123 U8 Function; /* 03h */
124 U16 Reserved1; /* 04h */
125 U8 Reserved2; /* 06h */
126 U8 MsgFlags; /* 07h */
127 U32 MsgContext; /* 08h */
128 U8 PriorityReason; /* 0Ch */
129 U8 Reserved3; /* 0Dh */
130 U16 IOCStatus; /* 0Eh */
131 U32 IOCLogInfo; /* 10h */
132 U32 ReplyWord; /* 14h */
133} MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
134 PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
135
136#define PRIORITY_REASON_NO_DISCONNECT (0x00)
137#define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01)
138#define PRIORITY_REASON_CMD_PARITY_ERR (0x02)
139#define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03)
140#define PRIORITY_REASON_LQ_CRC_ERR (0x04)
141#define PRIORITY_REASON_CMD_CRC_ERR (0x05)
142#define PRIORITY_REASON_PROTOCOL_ERR (0x06)
143#define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07)
144#define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08)
145#define PRIORITY_REASON_TARGET_BUSY (0x09)
146#define PRIORITY_REASON_UNKNOWN (0xFF)
147
148
149typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
150{
151 U16 Reserved; /* 00h */
152 U8 MsgLength; /* 02h */
153 U8 Function; /* 03h */
154 U16 Reserved1; /* 04h */
155 U8 Reserved2; /* 06h */
156 U8 MsgFlags; /* 07h */
157 U32 MsgContext; /* 08h */
158 U8 PriorityReason; /* 0Ch */
159 U8 Reserved3; /* 0Dh */
160 U16 IOCStatus; /* 0Eh */
161 U32 IOCLogInfo; /* 10h */
162 U32 ReplyWord; /* 14h */
163} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
164 MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
165 TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
166
167
168typedef struct _MPI_TARGET_FCP_CMD_BUFFER
169{
170 U8 FcpLun[8]; /* 00h */
171 U8 FcpCntl[4]; /* 08h */
172 U8 FcpCdb[16]; /* 0Ch */
173 U32 FcpDl; /* 1Ch */
174 U8 AliasIndex; /* 20h */
175 U8 Reserved1; /* 21h */
176 U16 OptionalOxid; /* 22h */
177} MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER,
178 MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer;
179
180
181typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER
182{
183 /* SPI L_Q information unit */
184 U8 L_QType; /* 00h */
185 U8 Reserved; /* 01h */
186 U16 Tag; /* 02h */
187 U8 LogicalUnitNumber[8]; /* 04h */
188 U32 DataLength; /* 0Ch */
189 /* SPI command information unit */
190 U8 ReservedFirstByteOfCommandIU; /* 10h */
191 U8 TaskAttribute; /* 11h */
192 U8 TaskManagementFlags; /* 12h */
193 U8 AdditionalCDBLength; /* 13h */
194 U8 CDB[16]; /* 14h */
195 /* Alias ID */
196 U8 AliasID; /* 24h */
197 U8 Reserved1; /* 25h */
198 U16 Reserved2; /* 26h */
199} MPI_TARGET_SCSI_SPI_CMD_BUFFER,
200 MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER,
201 MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
202
203
204/****************************************************************************/
205/* Target Assist Request */
206/****************************************************************************/
207
208typedef struct _MSG_TARGET_ASSIST_REQUEST
209{
210 U8 StatusCode; /* 00h */
211 U8 TargetAssistFlags; /* 01h */
212 U8 ChainOffset; /* 02h */
213 U8 Function; /* 03h */
214 U16 QueueTag; /* 04h */
215 U8 Reserved; /* 06h */
216 U8 MsgFlags; /* 07h */
217 U32 MsgContext; /* 08h */
218 U32 ReplyWord; /* 0Ch */
219 U8 LUN[8]; /* 10h */
220 U32 RelativeOffset; /* 18h */
221 U32 DataLength; /* 1Ch */
222 SGE_IO_UNION SGL[1]; /* 20h */
223} MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST,
224 TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t;
225
226#define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
227#define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
228#define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04)
229#define TARGET_ASSIST_FLAGS_CONFIRMED (0x08)
230#define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
231
232
233typedef struct _MSG_TARGET_ERROR_REPLY
234{
235 U16 Reserved; /* 00h */
236 U8 MsgLength; /* 02h */
237 U8 Function; /* 03h */
238 U16 Reserved1; /* 04h */
239 U8 Reserved2; /* 06h */
240 U8 MsgFlags; /* 07h */
241 U32 MsgContext; /* 08h */
242 U8 PriorityReason; /* 0Ch */
243 U8 Reserved3; /* 0Dh */
244 U16 IOCStatus; /* 0Eh */
245 U32 IOCLogInfo; /* 10h */
246 U32 ReplyWord; /* 14h */
247 U32 TransferCount; /* 18h */
248} MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY,
249 TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t;
250
251
252/****************************************************************************/
253/* Target Status Send Request */
254/****************************************************************************/
255
256typedef struct _MSG_TARGET_STATUS_SEND_REQUEST
257{
258 U8 StatusCode; /* 00h */
259 U8 StatusFlags; /* 01h */
260 U8 ChainOffset; /* 02h */
261 U8 Function; /* 03h */
262 U16 QueueTag; /* 04h */
263 U8 Reserved; /* 06h */
264 U8 MsgFlags; /* 07h */
265 U32 MsgContext; /* 08h */
266 U32 ReplyWord; /* 0Ch */
267 U8 LUN[8]; /* 10h */
268 SGE_SIMPLE_UNION StatusDataSGE; /* 18h */
269} MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST,
270 TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t;
271
272#define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01)
273#define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04)
274#define TARGET_STATUS_SEND_FLAGS_CONFIRMED (0x08)
275#define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80)
276
277/*
278 * NOTE: FCP_RSP data is big-endian. When used on a little-endian system, this
279 * structure properly orders the bytes.
280 */
281typedef struct _MPI_TARGET_FCP_RSP_BUFFER
282{
283 U8 Reserved0[8]; /* 00h */
284 U8 Reserved1[2]; /* 08h */
285 U8 FcpFlags; /* 0Ah */
286 U8 FcpStatus; /* 0Bh */
287 U32 FcpResid; /* 0Ch */
288 U32 FcpSenseLength; /* 10h */
289 U32 FcpResponseLength; /* 14h */
290 U8 FcpResponseData[8]; /* 18h */
291 U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */
292} MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER,
293 MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer;
294
295/*
296 * NOTE: The SPI status IU is big-endian. When used on a little-endian system,
297 * this structure properly orders the bytes.
298 */
299typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU
300{
301 U8 Reserved0; /* 00h */
302 U8 Reserved1; /* 01h */
303 U8 Valid; /* 02h */
304 U8 Status; /* 03h */
305 U32 SenseDataListLength; /* 04h */
306 U32 PktFailuresListLength; /* 08h */
307 U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */
308} MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
309 TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
310
311/****************************************************************************/
312/* Target Mode Abort Request */
313/****************************************************************************/
314
315typedef struct _MSG_TARGET_MODE_ABORT_REQUEST
316{
317 U8 AbortType; /* 00h */
318 U8 Reserved; /* 01h */
319 U8 ChainOffset; /* 02h */
320 U8 Function; /* 03h */
321 U16 Reserved1; /* 04h */
322 U8 Reserved2; /* 06h */
323 U8 MsgFlags; /* 07h */
324 U32 MsgContext; /* 08h */
325 U32 ReplyWord; /* 0Ch */
326 U32 MsgContextToAbort; /* 10h */
327} MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT,
328 TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t;
329
330#define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00)
331#define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01)
332#define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02)
333#define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03)
334
335/* Target Mode Abort Reply */
336
337typedef struct _MSG_TARGET_MODE_ABORT_REPLY
338{
339 U16 Reserved; /* 00h */
340 U8 MsgLength; /* 02h */
341 U8 Function; /* 03h */
342 U16 Reserved1; /* 04h */
343 U8 Reserved2; /* 06h */
344 U8 MsgFlags; /* 07h */
345 U32 MsgContext; /* 08h */
346 U16 Reserved3; /* 0Ch */
347 U16 IOCStatus; /* 0Eh */
348 U32 IOCLogInfo; /* 10h */
349 U32 AbortCount; /* 14h */
350} MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY,
351 TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t;
352
353
354/****************************************************************************/
355/* Target Mode Context Reply */
356/****************************************************************************/
357
358#define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF)
359#define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0)
360#define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000)
361#define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14)
362#define TARGET_MODE_REPLY_ALIAS_MASK (0x04000000)
363#define TARGET_MODE_REPLY_ALIAS_SHIFT (26)
364#define TARGET_MODE_REPLY_PORT_MASK (0x10000000)
365#define TARGET_MODE_REPLY_PORT_SHIFT (28)
366
367
368#define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \
369 >> TARGET_MODE_REPLY_IO_INDEX_SHIFT)
370
371#define SET_IO_INDEX(t, i) \
372 ((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \
373 (((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \
374 TARGET_MODE_REPLY_IO_INDEX_MASK))
375
376#define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \
377 >> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT)
378
379#define SET_INITIATOR_INDEX(t, ii) \
380 ((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \
381 (((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \
382 TARGET_MODE_REPLY_INITIATOR_INDEX_MASK))
383
384#define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \
385 >> TARGET_MODE_REPLY_ALIAS_SHIFT)
386
387#define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \
388 (((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \
389 TARGET_MODE_REPLY_ALIAS_MASK))
390
391#define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \
392 >> TARGET_MODE_REPLY_PORT_SHIFT)
393
394#define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \
395 (((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \
396 TARGET_MODE_REPLY_PORT_MASK))
397
398/* the following obsolete values are for MPI v1.0 support */
399#define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF)
400#define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0)
401#define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800)
402#define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11)
403#define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000)
404#define TARGET_MODE_REPLY_0100_PORT_SHIFT (22)
405#define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000)
406#define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23)
407
408#define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \
409 >> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX)
410
411#define SET_HOST_INDEX_0100(t, hi) \
412 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \
413 (((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \
414 TARGET_MODE_REPLY_0100_MASK_HOST_INDEX))
415
416#define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \
417 >> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX)
418
419#define SET_IOC_INDEX_0100(t, ii) \
420 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \
421 (((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \
422 TARGET_MODE_REPLY_0100_MASK_IOC_INDEX))
423
424#define GET_INITIATOR_INDEX_0100(x) \
425 (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \
426 >> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX)
427
428#define SET_INITIATOR_INDEX_0100(t, ii) \
429 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \
430 (((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \
431 TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX))
432
433
434#endif
435
diff --git a/drivers/message/fusion/lsi/mpi_tool.h b/drivers/message/fusion/lsi/mpi_tool.h
new file mode 100644
index 000000000000..536d197c4142
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_tool.h
@@ -0,0 +1,305 @@
1/*
2 * Copyright (c) 2001-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_tool.h
6 * Title: MPI Toolbox structures and definitions
7 * Creation Date: July 30, 2001
8 *
9 * mpi_tool.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 08-08-01 01.02.01 Original release.
17 * 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
18 * --------------------------------------------------------------------------
19 */
20
21#ifndef MPI_TOOL_H
22#define MPI_TOOL_H
23
24#define MPI_TOOLBOX_CLEAN_TOOL (0x00)
25#define MPI_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
26#define MPI_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
27#define MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
28#define MPI_TOOLBOX_FC_MANAGEMENT_TOOL (0x04)
29
30
31/****************************************************************************/
32/* Toolbox reply */
33/****************************************************************************/
34
35typedef struct _MSG_TOOLBOX_REPLY
36{
37 U8 Tool; /* 00h */
38 U8 Reserved; /* 01h */
39 U8 MsgLength; /* 02h */
40 U8 Function; /* 03h */
41 U16 Reserved1; /* 04h */
42 U8 Reserved2; /* 06h */
43 U8 MsgFlags; /* 07h */
44 U32 MsgContext; /* 08h */
45 U16 Reserved3; /* 0Ch */
46 U16 IOCStatus; /* 0Eh */
47 U32 IOCLogInfo; /* 10h */
48} MSG_TOOLBOX_REPLY, MPI_POINTER PTR_MSG_TOOLBOX_REPLY,
49 ToolboxReply_t, MPI_POINTER pToolboxReply_t;
50
51
52/****************************************************************************/
53/* Toolbox Clean Tool request */
54/****************************************************************************/
55
56typedef struct _MSG_TOOLBOX_CLEAN_REQUEST
57{
58 U8 Tool; /* 00h */
59 U8 Reserved; /* 01h */
60 U8 ChainOffset; /* 02h */
61 U8 Function; /* 03h */
62 U16 Reserved1; /* 04h */
63 U8 Reserved2; /* 06h */
64 U8 MsgFlags; /* 07h */
65 U32 MsgContext; /* 08h */
66 U32 Flags; /* 0Ch */
67} MSG_TOOLBOX_CLEAN_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_CLEAN_REQUEST,
68 ToolboxCleanRequest_t, MPI_POINTER pToolboxCleanRequest_t;
69
70#define MPI_TOOLBOX_CLEAN_NVSRAM (0x00000001)
71#define MPI_TOOLBOX_CLEAN_SEEPROM (0x00000002)
72#define MPI_TOOLBOX_CLEAN_FLASH (0x00000004)
73#define MPI_TOOLBOX_CLEAN_BOOTLOADER (0x04000000)
74#define MPI_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
75#define MPI_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
76#define MPI_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
77#define MPI_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
78#define MPI_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
79
80
81/****************************************************************************/
82/* Toolbox Memory Move request */
83/****************************************************************************/
84
85typedef struct _MSG_TOOLBOX_MEM_MOVE_REQUEST
86{
87 U8 Tool; /* 00h */
88 U8 Reserved; /* 01h */
89 U8 ChainOffset; /* 02h */
90 U8 Function; /* 03h */
91 U16 Reserved1; /* 04h */
92 U8 Reserved2; /* 06h */
93 U8 MsgFlags; /* 07h */
94 U32 MsgContext; /* 08h */
95 SGE_SIMPLE_UNION SGL; /* 0Ch */
96} MSG_TOOLBOX_MEM_MOVE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_MEM_MOVE_REQUEST,
97 ToolboxMemMoveRequest_t, MPI_POINTER pToolboxMemMoveRequest_t;
98
99
100/****************************************************************************/
101/* Toolbox Diagnostic Data Upload request */
102/****************************************************************************/
103
104typedef struct _MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST
105{
106 U8 Tool; /* 00h */
107 U8 Reserved; /* 01h */
108 U8 ChainOffset; /* 02h */
109 U8 Function; /* 03h */
110 U16 Reserved1; /* 04h */
111 U8 Reserved2; /* 06h */
112 U8 MsgFlags; /* 07h */
113 U32 MsgContext; /* 08h */
114 U32 Flags; /* 0Ch */
115 U32 Reserved3; /* 10h */
116 SGE_SIMPLE_UNION SGL; /* 14h */
117} MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
118 ToolboxDiagDataUploadRequest_t, MPI_POINTER pToolboxDiagDataUploadRequest_t;
119
120typedef struct _DIAG_DATA_UPLOAD_HEADER
121{
122 U32 DiagDataLength; /* 00h */
123 U8 FormatCode; /* 04h */
124 U8 Reserved; /* 05h */
125 U16 Reserved1; /* 06h */
126} DIAG_DATA_UPLOAD_HEADER, MPI_POINTER PTR_DIAG_DATA_UPLOAD_HEADER,
127 DiagDataUploadHeader_t, MPI_POINTER pDiagDataUploadHeader_t;
128
129#define MPI_TB_DIAG_FORMAT_SCSI_PRINTF_1 (0x01)
130#define MPI_TB_DIAG_FORMAT_SCSI_2 (0x02)
131#define MPI_TB_DIAG_FORMAT_SCSI_3 (0x03)
132#define MPI_TB_DIAG_FORMAT_FC_TRACE_1 (0x04)
133
134
135/****************************************************************************/
136/* Toolbox ISTWI Read Write request */
137/****************************************************************************/
138
139typedef struct _MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST
140{
141 U8 Tool; /* 00h */
142 U8 Reserved; /* 01h */
143 U8 ChainOffset; /* 02h */
144 U8 Function; /* 03h */
145 U16 Reserved1; /* 04h */
146 U8 Reserved2; /* 06h */
147 U8 MsgFlags; /* 07h */
148 U32 MsgContext; /* 08h */
149 U8 Flags; /* 0Ch */
150 U8 BusNum; /* 0Dh */
151 U16 Reserved3; /* 0Eh */
152 U8 NumAddressBytes; /* 10h */
153 U8 Reserved4; /* 11h */
154 U16 DataLength; /* 12h */
155 U8 DeviceAddr; /* 14h */
156 U8 Addr1; /* 15h */
157 U8 Addr2; /* 16h */
158 U8 Addr3; /* 17h */
159 U32 Reserved5; /* 18h */
160 SGE_SIMPLE_UNION SGL; /* 1Ch */
161} MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
162 ToolboxIstwiReadWriteRequest_t, MPI_POINTER pToolboxIstwiReadWriteRequest_t;
163
164#define MPI_TB_ISTWI_FLAGS_WRITE (0x00)
165#define MPI_TB_ISTWI_FLAGS_READ (0x01)
166
167
168/****************************************************************************/
169/* Toolbox FC Management request */
170/****************************************************************************/
171
172/* ActionInfo for Bus and TargetId */
173typedef struct _MPI_TB_FC_MANAGE_BUS_TID_AI
174{
175 U16 Reserved; /* 00h */
176 U8 Bus; /* 02h */
177 U8 TargetId; /* 03h */
178} MPI_TB_FC_MANAGE_BUS_TID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_BUS_TID_AI,
179 MpiTbFcManageBusTidAi_t, MPI_POINTER pMpiTbFcManageBusTidAi_t;
180
181/* ActionInfo for port identifier */
182typedef struct _MPI_TB_FC_MANAGE_PID_AI
183{
184 U32 PortIdentifier; /* 00h */
185} MPI_TB_FC_MANAGE_PID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_PID_AI,
186 MpiTbFcManagePidAi_t, MPI_POINTER pMpiTbFcManagePidAi_t;
187
188/* union of ActionInfo */
189typedef union _MPI_TB_FC_MANAGE_AI_UNION
190{
191 MPI_TB_FC_MANAGE_BUS_TID_AI BusTid;
192 MPI_TB_FC_MANAGE_PID_AI Port;
193} MPI_TB_FC_MANAGE_AI_UNION, MPI_POINTER PTR_MPI_TB_FC_MANAGE_AI_UNION,
194 MpiTbFcManageAiUnion_t, MPI_POINTER pMpiTbFcManageAiUnion_t;
195
196typedef struct _MSG_TOOLBOX_FC_MANAGE_REQUEST
197{
198 U8 Tool; /* 00h */
199 U8 Reserved; /* 01h */
200 U8 ChainOffset; /* 02h */
201 U8 Function; /* 03h */
202 U16 Reserved1; /* 04h */
203 U8 Reserved2; /* 06h */
204 U8 MsgFlags; /* 07h */
205 U32 MsgContext; /* 08h */
206 U8 Action; /* 0Ch */
207 U8 Reserved3; /* 0Dh */
208 U16 Reserved4; /* 0Eh */
209 MPI_TB_FC_MANAGE_AI_UNION ActionInfo; /* 10h */
210} MSG_TOOLBOX_FC_MANAGE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_FC_MANAGE_REQUEST,
211 ToolboxFcManageRequest_t, MPI_POINTER pToolboxFcManageRequest_t;
212
213/* defines for the Action field */
214#define MPI_TB_FC_MANAGE_ACTION_DISC_ALL (0x00)
215#define MPI_TB_FC_MANAGE_ACTION_DISC_PID (0x01)
216#define MPI_TB_FC_MANAGE_ACTION_DISC_BUS_TID (0x02)
217
218
219/****************************************************************************/
220/* Diagnostic Buffer Post request */
221/****************************************************************************/
222
223typedef struct _MSG_DIAG_BUFFER_POST_REQUEST
224{
225 U8 TraceLevel; /* 00h */
226 U8 BufferType; /* 01h */
227 U8 ChainOffset; /* 02h */
228 U8 Function; /* 03h */
229 U16 Reserved1; /* 04h */
230 U8 Reserved2; /* 06h */
231 U8 MsgFlags; /* 07h */
232 U32 MsgContext; /* 08h */
233 U32 ExtendedType; /* 0Ch */
234 U32 BufferLength; /* 10h */
235 U32 ProductSpecific[4]; /* 14h */
236 U32 Reserved3; /* 18h */
237 SGE_SIMPLE_UNION SGL; /* 28h */
238} MSG_DIAG_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REQUEST,
239 DiagBufferPostRequest_t, MPI_POINTER pDiagBufferPostRequest_t;
240
241#define MPI_DIAG_BUF_TYPE_TRACE (0x00)
242#define MPI_DIAG_BUF_TYPE_SNAPSHOT (0x01)
243#define MPI_DIAG_BUF_TYPE_EXTENDED (0x02)
244
245#define MPI_DIAG_EXTENDED_QTAG (0x00000001)
246
247
248/* Diagnostic Buffer Post reply */
249typedef struct _MSG_DIAG_BUFFER_POST_REPLY
250{
251 U8 Reserved1; /* 00h */
252 U8 BufferType; /* 01h */
253 U8 MsgLength; /* 02h */
254 U8 Function; /* 03h */
255 U16 Reserved2; /* 04h */
256 U8 Reserved3; /* 06h */
257 U8 MsgFlags; /* 07h */
258 U32 MsgContext; /* 08h */
259 U16 Reserved4; /* 0Ch */
260 U16 IOCStatus; /* 0Eh */
261 U32 IOCLogInfo; /* 10h */
262 U32 TransferLength; /* 14h */
263} MSG_DIAG_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REPLY,
264 DiagBufferPostReply_t, MPI_POINTER pDiagBufferPostReply_t;
265
266
267/****************************************************************************/
268/* Diagnostic Release request */
269/****************************************************************************/
270
271typedef struct _MSG_DIAG_RELEASE_REQUEST
272{
273 U8 Reserved1; /* 00h */
274 U8 BufferType; /* 01h */
275 U8 ChainOffset; /* 02h */
276 U8 Function; /* 03h */
277 U16 Reserved2; /* 04h */
278 U8 Reserved3; /* 06h */
279 U8 MsgFlags; /* 07h */
280 U32 MsgContext; /* 08h */
281} MSG_DIAG_RELEASE_REQUEST, MPI_POINTER PTR_MSG_DIAG_RELEASE_REQUEST,
282 DiagReleaseRequest_t, MPI_POINTER pDiagReleaseRequest_t;
283
284
285/* Diagnostic Release reply */
286typedef struct _MSG_DIAG_RELEASE_REPLY
287{
288 U8 Reserved1; /* 00h */
289 U8 BufferType; /* 01h */
290 U8 MsgLength; /* 02h */
291 U8 Function; /* 03h */
292 U16 Reserved2; /* 04h */
293 U8 Reserved3; /* 06h */
294 U8 MsgFlags; /* 07h */
295 U32 MsgContext; /* 08h */
296 U16 Reserved4; /* 0Ch */
297 U16 IOCStatus; /* 0Eh */
298 U32 IOCLogInfo; /* 10h */
299} MSG_DIAG_RELEASE_REPLY, MPI_POINTER PTR_MSG_DIAG_RELEASE_REPLY,
300 DiagReleaseReply_t, MPI_POINTER pDiagReleaseReply_t;
301
302
303#endif
304
305
diff --git a/drivers/message/fusion/lsi/mpi_type.h b/drivers/message/fusion/lsi/mpi_type.h
new file mode 100644
index 000000000000..239328a7689c
--- /dev/null
+++ b/drivers/message/fusion/lsi/mpi_type.h
@@ -0,0 +1,86 @@
1/*
2 * Copyright (c) 2000-2003 LSI Logic Corporation.
3 *
4 *
5 * Name: mpi_type.h
6 * Title: MPI Basic type definitions
7 * Creation Date: June 6, 2000
8 *
9 * mpi_type.h Version: 01.05.xx
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 06-06-00 01.00.01 Update version number for 1.0 release.
18 * 11-02-00 01.01.01 Original release for post 1.0 work
19 * 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
20 * 08-08-01 01.02.01 Original release for v1.2 work.
21 * --------------------------------------------------------------------------
22 */
23
24#ifndef MPI_TYPE_H
25#define MPI_TYPE_H
26
27
28/*******************************************************************************
29 * Define MPI_POINTER if it hasn't already been defined. By default MPI_POINTER
30 * is defined to be a near pointer. MPI_POINTER can be defined as a far pointer
31 * by defining MPI_POINTER as "far *" before this header file is included.
32 */
33#ifndef MPI_POINTER
34#define MPI_POINTER *
35#endif
36
37
38/*****************************************************************************
39*
40* B a s i c T y p e s
41*
42*****************************************************************************/
43
44typedef signed char S8;
45typedef unsigned char U8;
46typedef signed short S16;
47typedef unsigned short U16;
48
49
50typedef int32_t S32;
51typedef u_int32_t U32;
52
53/*
54 * The only way crap below could work on big-endian boxen would be if it
55 * wasn't used at all.
56 */
57
58typedef struct _S64
59{
60 U32 Low;
61 S32 High;
62} S64;
63
64typedef struct _U64
65{
66 U32 Low;
67 U32 High;
68} U64;
69
70
71/****************************************************************************/
72/* Pointers */
73/****************************************************************************/
74
75typedef S8 *PS8;
76typedef U8 *PU8;
77typedef S16 *PS16;
78typedef U16 *PU16;
79typedef S32 *PS32;
80typedef U32 *PU32;
81typedef S64 *PS64;
82typedef U64 *PU64;
83
84
85#endif
86
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