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authorHartmut Hackmann <hartmut.hackmann@t-online.de>2008-04-13 20:09:11 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-04-24 13:09:44 -0400
commitb1c54fe2aed3e2812f5b42916894f15e84b484b5 (patch)
treef7c43b960a9da76116871e0f0291934b9c5fb40c /drivers/media
parent9a1b04e461fc8127c902a988cd9a082ba0680b11 (diff)
V4L/DVB (7655): tda10086 coding stlye fixes
This patch replaces the c++ style comments. No functional changes Signed-off-by: Hartmut Hackmann <hartmut.hackmann@t-online.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/dvb/frontends/tda10086.c102
-rw-r--r--drivers/media/dvb/frontends/tda10086.h4
2 files changed, 53 insertions, 53 deletions
diff --git a/drivers/media/dvb/frontends/tda10086.c b/drivers/media/dvb/frontends/tda10086.c
index acf1471373ca..a17ce3c4ad86 100644
--- a/drivers/media/dvb/frontends/tda10086.c
+++ b/drivers/media/dvb/frontends/tda10086.c
@@ -90,16 +90,16 @@ static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask,
90{ 90{
91 int val; 91 int val;
92 92
93 // read a byte and check 93 /* read a byte and check */
94 val = tda10086_read_byte(state, reg); 94 val = tda10086_read_byte(state, reg);
95 if (val < 0) 95 if (val < 0)
96 return val; 96 return val;
97 97
98 // mask if off 98 /* mask if off */
99 val = val & ~mask; 99 val = val & ~mask;
100 val |= data & 0xff; 100 val |= data & 0xff;
101 101
102 // write it out again 102 /* write it out again */
103 return tda10086_write_byte(state, reg, val); 103 return tda10086_write_byte(state, reg, val);
104} 104}
105 105
@@ -112,63 +112,63 @@ static int tda10086_init(struct dvb_frontend* fe)
112 112
113 if (state->config->diseqc_tone) 113 if (state->config->diseqc_tone)
114 t22k_off = 0; 114 t22k_off = 0;
115 // reset 115 /* reset */
116 tda10086_write_byte(state, 0x00, 0x00); 116 tda10086_write_byte(state, 0x00, 0x00);
117 msleep(10); 117 msleep(10);
118 118
119 // misc setup 119 /* misc setup */
120 tda10086_write_byte(state, 0x01, 0x94); 120 tda10086_write_byte(state, 0x01, 0x94);
121 tda10086_write_byte(state, 0x02, 0x35); // NOTE: TT drivers appear to disable CSWP 121 tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */
122 tda10086_write_byte(state, 0x03, 0xe4); 122 tda10086_write_byte(state, 0x03, 0xe4);
123 tda10086_write_byte(state, 0x04, 0x43); 123 tda10086_write_byte(state, 0x04, 0x43);
124 tda10086_write_byte(state, 0x0c, 0x0c); 124 tda10086_write_byte(state, 0x0c, 0x0c);
125 tda10086_write_byte(state, 0x1b, 0xb0); // noise threshold 125 tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */
126 tda10086_write_byte(state, 0x20, 0x89); // misc 126 tda10086_write_byte(state, 0x20, 0x89); /* misc */
127 tda10086_write_byte(state, 0x30, 0x04); // acquisition period length 127 tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */
128 tda10086_write_byte(state, 0x32, 0x00); // irq off 128 tda10086_write_byte(state, 0x32, 0x00); /* irq off */
129 tda10086_write_byte(state, 0x31, 0x56); // setup AFC 129 tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */
130 130
131 // setup PLL (this assumes SACLK = 96MHz) 131 /* setup PLL (this assumes SACLK = 96MHz) */
132 tda10086_write_byte(state, 0x55, 0x2c); // misc PLL setup 132 tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */
133 if (state->config->xtal_freq == TDA10086_XTAL_16M) { 133 if (state->config->xtal_freq == TDA10086_XTAL_16M) {
134 tda10086_write_byte(state, 0x3a, 0x0b); // M=12 134 tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */
135 tda10086_write_byte(state, 0x3b, 0x01); // P=2 135 tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */
136 } else { 136 } else {
137 tda10086_write_byte(state, 0x3a, 0x17); // M=24 137 tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */
138 tda10086_write_byte(state, 0x3b, 0x00); // P=1 138 tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */
139 } 139 }
140 tda10086_write_mask(state, 0x55, 0x20, 0x00); // powerup PLL 140 tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */
141 141
142 // setup TS interface 142 /* setup TS interface */
143 tda10086_write_byte(state, 0x11, 0x81); 143 tda10086_write_byte(state, 0x11, 0x81);
144 tda10086_write_byte(state, 0x12, 0x81); 144 tda10086_write_byte(state, 0x12, 0x81);
145 tda10086_write_byte(state, 0x19, 0x40); // parallel mode A + MSBFIRST 145 tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */
146 tda10086_write_byte(state, 0x56, 0x80); // powerdown WPLL - unused in the mode we use 146 tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */
147 tda10086_write_byte(state, 0x57, 0x08); // bypass WPLL - unused in the mode we use 147 tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */
148 tda10086_write_byte(state, 0x10, 0x2a); 148 tda10086_write_byte(state, 0x10, 0x2a);
149 149
150 // setup ADC 150 /* setup ADC */
151 tda10086_write_byte(state, 0x58, 0x61); // ADC setup 151 tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */
152 tda10086_write_mask(state, 0x58, 0x01, 0x00); // powerup ADC 152 tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */
153 153
154 // setup AGC 154 /* setup AGC */
155 tda10086_write_byte(state, 0x05, 0x0B); 155 tda10086_write_byte(state, 0x05, 0x0B);
156 tda10086_write_byte(state, 0x37, 0x63); 156 tda10086_write_byte(state, 0x37, 0x63);
157 tda10086_write_byte(state, 0x3f, 0x0a); // NOTE: flydvb varies it 157 tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */
158 tda10086_write_byte(state, 0x40, 0x64); 158 tda10086_write_byte(state, 0x40, 0x64);
159 tda10086_write_byte(state, 0x41, 0x4f); 159 tda10086_write_byte(state, 0x41, 0x4f);
160 tda10086_write_byte(state, 0x42, 0x43); 160 tda10086_write_byte(state, 0x42, 0x43);
161 161
162 // setup viterbi 162 /* setup viterbi */
163 tda10086_write_byte(state, 0x1a, 0x11); // VBER 10^6, DVB, QPSK 163 tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */
164 164
165 // setup carrier recovery 165 /* setup carrier recovery */
166 tda10086_write_byte(state, 0x3d, 0x80); 166 tda10086_write_byte(state, 0x3d, 0x80);
167 167
168 // setup SEC 168 /* setup SEC */
169 tda10086_write_byte(state, 0x36, t22k_off); // all SEC off, 22k tone 169 tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */
170 tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); // } tone frequency 170 tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000)));
171 tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); // } 171 tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8);
172 172
173 return 0; 173 return 0;
174} 174}
@@ -307,7 +307,7 @@ static int tda10086_set_symbol_rate(struct tda10086_state *state,
307 307
308 dprintk ("%s %i\n", __func__, symbol_rate); 308 dprintk ("%s %i\n", __func__, symbol_rate);
309 309
310 // setup the decimation and anti-aliasing filters.. 310 /* setup the decimation and anti-aliasing filters.. */
311 if (symbol_rate < (u32) (SACLK * 0.0137)) { 311 if (symbol_rate < (u32) (SACLK * 0.0137)) {
312 dfn=4; 312 dfn=4;
313 afs=1; 313 afs=1;
@@ -344,13 +344,13 @@ static int tda10086_set_symbol_rate(struct tda10086_state *state,
344 byp=1; 344 byp=1;
345 } 345 }
346 346
347 // calculate BDR 347 /* calculate BDR */
348 big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn); 348 big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
349 big += ((SACLK/1000ULL)-1ULL); 349 big += ((SACLK/1000ULL)-1ULL);
350 do_div(big, (SACLK/1000ULL)); 350 do_div(big, (SACLK/1000ULL));
351 bdr = big & 0xfffff; 351 bdr = big & 0xfffff;
352 352
353 // calculate BDRI 353 /* calculate BDRI */
354 tmp = (1<<dfn)*(symbol_rate/1000); 354 tmp = (1<<dfn)*(symbol_rate/1000);
355 bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp; 355 bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
356 356
@@ -419,11 +419,11 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
419 419
420 dprintk ("%s\n", __func__); 420 dprintk ("%s\n", __func__);
421 421
422 // modify parameters for tuning 422 /* modify parameters for tuning */
423 tda10086_write_byte(state, 0x02, 0x35); 423 tda10086_write_byte(state, 0x02, 0x35);
424 state->has_lock = false; 424 state->has_lock = false;
425 425
426 // set params 426 /* set params */
427 if (fe->ops.tuner_ops.set_params) { 427 if (fe->ops.tuner_ops.set_params) {
428 fe->ops.tuner_ops.set_params(fe, fe_params); 428 fe->ops.tuner_ops.set_params(fe, fe_params);
429 if (fe->ops.i2c_gate_ctrl) 429 if (fe->ops.i2c_gate_ctrl)
@@ -435,7 +435,7 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
435 fe->ops.i2c_gate_ctrl(fe, 0); 435 fe->ops.i2c_gate_ctrl(fe, 0);
436 } 436 }
437 437
438 // calcluate the frequency offset (in *Hz* not kHz) 438 /* calcluate the frequency offset (in *Hz* not kHz) */
439 freqoff = fe_params->frequency - freq; 439 freqoff = fe_params->frequency - freq;
440 freqoff = ((1<<16) * freqoff) / (SACLK/1000); 440 freqoff = ((1<<16) * freqoff) / (SACLK/1000);
441 tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f)); 441 tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
@@ -448,7 +448,7 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
448 if ((ret = tda10086_set_fec(state, fe_params)) < 0) 448 if ((ret = tda10086_set_fec(state, fe_params)) < 0)
449 return ret; 449 return ret;
450 450
451 // soft reset + disable TS output until lock 451 /* soft reset + disable TS output until lock */
452 tda10086_write_mask(state, 0x10, 0x40, 0x40); 452 tda10086_write_mask(state, 0x10, 0x40, 0x40);
453 tda10086_write_mask(state, 0x00, 0x01, 0x00); 453 tda10086_write_mask(state, 0x00, 0x01, 0x00);
454 454
@@ -466,11 +466,11 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
466 466
467 dprintk ("%s\n", __func__); 467 dprintk ("%s\n", __func__);
468 468
469 // check for invalid symbol rate 469 /* check for invalid symbol rate */
470 if (fe_params->u.qpsk.symbol_rate < 500000) 470 if (fe_params->u.qpsk.symbol_rate < 500000)
471 return -EINVAL; 471 return -EINVAL;
472 472
473 // calculate the updated frequency (note: we convert from Hz->kHz) 473 /* calculate the updated frequency (note: we convert from Hz->kHz) */
474 tmp64 = tda10086_read_byte(state, 0x52); 474 tmp64 = tda10086_read_byte(state, 0x52);
475 tmp64 |= (tda10086_read_byte(state, 0x51) << 8); 475 tmp64 |= (tda10086_read_byte(state, 0x51) << 8);
476 if (tmp64 & 0x8000) 476 if (tmp64 & 0x8000)
@@ -479,7 +479,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
479 do_div(tmp64, (1ULL<<15) * (1ULL<<1)); 479 do_div(tmp64, (1ULL<<15) * (1ULL<<1));
480 fe_params->frequency = (int) state->frequency + (int) tmp64; 480 fe_params->frequency = (int) state->frequency + (int) tmp64;
481 481
482 // the inversion 482 /* the inversion */
483 val = tda10086_read_byte(state, 0x0c); 483 val = tda10086_read_byte(state, 0x0c);
484 if (val & 0x80) { 484 if (val & 0x80) {
485 switch(val & 0x40) { 485 switch(val & 0x40) {
@@ -510,7 +510,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
510 } 510 }
511 } 511 }
512 512
513 // calculate the updated symbol rate 513 /* calculate the updated symbol rate */
514 tmp = tda10086_read_byte(state, 0x1d); 514 tmp = tda10086_read_byte(state, 0x1d);
515 if (tmp & 0x80) 515 if (tmp & 0x80)
516 tmp |= 0xffffff00; 516 tmp |= 0xffffff00;
@@ -518,7 +518,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
518 tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000); 518 tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
519 fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp; 519 fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp;
520 520
521 // the FEC 521 /* the FEC */
522 val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4; 522 val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
523 switch(val) { 523 switch(val) {
524 case 0x00: 524 case 0x00:
@@ -571,7 +571,7 @@ static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status)
571 *fe_status |= FE_HAS_LOCK; 571 *fe_status |= FE_HAS_LOCK;
572 if (!state->has_lock) { 572 if (!state->has_lock) {
573 state->has_lock = true; 573 state->has_lock = true;
574 // modify parameters for stable reception 574 /* modify parameters for stable reception */
575 tda10086_write_byte(state, 0x02, 0x00); 575 tda10086_write_byte(state, 0x02, 0x00);
576 } 576 }
577 } 577 }
@@ -611,10 +611,10 @@ static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
611 611
612 dprintk ("%s\n", __func__); 612 dprintk ("%s\n", __func__);
613 613
614 // read it 614 /* read it */
615 *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f; 615 *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
616 616
617 // reset counter 617 /* reset counter */
618 tda10086_write_byte(state, 0x18, 0x00); 618 tda10086_write_byte(state, 0x18, 0x00);
619 tda10086_write_byte(state, 0x18, 0x80); 619 tda10086_write_byte(state, 0x18, 0x80);
620 620
@@ -627,7 +627,7 @@ static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
627 627
628 dprintk ("%s\n", __func__); 628 dprintk ("%s\n", __func__);
629 629
630 // read it 630 /* read it */
631 *ber = 0; 631 *ber = 0;
632 *ber |= tda10086_read_byte(state, 0x15); 632 *ber |= tda10086_read_byte(state, 0x15);
633 *ber |= tda10086_read_byte(state, 0x16) << 8; 633 *ber |= tda10086_read_byte(state, 0x16) << 8;
diff --git a/drivers/media/dvb/frontends/tda10086.h b/drivers/media/dvb/frontends/tda10086.h
index f25d5ea381e5..61148c558d8d 100644
--- a/drivers/media/dvb/frontends/tda10086.h
+++ b/drivers/media/dvb/frontends/tda10086.h
@@ -56,6 +56,6 @@ static inline struct dvb_frontend* tda10086_attach(const struct tda10086_config*
56 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 56 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
57 return NULL; 57 return NULL;
58} 58}
59#endif // CONFIG_DVB_TDA10086 59#endif /* CONFIG_DVB_TDA10086 */
60 60
61#endif // TDA10086_H 61#endif /* TDA10086_H */