diff options
author | Devin Heitmueller <dheitmueller@linuxtv.org> | 2009-03-31 22:58:49 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2009-04-06 20:43:56 -0400 |
commit | 9beb0de9adc789a7da22dac811b03ff342b27b63 (patch) | |
tree | 46fbf35b91e86edd917e1e318e05c85433c70bb0 /drivers/media/video | |
parent | 3956fefc593c45a480466c76fdbfee5063d766bf (diff) |
V4L/DVB (11342): au0828: better document i2c registers
Change the #define entries for the i2c registers to be more meaningful, and
document the valid values for the registers. Note that this changeset makes
*no* functional changes to the code.
Signed-off-by: Devin Heitmueller <dheitmueller@linuxtv.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video')
-rw-r--r-- | drivers/media/video/au0828/au0828-i2c.c | 62 | ||||
-rw-r--r-- | drivers/media/video/au0828/au0828-reg.h | 35 |
2 files changed, 69 insertions, 28 deletions
diff --git a/drivers/media/video/au0828/au0828-i2c.c b/drivers/media/video/au0828/au0828-i2c.c index f9a958d0aef1..27dcfc69cd80 100644 --- a/drivers/media/video/au0828/au0828-i2c.c +++ b/drivers/media/video/au0828/au0828-i2c.c | |||
@@ -39,13 +39,15 @@ MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time"); | |||
39 | static inline int i2c_slave_did_write_ack(struct i2c_adapter *i2c_adap) | 39 | static inline int i2c_slave_did_write_ack(struct i2c_adapter *i2c_adap) |
40 | { | 40 | { |
41 | struct au0828_dev *dev = i2c_adap->algo_data; | 41 | struct au0828_dev *dev = i2c_adap->algo_data; |
42 | return au0828_read(dev, REG_201) & 0x08 ? 0 : 1; | 42 | return au0828_read(dev, AU0828_I2C_STATUS_201) & |
43 | AU0828_I2C_STATUS_NO_WRITE_ACK ? 0 : 1; | ||
43 | } | 44 | } |
44 | 45 | ||
45 | static inline int i2c_slave_did_read_ack(struct i2c_adapter *i2c_adap) | 46 | static inline int i2c_slave_did_read_ack(struct i2c_adapter *i2c_adap) |
46 | { | 47 | { |
47 | struct au0828_dev *dev = i2c_adap->algo_data; | 48 | struct au0828_dev *dev = i2c_adap->algo_data; |
48 | return au0828_read(dev, REG_201) & 0x02 ? 0 : 1; | 49 | return au0828_read(dev, AU0828_I2C_STATUS_201) & |
50 | AU0828_I2C_STATUS_NO_READ_ACK ? 0 : 1; | ||
49 | } | 51 | } |
50 | 52 | ||
51 | static int i2c_wait_read_ack(struct i2c_adapter *i2c_adap) | 53 | static int i2c_wait_read_ack(struct i2c_adapter *i2c_adap) |
@@ -67,7 +69,8 @@ static int i2c_wait_read_ack(struct i2c_adapter *i2c_adap) | |||
67 | static inline int i2c_is_read_busy(struct i2c_adapter *i2c_adap) | 69 | static inline int i2c_is_read_busy(struct i2c_adapter *i2c_adap) |
68 | { | 70 | { |
69 | struct au0828_dev *dev = i2c_adap->algo_data; | 71 | struct au0828_dev *dev = i2c_adap->algo_data; |
70 | return au0828_read(dev, REG_201) & 0x01 ? 0 : 1; | 72 | return au0828_read(dev, AU0828_I2C_STATUS_201) & |
73 | AU0828_I2C_STATUS_READ_DONE ? 0 : 1; | ||
71 | } | 74 | } |
72 | 75 | ||
73 | static int i2c_wait_read_done(struct i2c_adapter *i2c_adap) | 76 | static int i2c_wait_read_done(struct i2c_adapter *i2c_adap) |
@@ -89,7 +92,8 @@ static int i2c_wait_read_done(struct i2c_adapter *i2c_adap) | |||
89 | static inline int i2c_is_write_done(struct i2c_adapter *i2c_adap) | 92 | static inline int i2c_is_write_done(struct i2c_adapter *i2c_adap) |
90 | { | 93 | { |
91 | struct au0828_dev *dev = i2c_adap->algo_data; | 94 | struct au0828_dev *dev = i2c_adap->algo_data; |
92 | return au0828_read(dev, REG_201) & 0x04 ? 1 : 0; | 95 | return au0828_read(dev, AU0828_I2C_STATUS_201) & |
96 | AU0828_I2C_STATUS_WRITE_DONE ? 1 : 0; | ||
93 | } | 97 | } |
94 | 98 | ||
95 | static int i2c_wait_write_done(struct i2c_adapter *i2c_adap) | 99 | static int i2c_wait_write_done(struct i2c_adapter *i2c_adap) |
@@ -111,7 +115,8 @@ static int i2c_wait_write_done(struct i2c_adapter *i2c_adap) | |||
111 | static inline int i2c_is_busy(struct i2c_adapter *i2c_adap) | 115 | static inline int i2c_is_busy(struct i2c_adapter *i2c_adap) |
112 | { | 116 | { |
113 | struct au0828_dev *dev = i2c_adap->algo_data; | 117 | struct au0828_dev *dev = i2c_adap->algo_data; |
114 | return au0828_read(dev, REG_201) & 0x10 ? 1 : 0; | 118 | return au0828_read(dev, AU0828_I2C_STATUS_201) & |
119 | AU0828_I2C_STATUS_BUSY ? 1 : 0; | ||
115 | } | 120 | } |
116 | 121 | ||
117 | static int i2c_wait_done(struct i2c_adapter *i2c_adap) | 122 | static int i2c_wait_done(struct i2c_adapter *i2c_adap) |
@@ -139,19 +144,21 @@ static int i2c_sendbytes(struct i2c_adapter *i2c_adap, | |||
139 | 144 | ||
140 | dprintk(4, "%s()\n", __func__); | 145 | dprintk(4, "%s()\n", __func__); |
141 | 146 | ||
142 | au0828_write(dev, REG_2FF, 0x01); | 147 | au0828_write(dev, AU0828_I2C_MULTIBYTE_MODE_2FF, 0x01); |
143 | 148 | ||
144 | /* FIXME: There is a problem with i2c communications with xc5000 that | 149 | /* FIXME: There is a problem with i2c communications with xc5000 that |
145 | requires us to slow down the i2c clock until we have a better | 150 | requires us to slow down the i2c clock until we have a better |
146 | strategy (such as using the secondary i2c bus to do firmware | 151 | strategy (such as using the secondary i2c bus to do firmware |
147 | loading */ | 152 | loading */ |
148 | if ((msg->addr << 1) == 0xc2) | 153 | if ((msg->addr << 1) == 0xc2) |
149 | au0828_write(dev, REG_202, 0x40); | 154 | au0828_write(dev, AU0828_I2C_CLK_DIVIDER_202, |
155 | AU0828_I2C_CLK_30KHZ); | ||
150 | else | 156 | else |
151 | au0828_write(dev, REG_202, 0x07); | 157 | au0828_write(dev, AU0828_I2C_CLK_DIVIDER_202, |
158 | AU0828_I2C_CLK_250KHZ); | ||
152 | 159 | ||
153 | /* Hardware needs 8 bit addresses */ | 160 | /* Hardware needs 8 bit addresses */ |
154 | au0828_write(dev, REG_203, msg->addr << 1); | 161 | au0828_write(dev, AU0828_I2C_DEST_ADDR_203, msg->addr << 1); |
155 | 162 | ||
156 | dprintk(4, "SEND: %02x\n", msg->addr); | 163 | dprintk(4, "SEND: %02x\n", msg->addr); |
157 | 164 | ||
@@ -163,7 +170,9 @@ static int i2c_sendbytes(struct i2c_adapter *i2c_adap, | |||
163 | actual bytes to the bus, just do a read check. This is | 170 | actual bytes to the bus, just do a read check. This is |
164 | consistent with how I saw i2c device checking done in the | 171 | consistent with how I saw i2c device checking done in the |
165 | USB trace of the Windows driver */ | 172 | USB trace of the Windows driver */ |
166 | au0828_write(dev, REG_200, 0x20); | 173 | au0828_write(dev, AU0828_I2C_TRIGGER_200, |
174 | AU0828_I2C_TRIGGER_READ); | ||
175 | |||
167 | if (!i2c_wait_done(i2c_adap)) | 176 | if (!i2c_wait_done(i2c_adap)) |
168 | return -EIO; | 177 | return -EIO; |
169 | 178 | ||
@@ -177,7 +186,7 @@ static int i2c_sendbytes(struct i2c_adapter *i2c_adap, | |||
177 | 186 | ||
178 | dprintk(4, " %02x\n", msg->buf[i]); | 187 | dprintk(4, " %02x\n", msg->buf[i]); |
179 | 188 | ||
180 | au0828_write(dev, REG_205, msg->buf[i]); | 189 | au0828_write(dev, AU0828_I2C_WRITE_FIFO_205, msg->buf[i]); |
181 | 190 | ||
182 | strobe++; | 191 | strobe++; |
183 | i++; | 192 | i++; |
@@ -186,9 +195,12 @@ static int i2c_sendbytes(struct i2c_adapter *i2c_adap, | |||
186 | 195 | ||
187 | /* Strobe the byte into the bus */ | 196 | /* Strobe the byte into the bus */ |
188 | if (i < msg->len) | 197 | if (i < msg->len) |
189 | au0828_write(dev, REG_200, 0x41); | 198 | au0828_write(dev, AU0828_I2C_TRIGGER_200, |
199 | AU0828_I2C_TRIGGER_WRITE | | ||
200 | AU0828_I2C_TRIGGER_HOLD); | ||
190 | else | 201 | else |
191 | au0828_write(dev, REG_200, 0x01); | 202 | au0828_write(dev, AU0828_I2C_TRIGGER_200, |
203 | AU0828_I2C_TRIGGER_WRITE); | ||
192 | 204 | ||
193 | /* Reset strobe trigger */ | 205 | /* Reset strobe trigger */ |
194 | strobe = 0; | 206 | strobe = 0; |
@@ -216,25 +228,29 @@ static int i2c_readbytes(struct i2c_adapter *i2c_adap, | |||
216 | 228 | ||
217 | dprintk(4, "%s()\n", __func__); | 229 | dprintk(4, "%s()\n", __func__); |
218 | 230 | ||
219 | au0828_write(dev, REG_2FF, 0x01); | 231 | au0828_write(dev, AU0828_I2C_MULTIBYTE_MODE_2FF, 0x01); |
220 | 232 | ||
221 | /* FIXME: There is a problem with i2c communications with xc5000 that | 233 | /* FIXME: There is a problem with i2c communications with xc5000 that |
222 | requires us to slow down the i2c clock until we have a better | 234 | requires us to slow down the i2c clock until we have a better |
223 | strategy (such as using the secondary i2c bus to do firmware | 235 | strategy (such as using the secondary i2c bus to do firmware |
224 | loading */ | 236 | loading */ |
225 | if ((msg->addr << 1) == 0xc2) | 237 | if ((msg->addr << 1) == 0xc2) |
226 | au0828_write(dev, REG_202, 0x40); | 238 | au0828_write(dev, AU0828_I2C_CLK_DIVIDER_202, |
239 | AU0828_I2C_CLK_30KHZ); | ||
227 | else | 240 | else |
228 | au0828_write(dev, REG_202, 0x07); | 241 | au0828_write(dev, AU0828_I2C_CLK_DIVIDER_202, |
242 | AU0828_I2C_CLK_250KHZ); | ||
229 | 243 | ||
230 | /* Hardware needs 8 bit addresses */ | 244 | /* Hardware needs 8 bit addresses */ |
231 | au0828_write(dev, REG_203, msg->addr << 1); | 245 | au0828_write(dev, AU0828_I2C_DEST_ADDR_203, msg->addr << 1); |
232 | 246 | ||
233 | dprintk(4, " RECV:\n"); | 247 | dprintk(4, " RECV:\n"); |
234 | 248 | ||
235 | /* Deal with i2c_scan */ | 249 | /* Deal with i2c_scan */ |
236 | if (msg->len == 0) { | 250 | if (msg->len == 0) { |
237 | au0828_write(dev, REG_200, 0x20); | 251 | au0828_write(dev, AU0828_I2C_TRIGGER_200, |
252 | AU0828_I2C_TRIGGER_READ); | ||
253 | |||
238 | if (i2c_wait_read_ack(i2c_adap)) | 254 | if (i2c_wait_read_ack(i2c_adap)) |
239 | return -EIO; | 255 | return -EIO; |
240 | return 0; | 256 | return 0; |
@@ -245,14 +261,18 @@ static int i2c_readbytes(struct i2c_adapter *i2c_adap, | |||
245 | i++; | 261 | i++; |
246 | 262 | ||
247 | if (i < msg->len) | 263 | if (i < msg->len) |
248 | au0828_write(dev, REG_200, 0x60); | 264 | au0828_write(dev, AU0828_I2C_TRIGGER_200, |
265 | AU0828_I2C_TRIGGER_READ | | ||
266 | AU0828_I2C_TRIGGER_HOLD); | ||
249 | else | 267 | else |
250 | au0828_write(dev, REG_200, 0x20); | 268 | au0828_write(dev, AU0828_I2C_TRIGGER_200, |
269 | AU0828_I2C_TRIGGER_READ); | ||
251 | 270 | ||
252 | if (!i2c_wait_read_done(i2c_adap)) | 271 | if (!i2c_wait_read_done(i2c_adap)) |
253 | return -EIO; | 272 | return -EIO; |
254 | 273 | ||
255 | msg->buf[i-1] = au0828_read(dev, REG_209) & 0xff; | 274 | msg->buf[i-1] = au0828_read(dev, AU0828_I2C_READ_FIFO_209) & |
275 | 0xff; | ||
256 | 276 | ||
257 | dprintk(4, " %02x\n", msg->buf[i-1]); | 277 | dprintk(4, " %02x\n", msg->buf[i-1]); |
258 | } | 278 | } |
diff --git a/drivers/media/video/au0828/au0828-reg.h b/drivers/media/video/au0828/au0828-reg.h index b15e4a3b6fc0..c39f3d2b721e 100644 --- a/drivers/media/video/au0828/au0828-reg.h +++ b/drivers/media/video/au0828/au0828-reg.h | |||
@@ -30,15 +30,36 @@ | |||
30 | #define AU0828_SENSORCTRL_100 0x100 | 30 | #define AU0828_SENSORCTRL_100 0x100 |
31 | #define AU0828_SENSORCTRL_VBI_103 0x103 | 31 | #define AU0828_SENSORCTRL_VBI_103 0x103 |
32 | 32 | ||
33 | #define REG_200 0x200 | 33 | /* I2C registers */ |
34 | #define REG_201 0x201 | 34 | #define AU0828_I2C_TRIGGER_200 0x200 |
35 | #define REG_202 0x202 | 35 | #define AU0828_I2C_STATUS_201 0x201 |
36 | #define REG_203 0x203 | 36 | #define AU0828_I2C_CLK_DIVIDER_202 0x202 |
37 | #define REG_205 0x205 | 37 | #define AU0828_I2C_DEST_ADDR_203 0x203 |
38 | #define REG_209 0x209 | 38 | #define AU0828_I2C_WRITE_FIFO_205 0x205 |
39 | #define REG_2FF 0x2ff | 39 | #define AU0828_I2C_READ_FIFO_209 0x209 |
40 | #define AU0828_I2C_MULTIBYTE_MODE_2FF 0x2ff | ||
40 | 41 | ||
41 | /* Audio registers */ | 42 | /* Audio registers */ |
42 | #define AU0828_AUDIOCTRL_50C 0x50C | 43 | #define AU0828_AUDIOCTRL_50C 0x50C |
43 | 44 | ||
44 | #define REG_600 0x600 | 45 | #define REG_600 0x600 |
46 | |||
47 | /*********************************************************************/ | ||
48 | /* Here are constants for values associated with the above registers */ | ||
49 | |||
50 | /* I2C Trigger (Reg 0x200) */ | ||
51 | #define AU0828_I2C_TRIGGER_WRITE 0x01 | ||
52 | #define AU0828_I2C_TRIGGER_READ 0x20 | ||
53 | #define AU0828_I2C_TRIGGER_HOLD 0x40 | ||
54 | |||
55 | /* I2C Status (Reg 0x201) */ | ||
56 | #define AU0828_I2C_STATUS_READ_DONE 0x01 | ||
57 | #define AU0828_I2C_STATUS_NO_READ_ACK 0x02 | ||
58 | #define AU0828_I2C_STATUS_WRITE_DONE 0x04 | ||
59 | #define AU0828_I2C_STATUS_NO_WRITE_ACK 0x08 | ||
60 | #define AU0828_I2C_STATUS_BUSY 0x10 | ||
61 | |||
62 | /* I2C Clock Divider (Reg 0x202) */ | ||
63 | #define AU0828_I2C_CLK_250KHZ 0x07 | ||
64 | #define AU0828_I2C_CLK_100KHZ 0x14 | ||
65 | #define AU0828_I2C_CLK_30KHZ 0x40 | ||