V4L/DVB (3311): DViCO FusionHDTV DVB-T Dual Digital PCI support

- Support for DVB reception on the PCI half of the DViCO DVB-T Dual Digital.

Signed-off-by: Chris Pascoe <c.pascoe@itee.uq.edu.au>
Signed-off-by: Mauro Carvalho Chehab <mchehab@brturbo.com.br>

3 files changed, 58 insertions, 0 deletions

diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c
index ae2fdf62c8ba..a5b939622f82 100644
--- a/drivers/media/video/cx88/cx88-cards.c
+++ b/drivers/media/video/cx88/cx88-cards.c
@@ -1031,6 +1031,23 @@ struct cx88_board cx88_boards[] = {
                 }},
                 .dvb            = 1,
         },
+        [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL] = {
+                .name           = "DViCO FusionHDTV DVB-T Dual Digital",
+                .tuner_type     = TUNER_ABSENT, /* No analog tuner */
+                .radio_type     = UNSET,
+                .tuner_addr     = ADDR_UNSET,
+                .radio_addr     = ADDR_UNSET,
+                .input          = {{
+                        .type   = CX88_VMUX_COMPOSITE1,
+                        .vmux   = 1,
+                        .gpio0  = 0x000027df,
+                 },{
+                        .type   = CX88_VMUX_SVIDEO,
+                        .vmux   = 2,
+                        .gpio0  = 0x000027df,
+                }},
+                .dvb            = 1,
+        },
 
 };
 const unsigned int cx88_bcount = ARRAY_SIZE(cx88_boards);
@@ -1223,6 +1240,10 @@ struct cx88_subid cx88_subids[] = {
                .subvendor = 0x17de,
                .subdevice = 0x08a1,
                .card      = CX88_BOARD_KWORLD_DVB_T_CX22702,
+        },{
+                .subvendor = 0x18ac,
+                .subdevice = 0xdb50,
+                .card      = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL,
        }
 };
 const unsigned int cx88_idcount = ARRAY_SIZE(cx88_subids);
@@ -1405,6 +1426,7 @@ void cx88_card_setup(struct cx88_core *core)
                 break;
         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
+        case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
                 /* GPIO0:0 is hooked to mt352 reset pin */
                 cx_set(MO_GP0_IO, 0x00000101);
                 cx_clear(MO_GP0_IO, 0x00000001);
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c
index dad8a0d564fb..8a5997bf4ccd 100644
--- a/drivers/media/video/cx88/cx88-dvb.c
+++ b/drivers/media/video/cx88/cx88-dvb.c
@@ -132,6 +132,27 @@ static int generic_mt352_demod_init(struct dvb_frontend* fe)
         return 0;
 }
 
+static int dvico_dual_demod_init(struct dvb_frontend *fe)
+{
+        static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
+        static u8 reset []         = { RESET,      0x80 };
+        static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
+        static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
+        static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
+        static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
+
+        mt352_write(fe, clock_config,   sizeof(clock_config));
+        udelay(200);
+        mt352_write(fe, reset,          sizeof(reset));
+        mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
+
+        mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
+        mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
+        mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
+
+        return 0;
+}
+
 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
 {
         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
@@ -180,6 +201,12 @@ static struct mt352_config dntv_live_dvbt_config = {
         .pll_set       = mt352_pll_set,
 };
 
+static struct mt352_config dvico_fusionhdtv_dual = {
+        .demod_address = 0x0F,
+        .demod_init    = dvico_dual_demod_init,
+        .pll_set       = mt352_pll_set,
+};
+
 #ifdef HAVE_VP3054_I2C
 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
 {
@@ -481,6 +508,14 @@ static int dvb_register(struct cx8802_dev *dev)
                 printk("%s: built without vp3054 support\n", dev->core->name);
 #endif
                 break;
+        case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
+                /* The tin box says DEE1601, but it seems to be DTT7579
+                 * compatible, with a slightly different MT352 AGC gain. */
+                dev->core->pll_addr = 0x61;
+                dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
+                dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
+                                                 &dev->core->i2c_adap);
+                break;
 #endif
 #ifdef HAVE_OR51132
         case CX88_BOARD_PCHDTV_HD3000:
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index 120e5049a46f..e9fd55b57fa6 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -186,6 +186,7 @@ extern struct sram_channel cx88_sram_channels[];
 #define CX88_BOARD_HAUPPAUGE_HVR1100LP     41
 #define CX88_BOARD_DNTV_LIVE_DVB_T_PRO     42
 #define CX88_BOARD_KWORLD_DVB_T_CX22702    43
+#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44
 
 enum cx88_itype {
         CX88_VMUX_COMPOSITE1 = 1,