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authorSylwester Nawrocki <s.nawrocki@samsung.com>2010-12-08 10:48:23 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2011-03-21 19:31:39 -0400
commitd9160afd31565e44ebbd909b283baad8c9a3c224 (patch)
treec0e86da3ea2cff2f0d35364bf829fc5340fb381f /drivers/media/video/s5p-fimc/regs-fimc.h
parente9654ef28740867c0aa151bbaec93f090f60cd24 (diff)
[media] s5p-fimc: Use default input DMA burst count
Increase the input DMA "successive burst count" to default value 4 to improve DMA performance. Minor cleanup. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/s5p-fimc/regs-fimc.h')
-rw-r--r--drivers/media/video/s5p-fimc/regs-fimc.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/media/video/s5p-fimc/regs-fimc.h b/drivers/media/video/s5p-fimc/regs-fimc.h
index 57e33f84fcfa..74ca705df765 100644
--- a/drivers/media/video/s5p-fimc/regs-fimc.h
+++ b/drivers/media/video/s5p-fimc/regs-fimc.h
@@ -210,7 +210,7 @@
210 210
211/* Input DMA control */ 211/* Input DMA control */
212#define S5P_MSCTRL 0xfc 212#define S5P_MSCTRL 0xfc
213#define S5P_MSCTRL_IN_BURST_COUNT_MASK (3 << 24) 213#define S5P_MSCTRL_IN_BURST_COUNT_MASK (0xF << 24)
214#define S5P_MSCTRL_2P_IN_ORDER_MASK (3 << 16) 214#define S5P_MSCTRL_2P_IN_ORDER_MASK (3 << 16)
215#define S5P_MSCTRL_2P_IN_ORDER_SHIFT 16 215#define S5P_MSCTRL_2P_IN_ORDER_SHIFT 16
216#define S5P_MSCTRL_C_INT_IN_3PLANE (0 << 15) 216#define S5P_MSCTRL_C_INT_IN_3PLANE (0 << 15)
@@ -237,7 +237,7 @@
237#define S5P_MSCTRL_INFORMAT_RGB (3 << 1) 237#define S5P_MSCTRL_INFORMAT_RGB (3 << 1)
238#define S5P_MSCTRL_INFORMAT_MASK (3 << 1) 238#define S5P_MSCTRL_INFORMAT_MASK (3 << 1)
239#define S5P_MSCTRL_ENVID (1 << 0) 239#define S5P_MSCTRL_ENVID (1 << 0)
240#define S5P_MSCTRL_FRAME_COUNT(x) ((x) << 24) 240#define S5P_MSCTRL_IN_BURST_COUNT(x) ((x) << 24)
241 241
242/* Output DMA Y/Cb/Cr offset */ 242/* Output DMA Y/Cb/Cr offset */
243#define S5P_CIOYOFF 0x168 243#define S5P_CIOYOFF 0x168