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authorKuninori Morimoto <morimoto.kuninori@renesas.com>2009-02-23 10:12:58 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2009-03-30 11:42:52 -0400
commitcdce7c0be2b3377cc389dc03cc855f3d2e452df3 (patch)
tree894a8909bccb611a408f1354fe4ad897a0f945cd /drivers/media/video/ov772x.c
parent2941e81f64c2c3f99d03be09790f610dd6fedf64 (diff)
V4L/DVB (10667): ov772x: setting method to register is changed.
Color format regs array had been used, but it was not easy to understand what to want to do, and additional bit became complex. This patch modify this problem. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/ov772x.c')
-rw-r--r--drivers/media/video/ov772x.c121
1 files changed, 48 insertions, 73 deletions
diff --git a/drivers/media/video/ov772x.c b/drivers/media/video/ov772x.c
index 4d54e1899571..702e61a9c02b 100644
--- a/drivers/media/video/ov772x.c
+++ b/drivers/media/video/ov772x.c
@@ -271,11 +271,13 @@
271#define SLCT_QVGA 0x40 /* 1 : QVGA */ 271#define SLCT_QVGA 0x40 /* 1 : QVGA */
272#define ITU656_ON_OFF 0x20 /* ITU656 protocol ON/OFF selection */ 272#define ITU656_ON_OFF 0x20 /* ITU656 protocol ON/OFF selection */
273 /* RGB output format control */ 273 /* RGB output format control */
274#define FMT_MASK 0x0c /* Mask of color format */
274#define FMT_GBR422 0x00 /* 00 : GBR 4:2:2 */ 275#define FMT_GBR422 0x00 /* 00 : GBR 4:2:2 */
275#define FMT_RGB565 0x04 /* 01 : RGB 565 */ 276#define FMT_RGB565 0x04 /* 01 : RGB 565 */
276#define FMT_RGB555 0x08 /* 10 : RGB 555 */ 277#define FMT_RGB555 0x08 /* 10 : RGB 555 */
277#define FMT_RGB444 0x0c /* 11 : RGB 444 */ 278#define FMT_RGB444 0x0c /* 11 : RGB 444 */
278 /* Output format control */ 279 /* Output format control */
280#define OFMT_MASK 0x03 /* Mask of output format */
279#define OFMT_YUV 0x00 /* 00 : YUV */ 281#define OFMT_YUV 0x00 /* 00 : YUV */
280#define OFMT_P_BRAW 0x01 /* 01 : Processed Bayer RAW */ 282#define OFMT_P_BRAW 0x01 /* 01 : Processed Bayer RAW */
281#define OFMT_RGB 0x02 /* 10 : RGB */ 283#define OFMT_RGB 0x02 /* 10 : RGB */
@@ -299,7 +301,7 @@
299#define GAIN_2x 0x00 /* 000 : 2x */ 301#define GAIN_2x 0x00 /* 000 : 2x */
300#define GAIN_4x 0x10 /* 001 : 4x */ 302#define GAIN_4x 0x10 /* 001 : 4x */
301#define GAIN_8x 0x20 /* 010 : 8x */ 303#define GAIN_8x 0x20 /* 010 : 8x */
302#define GAIN_16x 0x30 /* 011 : 16x */ 304#define GAIN_16x 0x30 /* 011 : 16x */
303#define GAIN_32x 0x40 /* 100 : 32x */ 305#define GAIN_32x 0x40 /* 100 : 32x */
304#define GAIN_64x 0x50 /* 101 : 64x */ 306#define GAIN_64x 0x50 /* 101 : 64x */
305#define GAIN_128x 0x60 /* 110 : 128x */ 307#define GAIN_128x 0x60 /* 110 : 128x */
@@ -356,13 +358,6 @@
356#define VOSZ_QVGA 0x78 358#define VOSZ_QVGA 0x78
357 359
358/* 360/*
359 * bit configure (32 bit)
360 * this is used in struct ov772x_color_format :: option
361 */
362#define OP_UV 0x00000001
363#define OP_SWAP_RGB 0x00000002
364
365/*
366 * ID 361 * ID
367 */ 362 */
368#define OV7720 0x7720 363#define OV7720 0x7720
@@ -380,8 +375,9 @@ struct regval_list {
380struct ov772x_color_format { 375struct ov772x_color_format {
381 char *name; 376 char *name;
382 __u32 fourcc; 377 __u32 fourcc;
383 const struct regval_list *regs; 378 u8 dsp3;
384 unsigned int option; 379 u8 com3;
380 u8 com7;
385}; 381};
386 382
387struct ov772x_win_size { 383struct ov772x_win_size {
@@ -404,34 +400,6 @@ struct ov772x_priv {
404#define ENDMARKER { 0xff, 0xff } 400#define ENDMARKER { 0xff, 0xff }
405 401
406/* 402/*
407 * register setting for color format
408 */
409static const struct regval_list ov772x_RGB555_regs[] = {
410 { COM3, 0x00 },
411 { COM7, FMT_RGB555 | OFMT_RGB },
412 ENDMARKER,
413};
414
415static const struct regval_list ov772x_RGB565_regs[] = {
416 { COM3, 0x00 },
417 { COM7, FMT_RGB565 | OFMT_RGB },
418 ENDMARKER,
419};
420
421static const struct regval_list ov772x_YYUV_regs[] = {
422 { COM3, SWAP_YUV },
423 { COM7, OFMT_YUV },
424 ENDMARKER,
425};
426
427static const struct regval_list ov772x_UVYY_regs[] = {
428 { COM3, 0x00 },
429 { COM7, OFMT_YUV },
430 ENDMARKER,
431};
432
433
434/*
435 * register setting for window size 403 * register setting for window size
436 */ 404 */
437static const struct regval_list ov772x_qvga_regs[] = { 405static const struct regval_list ov772x_qvga_regs[] = {
@@ -503,34 +471,45 @@ static const struct soc_camera_data_format ov772x_fmt_lists[] = {
503static const struct ov772x_color_format ov772x_cfmts[] = { 471static const struct ov772x_color_format ov772x_cfmts[] = {
504 { 472 {
505 SETFOURCC(YUYV), 473 SETFOURCC(YUYV),
506 .regs = ov772x_YYUV_regs, 474 .dsp3 = 0x0,
475 .com3 = SWAP_YUV,
476 .com7 = OFMT_YUV,
507 }, 477 },
508 { 478 {
509 SETFOURCC(YVYU), 479 SETFOURCC(YVYU),
510 .regs = ov772x_YYUV_regs, 480 .dsp3 = UV_ON,
511 .option = OP_UV, 481 .com3 = SWAP_YUV,
482 .com7 = OFMT_YUV,
512 }, 483 },
513 { 484 {
514 SETFOURCC(UYVY), 485 SETFOURCC(UYVY),
515 .regs = ov772x_UVYY_regs, 486 .dsp3 = 0x0,
487 .com3 = 0x0,
488 .com7 = OFMT_YUV,
516 }, 489 },
517 { 490 {
518 SETFOURCC(RGB555), 491 SETFOURCC(RGB555),
519 .regs = ov772x_RGB555_regs, 492 .dsp3 = 0x0,
520 .option = OP_SWAP_RGB, 493 .com3 = SWAP_RGB,
494 .com7 = FMT_RGB555 | OFMT_RGB,
521 }, 495 },
522 { 496 {
523 SETFOURCC(RGB555X), 497 SETFOURCC(RGB555X),
524 .regs = ov772x_RGB555_regs, 498 .dsp3 = 0x0,
499 .com3 = 0x0,
500 .com7 = FMT_RGB555 | OFMT_RGB,
525 }, 501 },
526 { 502 {
527 SETFOURCC(RGB565), 503 SETFOURCC(RGB565),
528 .regs = ov772x_RGB565_regs, 504 .dsp3 = 0x0,
529 .option = OP_SWAP_RGB, 505 .com3 = SWAP_RGB,
506 .com7 = FMT_RGB565 | OFMT_RGB,
530 }, 507 },
531 { 508 {
532 SETFOURCC(RGB565X), 509 SETFOURCC(RGB565X),
533 .regs = ov772x_RGB565_regs, 510 .dsp3 = 0x0,
511 .com3 = 0x0,
512 .com7 = FMT_RGB565 | OFMT_RGB,
534 }, 513 },
535}; 514};
536 515
@@ -738,6 +717,7 @@ static int ov772x_set_fmt(struct soc_camera_device *icd,
738{ 717{
739 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd); 718 struct ov772x_priv *priv = container_of(icd, struct ov772x_priv, icd);
740 int ret = -EINVAL; 719 int ret = -EINVAL;
720 u8 val;
741 int i; 721 int i;
742 722
743 /* 723 /*
@@ -764,13 +744,6 @@ static int ov772x_set_fmt(struct soc_camera_device *icd,
764 ov772x_reset(priv->client); 744 ov772x_reset(priv->client);
765 745
766 /* 746 /*
767 * set color format
768 */
769 ret = ov772x_write_array(priv->client, priv->fmt->regs);
770 if (ret < 0)
771 goto ov772x_set_fmt_error;
772
773 /*
774 * set size format 747 * set size format
775 */ 748 */
776 ret = ov772x_write_array(priv->client, priv->win->regs); 749 ret = ov772x_write_array(priv->client, priv->win->regs);
@@ -778,32 +751,34 @@ static int ov772x_set_fmt(struct soc_camera_device *icd,
778 goto ov772x_set_fmt_error; 751 goto ov772x_set_fmt_error;
779 752
780 /* 753 /*
781 * set COM7 bit ( QVGA or VGA ) 754 * set DSP_CTRL3
782 */ 755 */
783 ret = ov772x_mask_set(priv->client, 756 val = priv->fmt->dsp3;
784 COM7, SLCT_MASK, priv->win->com7_bit); 757 if (val) {
785 if (ret < 0)
786 goto ov772x_set_fmt_error;
787
788 /*
789 * set UV setting
790 */
791 if (priv->fmt->option & OP_UV) {
792 ret = ov772x_mask_set(priv->client, 758 ret = ov772x_mask_set(priv->client,
793 DSP_CTRL3, UV_MASK, UV_ON); 759 DSP_CTRL3, UV_MASK, val);
794 if (ret < 0) 760 if (ret < 0)
795 goto ov772x_set_fmt_error; 761 goto ov772x_set_fmt_error;
796 } 762 }
797 763
798 /* 764 /*
799 * set SWAP setting 765 * set COM3
800 */ 766 */
801 if (priv->fmt->option & OP_SWAP_RGB) { 767 val = priv->fmt->com3;
802 ret = ov772x_mask_set(priv->client, 768 ret = ov772x_mask_set(priv->client,
803 COM3, SWAP_MASK, SWAP_RGB); 769 COM3, SWAP_MASK, val);
804 if (ret < 0) 770 if (ret < 0)
805 goto ov772x_set_fmt_error; 771 goto ov772x_set_fmt_error;
806 } 772
773 /*
774 * set COM7
775 */
776 val = priv->win->com7_bit | priv->fmt->com7;
777 ret = ov772x_mask_set(priv->client,
778 COM7, (SLCT_MASK | FMT_MASK | OFMT_MASK),
779 val);
780 if (ret < 0)
781 goto ov772x_set_fmt_error;
807 782
808 return ret; 783 return ret;
809 784