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authorMauro Carvalho Chehab <mchehab@infradead.org>2008-04-22 13:46:00 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-04-24 13:07:51 -0400
commit2422a9b3f47c75d3915e6af78ebe25b7d2540262 (patch)
tree9003acce9125b8373a5b1c39eb1a86bd145b17e3 /drivers/media/video/cx88
parentaba360d8cc086e12c3eb832f32d9e9813514e295 (diff)
V4L/DVB (7370): Add basic support for Prolink Pixelview MPEG 8000GT
TV reception ok. S-video and Composite not tested. Audio not tested. IR not implemented yet. Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/cx88')
-rw-r--r--drivers/media/video/cx88/cx88-cards.c70
-rw-r--r--drivers/media/video/cx88/cx88.h1
2 files changed, 67 insertions, 4 deletions
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c
index 4c1e876a9232..98d3475a4b32 100644
--- a/drivers/media/video/cx88/cx88-cards.c
+++ b/drivers/media/video/cx88/cx88-cards.c
@@ -1591,6 +1591,29 @@ static const struct cx88_board cx88_boards[] = {
1591 .gpio0 = 0x16d9, 1591 .gpio0 = 0x16d9,
1592 }}, 1592 }},
1593 }, 1593 },
1594 [CX88_BOARD_PROLINK_PV_8000GT] = {
1595 .name = "Prolink Pixelview MPEG 8000GT",
1596 .tuner_type = TUNER_XC2028,
1597 .tuner_addr = 0x61,
1598 .input = { {
1599 .type = CX88_VMUX_TELEVISION,
1600 .vmux = 0,
1601 .gpio0 = 0x0ff,
1602 .gpio2 = 0x0cfb,
1603 }, {
1604 .type = CX88_VMUX_COMPOSITE1,
1605 .vmux = 1,
1606 .gpio2 = 0x0cfb,
1607 }, {
1608 .type = CX88_VMUX_SVIDEO,
1609 .vmux = 2,
1610 .gpio2 = 0x0cfb,
1611 } },
1612 .radio = {
1613 .type = CX88_RADIO,
1614 .gpio2 = 0x0cfb,
1615 },
1616 },
1594}; 1617};
1595 1618
1596/* ------------------------------------------------------------------ */ 1619/* ------------------------------------------------------------------ */
@@ -1928,11 +1951,15 @@ static const struct cx88_subid cx88_subids[] = {
1928 .subvendor = 0x14f1, 1951 .subvendor = 0x14f1,
1929 .subdevice = 0x8852, 1952 .subdevice = 0x8852,
1930 .card = CX88_BOARD_GENIATECH_X8000_MT, 1953 .card = CX88_BOARD_GENIATECH_X8000_MT,
1931 },{ 1954 }, {
1932 .subvendor = 0x18ac, 1955 .subvendor = 0x18ac,
1933 .subdevice = 0xd610, 1956 .subdevice = 0xd610,
1934 .card = CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD, 1957 .card = CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD,
1935 } 1958 }, {
1959 .subvendor = 0x1554,
1960 .subdevice = 0x4935,
1961 .card = CX88_BOARD_PROLINK_PV_8000GT,
1962 },
1936}; 1963};
1937 1964
1938/* ----------------------------------------------------------------------- */ 1965/* ----------------------------------------------------------------------- */
@@ -2063,9 +2090,10 @@ static void gdi_eeprom(struct cx88_core *core, u8 *eeprom_data)
2063 2090
2064/* ------------------------------------------------------------------- */ 2091/* ------------------------------------------------------------------- */
2065/* some Divco specific stuff */ 2092/* some Divco specific stuff */
2066static int cx88_dvico_xc2028_callback(void *ptr, int command, int arg) 2093static int cx88_dvico_xc2028_callback(void *priv, int command, int arg)
2067{ 2094{
2068 struct cx88_core *core = ptr; 2095 struct i2c_algo_bit_data *i2c_algo = priv;
2096 struct cx88_core *core = i2c_algo->data;
2069 2097
2070 switch (command) { 2098 switch (command) {
2071 case XC2028_TUNER_RESET: 2099 case XC2028_TUNER_RESET:
@@ -2113,6 +2141,28 @@ static int cx88_xc3028_geniatech_tuner_callback(void *priv, int command, int mod
2113 return -EINVAL; 2141 return -EINVAL;
2114} 2142}
2115 2143
2144/* ------------------------------------------------------------------- */
2145/* some Divco specific stuff */
2146static int cx88_pv_8000gt_callback(void *priv, int command, int arg)
2147{
2148 struct i2c_algo_bit_data *i2c_algo = priv;
2149 struct cx88_core *core = i2c_algo->data;
2150
2151 switch (command) {
2152 case XC2028_TUNER_RESET:
2153 cx_write(MO_GP2_IO, 0xcf7);
2154 mdelay(50);
2155 cx_write(MO_GP2_IO, 0xef5);
2156 mdelay(50);
2157 cx_write(MO_GP2_IO, 0xcf7);
2158 break;
2159 default:
2160 return -EINVAL;
2161 }
2162
2163 return 0;
2164}
2165
2116/* ----------------------------------------------------------------------- */ 2166/* ----------------------------------------------------------------------- */
2117/* some DViCO specific stuff */ 2167/* some DViCO specific stuff */
2118 2168
@@ -2159,6 +2209,8 @@ static int cx88_xc2028_tuner_callback(void *priv, int command, int arg)
2159 case CX88_BOARD_POWERCOLOR_REAL_ANGEL: 2209 case CX88_BOARD_POWERCOLOR_REAL_ANGEL:
2160 case CX88_BOARD_GENIATECH_X8000_MT: 2210 case CX88_BOARD_GENIATECH_X8000_MT:
2161 return cx88_xc3028_geniatech_tuner_callback(priv, command, arg); 2211 return cx88_xc3028_geniatech_tuner_callback(priv, command, arg);
2212 case CX88_BOARD_PROLINK_PV_8000GT:
2213 return cx88_pv_8000gt_callback(priv, command, arg);
2162 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO: 2214 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
2163 return cx88_dvico_xc2028_callback(priv, command, arg); 2215 return cx88_dvico_xc2028_callback(priv, command, arg);
2164 } 2216 }
@@ -2291,6 +2343,16 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
2291 cx_set(MO_GP0_IO, 0x00000080); /* 702 out of reset */ 2343 cx_set(MO_GP0_IO, 0x00000080); /* 702 out of reset */
2292 udelay(1000); 2344 udelay(1000);
2293 break; 2345 break;
2346
2347 case CX88_BOARD_PROLINK_PV_8000GT:
2348 cx_write(MO_GP2_IO, 0xcf7);
2349 mdelay(50);
2350 cx_write(MO_GP2_IO, 0xef5);
2351 mdelay(50);
2352 cx_write(MO_GP2_IO, 0xcf7);
2353 msleep(10);
2354 break;
2355
2294 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: 2356 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
2295 /* Enable the xc5000 tuner */ 2357 /* Enable the xc5000 tuner */
2296 cx_set(MO_GP0_IO, 0x00001010); 2358 cx_set(MO_GP0_IO, 0x00001010);
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index 85a95a0a94d9..c0f4912793e9 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -218,6 +218,7 @@ extern struct sram_channel cx88_sram_channels[];
218#define CX88_BOARD_GENIATECH_X8000_MT 63 218#define CX88_BOARD_GENIATECH_X8000_MT 63
219#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64 219#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
220#define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65 220#define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
221#define CX88_BOARD_PROLINK_PV_8000GT 66
221 222
222enum cx88_itype { 223enum cx88_itype {
223 CX88_VMUX_COMPOSITE1 = 1, 224 CX88_VMUX_COMPOSITE1 = 1,