Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master

4 files changed, 654 insertions, 213 deletions

diff --git a/drivers/media/video/cx25840/cx25840-audio.c b/drivers/media/video/cx25840/cx25840-audio.c
index 2f846f5e0f9f..45608d50529c 100644
--- a/drivers/media/video/cx25840/cx25840-audio.c
+++ b/drivers/media/video/cx25840/cx25840-audio.c
@@ -23,87 +23,137 @@
 
 #include "cx25840-core.h"
 
-static int set_audclk_freq(struct i2c_client *client, u32 freq)
+/*
+ * Note: The PLL and SRC parameters are based on a reference frequency that
+ * would ideally be:
+ *
+ * NTSC Color subcarrier freq * 8 = 4.5 MHz/286 * 455/2 * 8 = 28.63636363... MHz
+ *
+ * However, it's not the exact reference frequency that matters, only that the
+ * firmware and modules that comprise the driver for a particular board all
+ * use the same value (close to the ideal value).
+ *
+ * Comments below will note which reference frequency is assumed for various
+ * parameters.  They will usually be one of
+ *
+ *      ref_freq = 28.636360 MHz
+ *              or
+ *      ref_freq = 28.636363 MHz
+ */
+
+static int cx25840_set_audclk_freq(struct i2c_client *client, u32 freq)
 {
         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 
-        if (freq != 32000 && freq != 44100 && freq != 48000)
-                return -EINVAL;
-
-        /* common for all inputs and rates */
-        /* SA_MCLK_SEL=1, SA_MCLK_DIV=0x10 */
-        if (!state->is_cx23885 && !state->is_cx231xx)
-                cx25840_write(client, 0x127, 0x50);
-
         if (state->aud_input != CX25840_AUDIO_SERIAL) {
                 switch (freq) {
                 case 32000:
-                        if (state->is_cx23885) {
-                                /* We don't have register values
-                                 * so avoid destroying registers. */
-                                break;
-                        }
-
-                        if (!state->is_cx231xx) {
-                                /* VID_PLL and AUX_PLL */
-                                cx25840_write4(client, 0x108, 0x1006040f);
-
-                                /* AUX_PLL_FRAC */
-                                cx25840_write4(client, 0x110, 0x01bb39ee);
-                        }
-
-                        if (state->is_cx25836)
+                        /*
+                         * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04
+                         * AUX_PLL Integer = 0x06, AUX PLL Post Divider = 0x10
+                         */
+                        cx25840_write4(client, 0x108, 0x1006040f);
+
+                        /*
+                         * VID_PLL Fraction (register 0x10c) = 0x2be2fe
+                         * 28636360 * 0xf.15f17f0/4 = 108 MHz
+                         * 432 MHz pre-postdivide
+                         */
+
+                        /*
+                         * AUX_PLL Fraction = 0x1bb39ee
+                         * 28636363 * 0x6.dd9cf70/0x10 = 32000 * 384
+                         * 196.6 MHz pre-postdivide
+                         * FIXME < 200 MHz is out of specified valid range
+                         * FIXME 28636363 ref_freq doesn't match VID PLL ref
+                         */
+                        cx25840_write4(client, 0x110, 0x01bb39ee);
+
+                        /*
+                         * SA_MCLK_SEL = 1
+                         * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider
+                         */
+                        cx25840_write(client, 0x127, 0x50);
+
+                        if (is_cx2583x(state))
                                 break;
 
-                        /* src3/4/6_ctl = 0x0801f77f */
+                        /* src3/4/6_ctl */
+                        /* 0x1.f77f = (4 * 28636360/8 * 2/455) / 32000 */
                         cx25840_write4(client, 0x900, 0x0801f77f);
                         cx25840_write4(client, 0x904, 0x0801f77f);
                         cx25840_write4(client, 0x90c, 0x0801f77f);
                         break;
 
                 case 44100:
-                        if (state->is_cx23885) {
-                                /* We don't have register values
-                                 * so avoid destroying registers. */
+                        /*
+                         * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04
+                         * AUX_PLL Integer = 0x09, AUX PLL Post Divider = 0x10
+                         */
+                        cx25840_write4(client, 0x108, 0x1009040f);
+
+                        /*
+                         * VID_PLL Fraction (register 0x10c) = 0x2be2fe
+                         * 28636360 * 0xf.15f17f0/4 = 108 MHz
+                         * 432 MHz pre-postdivide
+                         */
+
+                        /*
+                         * AUX_PLL Fraction = 0x0ec6bd6
+                         * 28636363 * 0x9.7635eb0/0x10 = 44100 * 384
+                         * 271 MHz pre-postdivide
+                         * FIXME 28636363 ref_freq doesn't match VID PLL ref
+                         */
+                        cx25840_write4(client, 0x110, 0x00ec6bd6);
+
+                        /*
+                         * SA_MCLK_SEL = 1
+                         * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider
+                         */
+                        cx25840_write(client, 0x127, 0x50);
+
+                        if (is_cx2583x(state))
                                 break;
-                        }
-
-                        if (!state->is_cx231xx) {
-                                /* VID_PLL and AUX_PLL */
-                                cx25840_write4(client, 0x108, 0x1009040f);
-
-                                /* AUX_PLL_FRAC */
-                                cx25840_write4(client, 0x110, 0x00ec6bd6);
-                        }
 
-                        if (state->is_cx25836)
-                                break;
-
-                        /* src3/4/6_ctl = 0x08016d59 */
+                        /* src3/4/6_ctl */
+                        /* 0x1.6d59 = (4 * 28636360/8 * 2/455) / 44100 */
                         cx25840_write4(client, 0x900, 0x08016d59);
                         cx25840_write4(client, 0x904, 0x08016d59);
                         cx25840_write4(client, 0x90c, 0x08016d59);
                         break;
 
                 case 48000:
-                        if (state->is_cx23885) {
-                                /* We don't have register values
-                                 * so avoid destroying registers. */
-                                break;
-                        }
-
-                        if (!state->is_cx231xx) {
-                                /* VID_PLL and AUX_PLL */
-                                cx25840_write4(client, 0x108, 0x100a040f);
-
-                                /* AUX_PLL_FRAC */
-                                cx25840_write4(client, 0x110, 0x0098d6e5);
-                        }
-
-                        if (state->is_cx25836)
+                        /*
+                         * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04
+                         * AUX_PLL Integer = 0x0a, AUX PLL Post Divider = 0x10
+                         */
+                        cx25840_write4(client, 0x108, 0x100a040f);
+
+                        /*
+                         * VID_PLL Fraction (register 0x10c) = 0x2be2fe
+                         * 28636360 * 0xf.15f17f0/4 = 108 MHz
+                         * 432 MHz pre-postdivide
+                         */
+
+                        /*
+                         * AUX_PLL Fraction = 0x098d6e5
+                         * 28636363 * 0xa.4c6b728/0x10 = 48000 * 384
+                         * 295 MHz pre-postdivide
+                         * FIXME 28636363 ref_freq doesn't match VID PLL ref
+                         */
+                        cx25840_write4(client, 0x110, 0x0098d6e5);
+
+                        /*
+                         * SA_MCLK_SEL = 1
+                         * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider
+                         */
+                        cx25840_write(client, 0x127, 0x50);
+
+                        if (is_cx2583x(state))
                                 break;
 
-                        /* src3/4/6_ctl = 0x08014faa */
+                        /* src3/4/6_ctl */
+                        /* 0x1.4faa = (4 * 28636360/8 * 2/455) / 48000 */
                         cx25840_write4(client, 0x900, 0x08014faa);
                         cx25840_write4(client, 0x904, 0x08014faa);
                         cx25840_write4(client, 0x90c, 0x08014faa);
@@ -112,91 +162,249 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
         } else {
                 switch (freq) {
                 case 32000:
-                        if (state->is_cx23885) {
-                                /* We don't have register values
-                                 * so avoid destroying registers. */
-                                break;
-                        }
-
-                        if (!state->is_cx231xx) {
-                                /* VID_PLL and AUX_PLL */
-                                cx25840_write4(client, 0x108, 0x1e08040f);
-
-                                /* AUX_PLL_FRAC */
-                                cx25840_write4(client, 0x110, 0x012a0869);
-                        }
+                        /*
+                         * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04
+                         * AUX_PLL Integer = 0x08, AUX PLL Post Divider = 0x1e
+                         */
+                        cx25840_write4(client, 0x108, 0x1e08040f);
+
+                        /*
+                         * VID_PLL Fraction (register 0x10c) = 0x2be2fe
+                         * 28636360 * 0xf.15f17f0/4 = 108 MHz
+                         * 432 MHz pre-postdivide
+                         */
+
+                        /*
+                         * AUX_PLL Fraction = 0x12a0869
+                         * 28636363 * 0x8.9504348/0x1e = 32000 * 256
+                         * 246 MHz pre-postdivide
+                         * FIXME 28636363 ref_freq doesn't match VID PLL ref
+                         */
+                        cx25840_write4(client, 0x110, 0x012a0869);
+
+                        /*
+                         * SA_MCLK_SEL = 1
+                         * SA_MCLK_DIV = 0x14 = 256/384 * AUX_PLL post dvivider
+                         */
+                        cx25840_write(client, 0x127, 0x54);
 
-                        if (state->is_cx25836)
+                        if (is_cx2583x(state))
                                 break;
 
-                        /* src1_ctl = 0x08010000 */
+                        /* src1_ctl */
+                        /* 0x1.0000 = 32000/32000 */
                         cx25840_write4(client, 0x8f8, 0x08010000);
 
-                        /* src3/4/6_ctl = 0x08020000 */
+                        /* src3/4/6_ctl */
+                        /* 0x2.0000 = 2 * (32000/32000) */
                         cx25840_write4(client, 0x900, 0x08020000);
                         cx25840_write4(client, 0x904, 0x08020000);
                         cx25840_write4(client, 0x90c, 0x08020000);
-
-                        /* SA_MCLK_SEL=1, SA_MCLK_DIV=0x14 */
-                        cx25840_write(client, 0x127, 0x54);
                         break;
 
                 case 44100:
-                        if (state->is_cx23885) {
-                                /* We don't have register values
-                                 * so avoid destroying registers. */
-                                break;
-                        }
-
-
-                        if (!state->is_cx231xx) {
-                                /* VID_PLL and AUX_PLL */
-                                cx25840_write4(client, 0x108, 0x1809040f);
-
-                                /* AUX_PLL_FRAC */
-                                cx25840_write4(client, 0x110, 0x00ec6bd6);
-                        }
-
-                        if (state->is_cx25836)
+                        /*
+                         * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04
+                         * AUX_PLL Integer = 0x09, AUX PLL Post Divider = 0x18
+                         */
+                        cx25840_write4(client, 0x108, 0x1809040f);
+
+                        /*
+                         * VID_PLL Fraction (register 0x10c) = 0x2be2fe
+                         * 28636360 * 0xf.15f17f0/4 = 108 MHz
+                         * 432 MHz pre-postdivide
+                         */
+
+                        /*
+                         * AUX_PLL Fraction = 0x0ec6bd6
+                         * 28636363 * 0x9.7635eb0/0x18 = 44100 * 256
+                         * 271 MHz pre-postdivide
+                         * FIXME 28636363 ref_freq doesn't match VID PLL ref
+                         */
+                        cx25840_write4(client, 0x110, 0x00ec6bd6);
+
+                        /*
+                         * SA_MCLK_SEL = 1
+                         * SA_MCLK_DIV = 0x10 = 256/384 * AUX_PLL post dvivider
+                         */
+                        cx25840_write(client, 0x127, 0x50);
+
+                        if (is_cx2583x(state))
                                 break;
 
-                        /* src1_ctl = 0x08010000 */
+                        /* src1_ctl */
+                        /* 0x1.60cd = 44100/32000 */
                         cx25840_write4(client, 0x8f8, 0x080160cd);
 
-                        /* src3/4/6_ctl = 0x08020000 */
+                        /* src3/4/6_ctl */
+                        /* 0x1.7385 = 2 * (32000/44100) */
                         cx25840_write4(client, 0x900, 0x08017385);
                         cx25840_write4(client, 0x904, 0x08017385);
                         cx25840_write4(client, 0x90c, 0x08017385);
                         break;
 
                 case 48000:
-                        if (!state->is_cx23885 && !state->is_cx231xx) {
-                                /* VID_PLL and AUX_PLL */
-                                cx25840_write4(client, 0x108, 0x180a040f);
+                        /*
+                         * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04
+                         * AUX_PLL Integer = 0x0a, AUX PLL Post Divider = 0x18
+                         */
+                        cx25840_write4(client, 0x108, 0x180a040f);
+
+                        /*
+                         * VID_PLL Fraction (register 0x10c) = 0x2be2fe
+                         * 28636360 * 0xf.15f17f0/4 = 108 MHz
+                         * 432 MHz pre-postdivide
+                         */
+
+                        /*
+                         * AUX_PLL Fraction = 0x098d6e5
+                         * 28636363 * 0xa.4c6b728/0x18 = 48000 * 256
+                         * 295 MHz pre-postdivide
+                         * FIXME 28636363 ref_freq doesn't match VID PLL ref
+                         */
+                        cx25840_write4(client, 0x110, 0x0098d6e5);
+
+                        /*
+                         * SA_MCLK_SEL = 1
+                         * SA_MCLK_DIV = 0x10 = 256/384 * AUX_PLL post dvivider
+                         */
+                        cx25840_write(client, 0x127, 0x50);
+
+                        if (is_cx2583x(state))
+                                break;
 
-                                /* AUX_PLL_FRAC */
-                                cx25840_write4(client, 0x110, 0x0098d6e5);
-                        }
+                        /* src1_ctl */
+                        /* 0x1.8000 = 48000/32000 */
+                        cx25840_write4(client, 0x8f8, 0x08018000);
 
-                        if (state->is_cx25836)
-                                break;
+                        /* src3/4/6_ctl */
+                        /* 0x1.5555 = 2 * (32000/48000) */
+                        cx25840_write4(client, 0x900, 0x08015555);
+                        cx25840_write4(client, 0x904, 0x08015555);
+                        cx25840_write4(client, 0x90c, 0x08015555);
+                        break;
+                }
+        }
+
+        state->audclk_freq = freq;
+
+        return 0;
+}
+
+static inline int cx25836_set_audclk_freq(struct i2c_client *client, u32 freq)
+{
+        return cx25840_set_audclk_freq(client, freq);
+}
+
+static int cx23885_set_audclk_freq(struct i2c_client *client, u32 freq)
+{
+        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
+
+        if (state->aud_input != CX25840_AUDIO_SERIAL) {
+                switch (freq) {
+                case 32000:
+                case 44100:
+                case 48000:
+                        /* We don't have register values
+                         * so avoid destroying registers. */
+                        /* FIXME return -EINVAL; */
+                        break;
+                }
+        } else {
+                switch (freq) {
+                case 32000:
+                case 44100:
+                        /* We don't have register values
+                         * so avoid destroying registers. */
+                        /* FIXME return -EINVAL; */
+                        break;
+
+                case 48000:
+                        /* src1_ctl */
+                        /* 0x1.867c = 48000 / (2 * 28636360/8 * 2/455) */
+                        cx25840_write4(client, 0x8f8, 0x0801867c);
+
+                        /* src3/4/6_ctl */
+                        /* 0x1.4faa = (4 * 28636360/8 * 2/455) / 48000 */
+                        cx25840_write4(client, 0x900, 0x08014faa);
+                        cx25840_write4(client, 0x904, 0x08014faa);
+                        cx25840_write4(client, 0x90c, 0x08014faa);
+                        break;
+                }
+        }
+
+        state->audclk_freq = freq;
+
+        return 0;
+}
+
+static int cx231xx_set_audclk_freq(struct i2c_client *client, u32 freq)
+{
+        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
+
+        if (state->aud_input != CX25840_AUDIO_SERIAL) {
+                switch (freq) {
+                case 32000:
+                        /* src3/4/6_ctl */
+                        /* 0x1.f77f = (4 * 28636360/8 * 2/455) / 32000 */
+                        cx25840_write4(client, 0x900, 0x0801f77f);
+                        cx25840_write4(client, 0x904, 0x0801f77f);
+                        cx25840_write4(client, 0x90c, 0x0801f77f);
+                        break;
+
+                case 44100:
+                        /* src3/4/6_ctl */
+                        /* 0x1.6d59 = (4 * 28636360/8 * 2/455) / 44100 */
+                        cx25840_write4(client, 0x900, 0x08016d59);
+                        cx25840_write4(client, 0x904, 0x08016d59);
+                        cx25840_write4(client, 0x90c, 0x08016d59);
+                        break;
+
+                case 48000:
+                        /* src3/4/6_ctl */
+                        /* 0x1.4faa = (4 * 28636360/8 * 2/455) / 48000 */
+                        cx25840_write4(client, 0x900, 0x08014faa);
+                        cx25840_write4(client, 0x904, 0x08014faa);
+                        cx25840_write4(client, 0x90c, 0x08014faa);
+                        break;
+                }
+        } else {
+                switch (freq) {
+                /* FIXME These cases make different assumptions about audclk */
+                case 32000:
+                        /* src1_ctl */
+                        /* 0x1.0000 = 32000/32000 */
+                        cx25840_write4(client, 0x8f8, 0x08010000);
 
-                        if (!state->is_cx23885 && !state->is_cx231xx) {
-                                /* src1_ctl */
-                                cx25840_write4(client, 0x8f8, 0x08018000);
+                        /* src3/4/6_ctl */
+                        /* 0x2.0000 = 2 * (32000/32000) */
+                        cx25840_write4(client, 0x900, 0x08020000);
+                        cx25840_write4(client, 0x904, 0x08020000);
+                        cx25840_write4(client, 0x90c, 0x08020000);
+                        break;
 
-                                /* src3/4/6_ctl */
-                                cx25840_write4(client, 0x900, 0x08015555);
-                                cx25840_write4(client, 0x904, 0x08015555);
-                                cx25840_write4(client, 0x90c, 0x08015555);
-                        } else {
+                case 44100:
+                        /* src1_ctl */
+                        /* 0x1.60cd = 44100/32000 */
+                        cx25840_write4(client, 0x8f8, 0x080160cd);
 
-                                cx25840_write4(client, 0x8f8, 0x0801867c);
+                        /* src3/4/6_ctl */
+                        /* 0x1.7385 = 2 * (32000/44100) */
+                        cx25840_write4(client, 0x900, 0x08017385);
+                        cx25840_write4(client, 0x904, 0x08017385);
+                        cx25840_write4(client, 0x90c, 0x08017385);
+                        break;
 
-                                cx25840_write4(client, 0x900, 0x08014faa);
-                                cx25840_write4(client, 0x904, 0x08014faa);
-                                cx25840_write4(client, 0x90c, 0x08014faa);
-                        }
+                case 48000:
+                        /* src1_ctl */
+                        /* 0x1.867c = 48000 / (2 * 28636360/8 * 2/455) */
+                        cx25840_write4(client, 0x8f8, 0x0801867c);
+
+                        /* src3/4/6_ctl */
+                        /* 0x1.4faa = (4 * 28636360/8 * 2/455) / 48000 */
+                        cx25840_write4(client, 0x900, 0x08014faa);
+                        cx25840_write4(client, 0x904, 0x08014faa);
+                        cx25840_write4(client, 0x90c, 0x08014faa);
                         break;
                 }
         }
@@ -206,6 +414,25 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
         return 0;
 }
 
+static int set_audclk_freq(struct i2c_client *client, u32 freq)
+{
+        struct cx25840_state *state = to_state(i2c_get_clientdata(client));
+
+        if (freq != 32000 && freq != 44100 && freq != 48000)
+                return -EINVAL;
+
+        if (is_cx231xx(state))
+                return cx231xx_set_audclk_freq(client, freq);
+
+        if (is_cx2388x(state))
+                return cx23885_set_audclk_freq(client, freq);
+
+        if (is_cx2583x(state))
+                return cx25836_set_audclk_freq(client, freq);
+
+        return cx25840_set_audclk_freq(client, freq);
+}
+
 void cx25840_audio_set_path(struct i2c_client *client)
 {
         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
@@ -243,7 +470,7 @@ void cx25840_audio_set_path(struct i2c_client *client)
         cx25840_and_or(client, 0x810, ~0x1, 0x00);
 
         /* Ensure the controller is running when we exit */
-        if (state->is_cx23885 || state->is_cx231xx)
+        if (is_cx2388x(state) || is_cx231xx(state))
                 cx25840_and_or(client, 0x803, ~0x10, 0x10);
 }
 
@@ -383,7 +610,7 @@ int cx25840_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
         struct cx25840_state *state = to_state(sd);
         int retval;
 
-        if (!state->is_cx25836)
+        if (!is_cx2583x(state))
                 cx25840_and_or(client, 0x810, ~0x1, 1);
         if (state->aud_input != CX25840_AUDIO_SERIAL) {
                 cx25840_and_or(client, 0x803, ~0x10, 0);
@@ -392,7 +619,7 @@ int cx25840_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
         retval = set_audclk_freq(client, freq);
         if (state->aud_input != CX25840_AUDIO_SERIAL)
                 cx25840_and_or(client, 0x803, ~0x10, 0x10);
-        if (!state->is_cx25836)
+        if (!is_cx2583x(state))
                 cx25840_and_or(client, 0x810, ~0x1, 0);
         return retval;
 }
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c
index 1aeaf18a9bea..f2461cd3de5a 100644
--- a/drivers/media/video/cx25840/cx25840-core.c
+++ b/drivers/media/video/cx25840/cx25840-core.c
@@ -259,6 +259,13 @@ static void cx23885_initialize(struct i2c_client *client)
         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
         struct workqueue_struct *q;
 
+        /*
+         * Come out of digital power down
+         * The CX23888, at least, needs this, otherwise registers aside from
+         * 0x0-0x2 can't be read or written.
+         */
+        cx25840_write(client, 0x000, 0);
+
         /* Internal Reset */
         cx25840_and_or(client, 0x102, ~0x01, 0x01);
         cx25840_and_or(client, 0x102, ~0x01, 0x00);
@@ -269,18 +276,45 @@ static void cx23885_initialize(struct i2c_client *client)
         /* DIF in reset? */
         cx25840_write(client, 0x398, 0);
 
-        /* Trust the default xtal, no division */
-        /* This changes for the cx23888 products */
+        /*
+         * Trust the default xtal, no division
+         * '885: 28.636363... MHz
+         * '887: 25.000000 MHz
+         * '888: 50.000000 MHz
+         */
         cx25840_write(client, 0x2, 0x76);
 
-        /* Bring down the regulator for AUX clk */
+        /* Power up all the PLL's and DLL */
         cx25840_write(client, 0x1, 0x40);
 
-        /* Sys PLL frac */
-        cx25840_write4(client, 0x11c, 0x01d1744c);
-
-        /* Sys PLL int */
-        cx25840_write4(client, 0x118, 0x00000416);
+        /* Sys PLL */
+        switch (state->id) {
+        case V4L2_IDENT_CX23888_AV:
+                /*
+                 * 50.0 MHz * (0xb + 0xe8ba26/0x2000000)/4 = 5 * 28.636363 MHz
+                 * 572.73 MHz before post divide
+                 */
+                cx25840_write4(client, 0x11c, 0x00e8ba26);
+                cx25840_write4(client, 0x118, 0x0000040b);
+                break;
+        case V4L2_IDENT_CX23887_AV:
+                /*
+                 * 25.0 MHz * (0x16 + 0x1d1744c/0x2000000)/4 = 5 * 28.636363 MHz
+                 * 572.73 MHz before post divide
+                 */
+                cx25840_write4(client, 0x11c, 0x01d1744c);
+                cx25840_write4(client, 0x118, 0x00000416);
+                break;
+        case V4L2_IDENT_CX23885_AV:
+        default:
+                /*
+                 * 28.636363 MHz * (0x14 + 0x0/0x2000000)/4 = 5 * 28.636363 MHz
+                 * 572.73 MHz before post divide
+                 */
+                cx25840_write4(client, 0x11c, 0x00000000);
+                cx25840_write4(client, 0x118, 0x00000414);
+                break;
+        }
 
         /* Disable DIF bypass */
         cx25840_write4(client, 0x33c, 0x00000001);
@@ -288,11 +322,15 @@ static void cx23885_initialize(struct i2c_client *client)
         /* DIF Src phase inc */
         cx25840_write4(client, 0x340, 0x0df7df83);
 
-        /* Vid PLL frac */
-        cx25840_write4(client, 0x10c, 0x01b6db7b);
-
-        /* Vid PLL int */
-        cx25840_write4(client, 0x108, 0x00000512);
+        /*
+         * Vid PLL
+         * Setup for a BT.656 pixel clock of 13.5 Mpixels/second
+         *
+         * 28.636363 MHz * (0xf + 0x02be2c9/0x2000000)/4 = 8 * 13.5 MHz
+         * 432.0 MHz before post divide
+         */
+        cx25840_write4(client, 0x10c, 0x002be2c9);
+        cx25840_write4(client, 0x108, 0x0000040f);
 
         /* Luma */
         cx25840_write4(client, 0x414, 0x00107d12);
@@ -300,11 +338,43 @@ static void cx23885_initialize(struct i2c_client *client)
         /* Chroma */
         cx25840_write4(client, 0x420, 0x3d008282);
 
-        /* Aux PLL frac */
-        cx25840_write4(client, 0x114, 0x017dbf48);
-
-        /* Aux PLL int */
-        cx25840_write4(client, 0x110, 0x000a030e);
+        /*
+         * Aux PLL
+         * Initial setup for audio sample clock:
+         * 48 ksps, 16 bits/sample, x160 multiplier = 122.88 MHz
+         * Intial I2S output/master clock(?):
+         * 48 ksps, 16 bits/sample, x16 multiplier = 12.288 MHz
+         */
+        switch (state->id) {
+        case V4L2_IDENT_CX23888_AV:
+                /*
+                 * 50.0 MHz * (0x7 + 0x0bedfa4/0x2000000)/3 = 122.88 MHz
+                 * 368.64 MHz before post divide
+                 * 122.88 MHz / 0xa = 12.288 MHz
+                 */
+                cx25840_write4(client, 0x114, 0x00bedfa4);
+                cx25840_write4(client, 0x110, 0x000a0307);
+                break;
+        case V4L2_IDENT_CX23887_AV:
+                /*
+                 * 25.0 MHz * (0xe + 0x17dbf48/0x2000000)/3 = 122.88 MHz
+                 * 368.64 MHz before post divide
+                 * 122.88 MHz / 0xa = 12.288 MHz
+                 */
+                cx25840_write4(client, 0x114, 0x017dbf48);
+                cx25840_write4(client, 0x110, 0x000a030e);
+                break;
+        case V4L2_IDENT_CX23885_AV:
+        default:
+                /*
+                 * 28.636363 MHz * (0xc + 0x1bf0c9e/0x2000000)/3 = 122.88 MHz
+                 * 368.64 MHz before post divide
+                 * 122.88 MHz / 0xa = 12.288 MHz
+                 */
+                cx25840_write4(client, 0x114, 0x01bf0c9e);
+                cx25840_write4(client, 0x110, 0x000a030c);
+                break;
+        };
 
         /* ADC2 input select */
         cx25840_write(client, 0x102, 0x10);
@@ -494,7 +564,7 @@ void cx25840_std_setup(struct i2c_client *client)
         }
 
         /* DEBUG: Displays configured PLL frequency */
-        if (!state->is_cx231xx) {
+        if (!is_cx231xx(state)) {
                 pll_int = cx25840_read(client, 0x108);
                 pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
                 pll_post = cx25840_read(client, 0x109);
@@ -615,13 +685,30 @@ static void input_change(struct i2c_client *client)
                 }
                 cx25840_write(client, 0x80b, 0x00);
         } else if (std & V4L2_STD_PAL) {
-                /* Follow tuner change procedure for PAL */
+                /* Autodetect audio standard and audio system */
                 cx25840_write(client, 0x808, 0xff);
-                cx25840_write(client, 0x80b, 0x10);
+                /* Since system PAL-L is pretty much non-existant and
+                   not used by any public broadcast network, force
+                   6.5 MHz carrier to be interpreted as System DK,
+                   this avoids DK audio detection instability */
+               cx25840_write(client, 0x80b, 0x00);
         } else if (std & V4L2_STD_SECAM) {
-                /* Select autodetect for SECAM */
+                /* Autodetect audio standard and audio system */
                 cx25840_write(client, 0x808, 0xff);
-                cx25840_write(client, 0x80b, 0x10);
+                /* If only one of SECAM-DK / SECAM-L is required, then force
+                  6.5MHz carrier, else autodetect it */
+                if ((std & V4L2_STD_SECAM_DK) &&
+                    !(std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
+                        /* 6.5 MHz carrier to be interpreted as System DK */
+                        cx25840_write(client, 0x80b, 0x00);
+               } else if (!(std & V4L2_STD_SECAM_DK) &&
+                          (std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
+                        /* 6.5 MHz carrier to be interpreted as System L */
+                        cx25840_write(client, 0x80b, 0x08);
+               } else {
+                        /* 6.5 MHz carrier to be autodetected */
+                        cx25840_write(client, 0x80b, 0x10);
+               }
         }
 
         cx25840_and_or(client, 0x810, ~0x01, 0);
@@ -633,6 +720,10 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
         u8 is_composite = (vid_input >= CX25840_COMPOSITE1 &&
                            vid_input <= CX25840_COMPOSITE8);
+        u8 is_component = (vid_input & CX25840_COMPONENT_ON) ==
+                        CX25840_COMPONENT_ON;
+        int luma = vid_input & 0xf0;
+        int chroma = vid_input & 0xf00;
         u8 reg;
 
         v4l_dbg(1, cx25840_debug, client,
@@ -643,20 +734,14 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
                 v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n",
                         vid_input);
                 reg = vid_input & 0xff;
-                if ((vid_input & CX25840_SVIDEO_ON) == CX25840_SVIDEO_ON)
-                        is_composite = 0;
-                else
-                        is_composite = 1;
+                is_composite = !is_component &&
+                        ((vid_input & CX25840_SVIDEO_ON) != CX25840_SVIDEO_ON);
 
                 v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n",
                         reg, is_composite);
-        } else
-        if (is_composite) {
+        } else if (is_composite) {
                 reg = 0xf0 + (vid_input - CX25840_COMPOSITE1);
         } else {
-                int luma = vid_input & 0xf0;
-                int chroma = vid_input & 0xf00;
-
                 if ((vid_input & ~0xff0) ||
                     luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA8 ||
                     chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) {
@@ -678,7 +763,7 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
          * configuration in reg (for the cx23885) so we have no
          * need to attempt to flip bits for earlier av decoders.
          */
-        if (!state->is_cx23885 && !state->is_cx231xx) {
+        if (!is_cx2388x(state) && !is_cx231xx(state)) {
                 switch (aud_input) {
                 case CX25840_AUDIO_SERIAL:
                         /* do nothing, use serial audio input */
@@ -698,10 +783,13 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
 
         cx25840_write(client, 0x103, reg);
 
-        /* Set INPUT_MODE to Composite (0) or S-Video (1) */
-        cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
+        /* Set INPUT_MODE to Composite, S-Video or Component */
+        if (is_component)
+                cx25840_and_or(client, 0x401, ~0x6, 0x6);
+        else
+                cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
 
-        if (!state->is_cx23885 && !state->is_cx231xx) {
+        if (!is_cx2388x(state) && !is_cx231xx(state)) {
                 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
                 cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
                 /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2&CH3 */
@@ -710,22 +798,31 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
                 else
                         cx25840_and_or(client, 0x102, ~0x4, 0);
         } else {
-                if (is_composite)
+                /* Set DUAL_MODE_ADC2 to 1 if component*/
+                cx25840_and_or(client, 0x102, ~0x4, is_component ? 0x4 : 0x0);
+                if (is_composite) {
                         /* ADC2 input select channel 2 */
                         cx25840_and_or(client, 0x102, ~0x2, 0);
-                else
-                        /* ADC2 input select channel 3 */
-                        cx25840_and_or(client, 0x102, ~0x2, 2);
+                } else if (!is_component) {
+                        /* S-Video */
+                        if (chroma >= CX25840_SVIDEO_CHROMA7) {
+                                /* ADC2 input select channel 3 */
+                                cx25840_and_or(client, 0x102, ~0x2, 2);
+                        } else {
+                                /* ADC2 input select channel 2 */
+                                cx25840_and_or(client, 0x102, ~0x2, 0);
+                        }
+                }
         }
 
         state->vid_input = vid_input;
         state->aud_input = aud_input;
-        if (!state->is_cx25836) {
+        if (!is_cx2583x(state)) {
                 cx25840_audio_set_path(client);
                 input_change(client);
         }
 
-        if (state->is_cx23885) {
+        if (is_cx2388x(state)) {
                 /* Audio channel 1 src : Parallel 1 */
                 cx25840_write(client, 0x124, 0x03);
 
@@ -741,7 +838,7 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
                  */
                 cx25840_write(client, 0x918, 0xa0);
                 cx25840_write(client, 0x919, 0x01);
-        } else if (state->is_cx231xx) {
+        } else if (is_cx231xx(state)) {
                 /* Audio channel 1 src : Parallel 1 */
                 cx25840_write(client, 0x124, 0x03);
 
@@ -805,7 +902,7 @@ static int set_v4lstd(struct i2c_client *client)
         cx25840_and_or(client, 0x400, ~0xf, fmt);
         cx25840_and_or(client, 0x403, ~0x3, pal_m);
         cx25840_std_setup(client);
-        if (!state->is_cx25836)
+        if (!is_cx2583x(state))
                 input_change(client);
         return 0;
 }
@@ -868,7 +965,7 @@ static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
         case V4L2_CID_AUDIO_TREBLE:
         case V4L2_CID_AUDIO_BALANCE:
         case V4L2_CID_AUDIO_MUTE:
-                if (state->is_cx25836)
+                if (is_cx2583x(state))
                         return -EINVAL;
                 return cx25840_audio_s_ctrl(sd, ctrl);
 
@@ -905,7 +1002,7 @@ static int cx25840_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
         case V4L2_CID_AUDIO_TREBLE:
         case V4L2_CID_AUDIO_BALANCE:
         case V4L2_CID_AUDIO_MUTE:
-                if (state->is_cx25836)
+                if (is_cx2583x(state))
                         return -EINVAL;
                 return cx25840_audio_g_ctrl(sd, ctrl);
         default:
@@ -1209,11 +1306,11 @@ static int cx25840_load_fw(struct v4l2_subdev *sd)
         if (!state->is_initialized) {
                 /* initialize and load firmware */
                 state->is_initialized = 1;
-                if (state->is_cx25836)
+                if (is_cx2583x(state))
                         cx25836_initialize(client);
-                else if (state->is_cx23885)
+                else if (is_cx2388x(state))
                         cx23885_initialize(client);
-                else if (state->is_cx231xx)
+                else if (is_cx231xx(state))
                         cx231xx_initialize(client);
                 else
                         cx25840_initialize(client);
@@ -1248,30 +1345,59 @@ static int cx25840_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *
 }
 #endif
 
+static int cx25840_s_audio_stream(struct v4l2_subdev *sd, int enable)
+{
+        struct cx25840_state *state = to_state(sd);
+        struct i2c_client *client = v4l2_get_subdevdata(sd);
+        u8 v;
+
+        if (is_cx2583x(state) || is_cx2388x(state) || is_cx231xx(state))
+                return 0;
+
+        v4l_dbg(1, cx25840_debug, client, "%s audio output\n",
+                        enable ? "enable" : "disable");
+
+        if (enable) {
+                v = cx25840_read(client, 0x115) | 0x80;
+                cx25840_write(client, 0x115, v);
+                v = cx25840_read(client, 0x116) | 0x03;
+                cx25840_write(client, 0x116, v);
+        } else {
+                v = cx25840_read(client, 0x115) & ~(0x80);
+                cx25840_write(client, 0x115, v);
+                v = cx25840_read(client, 0x116) & ~(0x03);
+                cx25840_write(client, 0x116, v);
+        }
+        return 0;
+}
+
 static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
 {
         struct cx25840_state *state = to_state(sd);
         struct i2c_client *client = v4l2_get_subdevdata(sd);
+        u8 v;
 
-        v4l_dbg(1, cx25840_debug, client, "%s output\n",
+        v4l_dbg(1, cx25840_debug, client, "%s video output\n",
                         enable ? "enable" : "disable");
         if (enable) {
-                if (state->is_cx23885 || state->is_cx231xx) {
-                        u8 v = (cx25840_read(client, 0x421) | 0x0b);
+                if (is_cx2388x(state) || is_cx231xx(state)) {
+                        v = cx25840_read(client, 0x421) | 0x0b;
                         cx25840_write(client, 0x421, v);
                 } else {
-                        cx25840_write(client, 0x115,
-                                        state->is_cx25836 ? 0x0c : 0x8c);
-                        cx25840_write(client, 0x116,
-                                        state->is_cx25836 ? 0x04 : 0x07);
+                        v = cx25840_read(client, 0x115) | 0x0c;
+                        cx25840_write(client, 0x115, v);
+                        v = cx25840_read(client, 0x116) | 0x04;
+                        cx25840_write(client, 0x116, v);
                 }
         } else {
-                if (state->is_cx23885 || state->is_cx231xx) {
-                        u8 v = cx25840_read(client, 0x421) & ~(0x0b);
+                if (is_cx2388x(state) || is_cx231xx(state)) {
+                        v = cx25840_read(client, 0x421) & ~(0x0b);
                         cx25840_write(client, 0x421, v);
                 } else {
-                        cx25840_write(client, 0x115, 0x00);
-                        cx25840_write(client, 0x116, 0x00);
+                        v = cx25840_read(client, 0x115) & ~(0x0c);
+                        cx25840_write(client, 0x115, v);
+                        v = cx25840_read(client, 0x116) & ~(0x04);
+                        cx25840_write(client, 0x116, v);
                 }
         }
         return 0;
@@ -1292,7 +1418,7 @@ static int cx25840_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
         default:
                 break;
         }
-        if (state->is_cx25836)
+        if (is_cx2583x(state))
                 return -EINVAL;
 
         switch (qc->id) {
@@ -1346,7 +1472,7 @@ static int cx25840_s_audio_routing(struct v4l2_subdev *sd,
         struct cx25840_state *state = to_state(sd);
         struct i2c_client *client = v4l2_get_subdevdata(sd);
 
-        if (state->is_cx25836)
+        if (is_cx2583x(state))
                 return -EINVAL;
         return set_input(client, state->vid_input, input);
 }
@@ -1356,7 +1482,7 @@ static int cx25840_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *fr
         struct cx25840_state *state = to_state(sd);
         struct i2c_client *client = v4l2_get_subdevdata(sd);
 
-        if (!state->is_cx25836)
+        if (!is_cx2583x(state))
                 input_change(client);
         return 0;
 }
@@ -1373,7 +1499,7 @@ static int cx25840_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
                 return 0;
 
         vt->signal = vpres ? 0xffff : 0x0;
-        if (state->is_cx25836)
+        if (is_cx2583x(state))
                 return 0;
 
         vt->capability |=
@@ -1404,7 +1530,7 @@ static int cx25840_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
         struct cx25840_state *state = to_state(sd);
         struct i2c_client *client = v4l2_get_subdevdata(sd);
 
-        if (state->radio || state->is_cx25836)
+        if (state->radio || is_cx2583x(state))
                 return 0;
 
         switch (vt->audmode) {
@@ -1445,11 +1571,11 @@ static int cx25840_reset(struct v4l2_subdev *sd, u32 val)
         struct cx25840_state *state = to_state(sd);
         struct i2c_client *client = v4l2_get_subdevdata(sd);
 
-        if (state->is_cx25836)
+        if (is_cx2583x(state))
                 cx25836_initialize(client);
-        else if (state->is_cx23885)
+        else if (is_cx2388x(state))
                 cx23885_initialize(client);
-        else if (state->is_cx231xx)
+        else if (is_cx231xx(state))
                 cx231xx_initialize(client);
         else
                 cx25840_initialize(client);
@@ -1470,7 +1596,7 @@ static int cx25840_log_status(struct v4l2_subdev *sd)
         struct i2c_client *client = v4l2_get_subdevdata(sd);
 
         log_video_status(client);
-        if (!state->is_cx25836)
+        if (!is_cx2583x(state))
                 log_audio_status(client);
         return 0;
 }
@@ -1502,6 +1628,7 @@ static const struct v4l2_subdev_tuner_ops cx25840_tuner_ops = {
 static const struct v4l2_subdev_audio_ops cx25840_audio_ops = {
         .s_clock_freq = cx25840_s_clock_freq,
         .s_routing = cx25840_s_audio_routing,
+        .s_stream = cx25840_s_audio_stream,
 };
 
 static const struct v4l2_subdev_video_ops cx25840_video_ops = {
@@ -1521,12 +1648,50 @@ static const struct v4l2_subdev_ops cx25840_ops = {
 
 /* ----------------------------------------------------------------------- */
 
+static u32 get_cx2388x_ident(struct i2c_client *client)
+{
+        u32 ret;
+
+        /* Come out of digital power down */
+        cx25840_write(client, 0x000, 0);
+
+        /* Detecting whether the part is cx23885/7/8 is more
+         * difficult than it needs to be. No ID register. Instead we
+         * probe certain registers indicated in the datasheets to look
+         * for specific defaults that differ between the silicon designs. */
+
+        /* It's either 885/7 if the IR Tx Clk Divider register exists */
+        if (cx25840_read4(client, 0x204) & 0xffff) {
+                /* CX23885 returns bogus repetitive byte values for the DIF,
+                 * which doesn't exist for it. (Ex. 8a8a8a8a or 31313131) */
+                ret = cx25840_read4(client, 0x300);
+                if (((ret & 0xffff0000) >> 16) == (ret & 0xffff)) {
+                        /* No DIF */
+                        ret = V4L2_IDENT_CX23885_AV;
+                } else {
+                        /* CX23887 has a broken DIF, but the registers
+                         * appear valid (but unsed), good enough to detect. */
+                        ret = V4L2_IDENT_CX23887_AV;
+                }
+        } else if (cx25840_read4(client, 0x300) & 0x0fffffff) {
+                /* DIF PLL Freq Word reg exists; chip must be a CX23888 */
+                ret = V4L2_IDENT_CX23888_AV;
+        } else {
+                v4l_err(client, "Unable to detect h/w, assuming cx23887\n");
+                ret = V4L2_IDENT_CX23887_AV;
+        }
+
+        /* Back into digital power down */
+        cx25840_write(client, 0x000, 2);
+        return ret;
+}
+
 static int cx25840_probe(struct i2c_client *client,
                          const struct i2c_device_id *did)
 {
         struct cx25840_state *state;
         struct v4l2_subdev *sd;
-        u32 id;
+        u32 id = V4L2_IDENT_NONE;
         u16 device_id;
 
         /* Check if the adapter supports the needed features */
@@ -1543,17 +1708,22 @@ static int cx25840_probe(struct i2c_client *client,
          * 0x83 for the cx2583x and 0x84 for the cx2584x */
         if ((device_id & 0xff00) == 0x8300) {
                 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
-        }
-        else if ((device_id & 0xff00) == 0x8400) {
+        } else if ((device_id & 0xff00) == 0x8400) {
                 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
         } else if (device_id == 0x0000) {
-                id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
-        } else if (device_id == 0x1313) {
-                id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
+                id = get_cx2388x_ident(client);
         } else if ((device_id & 0xfff0) == 0x5A30) {
-                id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
-        }
-        else {
+                /* The CX23100 (0x5A3C = 23100) doesn't have an A/V decoder */
+                id = V4L2_IDENT_CX2310X_AV;
+        } else if ((device_id & 0xff) == (device_id >> 8)) {
+                v4l_err(client,
+                        "likely a confused/unresponsive cx2388[578] A/V decoder"
+                        " found @ 0x%x (%s)\n",
+                        client->addr << 1, client->adapter->name);
+                v4l_err(client, "A method to reset it from the cx25840 driver"
+                        " software is not known at this time\n");
+                return -ENODEV;
+        } else {
                 v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
                 return -ENODEV;
         }
@@ -1564,17 +1734,45 @@ static int cx25840_probe(struct i2c_client *client,
 
         sd = &state->sd;
         v4l2_i2c_subdev_init(sd, client, &cx25840_ops);
-        /* Note: revision '(device_id & 0x0f) == 2' was never built. The
-           marking skips from 0x1 == 22 to 0x3 == 23. */
-        v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
-                    (device_id & 0xfff0) >> 4,
-                    (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1 : (device_id & 0x0f),
-                    client->addr << 1, client->adapter->name);
+        switch (id) {
+        case V4L2_IDENT_CX23885_AV:
+                v4l_info(client, "cx23885 A/V decoder found @ 0x%x (%s)\n",
+                         client->addr << 1, client->adapter->name);
+                break;
+        case V4L2_IDENT_CX23887_AV:
+                v4l_info(client, "cx23887 A/V decoder found @ 0x%x (%s)\n",
+                         client->addr << 1, client->adapter->name);
+                break;
+        case V4L2_IDENT_CX23888_AV:
+                v4l_info(client, "cx23888 A/V decoder found @ 0x%x (%s)\n",
+                         client->addr << 1, client->adapter->name);
+                break;
+        case V4L2_IDENT_CX2310X_AV:
+                v4l_info(client, "cx%d A/V decoder found @ 0x%x (%s)\n",
+                         device_id, client->addr << 1, client->adapter->name);
+                break;
+        case V4L2_IDENT_CX25840:
+        case V4L2_IDENT_CX25841:
+        case V4L2_IDENT_CX25842:
+        case V4L2_IDENT_CX25843:
+                /* Note: revision '(device_id & 0x0f) == 2' was never built. The
+                   marking skips from 0x1 == 22 to 0x3 == 23. */
+                v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
+                         (device_id & 0xfff0) >> 4,
+                         (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1
+                                                : (device_id & 0x0f),
+                         client->addr << 1, client->adapter->name);
+                break;
+        case V4L2_IDENT_CX25836:
+        case V4L2_IDENT_CX25837:
+        default:
+                v4l_info(client, "cx25%3x-%x found @ 0x%x (%s)\n",
+                         (device_id & 0xfff0) >> 4, device_id & 0x0f,
+                         client->addr << 1, client->adapter->name);
+                break;
+        }
 
         state->c = client;
-        state->is_cx25836 = ((device_id & 0xff00) == 0x8300);
-        state->is_cx23885 = (device_id == 0x0000) || (device_id == 0x1313);
-        state->is_cx231xx = (device_id == 0x5a3e);
         state->vid_input = CX25840_COMPOSITE7;
         state->aud_input = CX25840_AUDIO8;
         state->audclk_freq = 48000;
diff --git a/drivers/media/video/cx25840/cx25840-core.h b/drivers/media/video/cx25840/cx25840-core.h
index 814b56536994..55345444417f 100644
--- a/drivers/media/video/cx25840/cx25840-core.h
+++ b/drivers/media/video/cx25840/cx25840-core.h
@@ -23,6 +23,7 @@
 
 #include <linux/videodev2.h>
 #include <media/v4l2-device.h>
+#include <media/v4l2-chip-ident.h>
 #include <linux/i2c.h>
 
 /* ENABLE_PVR150_WORKAROUND activates a workaround for a hardware bug that is
@@ -48,9 +49,6 @@ struct cx25840_state {
         int vbi_line_offset;
         u32 id;
         u32 rev;
-        int is_cx25836;
-        int is_cx23885;
-        int is_cx231xx;
         int is_initialized;
         wait_queue_head_t fw_wait;    /* wake up when the fw load is finished */
         struct work_struct fw_work;   /* work entry for fw load */
@@ -61,6 +59,24 @@ static inline struct cx25840_state *to_state(struct v4l2_subdev *sd)
         return container_of(sd, struct cx25840_state, sd);
 }
 
+static inline bool is_cx2583x(struct cx25840_state *state)
+{
+        return state->id == V4L2_IDENT_CX25836 ||
+               state->id == V4L2_IDENT_CX25837;
+}
+
+static inline bool is_cx231xx(struct cx25840_state *state)
+{
+        return state->id == V4L2_IDENT_CX2310X_AV;
+}
+
+static inline bool is_cx2388x(struct cx25840_state *state)
+{
+        return state->id == V4L2_IDENT_CX23885_AV ||
+               state->id == V4L2_IDENT_CX23887_AV ||
+               state->id == V4L2_IDENT_CX23888_AV;
+}
+
 /* ----------------------------------------------------------------------- */
 /* cx25850-core.c                                                          */
 int cx25840_write(struct i2c_client *client, u16 addr, u8 value);
diff --git a/drivers/media/video/cx25840/cx25840-firmware.c b/drivers/media/video/cx25840/cx25840-firmware.c
index 1f483c1d0dbe..8150200511da 100644
--- a/drivers/media/video/cx25840/cx25840-firmware.c
+++ b/drivers/media/video/cx25840/cx25840-firmware.c
@@ -67,9 +67,9 @@ static const char *get_fw_name(struct i2c_client *client)
 
         if (firmware[0])
                 return firmware;
-        if (state->is_cx23885)
+        if (is_cx2388x(state))
                 return "v4l-cx23885-avcore-01.fw";
-        if (state->is_cx231xx)
+        if (is_cx231xx(state))
                 return "v4l-cx231xx-avcore-01.fw";
         return "v4l-cx25840.fw";
 }
@@ -112,13 +112,13 @@ int cx25840_loadfw(struct i2c_client *client)
         int MAX_BUF_SIZE = FWSEND;
         u32 gpio_oe = 0, gpio_da = 0;
 
-        if (state->is_cx23885) {
+        if (is_cx2388x(state)) {
                 /* Preserve the GPIO OE and output bits */
                 gpio_oe = cx25840_read(client, 0x160);
                 gpio_da = cx25840_read(client, 0x164);
         }
 
-        if ((state->is_cx231xx) && MAX_BUF_SIZE > 16) {
+        if (is_cx231xx(state) && MAX_BUF_SIZE > 16) {
                 v4l_err(client, " Firmware download size changed to 16 bytes max length\n");
                 MAX_BUF_SIZE = 16;  /* cx231xx cannot accept more than 16 bytes at a time */
         }
@@ -156,7 +156,7 @@ int cx25840_loadfw(struct i2c_client *client)
         size = fw->size;
         release_firmware(fw);
 
-        if (state->is_cx23885) {
+        if (is_cx2388x(state)) {
                 /* Restore GPIO configuration after f/w load */
                 cx25840_write(client, 0x160, gpio_oe);
                 cx25840_write(client, 0x164, gpio_da);