aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/video/cx23885
diff options
context:
space:
mode:
authorAbylay Ospan <aospan@netup.ru>2011-01-02 07:10:00 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2011-03-22 03:54:07 -0400
commitd164460f897e2ae8c48ca28c763bb1233d180e7e (patch)
treed3fdc11348fbff63a27ff2721a67d6915a3f0063 /drivers/media/video/cx23885
parent1039752353f1308bcd594a79196f60a22d45975d (diff)
[media] cx23885: Altera FPGA CI interface reworked
It decreases I2C traffic. Signed-off-by: Abylay Ospan <aospan@netup.ru> Signed-off-by: Igor M. Liplianin <liplianin@netup.ru> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/cx23885')
-rw-r--r--drivers/media/video/cx23885/cx23885-dvb.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c
index cf36b9b4794e..c0e665506750 100644
--- a/drivers/media/video/cx23885/cx23885-dvb.c
+++ b/drivers/media/video/cx23885/cx23885-dvb.c
@@ -620,29 +620,29 @@ int netup_altera_fpga_rw(void *device, int flag, int data, int read)
620{ 620{
621 struct cx23885_dev *dev = (struct cx23885_dev *)device; 621 struct cx23885_dev *dev = (struct cx23885_dev *)device;
622 unsigned long timeout = jiffies + msecs_to_jiffies(1); 622 unsigned long timeout = jiffies + msecs_to_jiffies(1);
623 int mem = 0; 623 uint32_t mem = 0;
624 624
625 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS); 625 mem = cx_read(MC417_RWD);
626 if (read) 626 if (read)
627 cx_set(MC417_OEN, ALT_DATA); 627 cx_set(MC417_OEN, ALT_DATA);
628 else { 628 else {
629 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */ 629 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
630 mem = cx_read(MC417_RWD);
631 mem &= ~ALT_DATA; 630 mem &= ~ALT_DATA;
632 mem |= (data & ALT_DATA); 631 mem |= (data & ALT_DATA);
633 cx_write(MC417_RWD, mem);
634 } 632 }
635 633
636 if (flag) 634 if (flag)
637 cx_set(MC417_RWD, ALT_AD_RG);/* ADDR */ 635 mem |= ALT_AD_RG;
638 else 636 else
639 cx_clear(MC417_RWD, ALT_AD_RG);/* VAL */ 637 mem &= ~ALT_AD_RG;
640 638
641 cx_clear(MC417_RWD, ALT_CS);/* ~CS */ 639 mem &= ~ALT_CS;
642 if (read) 640 if (read)
643 cx_clear(MC417_RWD, ALT_RD); 641 mem = (mem & ~ALT_RD) | ALT_WR;
644 else 642 else
645 cx_clear(MC417_RWD, ALT_WR); 643 mem = (mem & ~ALT_WR) | ALT_RD;
644
645 cx_write(MC417_RWD, mem); /* start RW cycle */
646 646
647 for (;;) { 647 for (;;) {
648 mem = cx_read(MC417_RWD); 648 mem = cx_read(MC417_RWD);