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authorSteven Toth <stoth@hauppauge.com>2007-09-08 20:31:56 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2007-10-09 21:14:29 -0400
commita6a3f14035fe94c0925fea62f3d3a7a1ab44c1f1 (patch)
treeb20370fa8929c296242c941b24d6bda95000d366 /drivers/media/video/cx23885
parent15e90839512a2c7d2b7f801af8f9057279e3f813 (diff)
V4L/DVB (6199): cx23885: Changes to allow demodulators on each transport bus
cx23885: Changes to allow demodulators on each transport bus. Signed-off-by: Steven Toth <stoth@hauppauge.com> Reviewed-by: Michael Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/cx23885')
-rw-r--r--drivers/media/video/cx23885/cx23885-cards.c53
-rw-r--r--drivers/media/video/cx23885/cx23885-core.c324
-rw-r--r--drivers/media/video/cx23885/cx23885-dvb.c4
-rw-r--r--drivers/media/video/cx23885/cx23885-reg.h16
-rw-r--r--drivers/media/video/cx23885/cx23885.h5
5 files changed, 207 insertions, 195 deletions
diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c
index cdda11ddf145..b9012acabb2f 100644
--- a/drivers/media/video/cx23885/cx23885-cards.c
+++ b/drivers/media/video/cx23885/cx23885-cards.c
@@ -111,7 +111,7 @@ struct cx23885_board cx23885_boards[] = {
111 }, 111 },
112 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = { 112 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
113 .name = "DViCO FusionHDTV5 Express", 113 .name = "DViCO FusionHDTV5 Express",
114 .portc = CX23885_MPEG_DVB, 114 .portb = CX23885_MPEG_DVB,
115 }, 115 },
116}; 116};
117const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); 117const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
@@ -197,8 +197,43 @@ static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
197 dev->name, tv.model); 197 dev->name, tv.model);
198} 198}
199 199
200void cx23885_gpio_setup(struct cx23885_dev *dev)
201{
202 switch(dev->board) {
203 case CX23885_BOARD_HAUPPAUGE_HVR1250:
204 /* GPIO-0 cx24227 demodulator reset */
205 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
206 break;
207 case CX23885_BOARD_HAUPPAUGE_HVR1800:
208 /* GPIO-0 656_CLK */
209 /* GPIO-1 656_D0 */
210 /* GPIO-2 8295A Reset */
211 /* GPIO-3-10 cx23417 data0-7 */
212 /* GPIO-11-14 cx23417 addr0-3 */
213 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
214 /* GPIO-19 IR_RX */
215 // FIXME: Analog requires the tuner is brought out of reset
216 break;
217 }
218}
219
220int cx23885_ir_init(struct cx23885_dev *dev)
221{
222 switch (dev->board) {
223 case CX23885_BOARD_HAUPPAUGE_HVR1250:
224 case CX23885_BOARD_HAUPPAUGE_HVR1800:
225 /* FIXME: Implement me */
226 break;
227 }
228
229 return 0;
230}
231
200void cx23885_card_setup(struct cx23885_dev *dev) 232void cx23885_card_setup(struct cx23885_dev *dev)
201{ 233{
234 struct cx23885_tsport *ts1 = &dev->ts1;
235 struct cx23885_tsport *ts2 = &dev->ts2;
236
202 static u8 eeprom[256]; 237 static u8 eeprom[256];
203 238
204 if (dev->i2c_bus[0].i2c_rc == 0) { 239 if (dev->i2c_bus[0].i2c_rc == 0) {
@@ -215,6 +250,22 @@ void cx23885_card_setup(struct cx23885_dev *dev)
215 hauppauge_eeprom(dev, eeprom+0x80); 250 hauppauge_eeprom(dev, eeprom+0x80);
216 break; 251 break;
217 } 252 }
253
254 switch (dev->board) {
255 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
256 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
257 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
258 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
259 break;
260 case CX23885_BOARD_HAUPPAUGE_HVR1250:
261 case CX23885_BOARD_HAUPPAUGE_HVR1800:
262 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
263 default:
264 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
265 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
266 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
267 }
268
218} 269}
219 270
220/* ------------------------------------------------------------------ */ 271/* ------------------------------------------------------------------ */
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c
index bcba19263476..51879961e3ea 100644
--- a/drivers/media/video/cx23885/cx23885-core.c
+++ b/drivers/media/video/cx23885/cx23885-core.c
@@ -604,24 +604,7 @@ void cx23885_reset(struct cx23885_dev *dev)
604 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH08 ], 128, 0); 604 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH08 ], 128, 0);
605 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH09 ], 128, 0); 605 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH09 ], 128, 0);
606 606
607 switch(dev->board) { 607 cx23885_gpio_setup(dev);
608 case CX23885_BOARD_HAUPPAUGE_HVR1250:
609 /* GPIO-0 cx24227 demodulator reset */
610 dprintk( 1, "%s() Configuring HVR1250 GPIO's\n", __FUNCTION__);
611 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
612 break;
613 case CX23885_BOARD_HAUPPAUGE_HVR1800:
614 /* GPIO-0 656_CLK */
615 /* GPIO-1 656_D0 */
616 /* GPIO-2 8295A Reset */
617 /* GPIO-3-10 cx23417 data0-7 */
618 /* GPIO-11-14 cx23417 addr0-3 */
619 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
620 /* GPIO-19 IR_RX */
621 dprintk( 1, "%s() Configuring HVR1800 GPIO's\n", __FUNCTION__);
622 // FIXME: Analog requires the tuner is brought out of reset
623 break;
624 }
625} 608}
626 609
627 610
@@ -656,17 +639,68 @@ static void cx23885_timeout(unsigned long data);
656int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc, 639int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
657 u32 reg, u32 mask, u32 value); 640 u32 reg, u32 mask, u32 value);
658 641
659static int cx23885_ir_init(struct cx23885_dev *dev) 642static int cx23885_init_tsport(struct cx23885_dev *dev, struct cx23885_tsport *port, int portno)
660{ 643{
661 dprintk(1, "%s()\n", __FUNCTION__); 644 dprintk(1, "%s(portno=%d)\n", __FUNCTION__, portno);
662 645
663 switch (dev->board) { 646 /* Transport bus init dma queue - Common settings */
664 case CX23885_BOARD_HAUPPAUGE_HVR1250: 647 port->dma_ctl_val = 0x11; /* Enable RISC controller and Fifo */
665 case CX23885_BOARD_HAUPPAUGE_HVR1800: 648 port->ts_int_msk_val = 0x1111; /* TS port bits for RISC */
666 dprintk(1, "%s() FIXME - Implement IR support\n", __FUNCTION__); 649
650 spin_lock_init(&port->slock);
651 port->dev = dev;
652 port->nr = portno;
653
654 INIT_LIST_HEAD(&port->mpegq.active);
655 INIT_LIST_HEAD(&port->mpegq.queued);
656 port->mpegq.timeout.function = cx23885_timeout;
657 port->mpegq.timeout.data = (unsigned long)port;
658 init_timer(&port->mpegq.timeout);
659
660 switch(portno) {
661 case 1:
662 port->reg_gpcnt = VID_B_GPCNT;
663 port->reg_gpcnt_ctl = VID_B_GPCNT_CTL;
664 port->reg_dma_ctl = VID_B_DMA_CTL;
665 port->reg_lngth = VID_B_LNGTH;
666 port->reg_hw_sop_ctrl = VID_B_HW_SOP_CTL;
667 port->reg_gen_ctrl = VID_B_GEN_CTL;
668 port->reg_bd_pkt_status = VID_B_BD_PKT_STATUS;
669 port->reg_sop_status = VID_B_SOP_STATUS;
670 port->reg_fifo_ovfl_stat = VID_B_FIFO_OVFL_STAT;
671 port->reg_vld_misc = VID_B_VLD_MISC;
672 port->reg_ts_clk_en = VID_B_TS_CLK_EN;
673 port->reg_src_sel = VID_B_SRC_SEL;
674 port->reg_ts_int_msk = VID_B_INT_MSK;
675 port->reg_ts_int_stat = VID_B_INT_STAT;
676 port->sram_chno = SRAM_CH03; /* VID_B */
677 port->pci_irqmask = 0x02; /* VID_B bit1 */
678 break;
679 case 2:
680 port->reg_gpcnt = VID_C_GPCNT;
681 port->reg_gpcnt_ctl = VID_C_GPCNT_CTL;
682 port->reg_dma_ctl = VID_C_DMA_CTL;
683 port->reg_lngth = VID_C_LNGTH;
684 port->reg_hw_sop_ctrl = VID_C_HW_SOP_CTL;
685 port->reg_gen_ctrl = VID_C_GEN_CTL;
686 port->reg_bd_pkt_status = VID_C_BD_PKT_STATUS;
687 port->reg_sop_status = VID_C_SOP_STATUS;
688 port->reg_fifo_ovfl_stat = VID_C_FIFO_OVFL_STAT;
689 port->reg_vld_misc = VID_C_VLD_MISC;
690 port->reg_ts_clk_en = VID_C_TS_CLK_EN;
691 port->reg_src_sel = 0;
692 port->reg_ts_int_msk = VID_C_INT_MSK;
693 port->reg_ts_int_stat = VID_C_INT_STAT;
694 port->sram_chno = SRAM_CH06; /* VID_C */
695 port->pci_irqmask = 0x04; /* VID_C bit2 */
667 break; 696 break;
697 default:
698 BUG();
668 } 699 }
669 700
701 cx23885_risc_stopper(dev->pci, &port->mpegq.stopper,
702 port->reg_dma_ctl, port->dma_ctl_val, 0x00);
703
670 return 0; 704 return 0;
671} 705}
672 706
@@ -746,16 +780,11 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
746 dev->i2c_bus[2].reg_wdata = I2C3_WDATA; 780 dev->i2c_bus[2].reg_wdata = I2C3_WDATA;
747 dev->i2c_bus[2].i2c_period = (0x07 << 24); /* 1.95MHz */ 781 dev->i2c_bus[2].i2c_period = (0x07 << 24); /* 1.95MHz */
748 782
749 /* Transport bus init dma queue */ 783 if(cx23885_boards[dev->board].portb == CX23885_MPEG_DVB)
750 spin_lock_init(&dev->ts2.slock); 784 cx23885_init_tsport(dev, &dev->ts1, 1);
751 dev->ts2.dev = dev;
752 dev->ts2.nr = 2;
753 785
754 INIT_LIST_HEAD(&dev->ts2.mpegq.active); 786 if(cx23885_boards[dev->board].portc == CX23885_MPEG_DVB)
755 INIT_LIST_HEAD(&dev->ts2.mpegq.queued); 787 cx23885_init_tsport(dev, &dev->ts2, 2);
756 dev->ts2.mpegq.timeout.function = cx23885_timeout;
757 dev->ts2.mpegq.timeout.data = (unsigned long)&dev->ts2;
758 init_timer(&dev->ts2.mpegq.timeout);
759 788
760 if (get_resources(dev) < 0) { 789 if (get_resources(dev) < 0) {
761 printk(KERN_ERR "CORE %s No more PCIe resources for " 790 printk(KERN_ERR "CORE %s No more PCIe resources for "
@@ -788,71 +817,21 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
788 cx23885_i2c_register(&dev->i2c_bus[1]); 817 cx23885_i2c_register(&dev->i2c_bus[1]);
789 cx23885_i2c_register(&dev->i2c_bus[2]); 818 cx23885_i2c_register(&dev->i2c_bus[2]);
790 cx23885_call_i2c_clients (&dev->i2c_bus[0], TUNER_SET_STANDBY, NULL); 819 cx23885_call_i2c_clients (&dev->i2c_bus[0], TUNER_SET_STANDBY, NULL);
791
792 cx23885_card_setup(dev); 820 cx23885_card_setup(dev);
793 cx23885_ir_init(dev); 821 cx23885_ir_init(dev);
794 822
795 switch (dev->board) { 823 if(cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) {
796 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: 824 if (cx23885_dvb_register(&dev->ts1) < 0) {
797 dev->ts2.reg_gpcnt = VID_B_GPCNT; 825 printk(KERN_ERR "%s() Failed to register dvb adapters on VID_B\n",
798 dev->ts2.reg_gpcnt_ctl = VID_B_GPCNT_CTL; 826 __FUNCTION__);
799 dev->ts2.reg_dma_ctl = VID_B_DMA_CTL; 827 }
800 dev->ts2.reg_lngth = VID_B_LNGTH;
801 dev->ts2.reg_hw_sop_ctrl = VID_B_HW_SOP_CTL;
802 dev->ts2.reg_gen_ctrl = VID_B_GEN_CTL;
803 dev->ts2.reg_bd_pkt_status = VID_B_BD_PKT_STATUS;
804 dev->ts2.reg_sop_status = VID_B_SOP_STATUS;
805 dev->ts2.reg_fifo_ovfl_stat = VID_B_FIFO_OVFL_STAT;
806 dev->ts2.reg_vld_misc = VID_B_VLD_MISC;
807 dev->ts2.reg_ts_clk_en = VID_B_TS_CLK_EN;
808 dev->ts2.reg_ts_int_msk = VID_B_INT_MSK;
809 dev->ts2.reg_src_sel = VID_B_SRC_SEL;
810
811 // FIXME: Make this board specific
812 dev->ts2.pci_irqmask = 0x02; /* TS Port 2 bit */
813 dev->ts2.dma_ctl_val = 0x11; /* Enable RISC controller and Fifo */
814 dev->ts2.ts_int_msk_val = 0x1111; /* TS port bits for RISC */
815 dev->ts2.gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
816 dev->ts2.ts_clk_en_val = 0x1; /* Enable TS_CLK */
817 dev->ts2.src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
818
819 // Drive this from cards.c (portb/c) and move it outside of this switch
820 dev->ts2.sram_chno = SRAM_CH03;
821 break;
822 default:
823 dev->ts2.reg_gpcnt = VID_C_GPCNT;
824 dev->ts2.reg_gpcnt_ctl = VID_C_GPCNT_CTL;
825 dev->ts2.reg_dma_ctl = VID_C_DMA_CTL;
826 dev->ts2.reg_lngth = VID_C_LNGTH;
827 dev->ts2.reg_hw_sop_ctrl = VID_C_HW_SOP_CTL;
828 dev->ts2.reg_gen_ctrl = VID_C_GEN_CTL;
829 dev->ts2.reg_bd_pkt_status = VID_C_BD_PKT_STATUS;
830 dev->ts2.reg_sop_status = VID_C_SOP_STATUS;
831 dev->ts2.reg_fifo_ovfl_stat = VID_C_FIFO_OVFL_STAT;
832 dev->ts2.reg_vld_misc = VID_C_VLD_MISC;
833 dev->ts2.reg_ts_clk_en = VID_C_TS_CLK_EN;
834 dev->ts2.reg_ts_int_msk = VID_C_INT_MSK;
835 dev->ts2.reg_src_sel = 0;
836
837 // FIXME: Make this board specific
838 dev->ts2.pci_irqmask = 0x04; /* TS Port 2 bit */
839 dev->ts2.dma_ctl_val = 0x11; /* Enable RISC controller and Fifo */
840 dev->ts2.ts_int_msk_val = 0x1111; /* TS port bits for RISC */
841 dev->ts2.gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
842 dev->ts2.ts_clk_en_val = 0x1; /* Enable TS_CLK */
843 dev->ts2.src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
844
845 // Drive this from cards.c (portb/c) and move it outside of this switch
846 dev->ts2.sram_chno = SRAM_CH06;
847 } 828 }
848 829
849 cx23885_risc_stopper(dev->pci, &dev->ts2.mpegq.stopper, 830 if(cx23885_boards[dev->board].portc == CX23885_MPEG_DVB) {
850 dev->ts2.reg_dma_ctl, dev->ts2.dma_ctl_val, 0x00); 831 if (cx23885_dvb_register(&dev->ts2) < 0) {
851 832 printk(KERN_ERR "%s() Failed to register dvb adapters on VID_C\n",
852 // FIXME: This should only be called if ts2 is being used, driven by cards.c 833 __FUNCTION__);
853 if (cx23885_dvb_register(&dev->ts2) < 0) { 834 }
854 printk(KERN_ERR "%s() Failed to register dvb adapters\n",
855 __FUNCTION__);
856 } 835 }
857 836
858 return 0; 837 return 0;
@@ -870,7 +849,12 @@ void cx23885_dev_unregister(struct cx23885_dev *dev)
870 if (!atomic_dec_and_test(&dev->refcount)) 849 if (!atomic_dec_and_test(&dev->refcount))
871 return; 850 return;
872 851
873 cx23885_dvb_unregister(&dev->ts2); 852 if(cx23885_boards[dev->board].portb == CX23885_MPEG_DVB)
853 cx23885_dvb_unregister(&dev->ts1);
854
855 if(cx23885_boards[dev->board].portc == CX23885_MPEG_DVB)
856 cx23885_dvb_unregister(&dev->ts2);
857
874 cx23885_i2c_unregister(&dev->i2c_bus[2]); 858 cx23885_i2c_unregister(&dev->i2c_bus[2]);
875 cx23885_i2c_unregister(&dev->i2c_bus[1]); 859 cx23885_i2c_unregister(&dev->i2c_bus[1]);
876 cx23885_i2c_unregister(&dev->i2c_bus[0]); 860 cx23885_i2c_unregister(&dev->i2c_bus[0]);
@@ -1289,14 +1273,66 @@ static void cx23885_timeout(unsigned long data)
1289 do_cancel_buffers(port, "timeout", 1); 1273 do_cancel_buffers(port, "timeout", 1);
1290} 1274}
1291 1275
1276static int cx23885_irq_ts(struct cx23885_tsport *port, u32 status)
1277{
1278 struct cx23885_dev *dev = port->dev;
1279 int handled = 0;
1280 u32 count;
1281
1282 if ( (status & VID_BC_MSK_OPC_ERR) ||
1283 (status & VID_BC_MSK_BAD_PKT) ||
1284 (status & VID_BC_MSK_SYNC) ||
1285 (status & VID_BC_MSK_OF))
1286 {
1287 if (status & VID_BC_MSK_OPC_ERR)
1288 dprintk(7, " (VID_BC_MSK_OPC_ERR 0x%08x)\n", VID_BC_MSK_OPC_ERR);
1289 if (status & VID_BC_MSK_BAD_PKT)
1290 dprintk(7, " (VID_BC_MSK_BAD_PKT 0x%08x)\n", VID_BC_MSK_BAD_PKT);
1291 if (status & VID_BC_MSK_SYNC)
1292 dprintk(7, " (VID_BC_MSK_SYNC 0x%08x)\n", VID_BC_MSK_SYNC);
1293 if (status & VID_BC_MSK_OF)
1294 dprintk(7, " (VID_BC_MSK_OF 0x%08x)\n", VID_BC_MSK_OF);
1295
1296 printk(KERN_ERR "%s: mpeg risc op code error\n", dev->name);
1297
1298 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1299 cx23885_sram_channel_dump(dev, &dev->sram_channels[ port->sram_chno ]);
1300
1301 } else if (status & VID_BC_MSK_RISCI1) {
1302
1303 dprintk(7, " (RISCI1 0x%08x)\n", VID_BC_MSK_RISCI1);
1304
1305 spin_lock(&port->slock);
1306 count = cx_read(port->reg_gpcnt);
1307 cx23885_wakeup(port, &port->mpegq, count);
1308 spin_unlock(&port->slock);
1309
1310 } else if (status & VID_BC_MSK_RISCI2) {
1311
1312 dprintk(7, " (RISCI2 0x%08x)\n", VID_BC_MSK_RISCI2);
1313
1314 spin_lock(&port->slock);
1315 cx23885_restart_queue(port, &port->mpegq);
1316 spin_unlock(&port->slock);
1317
1318 }
1319 if (status) {
1320 cx_write(port->reg_ts_int_stat, status);
1321 handled = 1;
1322 }
1323
1324 return handled;
1325}
1326
1292static irqreturn_t cx23885_irq(int irq, void *dev_id) 1327static irqreturn_t cx23885_irq(int irq, void *dev_id)
1293{ 1328{
1294 struct cx23885_dev *dev = dev_id; 1329 struct cx23885_dev *dev = dev_id;
1295 struct cx23885_tsport *port = &dev->ts2; 1330 struct cx23885_tsport *ts1 = &dev->ts1;
1331 struct cx23885_tsport *ts2 = &dev->ts2;
1296 u32 pci_status, pci_mask; 1332 u32 pci_status, pci_mask;
1297 u32 ts1_status, ts1_mask; 1333 u32 ts1_status, ts1_mask;
1298 u32 ts2_status, ts2_mask; 1334 u32 ts2_status, ts2_mask;
1299 int count = 0, handled = 0; 1335 int ts1_count = 0, ts2_count = 0, handled = 0;
1300 1336
1301 pci_status = cx_read(PCI_INT_STAT); 1337 pci_status = cx_read(PCI_INT_STAT);
1302 pci_mask = cx_read(PCI_INT_MSK); 1338 pci_mask = cx_read(PCI_INT_MSK);
@@ -1308,10 +1344,11 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id)
1308 if ( (pci_status == 0) && (ts2_status == 0) && (ts1_status == 0) ) 1344 if ( (pci_status == 0) && (ts2_status == 0) && (ts1_status == 0) )
1309 goto out; 1345 goto out;
1310 1346
1311 count = cx_read(port->reg_gpcnt); 1347 ts1_count = cx_read(ts1->reg_gpcnt);
1348 ts2_count = cx_read(ts2->reg_gpcnt);
1312 dprintk(7, "pci_status: 0x%08x pci_mask: 0x%08x\n", pci_status, pci_mask ); 1349 dprintk(7, "pci_status: 0x%08x pci_mask: 0x%08x\n", pci_status, pci_mask );
1313 dprintk(7, "ts1_status: 0x%08x ts1_mask: 0x%08x count: 0x%x\n", ts1_status, ts1_mask, count ); 1350 dprintk(7, "ts1_status: 0x%08x ts1_mask: 0x%08x count: 0x%x\n", ts1_status, ts1_mask, ts1_count );
1314 dprintk(7, "ts2_status: 0x%08x ts2_mask: 0x%08x count: 0x%x\n", ts2_status, ts2_mask, count ); 1351 dprintk(7, "ts2_status: 0x%08x ts2_mask: 0x%08x count: 0x%x\n", ts2_status, ts2_mask, ts2_count );
1315 1352
1316 if ( (pci_status & PCI_MSK_RISC_RD) || 1353 if ( (pci_status & PCI_MSK_RISC_RD) ||
1317 (pci_status & PCI_MSK_RISC_WR) || 1354 (pci_status & PCI_MSK_RISC_WR) ||
@@ -1348,90 +1385,11 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id)
1348 1385
1349 } 1386 }
1350 1387
1351 if ( (ts1_status & VID_B_MSK_OPC_ERR) || 1388 if (ts1_status)
1352 (ts1_status & VID_B_MSK_BAD_PKT) || 1389 handled += cx23885_irq_ts(ts1, ts1_status);
1353 (ts1_status & VID_B_MSK_SYNC) ||
1354 (ts1_status & VID_B_MSK_OF))
1355 {
1356 if (ts1_status & VID_B_MSK_OPC_ERR)
1357 dprintk(7, " (VID_B_MSK_OPC_ERR 0x%08x)\n", VID_B_MSK_OPC_ERR);
1358 if (ts1_status & VID_B_MSK_BAD_PKT)
1359 dprintk(7, " (VID_B_MSK_BAD_PKT 0x%08x)\n", VID_B_MSK_BAD_PKT);
1360 if (ts1_status & VID_B_MSK_SYNC)
1361 dprintk(7, " (VID_B_MSK_SYNC 0x%08x)\n", VID_B_MSK_SYNC);
1362 if (ts1_status & VID_B_MSK_OF)
1363 dprintk(7, " (VID_B_MSK_OF 0x%08x)\n", VID_B_MSK_OF);
1364 1390
1365 printk(KERN_ERR "%s: mpeg risc op code error\n", dev->name); 1391 if (ts2_status)
1366 1392 handled += cx23885_irq_ts(ts2, ts2_status);
1367 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1368 cx23885_sram_channel_dump(dev, &dev->sram_channels[ port->sram_chno ]);
1369
1370 } else if (ts1_status & VID_B_MSK_RISCI1) {
1371
1372 dprintk(7, " (RISCI1 0x%08x)\n", VID_B_MSK_RISCI1);
1373
1374 spin_lock(&port->slock);
1375 count = cx_read(port->reg_gpcnt);
1376 cx23885_wakeup(port, &port->mpegq, count);
1377 spin_unlock(&port->slock);
1378
1379 } else if (ts1_status & VID_B_MSK_RISCI2) {
1380
1381 dprintk(7, " (RISCI2 0x%08x)\n", VID_B_MSK_RISCI2);
1382
1383 spin_lock(&port->slock);
1384 cx23885_restart_queue(port, &port->mpegq);
1385 spin_unlock(&port->slock);
1386
1387 }
1388 if (ts1_status) {
1389 cx_write(VID_B_INT_STAT, ts1_status);
1390 handled = 1;
1391 }
1392
1393 if ( (ts2_status & VID_C_MSK_OPC_ERR) ||
1394 (ts2_status & VID_C_MSK_BAD_PKT) ||
1395 (ts2_status & VID_C_MSK_SYNC) ||
1396 (ts2_status & VID_C_MSK_OF))
1397 {
1398 if (ts2_status & VID_C_MSK_OPC_ERR)
1399 dprintk(7, " (VID_C_MSK_OPC_ERR 0x%08x)\n", VID_C_MSK_OPC_ERR);
1400 if (ts2_status & VID_C_MSK_BAD_PKT)
1401 dprintk(7, " (VID_C_MSK_BAD_PKT 0x%08x)\n", VID_C_MSK_BAD_PKT);
1402 if (ts2_status & VID_C_MSK_SYNC)
1403 dprintk(7, " (VID_C_MSK_SYNC 0x%08x)\n", VID_C_MSK_SYNC);
1404 if (ts2_status & VID_C_MSK_OF)
1405 dprintk(7, " (VID_C_MSK_OF 0x%08x)\n", VID_C_MSK_OF);
1406
1407 printk(KERN_ERR "%s: mpeg risc op code error\n", dev->name);
1408
1409 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1410 cx23885_sram_channel_dump(dev, &dev->sram_channels[ port->sram_chno ]);
1411
1412 } else if (ts2_status & VID_C_MSK_RISCI1) {
1413
1414 dprintk(7, " (RISCI1 0x%08x)\n", VID_C_MSK_RISCI1);
1415
1416 spin_lock(&port->slock);
1417 count = cx_read(port->reg_gpcnt);
1418 cx23885_wakeup(port, &port->mpegq, count);
1419 spin_unlock(&port->slock);
1420
1421 } else if (ts2_status & VID_C_MSK_RISCI2) {
1422
1423 dprintk(7, " (RISCI2 0x%08x)\n", VID_C_MSK_RISCI2);
1424
1425 spin_lock(&port->slock);
1426 cx23885_restart_queue(port, &port->mpegq);
1427 spin_unlock(&port->slock);
1428
1429 }
1430
1431 if (ts2_status) {
1432 cx_write(VID_C_INT_STAT, ts2_status);
1433 handled = 1;
1434 }
1435 1393
1436 if (handled) 1394 if (handled)
1437 cx_write(PCI_INT_STAT, pci_status); 1395 cx_write(PCI_INT_STAT, pci_status);
diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c
index 0ace919195df..e0dc1495b8cd 100644
--- a/drivers/media/video/cx23885/cx23885-dvb.c
+++ b/drivers/media/video/cx23885/cx23885-dvb.c
@@ -160,6 +160,7 @@ static int dvb_register(struct cx23885_tsport *port)
160 } 160 }
161 161
162 /* Put the analog decoder in standby to keep it quiet */ 162 /* Put the analog decoder in standby to keep it quiet */
163 /* Assumption here: analog decoder is only on i2c bus 0 */
163 cx23885_call_i2c_clients (&dev->i2c_bus[0], TUNER_SET_STANDBY, NULL); 164 cx23885_call_i2c_clients (&dev->i2c_bus[0], TUNER_SET_STANDBY, NULL);
164 165
165 /* register everything */ 166 /* register everything */
@@ -180,8 +181,6 @@ int cx23885_dvb_register(struct cx23885_tsport *port)
180 dev->pci_slot); 181 dev->pci_slot);
181 182
182 err = -ENODEV; 183 err = -ENODEV;
183 if (!(cx23885_boards[dev->board].portc & CX23885_MPEG_DVB))
184 goto fail_core;
185 184
186 /* dvb stuff */ 185 /* dvb stuff */
187 printk("%s: cx23885 based dvb card\n", dev->name); 186 printk("%s: cx23885 based dvb card\n", dev->name);
@@ -192,7 +191,6 @@ int cx23885_dvb_register(struct cx23885_tsport *port)
192 if (err != 0) 191 if (err != 0)
193 printk("%s() dvb_register failed err = %d\n", __FUNCTION__, err); 192 printk("%s() dvb_register failed err = %d\n", __FUNCTION__, err);
194 193
195 fail_core:
196 return err; 194 return err;
197} 195}
198 196
diff --git a/drivers/media/video/cx23885/cx23885-reg.h b/drivers/media/video/cx23885/cx23885-reg.h
index 3f1afbeea778..162169f9091b 100644
--- a/drivers/media/video/cx23885/cx23885-reg.h
+++ b/drivers/media/video/cx23885/cx23885-reg.h
@@ -250,14 +250,16 @@ Channel manager Data Structure entry = 20 DWORD
250#define VID_C_MSK_OF (1 << 8) 250#define VID_C_MSK_OF (1 << 8)
251#define VID_C_MSK_RISCI2 (1 << 4) 251#define VID_C_MSK_RISCI2 (1 << 4)
252#define VID_C_MSK_RISCI1 1 252#define VID_C_MSK_RISCI1 1
253#define VID_C_INT_MSK 0x00040040
254 253
255#define VID_C_MSK_BAD_PKT (1 << 20) 254/* A superset for testing purposes */
256#define VID_C_MSK_OPC_ERR (1 << 16) 255#define VID_BC_MSK_BAD_PKT (1 << 20)
257#define VID_C_MSK_SYNC (1 << 12) 256#define VID_BC_MSK_OPC_ERR (1 << 16)
258#define VID_C_MSK_OF (1 << 8) 257#define VID_BC_MSK_SYNC (1 << 12)
259#define VID_C_MSK_RISCI2 (1 << 4) 258#define VID_BC_MSK_OF (1 << 8)
260#define VID_C_MSK_RISCI1 1 259#define VID_BC_MSK_RISCI2 (1 << 4)
260#define VID_BC_MSK_RISCI1 1
261
262#define VID_C_INT_MSK 0x00040040
261#define VID_C_INT_STAT 0x00040044 263#define VID_C_INT_STAT 0x00040044
262#define VID_C_INT_MSTAT 0x00040048 264#define VID_C_INT_MSTAT 0x00040048
263#define VID_C_INT_SSTAT 0x0004004C 265#define VID_C_INT_SSTAT 0x0004004C
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h
index 4933274b1e39..45c47cd60703 100644
--- a/drivers/media/video/cx23885/cx23885.h
+++ b/drivers/media/video/cx23885/cx23885.h
@@ -168,6 +168,7 @@ struct cx23885_tsport {
168 u32 reg_vld_misc; 168 u32 reg_vld_misc;
169 u32 reg_ts_clk_en; 169 u32 reg_ts_clk_en;
170 u32 reg_ts_int_msk; 170 u32 reg_ts_int_msk;
171 u32 reg_ts_int_stat;
171 u32 reg_src_sel; 172 u32 reg_src_sel;
172 173
173 /* Default register vals */ 174 /* Default register vals */
@@ -201,7 +202,7 @@ struct cx23885_dev {
201 unsigned int board; 202 unsigned int board;
202 char name[32]; 203 char name[32];
203 204
204 struct cx23885_tsport ts2; 205 struct cx23885_tsport ts1, ts2;
205 206
206 /* sram configuration */ 207 /* sram configuration */
207 struct sram_channel *sram_channels; 208 struct sram_channel *sram_channels;
@@ -269,6 +270,8 @@ extern struct cx23885_subid cx23885_subids[];
269extern const unsigned int cx23885_idcount; 270extern const unsigned int cx23885_idcount;
270 271
271extern void cx23885_card_list(struct cx23885_dev *dev); 272extern void cx23885_card_list(struct cx23885_dev *dev);
273extern int cx23885_ir_init(struct cx23885_dev *dev);
274extern void cx23885_gpio_setup(struct cx23885_dev *dev);
272extern void cx23885_card_setup(struct cx23885_dev *dev); 275extern void cx23885_card_setup(struct cx23885_dev *dev);
273extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); 276extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
274 277