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authorSteven Toth <stoth@hauppauge.com>2007-09-08 14:07:02 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2007-10-09 21:14:28 -0400
commit579f1163cd5b2a3fd96ec5b84b18a071e7da3b6b (patch)
treea5e7c6c82b802313b0436cd6c57b87ab165a7249 /drivers/media/video/cx23885
parent6f074abb624aced31339a0f8fac778b344adac4c (diff)
V4L/DVB (6195): Changes to support MPEG TS on VIDB
Changes to support MPEG TS on VIDB Signed-off-by: Steven Toth <stoth@hauppauge.com> Reviewed-by: Michael Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/cx23885')
-rw-r--r--drivers/media/video/cx23885/cx23885-core.c142
-rw-r--r--drivers/media/video/cx23885/cx23885.h7
2 files changed, 86 insertions, 63 deletions
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c
index d155f5fb133c..553a72ae163a 100644
--- a/drivers/media/video/cx23885/cx23885-core.c
+++ b/drivers/media/video/cx23885/cx23885-core.c
@@ -100,12 +100,12 @@ struct sram_channel cx23885_sram_channels[] = {
100 .cnt2_reg = DMA2_CNT2, 100 .cnt2_reg = DMA2_CNT2,
101 }, 101 },
102 [SRAM_CH03] = { 102 [SRAM_CH03] = {
103 .name = "ch3", 103 .name = "TS1 B",
104 .cmds_start = 0x0, 104 .cmds_start = 0x100A0,
105 .ctrl_start = 0x0, 105 .ctrl_start = 0x10780,
106 .cdt = 0x0, 106 .cdt = 0x10400,
107 .fifo_start = 0x0, 107 .fifo_start = 0x5000,
108 .fifo_size = 0x0, 108 .fifo_size = 0x1000,
109 .ptr1_reg = DMA3_PTR1, 109 .ptr1_reg = DMA3_PTR1,
110 .ptr2_reg = DMA3_PTR2, 110 .ptr2_reg = DMA3_PTR2,
111 .cnt1_reg = DMA3_CNT1, 111 .cnt1_reg = DMA3_CNT1,
@@ -596,7 +596,7 @@ void cx23885_reset(struct cx23885_dev *dev)
596 596
597 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH01 ], 188*4, 0); 597 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH01 ], 188*4, 0);
598 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH02 ], 128, 0); 598 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH02 ], 128, 0);
599 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH03 ], 128, 0); 599 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH03 ], 188*4, 0);
600 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH04 ], 128, 0); 600 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH04 ], 128, 0);
601 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH05 ], 128, 0); 601 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH05 ], 128, 0);
602 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH06 ], 188*4, 0); 602 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH06 ], 188*4, 0);
@@ -679,6 +679,39 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
679 atomic_inc(&dev->refcount); 679 atomic_inc(&dev->refcount);
680 680
681 dev->nr = cx23885_devcount++; 681 dev->nr = cx23885_devcount++;
682 sprintf(dev->name, "cx23885[%d]", dev->nr);
683
684 mutex_lock(&devlist);
685 list_add_tail(&dev->devlist, &cx23885_devlist);
686 mutex_unlock(&devlist);
687
688 /* Configure the internal memory */
689 if(dev->pci->device == 0x8880) {
690 dev->bridge = CX23885_BRIDGE_887;
691 dev->sram_channels = cx23887_sram_channels;
692 } else
693 if(dev->pci->device == 0x8852) {
694 dev->bridge = CX23885_BRIDGE_885;
695 dev->sram_channels = cx23885_sram_channels;
696 } else
697 BUG();
698
699 dprintk(1, "%s() Memory configured for PCIe bridge type %d\n",
700 __FUNCTION__, dev->bridge);
701
702 /* board config */
703 dev->board = UNSET;
704 if (card[dev->nr] < cx23885_bcount)
705 dev->board = card[dev->nr];
706 for (i = 0; UNSET == dev->board && i < cx23885_idcount; i++)
707 if (dev->pci->subsystem_vendor == cx23885_subids[i].subvendor &&
708 dev->pci->subsystem_device == cx23885_subids[i].subdevice)
709 dev->board = cx23885_subids[i].card;
710 if (UNSET == dev->board) {
711 dev->board = CX23885_BOARD_UNKNOWN;
712 cx23885_card_list(dev);
713 }
714
682 dev->pci_bus = dev->pci->bus->number; 715 dev->pci_bus = dev->pci->bus->number;
683 dev->pci_slot = PCI_SLOT(dev->pci->devfn); 716 dev->pci_slot = PCI_SLOT(dev->pci->devfn);
684 dev->pci_irqmask = 0x001f00; 717 dev->pci_irqmask = 0x001f00;
@@ -717,38 +750,13 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
717 spin_lock_init(&dev->ts2.slock); 750 spin_lock_init(&dev->ts2.slock);
718 dev->ts2.dev = dev; 751 dev->ts2.dev = dev;
719 dev->ts2.nr = 2; 752 dev->ts2.nr = 2;
720 dev->ts2.sram_chno = SRAM_CH06; 753
721 INIT_LIST_HEAD(&dev->ts2.mpegq.active); 754 INIT_LIST_HEAD(&dev->ts2.mpegq.active);
722 INIT_LIST_HEAD(&dev->ts2.mpegq.queued); 755 INIT_LIST_HEAD(&dev->ts2.mpegq.queued);
723 dev->ts2.mpegq.timeout.function = cx23885_timeout; 756 dev->ts2.mpegq.timeout.function = cx23885_timeout;
724 dev->ts2.mpegq.timeout.data = (unsigned long)&dev->ts2; 757 dev->ts2.mpegq.timeout.data = (unsigned long)&dev->ts2;
725 init_timer(&dev->ts2.mpegq.timeout); 758 init_timer(&dev->ts2.mpegq.timeout);
726 759
727 dev->ts2.reg_gpcnt = VID_C_GPCNT;
728 dev->ts2.reg_gpcnt_ctl = VID_C_GPCNT_CTL;
729 dev->ts2.reg_dma_ctl = VID_C_DMA_CTL;
730 dev->ts2.reg_lngth = VID_C_LNGTH;
731 dev->ts2.reg_hw_sop_ctrl = VID_C_HW_SOP_CTL;
732 dev->ts2.reg_gen_ctrl = VID_C_GEN_CTL;
733 dev->ts2.reg_bd_pkt_status = VID_C_BD_PKT_STATUS;
734 dev->ts2.reg_sop_status = VID_C_SOP_STATUS;
735 dev->ts2.reg_fifo_ovfl_stat = VID_C_FIFO_OVFL_STAT;
736 dev->ts2.reg_vld_misc = VID_C_VLD_MISC;
737 dev->ts2.reg_ts_clk_en = VID_C_TS_CLK_EN;
738 dev->ts2.reg_ts_int_msk = VID_C_INT_MSK;
739
740 // FIXME: Make this board specific
741 dev->ts2.pci_irqmask = 0x04; /* TS Port 2 bit */
742 dev->ts2.dma_ctl_val = 0x11; /* Enable RISC controller and Fifo */
743 dev->ts2.ts_int_msk_val = 0x1111; /* TS port bits for RISC */
744 dev->ts2.gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
745 dev->ts2.ts_clk_en_val = 0x1; /* Enable TS_CLK */
746
747 cx23885_risc_stopper(dev->pci, &dev->ts2.mpegq.stopper,
748 dev->ts2.reg_dma_ctl, dev->ts2.dma_ctl_val, 0x00);
749
750 sprintf(dev->name, "cx23885[%d]", dev->nr);
751
752 if (get_resources(dev) < 0) { 760 if (get_resources(dev) < 0) {
753 printk(KERN_ERR "CORE %s No more PCIe resources for " 761 printk(KERN_ERR "CORE %s No more PCIe resources for "
754 "subsystem: %04x:%04x\n", 762 "subsystem: %04x:%04x\n",
@@ -759,46 +767,18 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
759 goto fail_free; 767 goto fail_free;
760 } 768 }
761 769
762 mutex_lock(&devlist);
763 list_add_tail(&dev->devlist, &cx23885_devlist);
764 mutex_unlock(&devlist);
765
766 /* PCIe stuff */ 770 /* PCIe stuff */
767 dev->lmmio = ioremap(pci_resource_start(dev->pci,0), 771 dev->lmmio = ioremap(pci_resource_start(dev->pci,0),
768 pci_resource_len(dev->pci,0)); 772 pci_resource_len(dev->pci,0));
769 773
770 dev->bmmio = (u8 __iomem *)dev->lmmio; 774 dev->bmmio = (u8 __iomem *)dev->lmmio;
771 775
772 /* board config */
773 dev->board = UNSET;
774 if (card[dev->nr] < cx23885_bcount)
775 dev->board = card[dev->nr];
776 for (i = 0; UNSET == dev->board && i < cx23885_idcount; i++)
777 if (dev->pci->subsystem_vendor == cx23885_subids[i].subvendor &&
778 dev->pci->subsystem_device == cx23885_subids[i].subdevice)
779 dev->board = cx23885_subids[i].card;
780 if (UNSET == dev->board) {
781 dev->board = CX23885_BOARD_UNKNOWN;
782 cx23885_card_list(dev);
783 }
784 printk(KERN_INFO "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n", 776 printk(KERN_INFO "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
785 dev->name, dev->pci->subsystem_vendor, 777 dev->name, dev->pci->subsystem_vendor,
786 dev->pci->subsystem_device, cx23885_boards[dev->board].name, 778 dev->pci->subsystem_device, cx23885_boards[dev->board].name,
787 dev->board, card[dev->nr] == dev->board ? 779 dev->board, card[dev->nr] == dev->board ?
788 "insmod option" : "autodetected"); 780 "insmod option" : "autodetected");
789 781
790 /* Configure the internal memory */
791 if(dev->pci->device == 0x8880) {
792 dev->bridge = CX23885_BRIDGE_887;
793 dev->sram_channels = cx23887_sram_channels;
794 } else
795 if(dev->pci->device == 0x8852) {
796 dev->bridge = CX23885_BRIDGE_885;
797 dev->sram_channels = cx23885_sram_channels;
798 }
799 dprintk(1, "%s() Memory configured for PCIe bridge type %d\n",
800 __FUNCTION__, dev->bridge);
801
802 cx23885_pci_quirks(dev); 782 cx23885_pci_quirks(dev);
803 783
804 /* init hardware */ 784 /* init hardware */
@@ -812,6 +792,38 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
812 cx23885_card_setup(dev); 792 cx23885_card_setup(dev);
813 cx23885_ir_init(dev); 793 cx23885_ir_init(dev);
814 794
795 switch (dev->board) {
796 default:
797 dev->ts2.reg_gpcnt = VID_C_GPCNT;
798 dev->ts2.reg_gpcnt_ctl = VID_C_GPCNT_CTL;
799 dev->ts2.reg_dma_ctl = VID_C_DMA_CTL;
800 dev->ts2.reg_lngth = VID_C_LNGTH;
801 dev->ts2.reg_hw_sop_ctrl = VID_C_HW_SOP_CTL;
802 dev->ts2.reg_gen_ctrl = VID_C_GEN_CTL;
803 dev->ts2.reg_bd_pkt_status = VID_C_BD_PKT_STATUS;
804 dev->ts2.reg_sop_status = VID_C_SOP_STATUS;
805 dev->ts2.reg_fifo_ovfl_stat = VID_C_FIFO_OVFL_STAT;
806 dev->ts2.reg_vld_misc = VID_C_VLD_MISC;
807 dev->ts2.reg_ts_clk_en = VID_C_TS_CLK_EN;
808 dev->ts2.reg_ts_int_msk = VID_C_INT_MSK;
809 dev->ts2.reg_src_sel = 0;
810
811 // FIXME: Make this board specific
812 dev->ts2.pci_irqmask = 0x04; /* TS Port 2 bit */
813 dev->ts2.dma_ctl_val = 0x11; /* Enable RISC controller and Fifo */
814 dev->ts2.ts_int_msk_val = 0x1111; /* TS port bits for RISC */
815 dev->ts2.gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
816 dev->ts2.ts_clk_en_val = 0x1; /* Enable TS_CLK */
817 dev->ts2.src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
818
819 // Drive this from cards.c (portb/c) and move it outside of this switch
820 dev->ts2.sram_chno = SRAM_CH06;
821 }
822
823 cx23885_risc_stopper(dev->pci, &dev->ts2.mpegq.stopper,
824 dev->ts2.reg_dma_ctl, dev->ts2.dma_ctl_val, 0x00);
825
826 // FIXME: This should only be called if ts2 is being used, driven by cards.c
815 if (cx23885_dvb_register(&dev->ts2) < 0) { 827 if (cx23885_dvb_register(&dev->ts2) < 0) {
816 printk(KERN_ERR "%s() Failed to register dvb adapters\n", 828 printk(KERN_ERR "%s() Failed to register dvb adapters\n",
817 __FUNCTION__); 829 __FUNCTION__);
@@ -1026,13 +1038,17 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
1026 1038
1027 udelay(100); 1039 udelay(100);
1028 1040
1041 /* If the port supports SRC SELECT, configure it */
1042 if(port->reg_src_sel)
1043 cx_write(port->reg_src_sel, port->src_sel_val);
1044
1029 cx_write(port->reg_hw_sop_ctrl, 0x47 << 16 | 188 << 4); 1045 cx_write(port->reg_hw_sop_ctrl, 0x47 << 16 | 188 << 4);
1030 cx_write(port->reg_ts_clk_en, port->ts_clk_en_val); 1046 cx_write(port->reg_ts_clk_en, port->ts_clk_en_val);
1031 cx_write(port->reg_vld_misc, 0x00); 1047 cx_write(port->reg_vld_misc, 0x00);
1032
1033 cx_write(port->reg_gen_ctrl, port->gen_ctrl_val); 1048 cx_write(port->reg_gen_ctrl, port->gen_ctrl_val);
1034 udelay(100); 1049 udelay(100);
1035 1050
1051 // NOTE: this is 2 (reserved) for portb, does it matter?
1036 /* reset counter to zero */ 1052 /* reset counter to zero */
1037 cx_write(port->reg_gpcnt_ctl, 3); 1053 cx_write(port->reg_gpcnt_ctl, 3);
1038 q->count = 1; 1054 q->count = 1;
@@ -1047,7 +1063,7 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
1047 cx_set(PCI_INT_MSK, dev->pci_irqmask | port->pci_irqmask); 1063 cx_set(PCI_INT_MSK, dev->pci_irqmask | port->pci_irqmask);
1048 break; 1064 break;
1049 default: 1065 default:
1050 printk(KERN_ERR "%s() error, default case", __FUNCTION__ ); 1066 BUG();
1051 } 1067 }
1052 1068
1053 cx_set(DEV_CNTRL2, (1<<5)); /* Enable RISC controller */ 1069 cx_set(DEV_CNTRL2, (1<<5)); /* Enable RISC controller */
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h
index e44698a6bede..62b44f6d749f 100644
--- a/drivers/media/video/cx23885/cx23885.h
+++ b/drivers/media/video/cx23885/cx23885.h
@@ -68,6 +68,11 @@ enum cx23885_itype {
68 CX23885_RADIO, 68 CX23885_RADIO,
69}; 69};
70 70
71enum cx23885_src_sel_type {
72 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
73 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
74};
75
71/* buffer for one video frame */ 76/* buffer for one video frame */
72struct cx23885_buffer { 77struct cx23885_buffer {
73 /* common v4l buffer stuff -- must be first */ 78 /* common v4l buffer stuff -- must be first */
@@ -162,6 +167,7 @@ struct cx23885_tsport {
162 u32 reg_vld_misc; 167 u32 reg_vld_misc;
163 u32 reg_ts_clk_en; 168 u32 reg_ts_clk_en;
164 u32 reg_ts_int_msk; 169 u32 reg_ts_int_msk;
170 u32 reg_src_sel;
165 171
166 /* Default register vals */ 172 /* Default register vals */
167 int pci_irqmask; 173 int pci_irqmask;
@@ -169,6 +175,7 @@ struct cx23885_tsport {
169 u32 ts_int_msk_val; 175 u32 ts_int_msk_val;
170 u32 gen_ctrl_val; 176 u32 gen_ctrl_val;
171 u32 ts_clk_en_val; 177 u32 ts_clk_en_val;
178 u32 src_sel_val;
172}; 179};
173 180
174struct cx23885_dev { 181struct cx23885_dev {