diff options
author | Andy Walls <awalls@md.metrocast.net> | 2010-07-31 22:28:37 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-08-08 22:42:56 -0400 |
commit | 2560d94e330f35776e944b54256a526a19259429 (patch) | |
tree | fb58a396664cf4b7e04566704d67e3df1a398144 /drivers/media/video/cx23885/cx23888-ir.c | |
parent | ceb152add687db152d90ba64b54687b3975963cf (diff) |
V4L/DVB: cx23885, cx25840: Report the actual length of an IR Rx timeout event
Instead of reporting an IR Rx timeout event as a ridiculously
long space, report it as a space of the lenght of the timeout.
This partially fixes operation with LIRC without breaking
interoperation with the in kernel decoders. The gaps lengths
reported to LIRC are still not real however.
Signed-off-by: Andy Walls <awalls@md.metrocast.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/cx23885/cx23888-ir.c')
-rw-r--r-- | drivers/media/video/cx23885/cx23888-ir.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/media/video/cx23885/cx23888-ir.c b/drivers/media/video/cx23885/cx23888-ir.c index aa07286b8d9b..684d23db98a7 100644 --- a/drivers/media/video/cx23885/cx23888-ir.c +++ b/drivers/media/video/cx23885/cx23888-ir.c | |||
@@ -675,16 +675,18 @@ static int cx23888_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count, | |||
675 | *num = n * sizeof(u32); | 675 | *num = n * sizeof(u32); |
676 | 676 | ||
677 | for (p = (u32 *) buf, i = 0; i < n; p++, i++) { | 677 | for (p = (u32 *) buf, i = 0; i < n; p++, i++) { |
678 | |||
678 | if ((*p & FIFO_RXTX_RTO) == FIFO_RXTX_RTO) { | 679 | if ((*p & FIFO_RXTX_RTO) == FIFO_RXTX_RTO) { |
679 | *p = V4L2_SUBDEV_IR_PULSE_RX_SEQ_END; | 680 | /* Assume RTO was because of no IR light input */ |
681 | u = 0; | ||
680 | v4l2_dbg(2, ir_888_debug, sd, "rx read: end of rx\n"); | 682 | v4l2_dbg(2, ir_888_debug, sd, "rx read: end of rx\n"); |
681 | continue; | 683 | } else { |
684 | u = (*p & FIFO_RXTX_LVL) | ||
685 | ? V4L2_SUBDEV_IR_PULSE_LEVEL_MASK : 0; | ||
686 | if (invert) | ||
687 | u = u ? 0 : V4L2_SUBDEV_IR_PULSE_LEVEL_MASK; | ||
682 | } | 688 | } |
683 | 689 | ||
684 | u = (*p & FIFO_RXTX_LVL) ? V4L2_SUBDEV_IR_PULSE_LEVEL_MASK : 0; | ||
685 | if (invert) | ||
686 | u = u ? 0 : V4L2_SUBDEV_IR_PULSE_LEVEL_MASK; | ||
687 | |||
688 | v = (u32) pulse_width_count_to_ns((u16) (*p & FIFO_RXTX), | 690 | v = (u32) pulse_width_count_to_ns((u16) (*p & FIFO_RXTX), |
689 | divider); | 691 | divider); |
690 | if (v >= V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS) | 692 | if (v >= V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS) |