diff options
author | Andy Walls <awalls@radix.net> | 2008-08-30 15:03:44 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2008-10-12 07:36:58 -0400 |
commit | b1526421eac9a912b2cda7e147f1da2aa31be278 (patch) | |
tree | 5c21474d865bd43dc00514f0a55a84bdf05ba440 /drivers/media/video/cx18/cx18-av-core.c | |
parent | 4519064c1c7ccdd319d26181bdd12ee2df6e336e (diff) |
V4L/DVB (8913): cx18: Create cx18_ specific wrappers for all pci mmio accessesors.
cx18: Create cx18_ specific wrappers for all pci mmio accessesors. This is a
first step in instrumenting all CX23418 PCI bus IO, to debug problems with
accessing the CX23418's PCI memory mapped IO.
Signed-off-by: Andy Walls <awalls@radix.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/cx18/cx18-av-core.c')
-rw-r--r-- | drivers/media/video/cx18/cx18-av-core.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/media/video/cx18/cx18-av-core.c b/drivers/media/video/cx18/cx18-av-core.c index 3b0a2c450605..d8626e354651 100644 --- a/drivers/media/video/cx18/cx18-av-core.c +++ b/drivers/media/video/cx18/cx18-av-core.c | |||
@@ -22,27 +22,29 @@ | |||
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include "cx18-driver.h" | 24 | #include "cx18-driver.h" |
25 | #include "cx18-io.h" | ||
25 | 26 | ||
26 | int cx18_av_write(struct cx18 *cx, u16 addr, u8 value) | 27 | int cx18_av_write(struct cx18 *cx, u16 addr, u8 value) |
27 | { | 28 | { |
28 | u32 x = readl(cx->reg_mem + 0xc40000 + (addr & ~3)); | 29 | u32 reg = 0xc40000 + (addr & ~3); |
29 | u32 mask = 0xff; | 30 | u32 mask = 0xff; |
30 | int shift = (addr & 3) * 8; | 31 | int shift = (addr & 3) * 8; |
32 | u32 x = cx18_read_reg(cx, reg); | ||
31 | 33 | ||
32 | x = (x & ~(mask << shift)) | ((u32)value << shift); | 34 | x = (x & ~(mask << shift)) | ((u32)value << shift); |
33 | writel(x, cx->reg_mem + 0xc40000 + (addr & ~3)); | 35 | cx18_write_reg(cx, x, reg); |
34 | return 0; | 36 | return 0; |
35 | } | 37 | } |
36 | 38 | ||
37 | int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value) | 39 | int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value) |
38 | { | 40 | { |
39 | writel(value, cx->reg_mem + 0xc40000 + addr); | 41 | cx18_write_reg(cx, value, 0xc40000 + addr); |
40 | return 0; | 42 | return 0; |
41 | } | 43 | } |
42 | 44 | ||
43 | u8 cx18_av_read(struct cx18 *cx, u16 addr) | 45 | u8 cx18_av_read(struct cx18 *cx, u16 addr) |
44 | { | 46 | { |
45 | u32 x = readl(cx->reg_mem + 0xc40000 + (addr & ~3)); | 47 | u32 x = cx18_read_reg(cx, 0xc40000 + (addr & ~3)); |
46 | int shift = (addr & 3) * 8; | 48 | int shift = (addr & 3) * 8; |
47 | 49 | ||
48 | return (x >> shift) & 0xff; | 50 | return (x >> shift) & 0xff; |
@@ -50,7 +52,7 @@ u8 cx18_av_read(struct cx18 *cx, u16 addr) | |||
50 | 52 | ||
51 | u32 cx18_av_read4(struct cx18 *cx, u16 addr) | 53 | u32 cx18_av_read4(struct cx18 *cx, u16 addr) |
52 | { | 54 | { |
53 | return readl(cx->reg_mem + 0xc40000 + addr); | 55 | return cx18_read_reg(cx, 0xc40000 + addr); |
54 | } | 56 | } |
55 | 57 | ||
56 | int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask, | 58 | int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask, |