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authorHans Verkuil <hans.verkuil@cisco.com>2014-09-20 06:36:38 -0400
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2014-09-21 19:40:33 -0400
commitc166845c9c452e9639a2e8b44581ce95942e89a5 (patch)
treeea6c4c9102317a2ab293b0a449e460f89dffd117 /drivers/media/v4l2-core
parent62f28725a8dc5c16d3d63606f046899ae41fcf4a (diff)
[media] v4l2-dv-timings: only check standards if non-zero
If one or both of the timings being compared have the standards field with value 0, then accept that. Only check for matching standards if both timings have actually filled in that field. Otherwise no match will ever be found since when timings are detected the standards field will typically be set to 0 by the driver. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/media/v4l2-core')
-rw-r--r--drivers/media/v4l2-core/v4l2-dv-timings.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c b/drivers/media/v4l2-core/v4l2-dv-timings.c
index ce1c9f5d9dee..b1d8dbb39665 100644
--- a/drivers/media/v4l2-core/v4l2-dv-timings.c
+++ b/drivers/media/v4l2-core/v4l2-dv-timings.c
@@ -164,7 +164,8 @@ bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
164 bt->width > cap->max_width || 164 bt->width > cap->max_width ||
165 bt->pixelclock < cap->min_pixelclock || 165 bt->pixelclock < cap->min_pixelclock ||
166 bt->pixelclock > cap->max_pixelclock || 166 bt->pixelclock > cap->max_pixelclock ||
167 (cap->standards && !(bt->standards & cap->standards)) || 167 (cap->standards && bt->standards &&
168 !(bt->standards & cap->standards)) ||
168 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) || 169 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) ||
169 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE))) 170 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE)))
170 return false; 171 return false;