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authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>2012-11-10 06:06:25 -0500
committerLaurent Pinchart <laurent.pinchart@ideasonboard.com>2013-01-22 18:44:04 -0500
commit6d1aa02f10497b138e01ebe6eafabd6071729334 (patch)
treea8e7b7eb6284c2099afb58132416d59634eff658 /drivers/media/platform/omap3isp
parent7b2e1277598e4187c9be3e61fd9b0f0423f97986 (diff)
omap3isp: Set cam_mclk rate directly
Now that the cam_mclk rate changes are back-propagated to dpll4_m5_ck we can set the cam_mclk rate directly instead of manually setting the rate of the parent clock. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Sakari Ailus <sakari.ailus@iki.fi> Tested-by: Sakari Ailus <sakari.ailus@iki.fi>
Diffstat (limited to 'drivers/media/platform/omap3isp')
-rw-r--r--drivers/media/platform/omap3isp/isp.c18
-rw-r--r--drivers/media/platform/omap3isp/isp.h8
2 files changed, 5 insertions, 21 deletions
diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
index e4aaee91201d..e7f5da0296f0 100644
--- a/drivers/media/platform/omap3isp/isp.c
+++ b/drivers/media/platform/omap3isp/isp.c
@@ -1338,28 +1338,15 @@ static int isp_enable_clocks(struct isp_device *isp)
1338{ 1338{
1339 int r; 1339 int r;
1340 unsigned long rate; 1340 unsigned long rate;
1341 int divisor;
1342
1343 /*
1344 * cam_mclk clock chain:
1345 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1346 *
1347 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1348 * set to the same value. Hence the rate set for dpll4_m5
1349 * has to be twice of what is set on OMAP3430 to get
1350 * the required value for cam_mclk
1351 */
1352 divisor = isp->revision == ISP_REVISION_15_0 ? 1 : 2;
1353 1341
1354 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]); 1342 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1355 if (r) { 1343 if (r) {
1356 dev_err(isp->dev, "failed to enable cam_ick clock\n"); 1344 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1357 goto out_clk_enable_ick; 1345 goto out_clk_enable_ick;
1358 } 1346 }
1359 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK], 1347 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1360 CM_CAM_MCLK_HZ/divisor);
1361 if (r) { 1348 if (r) {
1362 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n"); 1349 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1363 goto out_clk_enable_mclk; 1350 goto out_clk_enable_mclk;
1364 } 1351 }
1365 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]); 1352 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
@@ -1401,7 +1388,6 @@ static void isp_disable_clocks(struct isp_device *isp)
1401static const char *isp_clocks[] = { 1388static const char *isp_clocks[] = {
1402 "cam_ick", 1389 "cam_ick",
1403 "cam_mclk", 1390 "cam_mclk",
1404 "dpll4_m5_ck",
1405 "csi2_96m_fck", 1391 "csi2_96m_fck",
1406 "l3_ick", 1392 "l3_ick",
1407}; 1393};
diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h
index 517d348ce32b..c77e1f2ae5ca 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -147,7 +147,6 @@ struct isp_platform_callback {
147 * @ref_count: Reference count for handling multiple ISP requests. 147 * @ref_count: Reference count for handling multiple ISP requests.
148 * @cam_ick: Pointer to camera interface clock structure. 148 * @cam_ick: Pointer to camera interface clock structure.
149 * @cam_mclk: Pointer to camera functional clock structure. 149 * @cam_mclk: Pointer to camera functional clock structure.
150 * @dpll4_m5_ck: Pointer to DPLL4 M5 clock structure.
151 * @csi2_fck: Pointer to camera CSI2 complexIO clock structure. 150 * @csi2_fck: Pointer to camera CSI2 complexIO clock structure.
152 * @l3_ick: Pointer to OMAP3 L3 bus interface clock. 151 * @l3_ick: Pointer to OMAP3 L3 bus interface clock.
153 * @irq: Currently attached ISP ISR callbacks information structure. 152 * @irq: Currently attached ISP ISR callbacks information structure.
@@ -189,10 +188,9 @@ struct isp_device {
189 u32 xclk_divisor[2]; /* Two clocks, a and b. */ 188 u32 xclk_divisor[2]; /* Two clocks, a and b. */
190#define ISP_CLK_CAM_ICK 0 189#define ISP_CLK_CAM_ICK 0
191#define ISP_CLK_CAM_MCLK 1 190#define ISP_CLK_CAM_MCLK 1
192#define ISP_CLK_DPLL4_M5_CK 2 191#define ISP_CLK_CSI2_FCK 2
193#define ISP_CLK_CSI2_FCK 3 192#define ISP_CLK_L3_ICK 3
194#define ISP_CLK_L3_ICK 4 193 struct clk *clock[4];
195 struct clk *clock[5];
196 194
197 /* ISP modules */ 195 /* ISP modules */
198 struct ispstat isp_af; 196 struct ispstat isp_af;