diff options
author | Sakari Ailus <sakari.ailus@iki.fi> | 2012-10-14 06:31:49 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-11-28 07:39:40 -0500 |
commit | ec51e960bc355c5ebf7501f1e74723d5d4f4212d (patch) | |
tree | abb60905acd94c5a477e4b57b4d862ac581f728e /drivers/media/platform/omap3isp/ispreg.h | |
parent | c19d19ebd200ad1f982159519017129a5ed6515e (diff) |
[media] omap3isp: Add PHY routing configuration
Add PHY routing configuration for both 3430 and 3630. Also add register bit
definitions of CSIRXFE and CAMERA_PHY_CTRL registers on OMAP 3430 and 3630,
respectively.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/platform/omap3isp/ispreg.h')
-rw-r--r-- | drivers/media/platform/omap3isp/ispreg.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/media/platform/omap3isp/ispreg.h b/drivers/media/platform/omap3isp/ispreg.h index fd13d8bb63e2..b7d90e6fb01d 100644 --- a/drivers/media/platform/omap3isp/ispreg.h +++ b/drivers/media/platform/omap3isp/ispreg.h | |||
@@ -1506,4 +1506,26 @@ | |||
1506 | #define ISPCSIPHY_REG2_CCP2_SYNC_PATTERN_MASK \ | 1506 | #define ISPCSIPHY_REG2_CCP2_SYNC_PATTERN_MASK \ |
1507 | (0x7fffff << ISPCSIPHY_REG2_CCP2_SYNC_PATTERN_SHIFT) | 1507 | (0x7fffff << ISPCSIPHY_REG2_CCP2_SYNC_PATTERN_SHIFT) |
1508 | 1508 | ||
1509 | /* ----------------------------------------------------------------------------- | ||
1510 | * CONTROL registers for CSI-2 phy routing | ||
1511 | */ | ||
1512 | |||
1513 | /* OMAP343X_CONTROL_CSIRXFE */ | ||
1514 | #define OMAP343X_CONTROL_CSIRXFE_CSIB_INV (1 << 7) | ||
1515 | #define OMAP343X_CONTROL_CSIRXFE_RESENABLE (1 << 8) | ||
1516 | #define OMAP343X_CONTROL_CSIRXFE_SELFORM (1 << 10) | ||
1517 | #define OMAP343X_CONTROL_CSIRXFE_PWRDNZ (1 << 12) | ||
1518 | #define OMAP343X_CONTROL_CSIRXFE_RESET (1 << 13) | ||
1519 | |||
1520 | /* OMAP3630_CONTROL_CAMERA_PHY_CTRL */ | ||
1521 | #define OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY1_SHIFT 2 | ||
1522 | #define OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY2_SHIFT 0 | ||
1523 | #define OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_DPHY 0x0 | ||
1524 | #define OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_CCP2_DATA_STROBE 0x1 | ||
1525 | #define OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_CCP2_DATA_CLOCK 0x2 | ||
1526 | #define OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_GPI 0x3 | ||
1527 | #define OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_MASK 0x3 | ||
1528 | /* CCP2B: set to receive data from PHY2 instead of PHY1 */ | ||
1529 | #define OMAP3630_CONTROL_CAMERA_PHY_CTRL_CSI1_RX_SEL_PHY2 (1 << 4) | ||
1530 | |||
1509 | #endif /* OMAP3_ISP_REG_H */ | 1531 | #endif /* OMAP3_ISP_REG_H */ |