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authorSakari Ailus <sakari.ailus@iki.fi>2012-10-20 09:35:25 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-10-29 07:50:29 -0400
commitf5984bbdf402b586581bc292a5449f17ce4b8209 (patch)
treeaa3ef8e90887b8955ca43df9205a5ede55832438 /drivers/media/i2c/smiapp-pll.h
parent1e9240b35264fa0280abc4487b47b28eecf10b52 (diff)
[media] smiapp-pll: Parallel bus support
Support sensors with parallel interface. Make smiapp_pll.flags also 8-bit so it fits nicely into two 32-bit words with the other 8-bit fields. Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/i2c/smiapp-pll.h')
-rw-r--r--drivers/media/i2c/smiapp-pll.h26
1 files changed, 20 insertions, 6 deletions
diff --git a/drivers/media/i2c/smiapp-pll.h b/drivers/media/i2c/smiapp-pll.h
index cb2d2db5d02d..439fe5d665b0 100644
--- a/drivers/media/i2c/smiapp-pll.h
+++ b/drivers/media/i2c/smiapp-pll.h
@@ -27,16 +27,34 @@
27 27
28#include <linux/device.h> 28#include <linux/device.h>
29 29
30/* CSI-2 or CCP-2 */
31#define SMIAPP_PLL_BUS_TYPE_CSI2 0x00
32#define SMIAPP_PLL_BUS_TYPE_PARALLEL 0x01
33
34/* op pix clock is for all lanes in total normally */
35#define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0)
36#define SMIAPP_PLL_FLAG_NO_OP_CLOCKS (1 << 1)
37
30struct smiapp_pll { 38struct smiapp_pll {
31 uint8_t lanes; 39 /* input values */
40 uint8_t bus_type;
41 union {
42 struct {
43 uint8_t lanes;
44 } csi2;
45 struct {
46 uint8_t bus_width;
47 } parallel;
48 };
49 uint8_t flags;
32 uint8_t binning_horizontal; 50 uint8_t binning_horizontal;
33 uint8_t binning_vertical; 51 uint8_t binning_vertical;
34 uint8_t scale_m; 52 uint8_t scale_m;
35 uint8_t scale_n; 53 uint8_t scale_n;
36 uint8_t bits_per_pixel; 54 uint8_t bits_per_pixel;
37 uint16_t flags;
38 uint32_t link_freq; 55 uint32_t link_freq;
39 56
57 /* output values */
40 uint16_t pre_pll_clk_div; 58 uint16_t pre_pll_clk_div;
41 uint16_t pll_multiplier; 59 uint16_t pll_multiplier;
42 uint16_t op_sys_clk_div; 60 uint16_t op_sys_clk_div;
@@ -91,10 +109,6 @@ struct smiapp_pll_limits {
91 uint32_t min_line_length_pck; 109 uint32_t min_line_length_pck;
92}; 110};
93 111
94/* op pix clock is for all lanes in total normally */
95#define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0)
96#define SMIAPP_PLL_FLAG_NO_OP_CLOCKS (1 << 1)
97
98struct device; 112struct device;
99 113
100int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits, 114int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,