aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/dvb
diff options
context:
space:
mode:
authorOliver Endriss <o.endriss@gmx.de>2011-07-03 12:37:31 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2011-07-27 16:55:40 -0400
commit0fe4462930bfe09574494cae04fb029c504f3541 (patch)
tree3979efbd9bcf72d8319efb12c50caf80bdbef3e5 /drivers/media/dvb
parente8783950f8a3a240c81c0d8d3becbda4b56c1794 (diff)
[media] tda18271c2dd: Lots of coding-style fixes
Signed-off-by: Oliver Endriss <o.endriss@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb')
-rw-r--r--drivers/media/dvb/frontends/tda18271c2dd.c727
-rw-r--r--drivers/media/dvb/frontends/tda18271c2dd_maps.h1534
2 files changed, 1118 insertions, 1143 deletions
diff --git a/drivers/media/dvb/frontends/tda18271c2dd.c b/drivers/media/dvb/frontends/tda18271c2dd.c
index b4a23bf00104..a8afc2212728 100644
--- a/drivers/media/dvb/frontends/tda18271c2dd.c
+++ b/drivers/media/dvb/frontends/tda18271c2dd.c
@@ -64,8 +64,7 @@ struct SRFBandMap {
64 u32 m_RF3_Default; 64 u32 m_RF3_Default;
65}; 65};
66 66
67enum ERegister 67enum ERegister {
68{
69 ID = 0, 68 ID = 0,
70 TM, 69 TM,
71 PL, 70 PL,
@@ -115,13 +114,13 @@ struct tda_state {
115}; 114};
116 115
117static int PowerScan(struct tda_state *state, 116static int PowerScan(struct tda_state *state,
118 u8 RFBand,u32 RF_in, 117 u8 RFBand, u32 RF_in,
119 u32 * pRF_Out, bool *pbcal); 118 u32 *pRF_Out, bool *pbcal);
120 119
121static int i2c_readn(struct i2c_adapter *adapter, u8 adr, u8 *data, int len) 120static int i2c_readn(struct i2c_adapter *adapter, u8 adr, u8 *data, int len)
122{ 121{
123 struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD, 122 struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD,
124 .buf = data, .len = len}}; 123 .buf = data, .len = len} };
125 return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1; 124 return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
126} 125}
127 126
@@ -131,7 +130,7 @@ static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len)
131 .buf = data, .len = len}; 130 .buf = data, .len = len};
132 131
133 if (i2c_transfer(adap, &msg, 1) != 1) { 132 if (i2c_transfer(adap, &msg, 1) != 1) {
134 printk("i2c_write error\n"); 133 printk(KERN_ERR "i2c_write error\n");
135 return -1; 134 return -1;
136 } 135 }
137 return 0; 136 return 0;
@@ -147,7 +146,7 @@ static int WriteRegs(struct tda_state *state,
147 return i2c_write(state->i2c, state->adr, data, nRegs+1); 146 return i2c_write(state->i2c, state->adr, data, nRegs+1);
148} 147}
149 148
150static int WriteReg(struct tda_state *state, u8 SubAddr,u8 Reg) 149static int WriteReg(struct tda_state *state, u8 SubAddr, u8 Reg)
151{ 150{
152 u8 msg[2] = {SubAddr, Reg}; 151 u8 msg[2] = {SubAddr, Reg};
153 152
@@ -164,14 +163,14 @@ static int ReadExtented(struct tda_state *state, u8 * Regs)
164 return i2c_readn(state->i2c, state->adr, Regs, NUM_REGS); 163 return i2c_readn(state->i2c, state->adr, Regs, NUM_REGS);
165} 164}
166 165
167static int UpdateRegs(struct tda_state *state, u8 RegFrom,u8 RegTo) 166static int UpdateRegs(struct tda_state *state, u8 RegFrom, u8 RegTo)
168{ 167{
169 return WriteRegs(state, RegFrom, 168 return WriteRegs(state, RegFrom,
170 &state->m_Regs[RegFrom], RegTo-RegFrom+1); 169 &state->m_Regs[RegFrom], RegTo-RegFrom+1);
171} 170}
172static int UpdateReg(struct tda_state *state, u8 Reg) 171static int UpdateReg(struct tda_state *state, u8 Reg)
173{ 172{
174 return WriteReg(state, Reg,state->m_Regs[Reg]); 173 return WriteReg(state, Reg, state->m_Regs[Reg]);
175} 174}
176 175
177#include "tda18271c2dd_maps.h" 176#include "tda18271c2dd_maps.h"
@@ -186,7 +185,7 @@ static void reset(struct tda_state *state)
186 u32 ulIFLevelDVBC = 7; 185 u32 ulIFLevelDVBC = 7;
187 u32 ulIFLevelDVBT = 6; 186 u32 ulIFLevelDVBT = 6;
188 u32 ulXTOut = 0; 187 u32 ulXTOut = 0;
189 u32 ulStandbyMode = 0x06; // Send in stdb, but leave osc on 188 u32 ulStandbyMode = 0x06; /* Send in stdb, but leave osc on */
190 u32 ulSlave = 0; 189 u32 ulSlave = 0;
191 u32 ulFMInput = 0; 190 u32 ulFMInput = 0;
192 u32 ulSettlingTime = 100; 191 u32 ulSettlingTime = 100;
@@ -199,7 +198,8 @@ static void reset(struct tda_state *state)
199 state->m_IFLevelDVBT = (ulIFLevelDVBT & 0x07) << 2; 198 state->m_IFLevelDVBT = (ulIFLevelDVBT & 0x07) << 2;
200 199
201 state->m_EP4 = 0x20; 200 state->m_EP4 = 0x20;
202 if( ulXTOut != 0 ) state->m_EP4 |= 0x40; 201 if (ulXTOut != 0)
202 state->m_EP4 |= 0x40;
203 203
204 state->m_EP3_Standby = ((ulStandbyMode & 0x07) << 5) | 0x0F; 204 state->m_EP3_Standby = ((ulStandbyMode & 0x07) << 5) | 0x0F;
205 state->m_bMaster = (ulSlave == 0); 205 state->m_bMaster = (ulSlave == 0);
@@ -214,7 +214,7 @@ static bool SearchMap1(struct SMap Map[],
214{ 214{
215 int i = 0; 215 int i = 0;
216 216
217 while ((Map[i].m_Frequency != 0) && (Frequency > Map[i].m_Frequency) ) 217 while ((Map[i].m_Frequency != 0) && (Frequency > Map[i].m_Frequency))
218 i += 1; 218 i += 1;
219 if (Map[i].m_Frequency == 0) 219 if (Map[i].m_Frequency == 0)
220 return false; 220 return false;
@@ -228,7 +228,7 @@ static bool SearchMap2(struct SMapI Map[],
228 int i = 0; 228 int i = 0;
229 229
230 while ((Map[i].m_Frequency != 0) && 230 while ((Map[i].m_Frequency != 0) &&
231 (Frequency > Map[i].m_Frequency) ) 231 (Frequency > Map[i].m_Frequency))
232 i += 1; 232 i += 1;
233 if (Map[i].m_Frequency == 0) 233 if (Map[i].m_Frequency == 0)
234 return false; 234 return false;
@@ -236,13 +236,13 @@ static bool SearchMap2(struct SMapI Map[],
236 return true; 236 return true;
237} 237}
238 238
239static bool SearchMap3(struct SMap2 Map[],u32 Frequency, 239static bool SearchMap3(struct SMap2 Map[], u32 Frequency,
240 u8 *pParam1, u8 *pParam2) 240 u8 *pParam1, u8 *pParam2)
241{ 241{
242 int i = 0; 242 int i = 0;
243 243
244 while ((Map[i].m_Frequency != 0) && 244 while ((Map[i].m_Frequency != 0) &&
245 (Frequency > Map[i].m_Frequency) ) 245 (Frequency > Map[i].m_Frequency))
246 i += 1; 246 i += 1;
247 if (Map[i].m_Frequency == 0) 247 if (Map[i].m_Frequency == 0)
248 return false; 248 return false;
@@ -271,22 +271,23 @@ static int ThermometerRead(struct tda_state *state, u8 *pTM_Value)
271 do { 271 do {
272 u8 Regs[16]; 272 u8 Regs[16];
273 state->m_Regs[TM] |= 0x10; 273 state->m_Regs[TM] |= 0x10;
274 CHK_ERROR(UpdateReg(state,TM)); 274 CHK_ERROR(UpdateReg(state, TM));
275 CHK_ERROR(Read(state,Regs)); 275 CHK_ERROR(Read(state, Regs));
276 if( ( (Regs[TM] & 0x0F) == 0 && (Regs[TM] & 0x20) == 0x20 ) || 276 if (((Regs[TM] & 0x0F) == 0 && (Regs[TM] & 0x20) == 0x20) ||
277 ( (Regs[TM] & 0x0F) == 8 && (Regs[TM] & 0x20) == 0x00 ) ) { 277 ((Regs[TM] & 0x0F) == 8 && (Regs[TM] & 0x20) == 0x00)) {
278 state->m_Regs[TM] ^= 0x20; 278 state->m_Regs[TM] ^= 0x20;
279 CHK_ERROR(UpdateReg(state,TM)); 279 CHK_ERROR(UpdateReg(state, TM));
280 msleep(10); 280 msleep(10);
281 CHK_ERROR(Read(state,Regs)); 281 CHK_ERROR(Read(state, Regs));
282 } 282 }
283 *pTM_Value = (Regs[TM] & 0x20 ) ? m_Thermometer_Map_2[Regs[TM] & 0x0F] : 283 *pTM_Value = (Regs[TM] & 0x20)
284 m_Thermometer_Map_1[Regs[TM] & 0x0F] ; 284 ? m_Thermometer_Map_2[Regs[TM] & 0x0F]
285 state->m_Regs[TM] &= ~0x10; // Thermometer off 285 : m_Thermometer_Map_1[Regs[TM] & 0x0F] ;
286 CHK_ERROR(UpdateReg(state,TM)); 286 state->m_Regs[TM] &= ~0x10; /* Thermometer off */
287 state->m_Regs[EP4] &= ~0x03; // CAL_mode = 0 ????????? 287 CHK_ERROR(UpdateReg(state, TM));
288 CHK_ERROR(UpdateReg(state,EP4)); 288 state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 ????????? */
289 } while(0); 289 CHK_ERROR(UpdateReg(state, EP4));
290 } while (0);
290 291
291 return status; 292 return status;
292} 293}
@@ -295,16 +296,16 @@ static int StandBy(struct tda_state *state)
295{ 296{
296 int status = 0; 297 int status = 0;
297 do { 298 do {
298 state->m_Regs[EB12] &= ~0x20; // PD_AGC1_Det = 0 299 state->m_Regs[EB12] &= ~0x20; /* PD_AGC1_Det = 0 */
299 CHK_ERROR(UpdateReg(state,EB12)); 300 CHK_ERROR(UpdateReg(state, EB12));
300 state->m_Regs[EB18] &= ~0x83; // AGC1_loop_off = 0, AGC1_Gain = 6 dB 301 state->m_Regs[EB18] &= ~0x83; /* AGC1_loop_off = 0, AGC1_Gain = 6 dB */
301 CHK_ERROR(UpdateReg(state,EB18)); 302 CHK_ERROR(UpdateReg(state, EB18));
302 state->m_Regs[EB21] |= 0x03; // AGC2_Gain = -6 dB 303 state->m_Regs[EB21] |= 0x03; /* AGC2_Gain = -6 dB */
303 state->m_Regs[EP3] = state->m_EP3_Standby; 304 state->m_Regs[EP3] = state->m_EP3_Standby;
304 CHK_ERROR(UpdateReg(state,EP3)); 305 CHK_ERROR(UpdateReg(state, EP3));
305 state->m_Regs[EB23] &= ~0x06; // ForceLP_Fc2_En = 0, LP_Fc[2] = 0 306 state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LP_Fc[2] = 0 */
306 CHK_ERROR(UpdateRegs(state,EB21,EB23)); 307 CHK_ERROR(UpdateRegs(state, EB21, EB23));
307 } while(0); 308 } while (0);
308 return status; 309 return status;
309} 310}
310 311
@@ -316,9 +317,8 @@ static int CalcMainPLL(struct tda_state *state, u32 freq)
316 u64 OscFreq; 317 u64 OscFreq;
317 u32 MainDiv; 318 u32 MainDiv;
318 319
319 if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div)) { 320 if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div))
320 return -EINVAL; 321 return -EINVAL;
321 }
322 322
323 OscFreq = (u64) freq * (u64) Div; 323 OscFreq = (u64) freq * (u64) Div;
324 OscFreq *= (u64) 16384; 324 OscFreq *= (u64) 16384;
@@ -328,133 +328,122 @@ static int CalcMainPLL(struct tda_state *state, u32 freq)
328 state->m_Regs[MPD] = PostDiv & 0x77; 328 state->m_Regs[MPD] = PostDiv & 0x77;
329 state->m_Regs[MD1] = ((MainDiv >> 16) & 0x7F); 329 state->m_Regs[MD1] = ((MainDiv >> 16) & 0x7F);
330 state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF); 330 state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF);
331 state->m_Regs[MD3] = ((MainDiv ) & 0xFF); 331 state->m_Regs[MD3] = (MainDiv & 0xFF);
332 332
333 return UpdateRegs(state, MPD, MD3); 333 return UpdateRegs(state, MPD, MD3);
334} 334}
335 335
336static int CalcCalPLL(struct tda_state *state, u32 freq) 336static int CalcCalPLL(struct tda_state *state, u32 freq)
337{ 337{
338 //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "(%d)\n",freq));
339
340 u8 PostDiv; 338 u8 PostDiv;
341 u8 Div; 339 u8 Div;
342 u64 OscFreq; 340 u64 OscFreq;
343 u32 CalDiv; 341 u32 CalDiv;
344 342
345 if( !SearchMap3(m_Cal_PLL_Map,freq,&PostDiv,&Div) ) 343 if (!SearchMap3(m_Cal_PLL_Map, freq, &PostDiv, &Div))
346 {
347 return -EINVAL; 344 return -EINVAL;
348 }
349 345
350 OscFreq = (u64)freq * (u64)Div; 346 OscFreq = (u64)freq * (u64)Div;
351 //CalDiv = u32( OscFreq * 16384 / 16000000 ); 347 /* CalDiv = u32( OscFreq * 16384 / 16000000 ); */
352 OscFreq*=(u64)16384; 348 OscFreq *= (u64)16384;
353 do_div(OscFreq, (u64)16000000); 349 do_div(OscFreq, (u64)16000000);
354 CalDiv=OscFreq; 350 CalDiv = OscFreq;
355 351
356 state->m_Regs[CPD] = PostDiv; 352 state->m_Regs[CPD] = PostDiv;
357 state->m_Regs[CD1] = ((CalDiv >> 16) & 0xFF); 353 state->m_Regs[CD1] = ((CalDiv >> 16) & 0xFF);
358 state->m_Regs[CD2] = ((CalDiv >> 8) & 0xFF); 354 state->m_Regs[CD2] = ((CalDiv >> 8) & 0xFF);
359 state->m_Regs[CD3] = ((CalDiv ) & 0xFF); 355 state->m_Regs[CD3] = (CalDiv & 0xFF);
360 356
361 return UpdateRegs(state,CPD,CD3); 357 return UpdateRegs(state, CPD, CD3);
362} 358}
363 359
364static int CalibrateRF(struct tda_state *state, 360static int CalibrateRF(struct tda_state *state,
365 u8 RFBand,u32 freq, s32 * pCprog) 361 u8 RFBand, u32 freq, s32 *pCprog)
366{ 362{
367 //KdPrintEx((MSG_TRACE " - " __FUNCTION__ " ID = %02x\n",state->m_Regs[ID]));
368 int status = 0; 363 int status = 0;
369 u8 Regs[NUM_REGS]; 364 u8 Regs[NUM_REGS];
370 do { 365 do {
371 u8 BP_Filter=0; 366 u8 BP_Filter = 0;
372 u8 GainTaper=0; 367 u8 GainTaper = 0;
373 u8 RFC_K=0; 368 u8 RFC_K = 0;
374 u8 RFC_M=0; 369 u8 RFC_M = 0;
375 370
376 state->m_Regs[EP4] &= ~0x03; // CAL_mode = 0 371 state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 */
377 CHK_ERROR(UpdateReg(state,EP4)); 372 CHK_ERROR(UpdateReg(state, EP4));
378 state->m_Regs[EB18] |= 0x03; // AGC1_Gain = 3 373 state->m_Regs[EB18] |= 0x03; /* AGC1_Gain = 3 */
379 CHK_ERROR(UpdateReg(state,EB18)); 374 CHK_ERROR(UpdateReg(state, EB18));
380 375
381 // Switching off LT (as datasheet says) causes calibration on C1 to fail 376 /* Switching off LT (as datasheet says) causes calibration on C1 to fail */
382 // (Readout of Cprog is allways 255) 377 /* (Readout of Cprog is allways 255) */
383 if( state->m_Regs[ID] != 0x83 ) // C1: ID == 83, C2: ID == 84 378 if (state->m_Regs[ID] != 0x83) /* C1: ID == 83, C2: ID == 84 */
384 { 379 state->m_Regs[EP3] |= 0x40; /* SM_LT = 1 */
385 state->m_Regs[EP3] |= 0x40; // SM_LT = 1 380
386 } 381 if (!(SearchMap1(m_BP_Filter_Map, freq, &BP_Filter) &&
387 382 SearchMap1(m_GainTaper_Map, freq, &GainTaper) &&
388 if( ! ( SearchMap1(m_BP_Filter_Map,freq,&BP_Filter) && 383 SearchMap3(m_KM_Map, freq, &RFC_K, &RFC_M)))
389 SearchMap1(m_GainTaper_Map,freq,&GainTaper) &&
390 SearchMap3(m_KM_Map,freq,&RFC_K,&RFC_M)) )
391 {
392 return -EINVAL; 384 return -EINVAL;
393 }
394 385
395 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | BP_Filter; 386 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | BP_Filter;
396 state->m_Regs[EP2] = (RFBand << 5) | GainTaper; 387 state->m_Regs[EP2] = (RFBand << 5) | GainTaper;
397 388
398 state->m_Regs[EB13] = (state->m_Regs[EB13] & ~0x7C) | (RFC_K << 4) | (RFC_M << 2); 389 state->m_Regs[EB13] = (state->m_Regs[EB13] & ~0x7C) | (RFC_K << 4) | (RFC_M << 2);
399 390
400 CHK_ERROR(UpdateRegs(state,EP1,EP3)); 391 CHK_ERROR(UpdateRegs(state, EP1, EP3));
401 CHK_ERROR(UpdateReg(state,EB13)); 392 CHK_ERROR(UpdateReg(state, EB13));
402 393
403 state->m_Regs[EB4] |= 0x20; // LO_ForceSrce = 1 394 state->m_Regs[EB4] |= 0x20; /* LO_ForceSrce = 1 */
404 CHK_ERROR(UpdateReg(state,EB4)); 395 CHK_ERROR(UpdateReg(state, EB4));
405 396
406 state->m_Regs[EB7] |= 0x20; // CAL_ForceSrce = 1 397 state->m_Regs[EB7] |= 0x20; /* CAL_ForceSrce = 1 */
407 CHK_ERROR(UpdateReg(state,EB7)); 398 CHK_ERROR(UpdateReg(state, EB7));
408 399
409 state->m_Regs[EB14] = 0; // RFC_Cprog = 0 400 state->m_Regs[EB14] = 0; /* RFC_Cprog = 0 */
410 CHK_ERROR(UpdateReg(state,EB14)); 401 CHK_ERROR(UpdateReg(state, EB14));
411 402
412 state->m_Regs[EB20] &= ~0x20; // ForceLock = 0; 403 state->m_Regs[EB20] &= ~0x20; /* ForceLock = 0; */
413 CHK_ERROR(UpdateReg(state,EB20)); 404 CHK_ERROR(UpdateReg(state, EB20));
414 405
415 state->m_Regs[EP4] |= 0x03; // CAL_Mode = 3 406 state->m_Regs[EP4] |= 0x03; /* CAL_Mode = 3 */
416 CHK_ERROR(UpdateRegs(state,EP4,EP5)); 407 CHK_ERROR(UpdateRegs(state, EP4, EP5));
417 408
418 CHK_ERROR(CalcCalPLL(state,freq)); 409 CHK_ERROR(CalcCalPLL(state, freq));
419 CHK_ERROR(CalcMainPLL(state,freq + 1000000)); 410 CHK_ERROR(CalcMainPLL(state, freq + 1000000));
420 411
421 msleep(5); 412 msleep(5);
422 CHK_ERROR(UpdateReg(state,EP2)); 413 CHK_ERROR(UpdateReg(state, EP2));
423 CHK_ERROR(UpdateReg(state,EP1)); 414 CHK_ERROR(UpdateReg(state, EP1));
424 CHK_ERROR(UpdateReg(state,EP2)); 415 CHK_ERROR(UpdateReg(state, EP2));
425 CHK_ERROR(UpdateReg(state,EP1)); 416 CHK_ERROR(UpdateReg(state, EP1));
426 417
427 state->m_Regs[EB4] &= ~0x20; // LO_ForceSrce = 0 418 state->m_Regs[EB4] &= ~0x20; /* LO_ForceSrce = 0 */
428 CHK_ERROR(UpdateReg(state,EB4)); 419 CHK_ERROR(UpdateReg(state, EB4));
429 420
430 state->m_Regs[EB7] &= ~0x20; // CAL_ForceSrce = 0 421 state->m_Regs[EB7] &= ~0x20; /* CAL_ForceSrce = 0 */
431 CHK_ERROR(UpdateReg(state,EB7)); 422 CHK_ERROR(UpdateReg(state, EB7));
432 msleep(10); 423 msleep(10);
433 424
434 state->m_Regs[EB20] |= 0x20; // ForceLock = 1; 425 state->m_Regs[EB20] |= 0x20; /* ForceLock = 1; */
435 CHK_ERROR(UpdateReg(state,EB20)); 426 CHK_ERROR(UpdateReg(state, EB20));
436 msleep(60); 427 msleep(60);
437 428
438 state->m_Regs[EP4] &= ~0x03; // CAL_Mode = 0 429 state->m_Regs[EP4] &= ~0x03; /* CAL_Mode = 0 */
439 state->m_Regs[EP3] &= ~0x40; // SM_LT = 0 430 state->m_Regs[EP3] &= ~0x40; /* SM_LT = 0 */
440 state->m_Regs[EB18] &= ~0x03; // AGC1_Gain = 0 431 state->m_Regs[EB18] &= ~0x03; /* AGC1_Gain = 0 */
441 CHK_ERROR(UpdateReg(state,EB18)); 432 CHK_ERROR(UpdateReg(state, EB18));
442 CHK_ERROR(UpdateRegs(state,EP3,EP4)); 433 CHK_ERROR(UpdateRegs(state, EP3, EP4));
443 CHK_ERROR(UpdateReg(state,EP1)); 434 CHK_ERROR(UpdateReg(state, EP1));
444 435
445 CHK_ERROR(ReadExtented(state,Regs)); 436 CHK_ERROR(ReadExtented(state, Regs));
446 437
447 *pCprog = Regs[EB14]; 438 *pCprog = Regs[EB14];
448 //KdPrintEx((MSG_TRACE " - " __FUNCTION__ " Cprog = %d\n",Regs[EB14]));
449 439
450 } while(0); 440 } while (0);
451 return status; 441 return status;
452} 442}
453 443
454static int RFTrackingFiltersInit(struct tda_state *state, 444static int RFTrackingFiltersInit(struct tda_state *state,
455 u8 RFBand) 445 u8 RFBand)
456{ 446{
457 //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "\n"));
458 int status = 0; 447 int status = 0;
459 448
460 u32 RF1 = m_RF_Band_Map[RFBand].m_RF1_Default; 449 u32 RF1 = m_RF_Band_Map[RFBand].m_RF1_Default;
@@ -475,171 +464,161 @@ static int RFTrackingFiltersInit(struct tda_state *state,
475 state->m_RF_B2[RFBand] = 0; 464 state->m_RF_B2[RFBand] = 0;
476 465
477 do { 466 do {
478 CHK_ERROR(PowerScan(state,RFBand,RF1,&RF1,&bcal)); 467 CHK_ERROR(PowerScan(state, RFBand, RF1, &RF1, &bcal));
479 if( bcal ) { 468 if (bcal) {
480 CHK_ERROR(CalibrateRF(state,RFBand,RF1,&Cprog_cal1)); 469 CHK_ERROR(CalibrateRF(state, RFBand, RF1, &Cprog_cal1));
481 } 470 }
482 SearchMap2(m_RF_Cal_Map,RF1,&Cprog_table1); 471 SearchMap2(m_RF_Cal_Map, RF1, &Cprog_table1);
483 if( !bcal ) { 472 if (!bcal)
484 Cprog_cal1 = Cprog_table1; 473 Cprog_cal1 = Cprog_table1;
485 }
486 state->m_RF_B1[RFBand] = Cprog_cal1 - Cprog_table1; 474 state->m_RF_B1[RFBand] = Cprog_cal1 - Cprog_table1;
487 //state->m_RF_A1[RF_Band] = ???? 475 /* state->m_RF_A1[RF_Band] = ???? */
488 476
489 if( RF2 == 0 ) break; 477 if (RF2 == 0)
478 break;
490 479
491 CHK_ERROR(PowerScan(state,RFBand,RF2,&RF2,&bcal)); 480 CHK_ERROR(PowerScan(state, RFBand, RF2, &RF2, &bcal));
492 if( bcal ) { 481 if (bcal) {
493 CHK_ERROR(CalibrateRF(state,RFBand,RF2,&Cprog_cal2)); 482 CHK_ERROR(CalibrateRF(state, RFBand, RF2, &Cprog_cal2));
494 } 483 }
495 SearchMap2(m_RF_Cal_Map,RF2,&Cprog_table2); 484 SearchMap2(m_RF_Cal_Map, RF2, &Cprog_table2);
496 if( !bcal ) 485 if (!bcal)
497 {
498 Cprog_cal2 = Cprog_table2; 486 Cprog_cal2 = Cprog_table2;
499 }
500 487
501 state->m_RF_A1[RFBand] = 488 state->m_RF_A1[RFBand] =
502 (Cprog_cal2 - Cprog_table2 - Cprog_cal1 + Cprog_table1) / 489 (Cprog_cal2 - Cprog_table2 - Cprog_cal1 + Cprog_table1) /
503 ((s32)(RF2)-(s32)(RF1)); 490 ((s32)(RF2) - (s32)(RF1));
504 491
505 if( RF3 == 0 ) break; 492 if (RF3 == 0)
493 break;
506 494
507 CHK_ERROR(PowerScan(state,RFBand,RF3,&RF3,&bcal)); 495 CHK_ERROR(PowerScan(state, RFBand, RF3, &RF3, &bcal));
508 if( bcal ) 496 if (bcal) {
509 { 497 CHK_ERROR(CalibrateRF(state, RFBand, RF3, &Cprog_cal3));
510 CHK_ERROR(CalibrateRF(state,RFBand,RF3,&Cprog_cal3));
511 } 498 }
512 SearchMap2(m_RF_Cal_Map,RF3,&Cprog_table3); 499 SearchMap2(m_RF_Cal_Map, RF3, &Cprog_table3);
513 if( !bcal ) 500 if (!bcal)
514 {
515 Cprog_cal3 = Cprog_table3; 501 Cprog_cal3 = Cprog_table3;
516 } 502 state->m_RF_A2[RFBand] = (Cprog_cal3 - Cprog_table3 - Cprog_cal2 + Cprog_table2) / ((s32)(RF3) - (s32)(RF2));
517 state->m_RF_A2[RFBand] = (Cprog_cal3 - Cprog_table3 - Cprog_cal2 + Cprog_table2) / ((s32)(RF3)-(s32)(RF2));
518 state->m_RF_B2[RFBand] = Cprog_cal2 - Cprog_table2; 503 state->m_RF_B2[RFBand] = Cprog_cal2 - Cprog_table2;
519 504
520 } while(0); 505 } while (0);
521 506
522 state->m_RF1[RFBand] = RF1; 507 state->m_RF1[RFBand] = RF1;
523 state->m_RF2[RFBand] = RF2; 508 state->m_RF2[RFBand] = RF2;
524 state->m_RF3[RFBand] = RF3; 509 state->m_RF3[RFBand] = RF3;
525 510
526#if 0 511#if 0
527 printk("%s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __FUNCTION__, 512 printk(KERN_ERR "%s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __func__,
528 RFBand,RF1,state->m_RF_A1[RFBand],state->m_RF_B1[RFBand],RF2, 513 RFBand, RF1, state->m_RF_A1[RFBand], state->m_RF_B1[RFBand], RF2,
529 state->m_RF_A2[RFBand],state->m_RF_B2[RFBand],RF3); 514 state->m_RF_A2[RFBand], state->m_RF_B2[RFBand], RF3);
530#endif 515#endif
531 516
532 return status; 517 return status;
533} 518}
534 519
535static int PowerScan(struct tda_state *state, 520static int PowerScan(struct tda_state *state,
536 u8 RFBand,u32 RF_in, u32 * pRF_Out, bool *pbcal) 521 u8 RFBand, u32 RF_in, u32 *pRF_Out, bool *pbcal)
537{ 522{
538 //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "(%d,%d)\n",RFBand,RF_in)); 523 int status = 0;
539 int status = 0; 524 do {
540 do { 525 u8 Gain_Taper = 0;
541 u8 Gain_Taper=0; 526 s32 RFC_Cprog = 0;
542 s32 RFC_Cprog=0; 527 u8 CID_Target = 0;
543 u8 CID_Target=0; 528 u8 CountLimit = 0;
544 u8 CountLimit=0; 529 u32 freq_MainPLL;
545 u32 freq_MainPLL; 530 u8 Regs[NUM_REGS];
546 u8 Regs[NUM_REGS]; 531 u8 CID_Gain;
547 u8 CID_Gain; 532 s32 Count = 0;
548 s32 Count = 0; 533 int sign = 1;
549 int sign = 1; 534 bool wait = false;
550 bool wait = false; 535
551 536 if (!(SearchMap2(m_RF_Cal_Map, RF_in, &RFC_Cprog) &&
552 if( ! (SearchMap2(m_RF_Cal_Map,RF_in,&RFC_Cprog) && 537 SearchMap1(m_GainTaper_Map, RF_in, &Gain_Taper) &&
553 SearchMap1(m_GainTaper_Map,RF_in,&Gain_Taper) && 538 SearchMap3(m_CID_Target_Map, RF_in, &CID_Target, &CountLimit))) {
554 SearchMap3(m_CID_Target_Map,RF_in,&CID_Target,&CountLimit) )) { 539
555 printk("%s Search map failed\n", __FUNCTION__); 540 printk(KERN_ERR "%s Search map failed\n", __func__);
556 return -EINVAL; 541 return -EINVAL;
557 } 542 }
558 543
559 state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper; 544 state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper;
560 state->m_Regs[EB14] = (RFC_Cprog); 545 state->m_Regs[EB14] = (RFC_Cprog);
561 CHK_ERROR(UpdateReg(state,EP2)); 546 CHK_ERROR(UpdateReg(state, EP2));
562 CHK_ERROR(UpdateReg(state,EB14)); 547 CHK_ERROR(UpdateReg(state, EB14));
563 548
564 freq_MainPLL = RF_in + 1000000; 549 freq_MainPLL = RF_in + 1000000;
565 CHK_ERROR(CalcMainPLL(state,freq_MainPLL)); 550 CHK_ERROR(CalcMainPLL(state, freq_MainPLL));
566 msleep(5); 551 msleep(5);
567 state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1; // CAL_mode = 1 552 state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1; /* CAL_mode = 1 */
568 CHK_ERROR(UpdateReg(state,EP4)); 553 CHK_ERROR(UpdateReg(state, EP4));
569 CHK_ERROR(UpdateReg(state,EP2)); // Launch power measurement 554 CHK_ERROR(UpdateReg(state, EP2)); /* Launch power measurement */
570 CHK_ERROR(ReadExtented(state,Regs)); 555 CHK_ERROR(ReadExtented(state, Regs));
571 CID_Gain = Regs[EB10] & 0x3F; 556 CID_Gain = Regs[EB10] & 0x3F;
572 state->m_Regs[ID] = Regs[ID]; // Chip version, (needed for C1 workarround in CalibrateRF ) 557 state->m_Regs[ID] = Regs[ID]; /* Chip version, (needed for C1 workarround in CalibrateRF) */
573 558
574 *pRF_Out = RF_in; 559 *pRF_Out = RF_in;
575 560
576 while( CID_Gain < CID_Target ) { 561 while (CID_Gain < CID_Target) {
577 freq_MainPLL = RF_in + sign * Count + 1000000; 562 freq_MainPLL = RF_in + sign * Count + 1000000;
578 CHK_ERROR(CalcMainPLL(state,freq_MainPLL)); 563 CHK_ERROR(CalcMainPLL(state, freq_MainPLL));
579 msleep( wait ? 5 : 1 ); 564 msleep(wait ? 5 : 1);
580 wait = false; 565 wait = false;
581 CHK_ERROR(UpdateReg(state,EP2)); // Launch power measurement 566 CHK_ERROR(UpdateReg(state, EP2)); /* Launch power measurement */
582 CHK_ERROR(ReadExtented(state,Regs)); 567 CHK_ERROR(ReadExtented(state, Regs));
583 CID_Gain = Regs[EB10] & 0x3F; 568 CID_Gain = Regs[EB10] & 0x3F;
584 Count += 200000; 569 Count += 200000;
585 570
586 if( Count < CountLimit * 100000 ) continue; 571 if (Count < CountLimit * 100000)
587 if( sign < 0 ) break; 572 continue;
588 573 if (sign < 0)
589 sign = -sign; 574 break;
590 Count = 200000; 575
591 wait = true; 576 sign = -sign;
592 } 577 Count = 200000;
593 CHK_ERROR(status); 578 wait = true;
594 if( CID_Gain >= CID_Target ) 579 }
595 { 580 CHK_ERROR(status);
596 *pbcal = true; 581 if (CID_Gain >= CID_Target) {
597 *pRF_Out = freq_MainPLL - 1000000; 582 *pbcal = true;
598 } 583 *pRF_Out = freq_MainPLL - 1000000;
599 else 584 } else
600 { 585 *pbcal = false;
601 *pbcal = false; 586 } while (0);
602 } 587
603 } while(0); 588 return status;
604 //KdPrintEx((MSG_TRACE " - " __FUNCTION__ " Found = %d RF = %d\n",*pbcal,*pRF_Out));
605 return status;
606} 589}
607 590
608static int PowerScanInit(struct tda_state *state) 591static int PowerScanInit(struct tda_state *state)
609{ 592{
610 //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "\n"));
611 int status = 0; 593 int status = 0;
612 do 594 do {
613 {
614 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | 0x12; 595 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | 0x12;
615 state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F); // If level = 0, Cal mode = 0 596 state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F); /* If level = 0, Cal mode = 0 */
616 CHK_ERROR(UpdateRegs(state,EP3,EP4)); 597 CHK_ERROR(UpdateRegs(state, EP3, EP4));
617 state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03 ); // AGC 1 Gain = 0 598 state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03); /* AGC 1 Gain = 0 */
618 CHK_ERROR(UpdateReg(state,EB18)); 599 CHK_ERROR(UpdateReg(state, EB18));
619 state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03 ); // AGC 2 Gain = 0 (Datasheet = 3) 600 state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03); /* AGC 2 Gain = 0 (Datasheet = 3) */
620 state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06 ); // ForceLP_Fc2_En = 1, LPFc[2] = 1 601 state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06); /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */
621 CHK_ERROR(UpdateRegs(state,EB21,EB23)); 602 CHK_ERROR(UpdateRegs(state, EB21, EB23));
622 } while(0); 603 } while (0);
623 return status; 604 return status;
624} 605}
625 606
626static int CalcRFFilterCurve(struct tda_state *state) 607static int CalcRFFilterCurve(struct tda_state *state)
627{ 608{
628 //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "\n"));
629 int status = 0; 609 int status = 0;
630 do 610 do {
631 { 611 msleep(200); /* Temperature stabilisation */
632 msleep(200); // Temperature stabilisation
633 CHK_ERROR(PowerScanInit(state)); 612 CHK_ERROR(PowerScanInit(state));
634 CHK_ERROR(RFTrackingFiltersInit(state,0)); 613 CHK_ERROR(RFTrackingFiltersInit(state, 0));
635 CHK_ERROR(RFTrackingFiltersInit(state,1)); 614 CHK_ERROR(RFTrackingFiltersInit(state, 1));
636 CHK_ERROR(RFTrackingFiltersInit(state,2)); 615 CHK_ERROR(RFTrackingFiltersInit(state, 2));
637 CHK_ERROR(RFTrackingFiltersInit(state,3)); 616 CHK_ERROR(RFTrackingFiltersInit(state, 3));
638 CHK_ERROR(RFTrackingFiltersInit(state,4)); 617 CHK_ERROR(RFTrackingFiltersInit(state, 4));
639 CHK_ERROR(RFTrackingFiltersInit(state,5)); 618 CHK_ERROR(RFTrackingFiltersInit(state, 5));
640 CHK_ERROR(RFTrackingFiltersInit(state,6)); 619 CHK_ERROR(RFTrackingFiltersInit(state, 6));
641 CHK_ERROR(ThermometerRead(state,&state->m_TMValue_RFCal)); // also switches off Cal mode !!! 620 CHK_ERROR(ThermometerRead(state, &state->m_TMValue_RFCal)); /* also switches off Cal mode !!! */
642 } while(0); 621 } while (0);
643 622
644 return status; 623 return status;
645} 624}
@@ -647,33 +626,33 @@ static int CalcRFFilterCurve(struct tda_state *state)
647static int FixedContentsI2CUpdate(struct tda_state *state) 626static int FixedContentsI2CUpdate(struct tda_state *state)
648{ 627{
649 static u8 InitRegs[] = { 628 static u8 InitRegs[] = {
650 0x08,0x80,0xC6, 629 0x08, 0x80, 0xC6,
651 0xDF,0x16,0x60,0x80, 630 0xDF, 0x16, 0x60, 0x80,
652 0x80,0x00,0x00,0x00, 631 0x80, 0x00, 0x00, 0x00,
653 0x00,0x00,0x00,0x00, 632 0x00, 0x00, 0x00, 0x00,
654 0xFC,0x01,0x84,0x41, 633 0xFC, 0x01, 0x84, 0x41,
655 0x01,0x84,0x40,0x07, 634 0x01, 0x84, 0x40, 0x07,
656 0x00,0x00,0x96,0x3F, 635 0x00, 0x00, 0x96, 0x3F,
657 0xC1,0x00,0x8F,0x00, 636 0xC1, 0x00, 0x8F, 0x00,
658 0x00,0x8C,0x00,0x20, 637 0x00, 0x8C, 0x00, 0x20,
659 0xB3,0x48,0xB0, 638 0xB3, 0x48, 0xB0,
660 }; 639 };
661 int status = 0; 640 int status = 0;
662 memcpy(&state->m_Regs[TM],InitRegs,EB23-TM+1); 641 memcpy(&state->m_Regs[TM], InitRegs, EB23 - TM + 1);
663 do { 642 do {
664 CHK_ERROR(UpdateRegs(state,TM,EB23)); 643 CHK_ERROR(UpdateRegs(state, TM, EB23));
665 644
666 // AGC1 gain setup 645 /* AGC1 gain setup */
667 state->m_Regs[EB17] = 0x00; 646 state->m_Regs[EB17] = 0x00;
668 CHK_ERROR(UpdateReg(state,EB17)); 647 CHK_ERROR(UpdateReg(state, EB17));
669 state->m_Regs[EB17] = 0x03; 648 state->m_Regs[EB17] = 0x03;
670 CHK_ERROR(UpdateReg(state,EB17)); 649 CHK_ERROR(UpdateReg(state, EB17));
671 state->m_Regs[EB17] = 0x43; 650 state->m_Regs[EB17] = 0x43;
672 CHK_ERROR(UpdateReg(state,EB17)); 651 CHK_ERROR(UpdateReg(state, EB17));
673 state->m_Regs[EB17] = 0x4C; 652 state->m_Regs[EB17] = 0x4C;
674 CHK_ERROR(UpdateReg(state,EB17)); 653 CHK_ERROR(UpdateReg(state, EB17));
675 654
676 // IRC Cal Low band 655 /* IRC Cal Low band */
677 state->m_Regs[EP3] = 0x1F; 656 state->m_Regs[EP3] = 0x1F;
678 state->m_Regs[EP4] = 0x66; 657 state->m_Regs[EP4] = 0x66;
679 state->m_Regs[EP5] = 0x81; 658 state->m_Regs[EP5] = 0x81;
@@ -685,75 +664,77 @@ static int FixedContentsI2CUpdate(struct tda_state *state)
685 state->m_Regs[MD1] = 0x77; 664 state->m_Regs[MD1] = 0x77;
686 state->m_Regs[MD2] = 0x08; 665 state->m_Regs[MD2] = 0x08;
687 state->m_Regs[MD3] = 0x00; 666 state->m_Regs[MD3] = 0x00;
688 CHK_ERROR(UpdateRegs(state,EP2,MD3)); // diff between sw and datasheet (ep3-md3) 667 CHK_ERROR(UpdateRegs(state, EP2, MD3)); /* diff between sw and datasheet (ep3-md3) */
689 668
690 //state->m_Regs[EB4] = 0x61; // missing in sw 669#if 0
691 //CHK_ERROR(UpdateReg(state,EB4)); 670 state->m_Regs[EB4] = 0x61; /* missing in sw */
692 //msleep(1); 671 CHK_ERROR(UpdateReg(state, EB4));
693 //state->m_Regs[EB4] = 0x41; 672 msleep(1);
694 //CHK_ERROR(UpdateReg(state,EB4)); 673 state->m_Regs[EB4] = 0x41;
674 CHK_ERROR(UpdateReg(state, EB4));
675#endif
695 676
696 msleep(5); 677 msleep(5);
697 CHK_ERROR(UpdateReg(state,EP1)); 678 CHK_ERROR(UpdateReg(state, EP1));
698 msleep(5); 679 msleep(5);
699 680
700 state->m_Regs[EP5] = 0x85; 681 state->m_Regs[EP5] = 0x85;
701 state->m_Regs[CPD] = 0xCB; 682 state->m_Regs[CPD] = 0xCB;
702 state->m_Regs[CD1] = 0x66; 683 state->m_Regs[CD1] = 0x66;
703 state->m_Regs[CD2] = 0x70; 684 state->m_Regs[CD2] = 0x70;
704 CHK_ERROR(UpdateRegs(state,EP3,CD3)); 685 CHK_ERROR(UpdateRegs(state, EP3, CD3));
705 msleep(5); 686 msleep(5);
706 CHK_ERROR(UpdateReg(state,EP2)); 687 CHK_ERROR(UpdateReg(state, EP2));
707 msleep(30); 688 msleep(30);
708 689
709 // IRC Cal mid band 690 /* IRC Cal mid band */
710 state->m_Regs[EP5] = 0x82; 691 state->m_Regs[EP5] = 0x82;
711 state->m_Regs[CPD] = 0xA8; 692 state->m_Regs[CPD] = 0xA8;
712 state->m_Regs[CD2] = 0x00; 693 state->m_Regs[CD2] = 0x00;
713 state->m_Regs[MPD] = 0xA1; // Datasheet = 0xA9 694 state->m_Regs[MPD] = 0xA1; /* Datasheet = 0xA9 */
714 state->m_Regs[MD1] = 0x73; 695 state->m_Regs[MD1] = 0x73;
715 state->m_Regs[MD2] = 0x1A; 696 state->m_Regs[MD2] = 0x1A;
716 CHK_ERROR(UpdateRegs(state,EP3,MD3)); 697 CHK_ERROR(UpdateRegs(state, EP3, MD3));
717 698
718 msleep(5); 699 msleep(5);
719 CHK_ERROR(UpdateReg(state,EP1)); 700 CHK_ERROR(UpdateReg(state, EP1));
720 msleep(5); 701 msleep(5);
721 702
722 state->m_Regs[EP5] = 0x86; 703 state->m_Regs[EP5] = 0x86;
723 state->m_Regs[CPD] = 0xA8; 704 state->m_Regs[CPD] = 0xA8;
724 state->m_Regs[CD1] = 0x66; 705 state->m_Regs[CD1] = 0x66;
725 state->m_Regs[CD2] = 0xA0; 706 state->m_Regs[CD2] = 0xA0;
726 CHK_ERROR(UpdateRegs(state,EP3,CD3)); 707 CHK_ERROR(UpdateRegs(state, EP3, CD3));
727 msleep(5); 708 msleep(5);
728 CHK_ERROR(UpdateReg(state,EP2)); 709 CHK_ERROR(UpdateReg(state, EP2));
729 msleep(30); 710 msleep(30);
730 711
731 // IRC Cal high band 712 /* IRC Cal high band */
732 state->m_Regs[EP5] = 0x83; 713 state->m_Regs[EP5] = 0x83;
733 state->m_Regs[CPD] = 0x98; 714 state->m_Regs[CPD] = 0x98;
734 state->m_Regs[CD1] = 0x65; 715 state->m_Regs[CD1] = 0x65;
735 state->m_Regs[CD2] = 0x00; 716 state->m_Regs[CD2] = 0x00;
736 state->m_Regs[MPD] = 0x91; // Datasheet = 0x91 717 state->m_Regs[MPD] = 0x91; /* Datasheet = 0x91 */
737 state->m_Regs[MD1] = 0x71; 718 state->m_Regs[MD1] = 0x71;
738 state->m_Regs[MD2] = 0xCD; 719 state->m_Regs[MD2] = 0xCD;
739 CHK_ERROR(UpdateRegs(state,EP3,MD3)); 720 CHK_ERROR(UpdateRegs(state, EP3, MD3));
740 msleep(5); 721 msleep(5);
741 CHK_ERROR(UpdateReg(state,EP1)); 722 CHK_ERROR(UpdateReg(state, EP1));
742 msleep(5); 723 msleep(5);
743 state->m_Regs[EP5] = 0x87; 724 state->m_Regs[EP5] = 0x87;
744 state->m_Regs[CD1] = 0x65; 725 state->m_Regs[CD1] = 0x65;
745 state->m_Regs[CD2] = 0x50; 726 state->m_Regs[CD2] = 0x50;
746 CHK_ERROR(UpdateRegs(state,EP3,CD3)); 727 CHK_ERROR(UpdateRegs(state, EP3, CD3));
747 msleep(5); 728 msleep(5);
748 CHK_ERROR(UpdateReg(state,EP2)); 729 CHK_ERROR(UpdateReg(state, EP2));
749 msleep(30); 730 msleep(30);
750 731
751 // Back to normal 732 /* Back to normal */
752 state->m_Regs[EP4] = 0x64; 733 state->m_Regs[EP4] = 0x64;
753 CHK_ERROR(UpdateReg(state,EP4)); 734 CHK_ERROR(UpdateReg(state, EP4));
754 CHK_ERROR(UpdateReg(state,EP1)); 735 CHK_ERROR(UpdateReg(state, EP1));
755 736
756 } while(0); 737 } while (0);
757 return status; 738 return status;
758} 739}
759 740
@@ -761,13 +742,12 @@ static int InitCal(struct tda_state *state)
761{ 742{
762 int status = 0; 743 int status = 0;
763 744
764 do 745 do {
765 {
766 CHK_ERROR(FixedContentsI2CUpdate(state)); 746 CHK_ERROR(FixedContentsI2CUpdate(state));
767 CHK_ERROR(CalcRFFilterCurve(state)); 747 CHK_ERROR(CalcRFFilterCurve(state));
768 CHK_ERROR(StandBy(state)); 748 CHK_ERROR(StandBy(state));
769 //m_bInitDone = true; 749 /* m_bInitDone = true; */
770 } while(0); 750 } while (0);
771 return status; 751 return status;
772}; 752};
773 753
@@ -779,15 +759,13 @@ static int RFTrackingFiltersCorrection(struct tda_state *state,
779 u8 RFBand; 759 u8 RFBand;
780 u8 dCoverdT; 760 u8 dCoverdT;
781 761
782 if( !SearchMap2(m_RF_Cal_Map,Frequency,&Cprog_table) || 762 if (!SearchMap2(m_RF_Cal_Map, Frequency, &Cprog_table) ||
783 !SearchMap4(m_RF_Band_Map,Frequency,&RFBand) || 763 !SearchMap4(m_RF_Band_Map, Frequency, &RFBand) ||
784 !SearchMap1(m_RF_Cal_DC_Over_DT_Map,Frequency,&dCoverdT) ) 764 !SearchMap1(m_RF_Cal_DC_Over_DT_Map, Frequency, &dCoverdT))
785 { 765
786 return -EINVAL; 766 return -EINVAL;
787 }
788 767
789 do 768 do {
790 {
791 u8 TMValue_Current; 769 u8 TMValue_Current;
792 u32 RF1 = state->m_RF1[RFBand]; 770 u32 RF1 = state->m_RF1[RFBand];
793 u32 RF2 = state->m_RF1[RFBand]; 771 u32 RF2 = state->m_RF1[RFBand];
@@ -799,35 +777,33 @@ static int RFTrackingFiltersCorrection(struct tda_state *state,
799 s32 Capprox = 0; 777 s32 Capprox = 0;
800 int TComp; 778 int TComp;
801 779
802 state->m_Regs[EP3] &= ~0xE0; // Power up 780 state->m_Regs[EP3] &= ~0xE0; /* Power up */
803 CHK_ERROR(UpdateReg(state,EP3)); 781 CHK_ERROR(UpdateReg(state, EP3));
804 782
805 CHK_ERROR(ThermometerRead(state,&TMValue_Current)); 783 CHK_ERROR(ThermometerRead(state, &TMValue_Current));
806 784
807 if( RF3 == 0 || Frequency < RF2 ) 785 if (RF3 == 0 || Frequency < RF2)
808 {
809 Capprox = RF_A1 * ((s32)(Frequency) - (s32)(RF1)) + RF_B1 + Cprog_table; 786 Capprox = RF_A1 * ((s32)(Frequency) - (s32)(RF1)) + RF_B1 + Cprog_table;
810 }
811 else 787 else
812 {
813 Capprox = RF_A2 * ((s32)(Frequency) - (s32)(RF2)) + RF_B2 + Cprog_table; 788 Capprox = RF_A2 * ((s32)(Frequency) - (s32)(RF2)) + RF_B2 + Cprog_table;
814 }
815 789
816 TComp = (int)(dCoverdT) * ((int)(TMValue_Current) - (int)(state->m_TMValue_RFCal))/1000; 790 TComp = (int)(dCoverdT) * ((int)(TMValue_Current) - (int)(state->m_TMValue_RFCal))/1000;
817 791
818 Capprox += TComp; 792 Capprox += TComp;
819 793
820 if( Capprox < 0 ) Capprox = 0; 794 if (Capprox < 0)
821 else if( Capprox > 255 ) Capprox = 255; 795 Capprox = 0;
796 else if (Capprox > 255)
797 Capprox = 255;
822 798
823 799
824 // TODO Temperature compensation. There is defenitely a scale factor 800 /* TODO Temperature compensation. There is defenitely a scale factor */
825 // missing in the datasheet, so leave it out for now. 801 /* missing in the datasheet, so leave it out for now. */
826 state->m_Regs[EB14] = (Capprox ); 802 state->m_Regs[EB14] = Capprox;
827 803
828 CHK_ERROR(UpdateReg(state,EB14)); 804 CHK_ERROR(UpdateReg(state, EB14));
829 805
830 } while(0); 806 } while (0);
831 return status; 807 return status;
832} 808}
833 809
@@ -843,94 +819,96 @@ static int ChannelConfiguration(struct tda_state *state,
843 u8 GainTaper = 0; 819 u8 GainTaper = 0;
844 u8 IR_Meas; 820 u8 IR_Meas;
845 821
846 state->IF=IntermediateFrequency; 822 state->IF = IntermediateFrequency;
847 //printk("%s Freq = %d Standard = %d IF = %d\n",__FUNCTION__,Frequency,Standard,IntermediateFrequency); 823 /* printk("%s Freq = %d Standard = %d IF = %d\n", __func__, Frequency, Standard, IntermediateFrequency); */
848 // get values from tables 824 /* get values from tables */
849 825
850 if(! ( SearchMap1(m_BP_Filter_Map,Frequency,&BP_Filter) && 826 if (!(SearchMap1(m_BP_Filter_Map, Frequency, &BP_Filter) &&
851 SearchMap1(m_GainTaper_Map,Frequency,&GainTaper) && 827 SearchMap1(m_GainTaper_Map, Frequency, &GainTaper) &&
852 SearchMap1(m_IR_Meas_Map,Frequency,&IR_Meas) && 828 SearchMap1(m_IR_Meas_Map, Frequency, &IR_Meas) &&
853 SearchMap4(m_RF_Band_Map,Frequency,&RF_Band) ) ) 829 SearchMap4(m_RF_Band_Map, Frequency, &RF_Band))) {
854 { 830
855 printk("%s SearchMap failed\n", __FUNCTION__); 831 printk(KERN_ERR "%s SearchMap failed\n", __func__);
856 return -EINVAL; 832 return -EINVAL;
857 } 833 }
858 834
859 do 835 do {
860 {
861 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | m_StandardTable[Standard].m_EP3_4_0; 836 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | m_StandardTable[Standard].m_EP3_4_0;
862 state->m_Regs[EP3] &= ~0x04; // switch RFAGC to high speed mode 837 state->m_Regs[EP3] &= ~0x04; /* switch RFAGC to high speed mode */
863 838
864 // m_EP4 default for XToutOn, CAL_Mode (0) 839 /* m_EP4 default for XToutOn, CAL_Mode (0) */
865 state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax )? state->m_IFLevelDigital : state->m_IFLevelAnalog ); 840 state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax) ? state->m_IFLevelDigital : state->m_IFLevelAnalog);
866 //state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; 841 /* state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; */
867 if( Standard <= HF_AnalogMax ) state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog; 842 if (Standard <= HF_AnalogMax)
868 else if( Standard <= HF_ATSC ) state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT; 843 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog;
869 else if( Standard <= HF_DVBC ) state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC; 844 else if (Standard <= HF_ATSC)
870 else state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; 845 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT;
846 else if (Standard <= HF_DVBC)
847 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC;
848 else
849 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital;
871 850
872 if( (Standard == HF_FM_Radio) && state->m_bFMInput ) state->m_Regs[EP4] |= 80; 851 if ((Standard == HF_FM_Radio) && state->m_bFMInput)
852 state->m_Regs[EP4] |= 80;
873 853
874 state->m_Regs[MPD] &= ~0x80; 854 state->m_Regs[MPD] &= ~0x80;
875 if( Standard > HF_AnalogMax ) state->m_Regs[MPD] |= 0x80; // Add IF_notch for digital 855 if (Standard > HF_AnalogMax)
856 state->m_Regs[MPD] |= 0x80; /* Add IF_notch for digital */
876 857
877 state->m_Regs[EB22] = m_StandardTable[Standard].m_EB22; 858 state->m_Regs[EB22] = m_StandardTable[Standard].m_EB22;
878 859
879 // Note: This is missing from flowchart in TDA18271 specification ( 1.5 MHz cutoff for FM ) 860 /* Note: This is missing from flowchart in TDA18271 specification ( 1.5 MHz cutoff for FM ) */
880 if( Standard == HF_FM_Radio ) state->m_Regs[EB23] |= 0x06; // ForceLP_Fc2_En = 1, LPFc[2] = 1 861 if (Standard == HF_FM_Radio)
881 else state->m_Regs[EB23] &= ~0x06; // ForceLP_Fc2_En = 0, LPFc[2] = 0 862 state->m_Regs[EB23] |= 0x06; /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */
863 else
864 state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LPFc[2] = 0 */
882 865
883 CHK_ERROR(UpdateRegs(state,EB22,EB23)); 866 CHK_ERROR(UpdateRegs(state, EB22, EB23));
884 867
885 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter; // Dis_Power_level = 1, Filter 868 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter; /* Dis_Power_level = 1, Filter */
886 state->m_Regs[EP5] = (state->m_Regs[EP5] & ~0x07) | IR_Meas; 869 state->m_Regs[EP5] = (state->m_Regs[EP5] & ~0x07) | IR_Meas;
887 state->m_Regs[EP2] = (RF_Band << 5) | GainTaper; 870 state->m_Regs[EP2] = (RF_Band << 5) | GainTaper;
888 871
889 state->m_Regs[EB1] = (state->m_Regs[EB1] & ~0x07) | 872 state->m_Regs[EB1] = (state->m_Regs[EB1] & ~0x07) |
890 (state->m_bMaster ? 0x04 : 0x00); // CALVCO_FortLOn = MS 873 (state->m_bMaster ? 0x04 : 0x00); /* CALVCO_FortLOn = MS */
891 // AGC1_always_master = 0 874 /* AGC1_always_master = 0 */
892 // AGC_firstn = 0 875 /* AGC_firstn = 0 */
893 CHK_ERROR(UpdateReg(state,EB1)); 876 CHK_ERROR(UpdateReg(state, EB1));
894 877
895 if( state->m_bMaster ) 878 if (state->m_bMaster) {
896 { 879 CHK_ERROR(CalcMainPLL(state, Frequency + IntermediateFrequency));
897 CHK_ERROR(CalcMainPLL(state,Frequency + IntermediateFrequency)); 880 CHK_ERROR(UpdateRegs(state, TM, EP5));
898 CHK_ERROR(UpdateRegs(state,TM,EP5)); 881 state->m_Regs[EB4] |= 0x20; /* LO_forceSrce = 1 */
899 state->m_Regs[EB4] |= 0x20; // LO_forceSrce = 1 882 CHK_ERROR(UpdateReg(state, EB4));
900 CHK_ERROR(UpdateReg(state,EB4));
901 msleep(1); 883 msleep(1);
902 state->m_Regs[EB4] &= ~0x20; // LO_forceSrce = 0 884 state->m_Regs[EB4] &= ~0x20; /* LO_forceSrce = 0 */
903 CHK_ERROR(UpdateReg(state,EB4)); 885 CHK_ERROR(UpdateReg(state, EB4));
904 } 886 } else {
905 else
906 {
907 u8 PostDiv; 887 u8 PostDiv;
908 u8 Div; 888 u8 Div;
909 CHK_ERROR(CalcCalPLL(state,Frequency + IntermediateFrequency)); 889 CHK_ERROR(CalcCalPLL(state, Frequency + IntermediateFrequency));
910 890
911 SearchMap3(m_Cal_PLL_Map,Frequency + IntermediateFrequency,&PostDiv,&Div); 891 SearchMap3(m_Cal_PLL_Map, Frequency + IntermediateFrequency, &PostDiv, &Div);
912 state->m_Regs[MPD] = (state->m_Regs[MPD] & ~0x7F) | (PostDiv & 0x77); 892 state->m_Regs[MPD] = (state->m_Regs[MPD] & ~0x7F) | (PostDiv & 0x77);
913 CHK_ERROR(UpdateReg(state,MPD)); 893 CHK_ERROR(UpdateReg(state, MPD));
914 CHK_ERROR(UpdateRegs(state,TM,EP5)); 894 CHK_ERROR(UpdateRegs(state, TM, EP5));
915 895
916 state->m_Regs[EB7] |= 0x20; // CAL_forceSrce = 1 896 state->m_Regs[EB7] |= 0x20; /* CAL_forceSrce = 1 */
917 CHK_ERROR(UpdateReg(state,EB7)); 897 CHK_ERROR(UpdateReg(state, EB7));
918 msleep(1); 898 msleep(1);
919 state->m_Regs[EB7] &= ~0x20; // CAL_forceSrce = 0 899 state->m_Regs[EB7] &= ~0x20; /* CAL_forceSrce = 0 */
920 CHK_ERROR(UpdateReg(state,EB7)); 900 CHK_ERROR(UpdateReg(state, EB7));
921 } 901 }
922 msleep(20); 902 msleep(20);
923 if( Standard != HF_FM_Radio ) 903 if (Standard != HF_FM_Radio)
924 { 904 state->m_Regs[EP3] |= 0x04; /* RFAGC to normal mode */
925 state->m_Regs[EP3] |= 0x04; // RFAGC to normal mode 905 CHK_ERROR(UpdateReg(state, EP3));
926 }
927 CHK_ERROR(UpdateReg(state,EP3));
928 906
929 } while(0); 907 } while (0);
930 return status; 908 return status;
931} 909}
932 910
933static int sleep(struct dvb_frontend* fe) 911static int sleep(struct dvb_frontend *fe)
934{ 912{
935 struct tda_state *state = fe->tuner_priv; 913 struct tda_state *state = fe->tuner_priv;
936 914
@@ -938,13 +916,12 @@ static int sleep(struct dvb_frontend* fe)
938 return 0; 916 return 0;
939} 917}
940 918
941static int init(struct dvb_frontend* fe) 919static int init(struct dvb_frontend *fe)
942{ 920{
943 //struct tda_state *state = fe->tuner_priv;
944 return 0; 921 return 0;
945} 922}
946 923
947static int release(struct dvb_frontend* fe) 924static int release(struct dvb_frontend *fe)
948{ 925{
949 kfree(fe->tuner_priv); 926 kfree(fe->tuner_priv);
950 fe->tuner_priv = NULL; 927 fe->tuner_priv = NULL;
@@ -978,22 +955,22 @@ static int set_params(struct dvb_frontend *fe,
978 } else 955 } else
979 return -EINVAL; 956 return -EINVAL;
980 do { 957 do {
981 CHK_ERROR(RFTrackingFiltersCorrection(state,params->frequency)); 958 CHK_ERROR(RFTrackingFiltersCorrection(state, params->frequency));
982 CHK_ERROR(ChannelConfiguration(state,params->frequency,Standard)); 959 CHK_ERROR(ChannelConfiguration(state, params->frequency, Standard));
983 960
984 msleep(state->m_SettlingTime); // Allow AGC's to settle down 961 msleep(state->m_SettlingTime); /* Allow AGC's to settle down */
985 } while(0); 962 } while (0);
986 return status; 963 return status;
987} 964}
988 965
989#if 0 966#if 0
990static int GetSignalStrength(s32 * pSignalStrength,u32 RFAgc,u32 IFAgc) 967static int GetSignalStrength(s32 *pSignalStrength, u32 RFAgc, u32 IFAgc)
991{ 968{
992 if( IFAgc < 500 ) { 969 if (IFAgc < 500) {
993 // Scale this from 0 to 50000 970 /* Scale this from 0 to 50000 */
994 *pSignalStrength = IFAgc * 100; 971 *pSignalStrength = IFAgc * 100;
995 } else { 972 } else {
996 // Scale range 500-1500 to 50000-80000 973 /* Scale range 500-1500 to 50000-80000 */
997 *pSignalStrength = 50000 + (IFAgc - 500) * 30; 974 *pSignalStrength = 50000 + (IFAgc - 500) * 30;
998 } 975 }
999 976
@@ -1011,8 +988,8 @@ static int get_frequency(struct dvb_frontend *fe, u32 *frequency)
1011 988
1012static int get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) 989static int get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1013{ 990{
1014 //struct tda_state *state = fe->tuner_priv; 991 /* struct tda_state *state = fe->tuner_priv; */
1015 //*bandwidth = priv->bandwidth; 992 /* *bandwidth = priv->bandwidth; */
1016 return 0; 993 return 0;
1017} 994}
1018 995
@@ -1050,14 +1027,8 @@ struct dvb_frontend *tda18271c2dd_attach(struct dvb_frontend *fe,
1050 1027
1051 return fe; 1028 return fe;
1052} 1029}
1053
1054EXPORT_SYMBOL_GPL(tda18271c2dd_attach); 1030EXPORT_SYMBOL_GPL(tda18271c2dd_attach);
1031
1055MODULE_DESCRIPTION("TDA18271C2 driver"); 1032MODULE_DESCRIPTION("TDA18271C2 driver");
1056MODULE_AUTHOR("DD"); 1033MODULE_AUTHOR("DD");
1057MODULE_LICENSE("GPL"); 1034MODULE_LICENSE("GPL");
1058
1059/*
1060 * Local variables:
1061 * c-basic-offset: 8
1062 * End:
1063 */
diff --git a/drivers/media/dvb/frontends/tda18271c2dd_maps.h b/drivers/media/dvb/frontends/tda18271c2dd_maps.h
index 21fa4e1d9277..b87661b9df14 100644
--- a/drivers/media/dvb/frontends/tda18271c2dd_maps.h
+++ b/drivers/media/dvb/frontends/tda18271c2dd_maps.h
@@ -1,810 +1,814 @@
1enum HF_S { 1enum HF_S {
2 HF_None=0, HF_B, HF_DK, HF_G, HF_I, HF_L, HF_L1, HF_MN, HF_FM_Radio, 2 HF_None = 0, HF_B, HF_DK, HF_G, HF_I, HF_L, HF_L1, HF_MN, HF_FM_Radio,
3 HF_AnalogMax, HF_DVBT_6MHZ, HF_DVBT_7MHZ, HF_DVBT_8MHZ, 3 HF_AnalogMax, HF_DVBT_6MHZ, HF_DVBT_7MHZ, HF_DVBT_8MHZ,
4 HF_DVBT, HF_ATSC, HF_DVBC_6MHZ, HF_DVBC_7MHZ, 4 HF_DVBT, HF_ATSC, HF_DVBC_6MHZ, HF_DVBC_7MHZ,
5 HF_DVBC_8MHZ, HF_DVBC 5 HF_DVBC_8MHZ, HF_DVBC
6}; 6};
7 7
8struct SStandardParam m_StandardTable[] = 8struct SStandardParam m_StandardTable[] = {
9{ 9 { 0, 0, 0x00, 0x00 }, /* HF_None */
10 { 0, 0, 0x00, 0x00 }, // HF_None 10 { 6000000, 7000000, 0x1D, 0x2C }, /* HF_B, */
11 { 6000000, 7000000, 0x1D, 0x2C }, // HF_B, 11 { 6900000, 8000000, 0x1E, 0x2C }, /* HF_DK, */
12 { 6900000, 8000000, 0x1E, 0x2C }, // HF_DK, 12 { 7100000, 8000000, 0x1E, 0x2C }, /* HF_G, */
13 { 7100000, 8000000, 0x1E, 0x2C }, // HF_G, 13 { 7250000, 8000000, 0x1E, 0x2C }, /* HF_I, */
14 { 7250000, 8000000, 0x1E, 0x2C }, // HF_I, 14 { 6900000, 8000000, 0x1E, 0x2C }, /* HF_L, */
15 { 6900000, 8000000, 0x1E, 0x2C }, // HF_L, 15 { 1250000, 8000000, 0x1E, 0x2C }, /* HF_L1, */
16 { 1250000, 8000000, 0x1E, 0x2C }, // HF_L1, 16 { 5400000, 6000000, 0x1C, 0x2C }, /* HF_MN, */
17 { 5400000, 6000000, 0x1C, 0x2C }, // HF_MN, 17 { 1250000, 500000, 0x18, 0x2C }, /* HF_FM_Radio, */
18 { 1250000, 500000, 0x18, 0x2C }, // HF_FM_Radio, 18 { 0, 0, 0x00, 0x00 }, /* HF_AnalogMax (Unused) */
19 { 0, 0, 0x00, 0x00 }, // HF_AnalogMax (Unused) 19 { 3300000, 6000000, 0x1C, 0x58 }, /* HF_DVBT_6MHZ */
20 { 3300000, 6000000, 0x1C, 0x58 }, // HF_DVBT_6MHZ 20 { 3500000, 7000000, 0x1C, 0x37 }, /* HF_DVBT_7MHZ */
21 { 3500000, 7000000, 0x1C, 0x37 }, // HF_DVBT_7MHZ 21 { 4000000, 8000000, 0x1D, 0x37 }, /* HF_DVBT_8MHZ */
22 { 4000000, 8000000, 0x1D, 0x37 }, // HF_DVBT_8MHZ 22 { 0, 0, 0x00, 0x00 }, /* HF_DVBT (Unused) */
23 { 0, 0, 0x00, 0x00 }, // HF_DVBT (Unused) 23 { 5000000, 6000000, 0x1C, 0x37 }, /* HF_ATSC (center = 3.25 MHz) */
24 { 5000000, 6000000, 0x1C, 0x37 }, // HF_ATSC (center = 3.25 MHz) 24 { 4000000, 6000000, 0x1D, 0x58 }, /* HF_DVBC_6MHZ (Chicago) */
25 { 4000000, 6000000, 0x1D, 0x58 }, // HF_DVBC_6MHZ (Chicago) 25 { 4500000, 7000000, 0x1E, 0x37 }, /* HF_DVBC_7MHZ (not documented by NXP) */
26 { 4500000, 7000000, 0x1E, 0x37 }, // HF_DVBC_7MHZ (not documented by NXP) 26 { 5000000, 8000000, 0x1F, 0x37 }, /* HF_DVBC_8MHZ */
27 { 5000000, 8000000, 0x1F, 0x37 }, // HF_DVBC_8MHZ 27 { 0, 0, 0x00, 0x00 }, /* HF_DVBC (Unused) */
28 { 0, 0, 0x00, 0x00 }, // HF_DVBC (Unused)
29}; 28};
30 29
31struct SMap m_BP_Filter_Map[] = { 30struct SMap m_BP_Filter_Map[] = {
32 { 62000000, 0x00 }, 31 { 62000000, 0x00 },
33 { 84000000, 0x01 }, 32 { 84000000, 0x01 },
34 { 100000000, 0x02 }, 33 { 100000000, 0x02 },
35 { 140000000, 0x03 }, 34 { 140000000, 0x03 },
36 { 170000000, 0x04 }, 35 { 170000000, 0x04 },
37 { 180000000, 0x05 }, 36 { 180000000, 0x05 },
38 { 865000000, 0x06 }, 37 { 865000000, 0x06 },
39 { 0, 0x00 }, // Table End 38 { 0, 0x00 }, /* Table End */
40}; 39};
41 40
42static struct SMapI m_RF_Cal_Map[] = { 41static struct SMapI m_RF_Cal_Map[] = {
43 { 41000000, 0x0F }, 42 { 41000000, 0x0F },
44 { 43000000, 0x1C }, 43 { 43000000, 0x1C },
45 { 45000000, 0x2F }, 44 { 45000000, 0x2F },
46 { 46000000, 0x39 }, 45 { 46000000, 0x39 },
47 { 47000000, 0x40 }, 46 { 47000000, 0x40 },
48 { 47900000, 0x50 }, 47 { 47900000, 0x50 },
49 { 49100000, 0x16 }, 48 { 49100000, 0x16 },
50 { 50000000, 0x18 }, 49 { 50000000, 0x18 },
51 { 51000000, 0x20 }, 50 { 51000000, 0x20 },
52 { 53000000, 0x28 }, 51 { 53000000, 0x28 },
53 { 55000000, 0x2B }, 52 { 55000000, 0x2B },
54 { 56000000, 0x32 }, 53 { 56000000, 0x32 },
55 { 57000000, 0x35 }, 54 { 57000000, 0x35 },
56 { 58000000, 0x3E }, 55 { 58000000, 0x3E },
57 { 59000000, 0x43 }, 56 { 59000000, 0x43 },
58 { 60000000, 0x4E }, 57 { 60000000, 0x4E },
59 { 61100000, 0x55 }, 58 { 61100000, 0x55 },
60 { 63000000, 0x0F }, 59 { 63000000, 0x0F },
61 { 64000000, 0x11 }, 60 { 64000000, 0x11 },
62 { 65000000, 0x12 }, 61 { 65000000, 0x12 },
63 { 66000000, 0x15 }, 62 { 66000000, 0x15 },
64 { 67000000, 0x16 }, 63 { 67000000, 0x16 },
65 { 68000000, 0x17 }, 64 { 68000000, 0x17 },
66 { 70000000, 0x19 }, 65 { 70000000, 0x19 },
67 { 71000000, 0x1C }, 66 { 71000000, 0x1C },
68 { 72000000, 0x1D }, 67 { 72000000, 0x1D },
69 { 73000000, 0x1F }, 68 { 73000000, 0x1F },
70 { 74000000, 0x20 }, 69 { 74000000, 0x20 },
71 { 75000000, 0x21 }, 70 { 75000000, 0x21 },
72 { 76000000, 0x24 }, 71 { 76000000, 0x24 },
73 { 77000000, 0x25 }, 72 { 77000000, 0x25 },
74 { 78000000, 0x27 }, 73 { 78000000, 0x27 },
75 { 80000000, 0x28 }, 74 { 80000000, 0x28 },
76 { 81000000, 0x29 }, 75 { 81000000, 0x29 },
77 { 82000000, 0x2D }, 76 { 82000000, 0x2D },
78 { 83000000, 0x2E }, 77 { 83000000, 0x2E },
79 { 84000000, 0x2F }, 78 { 84000000, 0x2F },
80 { 85000000, 0x31 }, 79 { 85000000, 0x31 },
81 { 86000000, 0x33 }, 80 { 86000000, 0x33 },
82 { 87000000, 0x34 }, 81 { 87000000, 0x34 },
83 { 88000000, 0x35 }, 82 { 88000000, 0x35 },
84 { 89000000, 0x37 }, 83 { 89000000, 0x37 },
85 { 90000000, 0x38 }, 84 { 90000000, 0x38 },
86 { 91000000, 0x39 }, 85 { 91000000, 0x39 },
87 { 93000000, 0x3C }, 86 { 93000000, 0x3C },
88 { 94000000, 0x3E }, 87 { 94000000, 0x3E },
89 { 95000000, 0x3F }, 88 { 95000000, 0x3F },
90 { 96000000, 0x40 }, 89 { 96000000, 0x40 },
91 { 97000000, 0x42 }, 90 { 97000000, 0x42 },
92 { 99000000, 0x45 }, 91 { 99000000, 0x45 },
93 { 100000000, 0x46 }, 92 { 100000000, 0x46 },
94 { 102000000, 0x48 }, 93 { 102000000, 0x48 },
95 { 103000000, 0x4A }, 94 { 103000000, 0x4A },
96 { 105000000, 0x4D }, 95 { 105000000, 0x4D },
97 { 106000000, 0x4E }, 96 { 106000000, 0x4E },
98 { 107000000, 0x50 }, 97 { 107000000, 0x50 },
99 { 108000000, 0x51 }, 98 { 108000000, 0x51 },
100 { 110000000, 0x54 }, 99 { 110000000, 0x54 },
101 { 111000000, 0x56 }, 100 { 111000000, 0x56 },
102 { 112000000, 0x57 }, 101 { 112000000, 0x57 },
103 { 113000000, 0x58 }, 102 { 113000000, 0x58 },
104 { 114000000, 0x59 }, 103 { 114000000, 0x59 },
105 { 115000000, 0x5C }, 104 { 115000000, 0x5C },
106 { 116000000, 0x5D }, 105 { 116000000, 0x5D },
107 { 117000000, 0x5F }, 106 { 117000000, 0x5F },
108 { 119000000, 0x60 }, 107 { 119000000, 0x60 },
109 { 120000000, 0x64 }, 108 { 120000000, 0x64 },
110 { 121000000, 0x65 }, 109 { 121000000, 0x65 },
111 { 122000000, 0x66 }, 110 { 122000000, 0x66 },
112 { 123000000, 0x68 }, 111 { 123000000, 0x68 },
113 { 124000000, 0x69 }, 112 { 124000000, 0x69 },
114 { 125000000, 0x6C }, 113 { 125000000, 0x6C },
115 { 126000000, 0x6D }, 114 { 126000000, 0x6D },
116 { 127000000, 0x6E }, 115 { 127000000, 0x6E },
117 { 128000000, 0x70 }, 116 { 128000000, 0x70 },
118 { 129000000, 0x71 }, 117 { 129000000, 0x71 },
119 { 130000000, 0x75 }, 118 { 130000000, 0x75 },
120 { 131000000, 0x77 }, 119 { 131000000, 0x77 },
121 { 132000000, 0x78 }, 120 { 132000000, 0x78 },
122 { 133000000, 0x7B }, 121 { 133000000, 0x7B },
123 { 134000000, 0x7E }, 122 { 134000000, 0x7E },
124 { 135000000, 0x81 }, 123 { 135000000, 0x81 },
125 { 136000000, 0x82 }, 124 { 136000000, 0x82 },
126 { 137000000, 0x87 }, 125 { 137000000, 0x87 },
127 { 138000000, 0x88 }, 126 { 138000000, 0x88 },
128 { 139000000, 0x8D }, 127 { 139000000, 0x8D },
129 { 140000000, 0x8E }, 128 { 140000000, 0x8E },
130 { 141000000, 0x91 }, 129 { 141000000, 0x91 },
131 { 142000000, 0x95 }, 130 { 142000000, 0x95 },
132 { 143000000, 0x9A }, 131 { 143000000, 0x9A },
133 { 144000000, 0x9D }, 132 { 144000000, 0x9D },
134 { 145000000, 0xA1 }, 133 { 145000000, 0xA1 },
135 { 146000000, 0xA2 }, 134 { 146000000, 0xA2 },
136 { 147000000, 0xA4 }, 135 { 147000000, 0xA4 },
137 { 148000000, 0xA9 }, 136 { 148000000, 0xA9 },
138 { 149000000, 0xAE }, 137 { 149000000, 0xAE },
139 { 150000000, 0xB0 }, 138 { 150000000, 0xB0 },
140 { 151000000, 0xB1 }, 139 { 151000000, 0xB1 },
141 { 152000000, 0xB7 }, 140 { 152000000, 0xB7 },
142 { 152600000, 0xBD }, 141 { 152600000, 0xBD },
143 { 154000000, 0x20 }, 142 { 154000000, 0x20 },
144 { 155000000, 0x22 }, 143 { 155000000, 0x22 },
145 { 156000000, 0x24 }, 144 { 156000000, 0x24 },
146 { 157000000, 0x25 }, 145 { 157000000, 0x25 },
147 { 158000000, 0x27 }, 146 { 158000000, 0x27 },
148 { 159000000, 0x29 }, 147 { 159000000, 0x29 },
149 { 160000000, 0x2C }, 148 { 160000000, 0x2C },
150 { 161000000, 0x2D }, 149 { 161000000, 0x2D },
151 { 163000000, 0x2E }, 150 { 163000000, 0x2E },
152 { 164000000, 0x2F }, 151 { 164000000, 0x2F },
153 { 164700000, 0x30 }, 152 { 164700000, 0x30 },
154 { 166000000, 0x11 }, 153 { 166000000, 0x11 },
155 { 167000000, 0x12 }, 154 { 167000000, 0x12 },
156 { 168000000, 0x13 }, 155 { 168000000, 0x13 },
157 { 169000000, 0x14 }, 156 { 169000000, 0x14 },
158 { 170000000, 0x15 }, 157 { 170000000, 0x15 },
159 { 172000000, 0x16 }, 158 { 172000000, 0x16 },
160 { 173000000, 0x17 }, 159 { 173000000, 0x17 },
161 { 174000000, 0x18 }, 160 { 174000000, 0x18 },
162 { 175000000, 0x1A }, 161 { 175000000, 0x1A },
163 { 176000000, 0x1B }, 162 { 176000000, 0x1B },
164 { 178000000, 0x1D }, 163 { 178000000, 0x1D },
165 { 179000000, 0x1E }, 164 { 179000000, 0x1E },
166 { 180000000, 0x1F }, 165 { 180000000, 0x1F },
167 { 181000000, 0x20 }, 166 { 181000000, 0x20 },
168 { 182000000, 0x21 }, 167 { 182000000, 0x21 },
169 { 183000000, 0x22 }, 168 { 183000000, 0x22 },
170 { 184000000, 0x24 }, 169 { 184000000, 0x24 },
171 { 185000000, 0x25 }, 170 { 185000000, 0x25 },
172 { 186000000, 0x26 }, 171 { 186000000, 0x26 },
173 { 187000000, 0x27 }, 172 { 187000000, 0x27 },
174 { 188000000, 0x29 }, 173 { 188000000, 0x29 },
175 { 189000000, 0x2A }, 174 { 189000000, 0x2A },
176 { 190000000, 0x2C }, 175 { 190000000, 0x2C },
177 { 191000000, 0x2D }, 176 { 191000000, 0x2D },
178 { 192000000, 0x2E }, 177 { 192000000, 0x2E },
179 { 193000000, 0x2F }, 178 { 193000000, 0x2F },
180 { 194000000, 0x30 }, 179 { 194000000, 0x30 },
181 { 195000000, 0x33 }, 180 { 195000000, 0x33 },
182 { 196000000, 0x35 }, 181 { 196000000, 0x35 },
183 { 198000000, 0x36 }, 182 { 198000000, 0x36 },
184 { 200000000, 0x38 }, 183 { 200000000, 0x38 },
185 { 201000000, 0x3C }, 184 { 201000000, 0x3C },
186 { 202000000, 0x3D }, 185 { 202000000, 0x3D },
187 { 203500000, 0x3E }, 186 { 203500000, 0x3E },
188 { 206000000, 0x0E }, 187 { 206000000, 0x0E },
189 { 208000000, 0x0F }, 188 { 208000000, 0x0F },
190 { 212000000, 0x10 }, 189 { 212000000, 0x10 },
191 { 216000000, 0x11 }, 190 { 216000000, 0x11 },
192 { 217000000, 0x12 }, 191 { 217000000, 0x12 },
193 { 218000000, 0x13 }, 192 { 218000000, 0x13 },
194 { 220000000, 0x14 }, 193 { 220000000, 0x14 },
195 { 222000000, 0x15 }, 194 { 222000000, 0x15 },
196 { 225000000, 0x16 }, 195 { 225000000, 0x16 },
197 { 228000000, 0x17 }, 196 { 228000000, 0x17 },
198 { 231000000, 0x18 }, 197 { 231000000, 0x18 },
199 { 234000000, 0x19 }, 198 { 234000000, 0x19 },
200 { 235000000, 0x1A }, 199 { 235000000, 0x1A },
201 { 236000000, 0x1B }, 200 { 236000000, 0x1B },
202 { 237000000, 0x1C }, 201 { 237000000, 0x1C },
203 { 240000000, 0x1D }, 202 { 240000000, 0x1D },
204 { 242000000, 0x1E }, 203 { 242000000, 0x1E },
205 { 244000000, 0x1F }, 204 { 244000000, 0x1F },
206 { 247000000, 0x20 }, 205 { 247000000, 0x20 },
207 { 249000000, 0x21 }, 206 { 249000000, 0x21 },
208 { 252000000, 0x22 }, 207 { 252000000, 0x22 },
209 { 253000000, 0x23 }, 208 { 253000000, 0x23 },
210 { 254000000, 0x24 }, 209 { 254000000, 0x24 },
211 { 256000000, 0x25 }, 210 { 256000000, 0x25 },
212 { 259000000, 0x26 }, 211 { 259000000, 0x26 },
213 { 262000000, 0x27 }, 212 { 262000000, 0x27 },
214 { 264000000, 0x28 }, 213 { 264000000, 0x28 },
215 { 267000000, 0x29 }, 214 { 267000000, 0x29 },
216 { 269000000, 0x2A }, 215 { 269000000, 0x2A },
217 { 271000000, 0x2B }, 216 { 271000000, 0x2B },
218 { 273000000, 0x2C }, 217 { 273000000, 0x2C },
219 { 275000000, 0x2D }, 218 { 275000000, 0x2D },
220 { 277000000, 0x2E }, 219 { 277000000, 0x2E },
221 { 279000000, 0x2F }, 220 { 279000000, 0x2F },
222 { 282000000, 0x30 }, 221 { 282000000, 0x30 },
223 { 284000000, 0x31 }, 222 { 284000000, 0x31 },
224 { 286000000, 0x32 }, 223 { 286000000, 0x32 },
225 { 287000000, 0x33 }, 224 { 287000000, 0x33 },
226 { 290000000, 0x34 }, 225 { 290000000, 0x34 },
227 { 293000000, 0x35 }, 226 { 293000000, 0x35 },
228 { 295000000, 0x36 }, 227 { 295000000, 0x36 },
229 { 297000000, 0x37 }, 228 { 297000000, 0x37 },
230 { 300000000, 0x38 }, 229 { 300000000, 0x38 },
231 { 303000000, 0x39 }, 230 { 303000000, 0x39 },
232 { 305000000, 0x3A }, 231 { 305000000, 0x3A },
233 { 306000000, 0x3B }, 232 { 306000000, 0x3B },
234 { 307000000, 0x3C }, 233 { 307000000, 0x3C },
235 { 310000000, 0x3D }, 234 { 310000000, 0x3D },
236 { 312000000, 0x3E }, 235 { 312000000, 0x3E },
237 { 315000000, 0x3F }, 236 { 315000000, 0x3F },
238 { 318000000, 0x40 }, 237 { 318000000, 0x40 },
239 { 320000000, 0x41 }, 238 { 320000000, 0x41 },
240 { 323000000, 0x42 }, 239 { 323000000, 0x42 },
241 { 324000000, 0x43 }, 240 { 324000000, 0x43 },
242 { 325000000, 0x44 }, 241 { 325000000, 0x44 },
243 { 327000000, 0x45 }, 242 { 327000000, 0x45 },
244 { 331000000, 0x46 }, 243 { 331000000, 0x46 },
245 { 334000000, 0x47 }, 244 { 334000000, 0x47 },
246 { 337000000, 0x48 }, 245 { 337000000, 0x48 },
247 { 339000000, 0x49 }, 246 { 339000000, 0x49 },
248 { 340000000, 0x4A }, 247 { 340000000, 0x4A },
249 { 341000000, 0x4B }, 248 { 341000000, 0x4B },
250 { 343000000, 0x4C }, 249 { 343000000, 0x4C },
251 { 345000000, 0x4D }, 250 { 345000000, 0x4D },
252 { 349000000, 0x4E }, 251 { 349000000, 0x4E },
253 { 352000000, 0x4F }, 252 { 352000000, 0x4F },
254 { 353000000, 0x50 }, 253 { 353000000, 0x50 },
255 { 355000000, 0x51 }, 254 { 355000000, 0x51 },
256 { 357000000, 0x52 }, 255 { 357000000, 0x52 },
257 { 359000000, 0x53 }, 256 { 359000000, 0x53 },
258 { 361000000, 0x54 }, 257 { 361000000, 0x54 },
259 { 362000000, 0x55 }, 258 { 362000000, 0x55 },
260 { 364000000, 0x56 }, 259 { 364000000, 0x56 },
261 { 368000000, 0x57 }, 260 { 368000000, 0x57 },
262 { 370000000, 0x58 }, 261 { 370000000, 0x58 },
263 { 372000000, 0x59 }, 262 { 372000000, 0x59 },
264 { 375000000, 0x5A }, 263 { 375000000, 0x5A },
265 { 376000000, 0x5B }, 264 { 376000000, 0x5B },
266 { 377000000, 0x5C }, 265 { 377000000, 0x5C },
267 { 379000000, 0x5D }, 266 { 379000000, 0x5D },
268 { 382000000, 0x5E }, 267 { 382000000, 0x5E },
269 { 384000000, 0x5F }, 268 { 384000000, 0x5F },
270 { 385000000, 0x60 }, 269 { 385000000, 0x60 },
271 { 386000000, 0x61 }, 270 { 386000000, 0x61 },
272 { 388000000, 0x62 }, 271 { 388000000, 0x62 },
273 { 390000000, 0x63 }, 272 { 390000000, 0x63 },
274 { 393000000, 0x64 }, 273 { 393000000, 0x64 },
275 { 394000000, 0x65 }, 274 { 394000000, 0x65 },
276 { 396000000, 0x66 }, 275 { 396000000, 0x66 },
277 { 397000000, 0x67 }, 276 { 397000000, 0x67 },
278 { 398000000, 0x68 }, 277 { 398000000, 0x68 },
279 { 400000000, 0x69 }, 278 { 400000000, 0x69 },
280 { 402000000, 0x6A }, 279 { 402000000, 0x6A },
281 { 403000000, 0x6B }, 280 { 403000000, 0x6B },
282 { 407000000, 0x6C }, 281 { 407000000, 0x6C },
283 { 408000000, 0x6D }, 282 { 408000000, 0x6D },
284 { 409000000, 0x6E }, 283 { 409000000, 0x6E },
285 { 410000000, 0x6F }, 284 { 410000000, 0x6F },
286 { 411000000, 0x70 }, 285 { 411000000, 0x70 },
287 { 412000000, 0x71 }, 286 { 412000000, 0x71 },
288 { 413000000, 0x72 }, 287 { 413000000, 0x72 },
289 { 414000000, 0x73 }, 288 { 414000000, 0x73 },
290 { 417000000, 0x74 }, 289 { 417000000, 0x74 },
291 { 418000000, 0x75 }, 290 { 418000000, 0x75 },
292 { 420000000, 0x76 }, 291 { 420000000, 0x76 },
293 { 422000000, 0x77 }, 292 { 422000000, 0x77 },
294 { 423000000, 0x78 }, 293 { 423000000, 0x78 },
295 { 424000000, 0x79 }, 294 { 424000000, 0x79 },
296 { 427000000, 0x7A }, 295 { 427000000, 0x7A },
297 { 428000000, 0x7B }, 296 { 428000000, 0x7B },
298 { 429000000, 0x7D }, 297 { 429000000, 0x7D },
299 { 432000000, 0x7F }, 298 { 432000000, 0x7F },
300 { 434000000, 0x80 }, 299 { 434000000, 0x80 },
301 { 435000000, 0x81 }, 300 { 435000000, 0x81 },
302 { 436000000, 0x83 }, 301 { 436000000, 0x83 },
303 { 437000000, 0x84 }, 302 { 437000000, 0x84 },
304 { 438000000, 0x85 }, 303 { 438000000, 0x85 },
305 { 439000000, 0x86 }, 304 { 439000000, 0x86 },
306 { 440000000, 0x87 }, 305 { 440000000, 0x87 },
307 { 441000000, 0x88 }, 306 { 441000000, 0x88 },
308 { 442000000, 0x89 }, 307 { 442000000, 0x89 },
309 { 445000000, 0x8A }, 308 { 445000000, 0x8A },
310 { 446000000, 0x8B }, 309 { 446000000, 0x8B },
311 { 447000000, 0x8C }, 310 { 447000000, 0x8C },
312 { 448000000, 0x8E }, 311 { 448000000, 0x8E },
313 { 449000000, 0x8F }, 312 { 449000000, 0x8F },
314 { 450000000, 0x90 }, 313 { 450000000, 0x90 },
315 { 452000000, 0x91 }, 314 { 452000000, 0x91 },
316 { 453000000, 0x93 }, 315 { 453000000, 0x93 },
317 { 454000000, 0x94 }, 316 { 454000000, 0x94 },
318 { 456000000, 0x96 }, 317 { 456000000, 0x96 },
319 { 457800000, 0x98 }, 318 { 457800000, 0x98 },
320 { 461000000, 0x11 }, 319 { 461000000, 0x11 },
321 { 468000000, 0x12 }, 320 { 468000000, 0x12 },
322 { 472000000, 0x13 }, 321 { 472000000, 0x13 },
323 { 473000000, 0x14 }, 322 { 473000000, 0x14 },
324 { 474000000, 0x15 }, 323 { 474000000, 0x15 },
325 { 481000000, 0x16 }, 324 { 481000000, 0x16 },
326 { 486000000, 0x17 }, 325 { 486000000, 0x17 },
327 { 491000000, 0x18 }, 326 { 491000000, 0x18 },
328 { 498000000, 0x19 }, 327 { 498000000, 0x19 },
329 { 499000000, 0x1A }, 328 { 499000000, 0x1A },
330 { 501000000, 0x1B }, 329 { 501000000, 0x1B },
331 { 506000000, 0x1C }, 330 { 506000000, 0x1C },
332 { 511000000, 0x1D }, 331 { 511000000, 0x1D },
333 { 516000000, 0x1E }, 332 { 516000000, 0x1E },
334 { 520000000, 0x1F }, 333 { 520000000, 0x1F },
335 { 521000000, 0x20 }, 334 { 521000000, 0x20 },
336 { 525000000, 0x21 }, 335 { 525000000, 0x21 },
337 { 529000000, 0x22 }, 336 { 529000000, 0x22 },
338 { 533000000, 0x23 }, 337 { 533000000, 0x23 },
339 { 539000000, 0x24 }, 338 { 539000000, 0x24 },
340 { 541000000, 0x25 }, 339 { 541000000, 0x25 },
341 { 547000000, 0x26 }, 340 { 547000000, 0x26 },
342 { 549000000, 0x27 }, 341 { 549000000, 0x27 },
343 { 551000000, 0x28 }, 342 { 551000000, 0x28 },
344 { 556000000, 0x29 }, 343 { 556000000, 0x29 },
345 { 561000000, 0x2A }, 344 { 561000000, 0x2A },
346 { 563000000, 0x2B }, 345 { 563000000, 0x2B },
347 { 565000000, 0x2C }, 346 { 565000000, 0x2C },
348 { 569000000, 0x2D }, 347 { 569000000, 0x2D },
349 { 571000000, 0x2E }, 348 { 571000000, 0x2E },
350 { 577000000, 0x2F }, 349 { 577000000, 0x2F },
351 { 580000000, 0x30 }, 350 { 580000000, 0x30 },
352 { 582000000, 0x31 }, 351 { 582000000, 0x31 },
353 { 584000000, 0x32 }, 352 { 584000000, 0x32 },
354 { 588000000, 0x33 }, 353 { 588000000, 0x33 },
355 { 591000000, 0x34 }, 354 { 591000000, 0x34 },
356 { 596000000, 0x35 }, 355 { 596000000, 0x35 },
357 { 598000000, 0x36 }, 356 { 598000000, 0x36 },
358 { 603000000, 0x37 }, 357 { 603000000, 0x37 },
359 { 604000000, 0x38 }, 358 { 604000000, 0x38 },
360 { 606000000, 0x39 }, 359 { 606000000, 0x39 },
361 { 612000000, 0x3A }, 360 { 612000000, 0x3A },
362 { 615000000, 0x3B }, 361 { 615000000, 0x3B },
363 { 617000000, 0x3C }, 362 { 617000000, 0x3C },
364 { 621000000, 0x3D }, 363 { 621000000, 0x3D },
365 { 622000000, 0x3E }, 364 { 622000000, 0x3E },
366 { 625000000, 0x3F }, 365 { 625000000, 0x3F },
367 { 632000000, 0x40 }, 366 { 632000000, 0x40 },
368 { 633000000, 0x41 }, 367 { 633000000, 0x41 },
369 { 634000000, 0x42 }, 368 { 634000000, 0x42 },
370 { 642000000, 0x43 }, 369 { 642000000, 0x43 },
371 { 643000000, 0x44 }, 370 { 643000000, 0x44 },
372 { 647000000, 0x45 }, 371 { 647000000, 0x45 },
373 { 650000000, 0x46 }, 372 { 650000000, 0x46 },
374 { 652000000, 0x47 }, 373 { 652000000, 0x47 },
375 { 657000000, 0x48 }, 374 { 657000000, 0x48 },
376 { 661000000, 0x49 }, 375 { 661000000, 0x49 },
377 { 662000000, 0x4A }, 376 { 662000000, 0x4A },
378 { 665000000, 0x4B }, 377 { 665000000, 0x4B },
379 { 667000000, 0x4C }, 378 { 667000000, 0x4C },
380 { 670000000, 0x4D }, 379 { 670000000, 0x4D },
381 { 673000000, 0x4E }, 380 { 673000000, 0x4E },
382 { 676000000, 0x4F }, 381 { 676000000, 0x4F },
383 { 677000000, 0x50 }, 382 { 677000000, 0x50 },
384 { 681000000, 0x51 }, 383 { 681000000, 0x51 },
385 { 683000000, 0x52 }, 384 { 683000000, 0x52 },
386 { 686000000, 0x53 }, 385 { 686000000, 0x53 },
387 { 688000000, 0x54 }, 386 { 688000000, 0x54 },
388 { 689000000, 0x55 }, 387 { 689000000, 0x55 },
389 { 691000000, 0x56 }, 388 { 691000000, 0x56 },
390 { 695000000, 0x57 }, 389 { 695000000, 0x57 },
391 { 698000000, 0x58 }, 390 { 698000000, 0x58 },
392 { 703000000, 0x59 }, 391 { 703000000, 0x59 },
393 { 704000000, 0x5A }, 392 { 704000000, 0x5A },
394 { 705000000, 0x5B }, 393 { 705000000, 0x5B },
395 { 707000000, 0x5C }, 394 { 707000000, 0x5C },
396 { 710000000, 0x5D }, 395 { 710000000, 0x5D },
397 { 712000000, 0x5E }, 396 { 712000000, 0x5E },
398 { 717000000, 0x5F }, 397 { 717000000, 0x5F },
399 { 718000000, 0x60 }, 398 { 718000000, 0x60 },
400 { 721000000, 0x61 }, 399 { 721000000, 0x61 },
401 { 722000000, 0x62 }, 400 { 722000000, 0x62 },
402 { 723000000, 0x63 }, 401 { 723000000, 0x63 },
403 { 725000000, 0x64 }, 402 { 725000000, 0x64 },
404 { 727000000, 0x65 }, 403 { 727000000, 0x65 },
405 { 730000000, 0x66 }, 404 { 730000000, 0x66 },
406 { 732000000, 0x67 }, 405 { 732000000, 0x67 },
407 { 735000000, 0x68 }, 406 { 735000000, 0x68 },
408 { 740000000, 0x69 }, 407 { 740000000, 0x69 },
409 { 741000000, 0x6A }, 408 { 741000000, 0x6A },
410 { 742000000, 0x6B }, 409 { 742000000, 0x6B },
411 { 743000000, 0x6C }, 410 { 743000000, 0x6C },
412 { 745000000, 0x6D }, 411 { 745000000, 0x6D },
413 { 747000000, 0x6E }, 412 { 747000000, 0x6E },
414 { 748000000, 0x6F }, 413 { 748000000, 0x6F },
415 { 750000000, 0x70 }, 414 { 750000000, 0x70 },
416 { 752000000, 0x71 }, 415 { 752000000, 0x71 },
417 { 754000000, 0x72 }, 416 { 754000000, 0x72 },
418 { 757000000, 0x73 }, 417 { 757000000, 0x73 },
419 { 758000000, 0x74 }, 418 { 758000000, 0x74 },
420 { 760000000, 0x75 }, 419 { 760000000, 0x75 },
421 { 763000000, 0x76 }, 420 { 763000000, 0x76 },
422 { 764000000, 0x77 }, 421 { 764000000, 0x77 },
423 { 766000000, 0x78 }, 422 { 766000000, 0x78 },
424 { 767000000, 0x79 }, 423 { 767000000, 0x79 },
425 { 768000000, 0x7A }, 424 { 768000000, 0x7A },
426 { 773000000, 0x7B }, 425 { 773000000, 0x7B },
427 { 774000000, 0x7C }, 426 { 774000000, 0x7C },
428 { 776000000, 0x7D }, 427 { 776000000, 0x7D },
429 { 777000000, 0x7E }, 428 { 777000000, 0x7E },
430 { 778000000, 0x7F }, 429 { 778000000, 0x7F },
431 { 779000000, 0x80 }, 430 { 779000000, 0x80 },
432 { 781000000, 0x81 }, 431 { 781000000, 0x81 },
433 { 783000000, 0x82 }, 432 { 783000000, 0x82 },
434 { 784000000, 0x83 }, 433 { 784000000, 0x83 },
435 { 785000000, 0x84 }, 434 { 785000000, 0x84 },
436 { 786000000, 0x85 }, 435 { 786000000, 0x85 },
437 { 793000000, 0x86 }, 436 { 793000000, 0x86 },
438 { 794000000, 0x87 }, 437 { 794000000, 0x87 },
439 { 795000000, 0x88 }, 438 { 795000000, 0x88 },
440 { 797000000, 0x89 }, 439 { 797000000, 0x89 },
441 { 799000000, 0x8A }, 440 { 799000000, 0x8A },
442 { 801000000, 0x8B }, 441 { 801000000, 0x8B },
443 { 802000000, 0x8C }, 442 { 802000000, 0x8C },
444 { 803000000, 0x8D }, 443 { 803000000, 0x8D },
445 { 804000000, 0x8E }, 444 { 804000000, 0x8E },
446 { 810000000, 0x90 }, 445 { 810000000, 0x90 },
447 { 811000000, 0x91 }, 446 { 811000000, 0x91 },
448 { 812000000, 0x92 }, 447 { 812000000, 0x92 },
449 { 814000000, 0x93 }, 448 { 814000000, 0x93 },
450 { 816000000, 0x94 }, 449 { 816000000, 0x94 },
451 { 817000000, 0x96 }, 450 { 817000000, 0x96 },
452 { 818000000, 0x97 }, 451 { 818000000, 0x97 },
453 { 820000000, 0x98 }, 452 { 820000000, 0x98 },
454 { 821000000, 0x99 }, 453 { 821000000, 0x99 },
455 { 822000000, 0x9A }, 454 { 822000000, 0x9A },
456 { 828000000, 0x9B }, 455 { 828000000, 0x9B },
457 { 829000000, 0x9D }, 456 { 829000000, 0x9D },
458 { 830000000, 0x9F }, 457 { 830000000, 0x9F },
459 { 831000000, 0xA0 }, 458 { 831000000, 0xA0 },
460 { 833000000, 0xA1 }, 459 { 833000000, 0xA1 },
461 { 835000000, 0xA2 }, 460 { 835000000, 0xA2 },
462 { 836000000, 0xA3 }, 461 { 836000000, 0xA3 },
463 { 837000000, 0xA4 }, 462 { 837000000, 0xA4 },
464 { 838000000, 0xA6 }, 463 { 838000000, 0xA6 },
465 { 840000000, 0xA8 }, 464 { 840000000, 0xA8 },
466 { 842000000, 0xA9 }, 465 { 842000000, 0xA9 },
467 { 845000000, 0xAA }, 466 { 845000000, 0xAA },
468 { 846000000, 0xAB }, 467 { 846000000, 0xAB },
469 { 847000000, 0xAD }, 468 { 847000000, 0xAD },
470 { 848000000, 0xAE }, 469 { 848000000, 0xAE },
471 { 852000000, 0xAF }, 470 { 852000000, 0xAF },
472 { 853000000, 0xB0 }, 471 { 853000000, 0xB0 },
473 { 858000000, 0xB1 }, 472 { 858000000, 0xB1 },
474 { 860000000, 0xB2 }, 473 { 860000000, 0xB2 },
475 { 861000000, 0xB3 }, 474 { 861000000, 0xB3 },
476 { 862000000, 0xB4 }, 475 { 862000000, 0xB4 },
477 { 863000000, 0xB6 }, 476 { 863000000, 0xB6 },
478 { 864000000, 0xB8 }, 477 { 864000000, 0xB8 },
479 { 865000000, 0xB9 }, 478 { 865000000, 0xB9 },
480 { 0, 0x00 }, // Table End 479 { 0, 0x00 }, /* Table End */
481}; 480};
482 481
483 482
484static struct SMap2 m_KM_Map[] = { 483static struct SMap2 m_KM_Map[] = {
485 { 47900000, 3, 2 }, 484 { 47900000, 3, 2 },
486 { 61100000, 3, 1 }, 485 { 61100000, 3, 1 },
487 { 350000000, 3, 0 }, 486 { 350000000, 3, 0 },
488 { 720000000, 2, 1 }, 487 { 720000000, 2, 1 },
489 { 865000000, 3, 3 }, 488 { 865000000, 3, 3 },
490 { 0, 0x00 }, // Table End 489 { 0, 0x00 }, /* Table End */
491}; 490};
492 491
493static struct SMap2 m_Main_PLL_Map[] = { 492static struct SMap2 m_Main_PLL_Map[] = {
494 { 33125000, 0x57, 0xF0 }, 493 { 33125000, 0x57, 0xF0 },
495 { 35500000, 0x56, 0xE0 }, 494 { 35500000, 0x56, 0xE0 },
496 { 38188000, 0x55, 0xD0 }, 495 { 38188000, 0x55, 0xD0 },
497 { 41375000, 0x54, 0xC0 }, 496 { 41375000, 0x54, 0xC0 },
498 { 45125000, 0x53, 0xB0 }, 497 { 45125000, 0x53, 0xB0 },
499 { 49688000, 0x52, 0xA0 }, 498 { 49688000, 0x52, 0xA0 },
500 { 55188000, 0x51, 0x90 }, 499 { 55188000, 0x51, 0x90 },
501 { 62125000, 0x50, 0x80 }, 500 { 62125000, 0x50, 0x80 },
502 { 66250000, 0x47, 0x78 }, 501 { 66250000, 0x47, 0x78 },
503 { 71000000, 0x46, 0x70 }, 502 { 71000000, 0x46, 0x70 },
504 { 76375000, 0x45, 0x68 }, 503 { 76375000, 0x45, 0x68 },
505 { 82750000, 0x44, 0x60 }, 504 { 82750000, 0x44, 0x60 },
506 { 90250000, 0x43, 0x58 }, 505 { 90250000, 0x43, 0x58 },
507 { 99375000, 0x42, 0x50 }, 506 { 99375000, 0x42, 0x50 },
508 { 110375000, 0x41, 0x48 }, 507 { 110375000, 0x41, 0x48 },
509 { 124250000, 0x40, 0x40 }, 508 { 124250000, 0x40, 0x40 },
510 { 132500000, 0x37, 0x3C }, 509 { 132500000, 0x37, 0x3C },
511 { 142000000, 0x36, 0x38 }, 510 { 142000000, 0x36, 0x38 },
512 { 152750000, 0x35, 0x34 }, 511 { 152750000, 0x35, 0x34 },
513 { 165500000, 0x34, 0x30 }, 512 { 165500000, 0x34, 0x30 },
514 { 180500000, 0x33, 0x2C }, 513 { 180500000, 0x33, 0x2C },
515 { 198750000, 0x32, 0x28 }, 514 { 198750000, 0x32, 0x28 },
516 { 220750000, 0x31, 0x24 }, 515 { 220750000, 0x31, 0x24 },
517 { 248500000, 0x30, 0x20 }, 516 { 248500000, 0x30, 0x20 },
518 { 265000000, 0x27, 0x1E }, 517 { 265000000, 0x27, 0x1E },
519 { 284000000, 0x26, 0x1C }, 518 { 284000000, 0x26, 0x1C },
520 { 305500000, 0x25, 0x1A }, 519 { 305500000, 0x25, 0x1A },
521 { 331000000, 0x24, 0x18 }, 520 { 331000000, 0x24, 0x18 },
522 { 361000000, 0x23, 0x16 }, 521 { 361000000, 0x23, 0x16 },
523 { 397500000, 0x22, 0x14 }, 522 { 397500000, 0x22, 0x14 },
524 { 441500000, 0x21, 0x12 }, 523 { 441500000, 0x21, 0x12 },
525 { 497000000, 0x20, 0x10 }, 524 { 497000000, 0x20, 0x10 },
526 { 530000000, 0x17, 0x0F }, 525 { 530000000, 0x17, 0x0F },
527 { 568000000, 0x16, 0x0E }, 526 { 568000000, 0x16, 0x0E },
528 { 611000000, 0x15, 0x0D }, 527 { 611000000, 0x15, 0x0D },
529 { 662000000, 0x14, 0x0C }, 528 { 662000000, 0x14, 0x0C },
530 { 722000000, 0x13, 0x0B }, 529 { 722000000, 0x13, 0x0B },
531 { 795000000, 0x12, 0x0A }, 530 { 795000000, 0x12, 0x0A },
532 { 883000000, 0x11, 0x09 }, 531 { 883000000, 0x11, 0x09 },
533 { 994000000, 0x10, 0x08 }, 532 { 994000000, 0x10, 0x08 },
534 { 0, 0x00, 0x00 }, // Table End 533 { 0, 0x00, 0x00 }, /* Table End */
535}; 534};
536 535
537static struct SMap2 m_Cal_PLL_Map[] = { 536static struct SMap2 m_Cal_PLL_Map[] = {
538 { 33813000, 0xDD, 0xD0 }, 537 { 33813000, 0xDD, 0xD0 },
539 { 36625000, 0xDC, 0xC0 }, 538 { 36625000, 0xDC, 0xC0 },
540 { 39938000, 0xDB, 0xB0 }, 539 { 39938000, 0xDB, 0xB0 },
541 { 43938000, 0xDA, 0xA0 }, 540 { 43938000, 0xDA, 0xA0 },
542 { 48813000, 0xD9, 0x90 }, 541 { 48813000, 0xD9, 0x90 },
543 { 54938000, 0xD8, 0x80 }, 542 { 54938000, 0xD8, 0x80 },
544 { 62813000, 0xD3, 0x70 }, 543 { 62813000, 0xD3, 0x70 },
545 { 67625000, 0xCD, 0x68 }, 544 { 67625000, 0xCD, 0x68 },
546 { 73250000, 0xCC, 0x60 }, 545 { 73250000, 0xCC, 0x60 },
547 { 79875000, 0xCB, 0x58 }, 546 { 79875000, 0xCB, 0x58 },
548 { 87875000, 0xCA, 0x50 }, 547 { 87875000, 0xCA, 0x50 },
549 { 97625000, 0xC9, 0x48 }, 548 { 97625000, 0xC9, 0x48 },
550 { 109875000, 0xC8, 0x40 }, 549 { 109875000, 0xC8, 0x40 },
551 { 125625000, 0xC3, 0x38 }, 550 { 125625000, 0xC3, 0x38 },
552 { 135250000, 0xBD, 0x34 }, 551 { 135250000, 0xBD, 0x34 },
553 { 146500000, 0xBC, 0x30 }, 552 { 146500000, 0xBC, 0x30 },
554 { 159750000, 0xBB, 0x2C }, 553 { 159750000, 0xBB, 0x2C },
555 { 175750000, 0xBA, 0x28 }, 554 { 175750000, 0xBA, 0x28 },
556 { 195250000, 0xB9, 0x24 }, 555 { 195250000, 0xB9, 0x24 },
557 { 219750000, 0xB8, 0x20 }, 556 { 219750000, 0xB8, 0x20 },
558 { 251250000, 0xB3, 0x1C }, 557 { 251250000, 0xB3, 0x1C },
559 { 270500000, 0xAD, 0x1A }, 558 { 270500000, 0xAD, 0x1A },
560 { 293000000, 0xAC, 0x18 }, 559 { 293000000, 0xAC, 0x18 },
561 { 319500000, 0xAB, 0x16 }, 560 { 319500000, 0xAB, 0x16 },
562 { 351500000, 0xAA, 0x14 }, 561 { 351500000, 0xAA, 0x14 },
563 { 390500000, 0xA9, 0x12 }, 562 { 390500000, 0xA9, 0x12 },
564 { 439500000, 0xA8, 0x10 }, 563 { 439500000, 0xA8, 0x10 },
565 { 502500000, 0xA3, 0x0E }, 564 { 502500000, 0xA3, 0x0E },
566 { 541000000, 0x9D, 0x0D }, 565 { 541000000, 0x9D, 0x0D },
567 { 586000000, 0x9C, 0x0C }, 566 { 586000000, 0x9C, 0x0C },
568 { 639000000, 0x9B, 0x0B }, 567 { 639000000, 0x9B, 0x0B },
569 { 703000000, 0x9A, 0x0A }, 568 { 703000000, 0x9A, 0x0A },
570 { 781000000, 0x99, 0x09 }, 569 { 781000000, 0x99, 0x09 },
571 { 879000000, 0x98, 0x08 }, 570 { 879000000, 0x98, 0x08 },
572 { 0, 0x00, 0x00 }, // Table End 571 { 0, 0x00, 0x00 }, /* Table End */
573}; 572};
574 573
575static struct SMap m_GainTaper_Map[] = { 574static struct SMap m_GainTaper_Map[] = {
576 { 45400000, 0x1F }, 575 { 45400000, 0x1F },
577 { 45800000, 0x1E }, 576 { 45800000, 0x1E },
578 { 46200000, 0x1D }, 577 { 46200000, 0x1D },
579 { 46700000, 0x1C }, 578 { 46700000, 0x1C },
580 { 47100000, 0x1B }, 579 { 47100000, 0x1B },
581 { 47500000, 0x1A }, 580 { 47500000, 0x1A },
582 { 47900000, 0x19 }, 581 { 47900000, 0x19 },
583 { 49600000, 0x17 }, 582 { 49600000, 0x17 },
584 { 51200000, 0x16 }, 583 { 51200000, 0x16 },
585 { 52900000, 0x15 }, 584 { 52900000, 0x15 },
586 { 54500000, 0x14 }, 585 { 54500000, 0x14 },
587 { 56200000, 0x13 }, 586 { 56200000, 0x13 },
588 { 57800000, 0x12 }, 587 { 57800000, 0x12 },
589 { 59500000, 0x11 }, 588 { 59500000, 0x11 },
590 { 61100000, 0x10 }, 589 { 61100000, 0x10 },
591 { 67600000, 0x0D }, 590 { 67600000, 0x0D },
592 { 74200000, 0x0C }, 591 { 74200000, 0x0C },
593 { 80700000, 0x0B }, 592 { 80700000, 0x0B },
594 { 87200000, 0x0A }, 593 { 87200000, 0x0A },
595 { 93800000, 0x09 }, 594 { 93800000, 0x09 },
596 { 100300000, 0x08 }, 595 { 100300000, 0x08 },
597 { 106900000, 0x07 }, 596 { 106900000, 0x07 },
598 { 113400000, 0x06 }, 597 { 113400000, 0x06 },
599 { 119900000, 0x05 }, 598 { 119900000, 0x05 },
600 { 126500000, 0x04 }, 599 { 126500000, 0x04 },
601 { 133000000, 0x03 }, 600 { 133000000, 0x03 },
602 { 139500000, 0x02 }, 601 { 139500000, 0x02 },
603 { 146100000, 0x01 }, 602 { 146100000, 0x01 },
604 { 152600000, 0x00 }, 603 { 152600000, 0x00 },
605 { 154300000, 0x1F }, 604 { 154300000, 0x1F },
606 { 156100000, 0x1E }, 605 { 156100000, 0x1E },
607 { 157800000, 0x1D }, 606 { 157800000, 0x1D },
608 { 159500000, 0x1C }, 607 { 159500000, 0x1C },
609 { 161200000, 0x1B }, 608 { 161200000, 0x1B },
610 { 163000000, 0x1A }, 609 { 163000000, 0x1A },
611 { 164700000, 0x19 }, 610 { 164700000, 0x19 },
612 { 170200000, 0x17 }, 611 { 170200000, 0x17 },
613 { 175800000, 0x16 }, 612 { 175800000, 0x16 },
614 { 181300000, 0x15 }, 613 { 181300000, 0x15 },
615 { 186900000, 0x14 }, 614 { 186900000, 0x14 },
616 { 192400000, 0x13 }, 615 { 192400000, 0x13 },
617 { 198000000, 0x12 }, 616 { 198000000, 0x12 },
618 { 203500000, 0x11 }, 617 { 203500000, 0x11 },
619 { 216200000, 0x14 }, 618 { 216200000, 0x14 },
620 { 228900000, 0x13 }, 619 { 228900000, 0x13 },
621 { 241600000, 0x12 }, 620 { 241600000, 0x12 },
622 { 254400000, 0x11 }, 621 { 254400000, 0x11 },
623 { 267100000, 0x10 }, 622 { 267100000, 0x10 },
624 { 279800000, 0x0F }, 623 { 279800000, 0x0F },
625 { 292500000, 0x0E }, 624 { 292500000, 0x0E },
626 { 305200000, 0x0D }, 625 { 305200000, 0x0D },
627 { 317900000, 0x0C }, 626 { 317900000, 0x0C },
628 { 330700000, 0x0B }, 627 { 330700000, 0x0B },
629 { 343400000, 0x0A }, 628 { 343400000, 0x0A },
630 { 356100000, 0x09 }, 629 { 356100000, 0x09 },
631 { 368800000, 0x08 }, 630 { 368800000, 0x08 },
632 { 381500000, 0x07 }, 631 { 381500000, 0x07 },
633 { 394200000, 0x06 }, 632 { 394200000, 0x06 },
634 { 406900000, 0x05 }, 633 { 406900000, 0x05 },
635 { 419700000, 0x04 }, 634 { 419700000, 0x04 },
636 { 432400000, 0x03 }, 635 { 432400000, 0x03 },
637 { 445100000, 0x02 }, 636 { 445100000, 0x02 },
638 { 457800000, 0x01 }, 637 { 457800000, 0x01 },
639 { 476300000, 0x19 }, 638 { 476300000, 0x19 },
640 { 494800000, 0x18 }, 639 { 494800000, 0x18 },
641 { 513300000, 0x17 }, 640 { 513300000, 0x17 },
642 { 531800000, 0x16 }, 641 { 531800000, 0x16 },
643 { 550300000, 0x15 }, 642 { 550300000, 0x15 },
644 { 568900000, 0x14 }, 643 { 568900000, 0x14 },
645 { 587400000, 0x13 }, 644 { 587400000, 0x13 },
646 { 605900000, 0x12 }, 645 { 605900000, 0x12 },
647 { 624400000, 0x11 }, 646 { 624400000, 0x11 },
648 { 642900000, 0x10 }, 647 { 642900000, 0x10 },
649 { 661400000, 0x0F }, 648 { 661400000, 0x0F },
650 { 679900000, 0x0E }, 649 { 679900000, 0x0E },
651 { 698400000, 0x0D }, 650 { 698400000, 0x0D },
652 { 716900000, 0x0C }, 651 { 716900000, 0x0C },
653 { 735400000, 0x0B }, 652 { 735400000, 0x0B },
654 { 753900000, 0x0A }, 653 { 753900000, 0x0A },
655 { 772500000, 0x09 }, 654 { 772500000, 0x09 },
656 { 791000000, 0x08 }, 655 { 791000000, 0x08 },
657 { 809500000, 0x07 }, 656 { 809500000, 0x07 },
658 { 828000000, 0x06 }, 657 { 828000000, 0x06 },
659 { 846500000, 0x05 }, 658 { 846500000, 0x05 },
660 { 865000000, 0x04 }, 659 { 865000000, 0x04 },
661 { 0, 0x00 }, // Table End 660 { 0, 0x00 }, /* Table End */
662}; 661};
663 662
664static struct SMap m_RF_Cal_DC_Over_DT_Map[] = { 663static struct SMap m_RF_Cal_DC_Over_DT_Map[] = {
665 { 47900000, 0x00 }, 664 { 47900000, 0x00 },
666 { 55000000, 0x00 }, 665 { 55000000, 0x00 },
667 { 61100000, 0x0A }, 666 { 61100000, 0x0A },
668 { 64000000, 0x0A }, 667 { 64000000, 0x0A },
669 { 82000000, 0x14 }, 668 { 82000000, 0x14 },
670 { 84000000, 0x19 }, 669 { 84000000, 0x19 },
671 { 119000000, 0x1C }, 670 { 119000000, 0x1C },
672 { 124000000, 0x20 }, 671 { 124000000, 0x20 },
673 { 129000000, 0x2A }, 672 { 129000000, 0x2A },
674 { 134000000, 0x32 }, 673 { 134000000, 0x32 },
675 { 139000000, 0x39 }, 674 { 139000000, 0x39 },
676 { 144000000, 0x3E }, 675 { 144000000, 0x3E },
677 { 149000000, 0x3F }, 676 { 149000000, 0x3F },
678 { 152600000, 0x40 }, 677 { 152600000, 0x40 },
679 { 154000000, 0x40 }, 678 { 154000000, 0x40 },
680 { 164700000, 0x41 }, 679 { 164700000, 0x41 },
681 { 203500000, 0x32 }, 680 { 203500000, 0x32 },
682 { 353000000, 0x19 }, 681 { 353000000, 0x19 },
683 { 356000000, 0x1A }, 682 { 356000000, 0x1A },
684 { 359000000, 0x1B }, 683 { 359000000, 0x1B },
685 { 363000000, 0x1C }, 684 { 363000000, 0x1C },
686 { 366000000, 0x1D }, 685 { 366000000, 0x1D },
687 { 369000000, 0x1E }, 686 { 369000000, 0x1E },
688 { 373000000, 0x1F }, 687 { 373000000, 0x1F },
689 { 376000000, 0x20 }, 688 { 376000000, 0x20 },
690 { 379000000, 0x21 }, 689 { 379000000, 0x21 },
691 { 383000000, 0x22 }, 690 { 383000000, 0x22 },
692 { 386000000, 0x23 }, 691 { 386000000, 0x23 },
693 { 389000000, 0x24 }, 692 { 389000000, 0x24 },
694 { 393000000, 0x25 }, 693 { 393000000, 0x25 },
695 { 396000000, 0x26 }, 694 { 396000000, 0x26 },
696 { 399000000, 0x27 }, 695 { 399000000, 0x27 },
697 { 402000000, 0x28 }, 696 { 402000000, 0x28 },
698 { 404000000, 0x29 }, 697 { 404000000, 0x29 },
699 { 407000000, 0x2A }, 698 { 407000000, 0x2A },
700 { 409000000, 0x2B }, 699 { 409000000, 0x2B },
701 { 412000000, 0x2C }, 700 { 412000000, 0x2C },
702 { 414000000, 0x2D }, 701 { 414000000, 0x2D },
703 { 417000000, 0x2E }, 702 { 417000000, 0x2E },
704 { 419000000, 0x2F }, 703 { 419000000, 0x2F },
705 { 422000000, 0x30 }, 704 { 422000000, 0x30 },
706 { 424000000, 0x31 }, 705 { 424000000, 0x31 },
707 { 427000000, 0x32 }, 706 { 427000000, 0x32 },
708 { 429000000, 0x33 }, 707 { 429000000, 0x33 },
709 { 432000000, 0x34 }, 708 { 432000000, 0x34 },
710 { 434000000, 0x35 }, 709 { 434000000, 0x35 },
711 { 437000000, 0x36 }, 710 { 437000000, 0x36 },
712 { 439000000, 0x37 }, 711 { 439000000, 0x37 },
713 { 442000000, 0x38 }, 712 { 442000000, 0x38 },
714 { 444000000, 0x39 }, 713 { 444000000, 0x39 },
715 { 447000000, 0x3A }, 714 { 447000000, 0x3A },
716 { 449000000, 0x3B }, 715 { 449000000, 0x3B },
717 { 457800000, 0x3C }, 716 { 457800000, 0x3C },
718 { 465000000, 0x0F }, 717 { 465000000, 0x0F },
719 { 477000000, 0x12 }, 718 { 477000000, 0x12 },
720 { 483000000, 0x14 }, 719 { 483000000, 0x14 },
721 { 502000000, 0x19 }, 720 { 502000000, 0x19 },
722 { 508000000, 0x1B }, 721 { 508000000, 0x1B },
723 { 519000000, 0x1C }, 722 { 519000000, 0x1C },
724 { 522000000, 0x1D }, 723 { 522000000, 0x1D },
725 { 524000000, 0x1E }, 724 { 524000000, 0x1E },
726 { 534000000, 0x1F }, 725 { 534000000, 0x1F },
727 { 549000000, 0x20 }, 726 { 549000000, 0x20 },
728 { 554000000, 0x22 }, 727 { 554000000, 0x22 },
729 { 584000000, 0x24 }, 728 { 584000000, 0x24 },
730 { 589000000, 0x26 }, 729 { 589000000, 0x26 },
731 { 658000000, 0x27 }, 730 { 658000000, 0x27 },
732 { 664000000, 0x2C }, 731 { 664000000, 0x2C },
733 { 669000000, 0x2D }, 732 { 669000000, 0x2D },
734 { 699000000, 0x2E }, 733 { 699000000, 0x2E },
735 { 704000000, 0x30 }, 734 { 704000000, 0x30 },
736 { 709000000, 0x31 }, 735 { 709000000, 0x31 },
737 { 714000000, 0x32 }, 736 { 714000000, 0x32 },
738 { 724000000, 0x33 }, 737 { 724000000, 0x33 },
739 { 729000000, 0x36 }, 738 { 729000000, 0x36 },
740 { 739000000, 0x38 }, 739 { 739000000, 0x38 },
741 { 744000000, 0x39 }, 740 { 744000000, 0x39 },
742 { 749000000, 0x3B }, 741 { 749000000, 0x3B },
743 { 754000000, 0x3C }, 742 { 754000000, 0x3C },
744 { 759000000, 0x3D }, 743 { 759000000, 0x3D },
745 { 764000000, 0x3E }, 744 { 764000000, 0x3E },
746 { 769000000, 0x3F }, 745 { 769000000, 0x3F },
747 { 774000000, 0x40 }, 746 { 774000000, 0x40 },
748 { 779000000, 0x41 }, 747 { 779000000, 0x41 },
749 { 784000000, 0x43 }, 748 { 784000000, 0x43 },
750 { 789000000, 0x46 }, 749 { 789000000, 0x46 },
751 { 794000000, 0x48 }, 750 { 794000000, 0x48 },
752 { 799000000, 0x4B }, 751 { 799000000, 0x4B },
753 { 804000000, 0x4F }, 752 { 804000000, 0x4F },
754 { 809000000, 0x54 }, 753 { 809000000, 0x54 },
755 { 814000000, 0x59 }, 754 { 814000000, 0x59 },
756 { 819000000, 0x5D }, 755 { 819000000, 0x5D },
757 { 824000000, 0x61 }, 756 { 824000000, 0x61 },
758 { 829000000, 0x68 }, 757 { 829000000, 0x68 },
759 { 834000000, 0x6E }, 758 { 834000000, 0x6E },
760 { 839000000, 0x75 }, 759 { 839000000, 0x75 },
761 { 844000000, 0x7E }, 760 { 844000000, 0x7E },
762 { 849000000, 0x82 }, 761 { 849000000, 0x82 },
763 { 854000000, 0x84 }, 762 { 854000000, 0x84 },
764 { 859000000, 0x8F }, 763 { 859000000, 0x8F },
765 { 865000000, 0x9A }, 764 { 865000000, 0x9A },
766 { 0, 0x00 }, // Table End 765 { 0, 0x00 }, /* Table End */
767}; 766};
768 767
769 768
770static struct SMap m_IR_Meas_Map[] = { 769static struct SMap m_IR_Meas_Map[] = {
771 { 200000000, 0x05 }, 770 { 200000000, 0x05 },
772 { 400000000, 0x06 }, 771 { 400000000, 0x06 },
773 { 865000000, 0x07 }, 772 { 865000000, 0x07 },
774 { 0, 0x00 }, // Table End 773 { 0, 0x00 }, /* Table End */
775}; 774};
776 775
777static struct SMap2 m_CID_Target_Map[] = { 776static struct SMap2 m_CID_Target_Map[] = {
778 { 46000000, 0x04, 18 }, 777 { 46000000, 0x04, 18 },
779 { 52200000, 0x0A, 15 }, 778 { 52200000, 0x0A, 15 },
780 { 70100000, 0x01, 40 }, 779 { 70100000, 0x01, 40 },
781 { 136800000, 0x18, 40 }, 780 { 136800000, 0x18, 40 },
782 { 156700000, 0x18, 40 }, 781 { 156700000, 0x18, 40 },
783 { 186250000, 0x0A, 40 }, 782 { 186250000, 0x0A, 40 },
784 { 230000000, 0x0A, 40 }, 783 { 230000000, 0x0A, 40 },
785 { 345000000, 0x18, 40 }, 784 { 345000000, 0x18, 40 },
786 { 426000000, 0x0E, 40 }, 785 { 426000000, 0x0E, 40 },
787 { 489500000, 0x1E, 40 }, 786 { 489500000, 0x1E, 40 },
788 { 697500000, 0x32, 40 }, 787 { 697500000, 0x32, 40 },
789 { 842000000, 0x3A, 40 }, 788 { 842000000, 0x3A, 40 },
790 { 0, 0x00, 0 }, // Table End 789 { 0, 0x00, 0 }, /* Table End */
791}; 790};
792 791
793static struct SRFBandMap m_RF_Band_Map[7] = { 792static struct SRFBandMap m_RF_Band_Map[7] = {
794 { 47900000, 46000000, 0, 0}, 793 { 47900000, 46000000, 0, 0},
795 { 61100000, 52200000, 0, 0}, 794 { 61100000, 52200000, 0, 0},
796 { 152600000, 70100000, 136800000, 0}, 795 { 152600000, 70100000, 136800000, 0},
797 { 164700000, 156700000, 0, 0}, 796 { 164700000, 156700000, 0, 0},
798 { 203500000, 186250000, 0, 0}, 797 { 203500000, 186250000, 0, 0},
799 { 457800000, 230000000, 345000000, 426000000}, 798 { 457800000, 230000000, 345000000, 426000000},
800 { 865000000, 489500000, 697500000, 842000000}, 799 { 865000000, 489500000, 697500000, 842000000},
801}; 800};
802 801
803u8 m_Thermometer_Map_1[16] = { 802u8 m_Thermometer_Map_1[16] = {
804 60,62,66,64, 74,72,68,70, 90,88,84,86, 76,78,82,80, 803 60, 62, 66, 64,
804 74, 72, 68, 70,
805 90, 88, 84, 86,
806 76, 78, 82, 80,
805}; 807};
806 808
807u8 m_Thermometer_Map_2[16] = { 809u8 m_Thermometer_Map_2[16] = {
808 92,94,98,96, 106,104,100,102, 122,120,116,118, 108,110,114,112, 810 92, 94, 98, 96,
811 106, 104, 100, 102,
812 122, 120, 116, 118,
813 108, 110, 114, 112,
809}; 814};
810
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-14 09:31:00 -0400