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authorOlivier Grenie <olivier.grenie@dibcom.fr>2011-08-05 12:49:33 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2011-11-24 17:48:11 -0500
commit6724a2f4f7a6cb9251641a46e1ab06bb85adf1b5 (patch)
treeb924ea227c503e0db722baad647983ce1f16bfb2 /drivers/media/dvb/frontends/dib0090.c
parent2e802861403c95ad6a566ff6d7a1a1a45d29c30e (diff)
[media] dib7090: add the reference board TFE7090E
The intend of this patch is to add the support for the DiBcom reference board TFE7090E. Signed-off-by: Olivier Grenie <olivier.grenie@dibcom.fr> Signed-off-by: Patrick Boettcher <patrick.boettcher@dibcom.fr> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/frontends/dib0090.c')
-rw-r--r--drivers/media/dvb/frontends/dib0090.c146
1 files changed, 141 insertions, 5 deletions
diff --git a/drivers/media/dvb/frontends/dib0090.c b/drivers/media/dvb/frontends/dib0090.c
index 9030f3dc95f9..26c6c615f18d 100644
--- a/drivers/media/dvb/frontends/dib0090.c
+++ b/drivers/media/dvb/frontends/dib0090.c
@@ -717,6 +717,34 @@ static const u16 rf_ramp_pwm_cband_7090[] = {
717 (0 << 10) | 109, /* RF_RAMP4, LNA 4 */ 717 (0 << 10) | 109, /* RF_RAMP4, LNA 4 */
718}; 718};
719 719
720static const uint16_t rf_ramp_pwm_cband_7090e_sensitivity[] = {
721 186,
722 40,
723 746,
724 (10 << 10) | 345,
725 (0 << 10) | 746,
726 (0 << 10) | 0,
727 (0 << 10) | 0,
728 (28 << 10) | 200,
729 (0 << 10) | 345,
730 (20 << 10) | 0,
731 (0 << 10) | 200,
732};
733
734static const uint16_t rf_ramp_pwm_cband_7090e_aci[] = {
735 86,
736 40,
737 345,
738 (0 << 10) | 0,
739 (0 << 10) | 0,
740 (0 << 10) | 0,
741 (0 << 10) | 0,
742 (28 << 10) | 200,
743 (0 << 10) | 345,
744 (20 << 10) | 0,
745 (0 << 10) | 200,
746};
747
720static const u16 rf_ramp_pwm_cband_8090[] = { 748static const u16 rf_ramp_pwm_cband_8090[] = {
721 345, /* max RF gain in 10th of dB */ 749 345, /* max RF gain in 10th of dB */
722 29, /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */ 750 29, /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */
@@ -1076,8 +1104,16 @@ void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
1076 dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal_socs); 1104 dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal_socs);
1077 if (state->identity.version == SOC_8090_P1G_11R1 || state->identity.version == SOC_8090_P1G_21R1) 1105 if (state->identity.version == SOC_8090_P1G_11R1 || state->identity.version == SOC_8090_P1G_21R1)
1078 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_8090); 1106 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_8090);
1079 else if (state->identity.version == SOC_7090_P1G_11R1 || state->identity.version == SOC_7090_P1G_21R1) 1107 else if (state->identity.version == SOC_7090_P1G_11R1
1080 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090); 1108 || state->identity.version == SOC_7090_P1G_21R1) {
1109 if (state->config->is_dib7090e) {
1110 if (state->rf_ramp == NULL)
1111 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090e_sensitivity);
1112 else
1113 dib0090_set_rframp_pwm(state, state->rf_ramp);
1114 } else
1115 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090);
1116 }
1081 } else { 1117 } else {
1082 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband); 1118 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband);
1083 dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal); 1119 dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
@@ -1313,7 +1349,7 @@ void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 *
1313 1349
1314EXPORT_SYMBOL(dib0090_get_current_gain); 1350EXPORT_SYMBOL(dib0090_get_current_gain);
1315 1351
1316u16 dib0090_get_wbd_offset(struct dvb_frontend *fe) 1352u16 dib0090_get_wbd_target(struct dvb_frontend *fe)
1317{ 1353{
1318 struct dib0090_state *state = fe->tuner_priv; 1354 struct dib0090_state *state = fe->tuner_priv;
1319 u32 f_MHz = state->fe->dtv_property_cache.frequency / 1000000; 1355 u32 f_MHz = state->fe->dtv_property_cache.frequency / 1000000;
@@ -1350,9 +1386,57 @@ u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
1350 1386
1351 return state->wbd_offset + wbd_tcold; 1387 return state->wbd_offset + wbd_tcold;
1352} 1388}
1389EXPORT_SYMBOL(dib0090_get_wbd_target);
1353 1390
1391u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
1392{
1393 struct dib0090_state *state = fe->tuner_priv;
1394 return state->wbd_offset;
1395}
1354EXPORT_SYMBOL(dib0090_get_wbd_offset); 1396EXPORT_SYMBOL(dib0090_get_wbd_offset);
1355 1397
1398int dib0090_set_switch(struct dvb_frontend *fe, u8 sw1, u8 sw2, u8 sw3)
1399{
1400 struct dib0090_state *state = fe->tuner_priv;
1401
1402 dib0090_write_reg(state, 0x0b, (dib0090_read_reg(state, 0x0b) & 0xfff8)
1403 | ((sw3 & 1) << 2) | ((sw2 & 1) << 1) | (sw1 & 1));
1404
1405 return 0;
1406}
1407EXPORT_SYMBOL(dib0090_set_switch);
1408
1409int dib0090_set_vga(struct dvb_frontend *fe, u8 onoff)
1410{
1411 struct dib0090_state *state = fe->tuner_priv;
1412
1413 dib0090_write_reg(state, 0x09, (dib0090_read_reg(state, 0x09) & 0x7fff)
1414 | ((onoff & 1) << 15));
1415 return 0;
1416}
1417EXPORT_SYMBOL(dib0090_set_vga);
1418
1419int dib0090_update_rframp_7090(struct dvb_frontend *fe, u8 cfg_sensitivity)
1420{
1421 struct dib0090_state *state = fe->tuner_priv;
1422
1423 if ((!state->identity.p1g) || (!state->identity.in_soc)
1424 || ((state->identity.version != SOC_7090_P1G_21R1)
1425 && (state->identity.version != SOC_7090_P1G_11R1))) {
1426 dprintk("%s() function can only be used for dib7090P", __func__);
1427 return -ENODEV;
1428 }
1429
1430 if (cfg_sensitivity)
1431 state->rf_ramp = (const u16 *)&rf_ramp_pwm_cband_7090e_sensitivity;
1432 else
1433 state->rf_ramp = (const u16 *)&rf_ramp_pwm_cband_7090e_aci;
1434 dib0090_pwm_gain_reset(fe);
1435
1436 return 0;
1437}
1438EXPORT_SYMBOL(dib0090_update_rframp_7090);
1439
1356static const u16 dib0090_defaults[] = { 1440static const u16 dib0090_defaults[] = {
1357 1441
1358 25, 0x01, 1442 25, 0x01,
@@ -1962,6 +2046,52 @@ static const struct dib0090_tuning dib0090_tuning_table_cband_7090[] = {
1962#endif 2046#endif
1963}; 2047};
1964 2048
2049static const struct dib0090_tuning dib0090_tuning_table_cband_7090e_sensitivity[] = {
2050#ifdef CONFIG_BAND_CBAND
2051 { 300000, 0 , 3, 0x8105, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
2052 { 380000, 0 , 10, 0x810F, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
2053 { 600000, 0 , 10, 0x815E, 0x280, 0x2d12, 0xb84e, EN_CAB },
2054 { 660000, 0 , 5, 0x85E3, 0x280, 0x2d12, 0xb84e, EN_CAB },
2055 { 720000, 0 , 5, 0x852E, 0x280, 0x2d12, 0xb84e, EN_CAB },
2056 { 860000, 0 , 4, 0x85E5, 0x280, 0x2d12, 0xb84e, EN_CAB },
2057#endif
2058};
2059
2060int dib0090_update_tuning_table_7090(struct dvb_frontend *fe,
2061 u8 cfg_sensitivity)
2062{
2063 struct dib0090_state *state = fe->tuner_priv;
2064 const struct dib0090_tuning *tune =
2065 dib0090_tuning_table_cband_7090e_sensitivity;
2066 const struct dib0090_tuning dib0090_tuning_table_cband_7090e_aci[] = {
2067 { 300000, 0 , 3, 0x8165, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
2068 { 650000, 0 , 4, 0x815B, 0x280, 0x2d12, 0xb84e, EN_CAB },
2069 { 860000, 0 , 5, 0x84EF, 0x280, 0x2d12, 0xb84e, EN_CAB },
2070 };
2071
2072 if ((!state->identity.p1g) || (!state->identity.in_soc)
2073 || ((state->identity.version != SOC_7090_P1G_21R1)
2074 && (state->identity.version != SOC_7090_P1G_11R1))) {
2075 dprintk("%s() function can only be used for dib7090", __func__);
2076 return -ENODEV;
2077 }
2078
2079 if (cfg_sensitivity)
2080 tune = dib0090_tuning_table_cband_7090e_sensitivity;
2081 else
2082 tune = dib0090_tuning_table_cband_7090e_aci;
2083
2084 while (state->rf_request > tune->max_freq)
2085 tune++;
2086
2087 dib0090_write_reg(state, 0x09, (dib0090_read_reg(state, 0x09) & 0x8000)
2088 | (tune->lna_bias & 0x7fff));
2089 dib0090_write_reg(state, 0x0b, (dib0090_read_reg(state, 0x0b) & 0xf83f)
2090 | ((tune->lna_tune << 6) & 0x07c0));
2091 return 0;
2092}
2093EXPORT_SYMBOL(dib0090_update_tuning_table_7090);
2094
1965static int dib0090_captrim_search(struct dib0090_state *state, enum frontend_tune_state *tune_state) 2095static int dib0090_captrim_search(struct dib0090_state *state, enum frontend_tune_state *tune_state)
1966{ 2096{
1967 int ret = 0; 2097 int ret = 0;
@@ -2210,12 +2340,18 @@ static int dib0090_tune(struct dvb_frontend *fe)
2210 if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF 2340 if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF
2211 || state->current_band & BAND_UHF) { 2341 || state->current_band & BAND_UHF) {
2212 state->current_band = BAND_CBAND; 2342 state->current_band = BAND_CBAND;
2213 tune = dib0090_tuning_table_cband_7090; 2343 if (state->config->is_dib7090e)
2344 tune = dib0090_tuning_table_cband_7090e_sensitivity;
2345 else
2346 tune = dib0090_tuning_table_cband_7090;
2214 } 2347 }
2215 } else { /* Use the CBAND input for all band under UHF */ 2348 } else { /* Use the CBAND input for all band under UHF */
2216 if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF) { 2349 if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF) {
2217 state->current_band = BAND_CBAND; 2350 state->current_band = BAND_CBAND;
2218 tune = dib0090_tuning_table_cband_7090; 2351 if (state->config->is_dib7090e)
2352 tune = dib0090_tuning_table_cband_7090e_sensitivity;
2353 else
2354 tune = dib0090_tuning_table_cband_7090;
2219 } 2355 }
2220 } 2356 }
2221 } else 2357 } else