diff options
author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-04-25 09:51:15 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-04-25 09:51:15 -0400 |
commit | c82056d0b4ac7b805ac4e7d3870c42bb19e3b3d5 (patch) | |
tree | d10c85e52e3a47effe3b9669c3f5b2cf6998a475 /drivers/media/dvb-frontends | |
parent | 6f7ee06f4ec40d2bfc91ec67ee6e40e5fd2f2e59 (diff) |
[media] dib8000: store dtv_property_cache in a temp var
dtv_property_cache is used on several places on very long lines.
On all places it is used, a long list of struct reference is done.
Instead of doing it, at the routines where it is used more than once,
replace it by one temporary var. That may help the compiler to
use a better code. It also makes easier to review the code, as the
lines becomes closer to 80 columns, making them a way clearer
to read.
No functional changes.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb-frontends')
-rw-r--r-- | drivers/media/dvb-frontends/dib8000.c | 255 |
1 files changed, 133 insertions, 122 deletions
diff --git a/drivers/media/dvb-frontends/dib8000.c b/drivers/media/dvb-frontends/dib8000.c index d065a72e0bb7..77dac46bfcbf 100644 --- a/drivers/media/dvb-frontends/dib8000.c +++ b/drivers/media/dvb-frontends/dib8000.c | |||
@@ -1941,8 +1941,9 @@ static const u8 permu_seg[] = { 6, 5, 7, 4, 8, 3, 9, 2, 10, 1, 11, 0, 12 }; | |||
1941 | static u16 dib8000_set_layer(struct dib8000_state *state, u8 layer_index, u16 max_constellation) | 1941 | static u16 dib8000_set_layer(struct dib8000_state *state, u8 layer_index, u16 max_constellation) |
1942 | { | 1942 | { |
1943 | u8 cr, constellation, time_intlv; | 1943 | u8 cr, constellation, time_intlv; |
1944 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
1944 | 1945 | ||
1945 | switch (state->fe[0]->dtv_property_cache.layer[layer_index].modulation) { | 1946 | switch (c->layer[layer_index].modulation) { |
1946 | case DQPSK: | 1947 | case DQPSK: |
1947 | constellation = 0; | 1948 | constellation = 0; |
1948 | break; | 1949 | break; |
@@ -1958,7 +1959,7 @@ static u16 dib8000_set_layer(struct dib8000_state *state, u8 layer_index, u16 ma | |||
1958 | break; | 1959 | break; |
1959 | } | 1960 | } |
1960 | 1961 | ||
1961 | switch (state->fe[0]->dtv_property_cache.layer[layer_index].fec) { | 1962 | switch (c->layer[layer_index].fec) { |
1962 | case FEC_1_2: | 1963 | case FEC_1_2: |
1963 | cr = 1; | 1964 | cr = 1; |
1964 | break; | 1965 | break; |
@@ -1977,22 +1978,22 @@ static u16 dib8000_set_layer(struct dib8000_state *state, u8 layer_index, u16 ma | |||
1977 | break; | 1978 | break; |
1978 | } | 1979 | } |
1979 | 1980 | ||
1980 | if ((state->fe[0]->dtv_property_cache.layer[layer_index].interleaving > 0) && ((state->fe[0]->dtv_property_cache.layer[layer_index].interleaving <= 3) || (state->fe[0]->dtv_property_cache.layer[layer_index].interleaving == 4 && state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1))) | 1981 | if ((c->layer[layer_index].interleaving > 0) && ((c->layer[layer_index].interleaving <= 3) || (c->layer[layer_index].interleaving == 4 && c->isdbt_sb_mode == 1))) |
1981 | time_intlv = state->fe[0]->dtv_property_cache.layer[layer_index].interleaving; | 1982 | time_intlv = c->layer[layer_index].interleaving; |
1982 | else | 1983 | else |
1983 | time_intlv = 0; | 1984 | time_intlv = 0; |
1984 | 1985 | ||
1985 | dib8000_write_word(state, 2 + layer_index, (constellation << 10) | ((state->fe[0]->dtv_property_cache.layer[layer_index].segment_count & 0xf) << 6) | (cr << 3) | time_intlv); | 1986 | dib8000_write_word(state, 2 + layer_index, (constellation << 10) | ((c->layer[layer_index].segment_count & 0xf) << 6) | (cr << 3) | time_intlv); |
1986 | if (state->fe[0]->dtv_property_cache.layer[layer_index].segment_count > 0) { | 1987 | if (c->layer[layer_index].segment_count > 0) { |
1987 | switch (max_constellation) { | 1988 | switch (max_constellation) { |
1988 | case DQPSK: | 1989 | case DQPSK: |
1989 | case QPSK: | 1990 | case QPSK: |
1990 | if (state->fe[0]->dtv_property_cache.layer[layer_index].modulation == QAM_16 || state->fe[0]->dtv_property_cache.layer[layer_index].modulation == QAM_64) | 1991 | if (c->layer[layer_index].modulation == QAM_16 || c->layer[layer_index].modulation == QAM_64) |
1991 | max_constellation = state->fe[0]->dtv_property_cache.layer[layer_index].modulation; | 1992 | max_constellation = c->layer[layer_index].modulation; |
1992 | break; | 1993 | break; |
1993 | case QAM_16: | 1994 | case QAM_16: |
1994 | if (state->fe[0]->dtv_property_cache.layer[layer_index].modulation == QAM_64) | 1995 | if (c->layer[layer_index].modulation == QAM_64) |
1995 | max_constellation = state->fe[0]->dtv_property_cache.layer[layer_index].modulation; | 1996 | max_constellation = c->layer[layer_index].modulation; |
1996 | break; | 1997 | break; |
1997 | } | 1998 | } |
1998 | } | 1999 | } |
@@ -2135,30 +2136,31 @@ static void dib8000_small_fine_tune(struct dib8000_state *state) | |||
2135 | { | 2136 | { |
2136 | u16 i; | 2137 | u16 i; |
2137 | const s16 *ncoeff; | 2138 | const s16 *ncoeff; |
2139 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2138 | 2140 | ||
2139 | dib8000_write_word(state, 352, state->seg_diff_mask); | 2141 | dib8000_write_word(state, 352, state->seg_diff_mask); |
2140 | dib8000_write_word(state, 353, state->seg_mask); | 2142 | dib8000_write_word(state, 353, state->seg_mask); |
2141 | 2143 | ||
2142 | /* P_small_coef_ext_enable=ISDB-Tsb, P_small_narrow_band=ISDB-Tsb, P_small_last_seg=13, P_small_offset_num_car=5 */ | 2144 | /* P_small_coef_ext_enable=ISDB-Tsb, P_small_narrow_band=ISDB-Tsb, P_small_last_seg=13, P_small_offset_num_car=5 */ |
2143 | dib8000_write_word(state, 351, (state->fe[0]->dtv_property_cache.isdbt_sb_mode << 9) | (state->fe[0]->dtv_property_cache.isdbt_sb_mode << 8) | (13 << 4) | 5); | 2145 | dib8000_write_word(state, 351, (c->isdbt_sb_mode << 9) | (c->isdbt_sb_mode << 8) | (13 << 4) | 5); |
2144 | 2146 | ||
2145 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) { | 2147 | if (c->isdbt_sb_mode) { |
2146 | /* ---- SMALL ---- */ | 2148 | /* ---- SMALL ---- */ |
2147 | switch (state->fe[0]->dtv_property_cache.transmission_mode) { | 2149 | switch (c->transmission_mode) { |
2148 | case TRANSMISSION_MODE_2K: | 2150 | case TRANSMISSION_MODE_2K: |
2149 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) { /* 1-seg */ | 2151 | if (c->isdbt_partial_reception == 0) { /* 1-seg */ |
2150 | if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) /* DQPSK */ | 2152 | if (c->layer[0].modulation == DQPSK) /* DQPSK */ |
2151 | ncoeff = coeff_2k_sb_1seg_dqpsk; | 2153 | ncoeff = coeff_2k_sb_1seg_dqpsk; |
2152 | else /* QPSK or QAM */ | 2154 | else /* QPSK or QAM */ |
2153 | ncoeff = coeff_2k_sb_1seg; | 2155 | ncoeff = coeff_2k_sb_1seg; |
2154 | } else { /* 3-segments */ | 2156 | } else { /* 3-segments */ |
2155 | if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) { /* DQPSK on central segment */ | 2157 | if (c->layer[0].modulation == DQPSK) { /* DQPSK on central segment */ |
2156 | if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) /* DQPSK on external segments */ | 2158 | if (c->layer[1].modulation == DQPSK) /* DQPSK on external segments */ |
2157 | ncoeff = coeff_2k_sb_3seg_0dqpsk_1dqpsk; | 2159 | ncoeff = coeff_2k_sb_3seg_0dqpsk_1dqpsk; |
2158 | else /* QPSK or QAM on external segments */ | 2160 | else /* QPSK or QAM on external segments */ |
2159 | ncoeff = coeff_2k_sb_3seg_0dqpsk; | 2161 | ncoeff = coeff_2k_sb_3seg_0dqpsk; |
2160 | } else { /* QPSK or QAM on central segment */ | 2162 | } else { /* QPSK or QAM on central segment */ |
2161 | if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) /* DQPSK on external segments */ | 2163 | if (c->layer[1].modulation == DQPSK) /* DQPSK on external segments */ |
2162 | ncoeff = coeff_2k_sb_3seg_1dqpsk; | 2164 | ncoeff = coeff_2k_sb_3seg_1dqpsk; |
2163 | else /* QPSK or QAM on external segments */ | 2165 | else /* QPSK or QAM on external segments */ |
2164 | ncoeff = coeff_2k_sb_3seg; | 2166 | ncoeff = coeff_2k_sb_3seg; |
@@ -2166,19 +2168,19 @@ static void dib8000_small_fine_tune(struct dib8000_state *state) | |||
2166 | } | 2168 | } |
2167 | break; | 2169 | break; |
2168 | case TRANSMISSION_MODE_4K: | 2170 | case TRANSMISSION_MODE_4K: |
2169 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) { /* 1-seg */ | 2171 | if (c->isdbt_partial_reception == 0) { /* 1-seg */ |
2170 | if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) /* DQPSK */ | 2172 | if (c->layer[0].modulation == DQPSK) /* DQPSK */ |
2171 | ncoeff = coeff_4k_sb_1seg_dqpsk; | 2173 | ncoeff = coeff_4k_sb_1seg_dqpsk; |
2172 | else /* QPSK or QAM */ | 2174 | else /* QPSK or QAM */ |
2173 | ncoeff = coeff_4k_sb_1seg; | 2175 | ncoeff = coeff_4k_sb_1seg; |
2174 | } else { /* 3-segments */ | 2176 | } else { /* 3-segments */ |
2175 | if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) { /* DQPSK on central segment */ | 2177 | if (c->layer[0].modulation == DQPSK) { /* DQPSK on central segment */ |
2176 | if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) /* DQPSK on external segments */ | 2178 | if (c->layer[1].modulation == DQPSK) /* DQPSK on external segments */ |
2177 | ncoeff = coeff_4k_sb_3seg_0dqpsk_1dqpsk; | 2179 | ncoeff = coeff_4k_sb_3seg_0dqpsk_1dqpsk; |
2178 | else /* QPSK or QAM on external segments */ | 2180 | else /* QPSK or QAM on external segments */ |
2179 | ncoeff = coeff_4k_sb_3seg_0dqpsk; | 2181 | ncoeff = coeff_4k_sb_3seg_0dqpsk; |
2180 | } else { /* QPSK or QAM on central segment */ | 2182 | } else { /* QPSK or QAM on central segment */ |
2181 | if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) /* DQPSK on external segments */ | 2183 | if (c->layer[1].modulation == DQPSK) /* DQPSK on external segments */ |
2182 | ncoeff = coeff_4k_sb_3seg_1dqpsk; | 2184 | ncoeff = coeff_4k_sb_3seg_1dqpsk; |
2183 | else /* QPSK or QAM on external segments */ | 2185 | else /* QPSK or QAM on external segments */ |
2184 | ncoeff = coeff_4k_sb_3seg; | 2186 | ncoeff = coeff_4k_sb_3seg; |
@@ -2188,19 +2190,19 @@ static void dib8000_small_fine_tune(struct dib8000_state *state) | |||
2188 | case TRANSMISSION_MODE_AUTO: | 2190 | case TRANSMISSION_MODE_AUTO: |
2189 | case TRANSMISSION_MODE_8K: | 2191 | case TRANSMISSION_MODE_8K: |
2190 | default: | 2192 | default: |
2191 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) { /* 1-seg */ | 2193 | if (c->isdbt_partial_reception == 0) { /* 1-seg */ |
2192 | if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) /* DQPSK */ | 2194 | if (c->layer[0].modulation == DQPSK) /* DQPSK */ |
2193 | ncoeff = coeff_8k_sb_1seg_dqpsk; | 2195 | ncoeff = coeff_8k_sb_1seg_dqpsk; |
2194 | else /* QPSK or QAM */ | 2196 | else /* QPSK or QAM */ |
2195 | ncoeff = coeff_8k_sb_1seg; | 2197 | ncoeff = coeff_8k_sb_1seg; |
2196 | } else { /* 3-segments */ | 2198 | } else { /* 3-segments */ |
2197 | if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) { /* DQPSK on central segment */ | 2199 | if (c->layer[0].modulation == DQPSK) { /* DQPSK on central segment */ |
2198 | if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) /* DQPSK on external segments */ | 2200 | if (c->layer[1].modulation == DQPSK) /* DQPSK on external segments */ |
2199 | ncoeff = coeff_8k_sb_3seg_0dqpsk_1dqpsk; | 2201 | ncoeff = coeff_8k_sb_3seg_0dqpsk_1dqpsk; |
2200 | else /* QPSK or QAM on external segments */ | 2202 | else /* QPSK or QAM on external segments */ |
2201 | ncoeff = coeff_8k_sb_3seg_0dqpsk; | 2203 | ncoeff = coeff_8k_sb_3seg_0dqpsk; |
2202 | } else { /* QPSK or QAM on central segment */ | 2204 | } else { /* QPSK or QAM on central segment */ |
2203 | if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) /* DQPSK on external segments */ | 2205 | if (c->layer[1].modulation == DQPSK) /* DQPSK on external segments */ |
2204 | ncoeff = coeff_8k_sb_3seg_1dqpsk; | 2206 | ncoeff = coeff_8k_sb_3seg_1dqpsk; |
2205 | else /* QPSK or QAM on external segments */ | 2207 | else /* QPSK or QAM on external segments */ |
2206 | ncoeff = coeff_8k_sb_3seg; | 2208 | ncoeff = coeff_8k_sb_3seg; |
@@ -2218,10 +2220,11 @@ static const u16 coff_thres_1seg[3] = {300, 150, 80}; | |||
2218 | static const u16 coff_thres_3seg[3] = {350, 300, 250}; | 2220 | static const u16 coff_thres_3seg[3] = {350, 300, 250}; |
2219 | static void dib8000_set_sb_channel(struct dib8000_state *state) | 2221 | static void dib8000_set_sb_channel(struct dib8000_state *state) |
2220 | { | 2222 | { |
2223 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2221 | const u16 *coff; | 2224 | const u16 *coff; |
2222 | u16 i; | 2225 | u16 i; |
2223 | 2226 | ||
2224 | if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_2K || state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_4K) { | 2227 | if (c->transmission_mode == TRANSMISSION_MODE_2K || c->transmission_mode == TRANSMISSION_MODE_4K) { |
2225 | dib8000_write_word(state, 219, dib8000_read_word(state, 219) | 0x1); /* adp_pass =1 */ | 2228 | dib8000_write_word(state, 219, dib8000_read_word(state, 219) | 0x1); /* adp_pass =1 */ |
2226 | dib8000_write_word(state, 190, dib8000_read_word(state, 190) | (0x1 << 14)); /* pha3_force_pha_shift = 1 */ | 2229 | dib8000_write_word(state, 190, dib8000_read_word(state, 190) | (0x1 << 14)); /* pha3_force_pha_shift = 1 */ |
2227 | } else { | 2230 | } else { |
@@ -2229,7 +2232,7 @@ static void dib8000_set_sb_channel(struct dib8000_state *state) | |||
2229 | dib8000_write_word(state, 190, dib8000_read_word(state, 190) & 0xbfff); /* pha3_force_pha_shift = 0 */ | 2232 | dib8000_write_word(state, 190, dib8000_read_word(state, 190) & 0xbfff); /* pha3_force_pha_shift = 0 */ |
2230 | } | 2233 | } |
2231 | 2234 | ||
2232 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 1) /* 3-segments */ | 2235 | if (c->isdbt_partial_reception == 1) /* 3-segments */ |
2233 | state->seg_mask = 0x00E0; | 2236 | state->seg_mask = 0x00E0; |
2234 | else /* 1-segment */ | 2237 | else /* 1-segment */ |
2235 | state->seg_mask = 0x0040; | 2238 | state->seg_mask = 0x0040; |
@@ -2238,13 +2241,13 @@ static void dib8000_set_sb_channel(struct dib8000_state *state) | |||
2238 | 2241 | ||
2239 | /* ---- COFF ---- Carloff, the most robust --- */ | 2242 | /* ---- COFF ---- Carloff, the most robust --- */ |
2240 | /* P_coff_cpil_alpha=4, P_coff_inh=0, P_coff_cpil_winlen=64, P_coff_narrow_band=1, P_coff_square_val=1, P_coff_one_seg=~partial_rcpt, P_coff_use_tmcc=1, P_coff_use_ac=1 */ | 2243 | /* P_coff_cpil_alpha=4, P_coff_inh=0, P_coff_cpil_winlen=64, P_coff_narrow_band=1, P_coff_square_val=1, P_coff_one_seg=~partial_rcpt, P_coff_use_tmcc=1, P_coff_use_ac=1 */ |
2241 | dib8000_write_word(state, 187, (4 << 12) | (0 << 11) | (63 << 5) | (0x3 << 3) | ((~state->fe[0]->dtv_property_cache.isdbt_partial_reception & 1) << 2) | 0x3); | 2244 | dib8000_write_word(state, 187, (4 << 12) | (0 << 11) | (63 << 5) | (0x3 << 3) | ((~c->isdbt_partial_reception & 1) << 2) | 0x3); |
2242 | 2245 | ||
2243 | dib8000_write_word(state, 340, (16 << 6) | (8 << 0)); /* P_ctrl_pre_freq_win_len=16, P_ctrl_pre_freq_thres_lockin=8 */ | 2246 | dib8000_write_word(state, 340, (16 << 6) | (8 << 0)); /* P_ctrl_pre_freq_win_len=16, P_ctrl_pre_freq_thres_lockin=8 */ |
2244 | dib8000_write_word(state, 341, (6 << 3) | (1 << 2) | (1 << 1) | (1 << 0));/* P_ctrl_pre_freq_thres_lockout=6, P_small_use_tmcc/ac/cp=1 */ | 2247 | dib8000_write_word(state, 341, (6 << 3) | (1 << 2) | (1 << 1) | (1 << 0));/* P_ctrl_pre_freq_thres_lockout=6, P_small_use_tmcc/ac/cp=1 */ |
2245 | 2248 | ||
2246 | /* Sound Broadcasting mode 1 seg */ | 2249 | /* Sound Broadcasting mode 1 seg */ |
2247 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) { | 2250 | if (c->isdbt_partial_reception == 0) { |
2248 | /* P_coff_winlen=63, P_coff_thres_lock=15, P_coff_one_seg_width = (P_mode == 3) , P_coff_one_seg_sym = (P_mode-1) */ | 2251 | /* P_coff_winlen=63, P_coff_thres_lock=15, P_coff_one_seg_width = (P_mode == 3) , P_coff_one_seg_sym = (P_mode-1) */ |
2249 | if (state->mode == 3) | 2252 | if (state->mode == 3) |
2250 | dib8000_write_word(state, 180, 0x1fcf | ((state->mode - 1) << 14)); | 2253 | dib8000_write_word(state, 180, 0x1fcf | ((state->mode - 1) << 14)); |
@@ -2264,7 +2267,7 @@ static void dib8000_set_sb_channel(struct dib8000_state *state) | |||
2264 | dib8000_write_word(state, 228, 1); /* P_2d_mode_byp=1 */ | 2267 | dib8000_write_word(state, 228, 1); /* P_2d_mode_byp=1 */ |
2265 | dib8000_write_word(state, 205, dib8000_read_word(state, 205) & 0xfff0); /* P_cspu_win_cut = 0 */ | 2268 | dib8000_write_word(state, 205, dib8000_read_word(state, 205) & 0xfff0); /* P_cspu_win_cut = 0 */ |
2266 | 2269 | ||
2267 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0 && state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_2K) | 2270 | if (c->isdbt_partial_reception == 0 && c->transmission_mode == TRANSMISSION_MODE_2K) |
2268 | dib8000_write_word(state, 265, 15); /* P_equal_noise_sel = 15 */ | 2271 | dib8000_write_word(state, 265, 15); /* P_equal_noise_sel = 15 */ |
2269 | 2272 | ||
2270 | /* Write COFF thres */ | 2273 | /* Write COFF thres */ |
@@ -2280,7 +2283,7 @@ static void dib8000_set_sb_channel(struct dib8000_state *state) | |||
2280 | 2283 | ||
2281 | dib8000_write_word(state, 266, ~state->seg_mask | state->seg_diff_mask); /* P_equal_noise_seg_inh */ | 2284 | dib8000_write_word(state, 266, ~state->seg_mask | state->seg_diff_mask); /* P_equal_noise_seg_inh */ |
2282 | 2285 | ||
2283 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) | 2286 | if (c->isdbt_partial_reception == 0) |
2284 | dib8000_write_word(state, 178, 64); /* P_fft_powrange = 64 */ | 2287 | dib8000_write_word(state, 178, 64); /* P_fft_powrange = 64 */ |
2285 | else | 2288 | else |
2286 | dib8000_write_word(state, 178, 32); /* P_fft_powrange = 32 */ | 2289 | dib8000_write_word(state, 178, 32); /* P_fft_powrange = 32 */ |
@@ -2292,6 +2295,7 @@ static void dib8000_set_isdbt_common_channel(struct dib8000_state *state, u8 seq | |||
2292 | u16 tmcc_pow = 0, ana_gain = 0, tmp = 0, i = 0, nbseg_diff = 0 ; | 2295 | u16 tmcc_pow = 0, ana_gain = 0, tmp = 0, i = 0, nbseg_diff = 0 ; |
2293 | u16 max_constellation = DQPSK; | 2296 | u16 max_constellation = DQPSK; |
2294 | int init_prbs; | 2297 | int init_prbs; |
2298 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2295 | 2299 | ||
2296 | /* P_mode */ | 2300 | /* P_mode */ |
2297 | dib8000_write_word(state, 10, (seq << 4)); | 2301 | dib8000_write_word(state, 10, (seq << 4)); |
@@ -2301,20 +2305,20 @@ static void dib8000_set_isdbt_common_channel(struct dib8000_state *state, u8 seq | |||
2301 | 2305 | ||
2302 | /* set guard */ | 2306 | /* set guard */ |
2303 | tmp = dib8000_read_word(state, 1); | 2307 | tmp = dib8000_read_word(state, 1); |
2304 | dib8000_write_word(state, 1, (tmp&0xfffc) | (state->fe[0]->dtv_property_cache.guard_interval & 0x3)); | 2308 | dib8000_write_word(state, 1, (tmp&0xfffc) | (c->guard_interval & 0x3)); |
2305 | 2309 | ||
2306 | dib8000_write_word(state, 274, (dib8000_read_word(state, 274) & 0xffcf) | ((state->fe[0]->dtv_property_cache.isdbt_partial_reception & 1) << 5) | ((state->fe[0]->dtv_property_cache.isdbt_sb_mode & 1) << 4)); | 2310 | dib8000_write_word(state, 274, (dib8000_read_word(state, 274) & 0xffcf) | ((c->isdbt_partial_reception & 1) << 5) | ((c->isdbt_sb_mode & 1) << 4)); |
2307 | 2311 | ||
2308 | /* signal optimization parameter */ | 2312 | /* signal optimization parameter */ |
2309 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception) { | 2313 | if (c->isdbt_partial_reception) { |
2310 | state->seg_diff_mask = (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) << permu_seg[0]; | 2314 | state->seg_diff_mask = (c->layer[0].modulation == DQPSK) << permu_seg[0]; |
2311 | for (i = 1; i < 3; i++) | 2315 | for (i = 1; i < 3; i++) |
2312 | nbseg_diff += (state->fe[0]->dtv_property_cache.layer[i].modulation == DQPSK) * state->fe[0]->dtv_property_cache.layer[i].segment_count; | 2316 | nbseg_diff += (c->layer[i].modulation == DQPSK) * c->layer[i].segment_count; |
2313 | for (i = 0; i < nbseg_diff; i++) | 2317 | for (i = 0; i < nbseg_diff; i++) |
2314 | state->seg_diff_mask |= 1 << permu_seg[i+1]; | 2318 | state->seg_diff_mask |= 1 << permu_seg[i+1]; |
2315 | } else { | 2319 | } else { |
2316 | for (i = 0; i < 3; i++) | 2320 | for (i = 0; i < 3; i++) |
2317 | nbseg_diff += (state->fe[0]->dtv_property_cache.layer[i].modulation == DQPSK) * state->fe[0]->dtv_property_cache.layer[i].segment_count; | 2321 | nbseg_diff += (c->layer[i].modulation == DQPSK) * c->layer[i].segment_count; |
2318 | for (i = 0; i < nbseg_diff; i++) | 2322 | for (i = 0; i < nbseg_diff; i++) |
2319 | state->seg_diff_mask |= 1 << permu_seg[i]; | 2323 | state->seg_diff_mask |= 1 << permu_seg[i]; |
2320 | } | 2324 | } |
@@ -2327,8 +2331,8 @@ static void dib8000_set_isdbt_common_channel(struct dib8000_state *state, u8 seq | |||
2327 | for (i = 0; i < 3; i++) | 2331 | for (i = 0; i < 3; i++) |
2328 | max_constellation = dib8000_set_layer(state, i, max_constellation); | 2332 | max_constellation = dib8000_set_layer(state, i, max_constellation); |
2329 | if (autosearching == 0) { | 2333 | if (autosearching == 0) { |
2330 | state->layer_b_nb_seg = state->fe[0]->dtv_property_cache.layer[1].segment_count; | 2334 | state->layer_b_nb_seg = c->layer[1].segment_count; |
2331 | state->layer_c_nb_seg = state->fe[0]->dtv_property_cache.layer[2].segment_count; | 2335 | state->layer_c_nb_seg = c->layer[2].segment_count; |
2332 | } | 2336 | } |
2333 | 2337 | ||
2334 | /* WRITE: Mode & Diff mask */ | 2338 | /* WRITE: Mode & Diff mask */ |
@@ -2343,16 +2347,16 @@ static void dib8000_set_isdbt_common_channel(struct dib8000_state *state, u8 seq | |||
2343 | dib8000_update_ana_gain(state, ana_gain); | 2347 | dib8000_update_ana_gain(state, ana_gain); |
2344 | 2348 | ||
2345 | /* ---- ANA_FE ---- */ | 2349 | /* ---- ANA_FE ---- */ |
2346 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception) /* 3-segments */ | 2350 | if (c->isdbt_partial_reception) /* 3-segments */ |
2347 | dib8000_load_ana_fe_coefs(state, ana_fe_coeff_3seg); | 2351 | dib8000_load_ana_fe_coefs(state, ana_fe_coeff_3seg); |
2348 | else | 2352 | else |
2349 | dib8000_load_ana_fe_coefs(state, ana_fe_coeff_1seg); /* 1-segment */ | 2353 | dib8000_load_ana_fe_coefs(state, ana_fe_coeff_1seg); /* 1-segment */ |
2350 | 2354 | ||
2351 | /* TSB or ISDBT ? apply it now */ | 2355 | /* TSB or ISDBT ? apply it now */ |
2352 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) { | 2356 | if (c->isdbt_sb_mode) { |
2353 | dib8000_set_sb_channel(state); | 2357 | dib8000_set_sb_channel(state); |
2354 | if (state->fe[0]->dtv_property_cache.isdbt_sb_subchannel != -1) | 2358 | if (c->isdbt_sb_subchannel != -1) |
2355 | init_prbs = dib8000_get_init_prbs(state, state->fe[0]->dtv_property_cache.isdbt_sb_subchannel); | 2359 | init_prbs = dib8000_get_init_prbs(state, c->isdbt_sb_subchannel); |
2356 | else | 2360 | else |
2357 | init_prbs = 0; | 2361 | init_prbs = 0; |
2358 | } else { | 2362 | } else { |
@@ -2392,7 +2396,7 @@ static void dib8000_set_isdbt_common_channel(struct dib8000_state *state, u8 seq | |||
2392 | 2396 | ||
2393 | /* ---- TMCC ---- */ | 2397 | /* ---- TMCC ---- */ |
2394 | for (i = 0; i < 3; i++) | 2398 | for (i = 0; i < 3; i++) |
2395 | tmcc_pow += (((state->fe[0]->dtv_property_cache.layer[i].modulation == DQPSK) * 4 + 1) * state->fe[0]->dtv_property_cache.layer[i].segment_count) ; | 2399 | tmcc_pow += (((c->layer[i].modulation == DQPSK) * 4 + 1) * c->layer[i].segment_count) ; |
2396 | 2400 | ||
2397 | /* Quantif of "P_tmcc_dec_thres_?k" is (0, 5+mode, 9); */ | 2401 | /* Quantif of "P_tmcc_dec_thres_?k" is (0, 5+mode, 9); */ |
2398 | /* Threshold is set at 1/4 of max power. */ | 2402 | /* Threshold is set at 1/4 of max power. */ |
@@ -2434,6 +2438,7 @@ static u32 dib8000_wait_lock(struct dib8000_state *state, u32 internal, | |||
2434 | static int dib8000_autosearch_start(struct dvb_frontend *fe) | 2438 | static int dib8000_autosearch_start(struct dvb_frontend *fe) |
2435 | { | 2439 | { |
2436 | struct dib8000_state *state = fe->demodulator_priv; | 2440 | struct dib8000_state *state = fe->demodulator_priv; |
2441 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2437 | u8 slist = 0; | 2442 | u8 slist = 0; |
2438 | u32 value, internal = state->cfg.pll->internal; | 2443 | u32 value, internal = state->cfg.pll->internal; |
2439 | 2444 | ||
@@ -2477,16 +2482,16 @@ static int dib8000_autosearch_start(struct dvb_frontend *fe) | |||
2477 | dib8000_write_word(state, 770, (dib8000_read_word(state, 770) & 0xdfff) | (0 << 13)); /* P_restart_ccg = 0 */ | 2482 | dib8000_write_word(state, 770, (dib8000_read_word(state, 770) & 0xdfff) | (0 << 13)); /* P_restart_ccg = 0 */ |
2478 | dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x7ff) | (0 << 15) | (1 << 13)); /* P_restart_search = 0; */ | 2483 | dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x7ff) | (0 << 15) | (1 << 13)); /* P_restart_search = 0; */ |
2479 | } else if (state->autosearch_state == AS_SEARCHING_GUARD) { | 2484 | } else if (state->autosearch_state == AS_SEARCHING_GUARD) { |
2480 | state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K; | 2485 | c->transmission_mode = TRANSMISSION_MODE_8K; |
2481 | state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8; | 2486 | c->guard_interval = GUARD_INTERVAL_1_8; |
2482 | state->fe[0]->dtv_property_cache.inversion = 0; | 2487 | c->inversion = 0; |
2483 | state->fe[0]->dtv_property_cache.layer[0].modulation = QAM_64; | 2488 | c->layer[0].modulation = QAM_64; |
2484 | state->fe[0]->dtv_property_cache.layer[0].fec = FEC_2_3; | 2489 | c->layer[0].fec = FEC_2_3; |
2485 | state->fe[0]->dtv_property_cache.layer[0].interleaving = 0; | 2490 | c->layer[0].interleaving = 0; |
2486 | state->fe[0]->dtv_property_cache.layer[0].segment_count = 13; | 2491 | c->layer[0].segment_count = 13; |
2487 | 2492 | ||
2488 | slist = 16; | 2493 | slist = 16; |
2489 | state->fe[0]->dtv_property_cache.transmission_mode = state->found_nfft; | 2494 | c->transmission_mode = state->found_nfft; |
2490 | 2495 | ||
2491 | dib8000_set_isdbt_common_channel(state, slist, 1); | 2496 | dib8000_set_isdbt_common_channel(state, slist, 1); |
2492 | 2497 | ||
@@ -2515,32 +2520,32 @@ static int dib8000_autosearch_start(struct dvb_frontend *fe) | |||
2515 | dib8000_read_word(state, 1284); /* reset the INT. n_irq_pending */ | 2520 | dib8000_read_word(state, 1284); /* reset the INT. n_irq_pending */ |
2516 | dib8000_write_word(state, 0, (u16)value); | 2521 | dib8000_write_word(state, 0, (u16)value); |
2517 | } else { | 2522 | } else { |
2518 | state->fe[0]->dtv_property_cache.inversion = 0; | 2523 | c->inversion = 0; |
2519 | state->fe[0]->dtv_property_cache.layer[0].modulation = QAM_64; | 2524 | c->layer[0].modulation = QAM_64; |
2520 | state->fe[0]->dtv_property_cache.layer[0].fec = FEC_2_3; | 2525 | c->layer[0].fec = FEC_2_3; |
2521 | state->fe[0]->dtv_property_cache.layer[0].interleaving = 0; | 2526 | c->layer[0].interleaving = 0; |
2522 | state->fe[0]->dtv_property_cache.layer[0].segment_count = 13; | 2527 | c->layer[0].segment_count = 13; |
2523 | if (!state->fe[0]->dtv_property_cache.isdbt_sb_mode) | 2528 | if (!c->isdbt_sb_mode) |
2524 | state->fe[0]->dtv_property_cache.layer[0].segment_count = 13; | 2529 | c->layer[0].segment_count = 13; |
2525 | 2530 | ||
2526 | /* choose the right list, in sb, always do everything */ | 2531 | /* choose the right list, in sb, always do everything */ |
2527 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) { | 2532 | if (c->isdbt_sb_mode) { |
2528 | slist = 7; | 2533 | slist = 7; |
2529 | dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13)); | 2534 | dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13)); |
2530 | } else { | 2535 | } else { |
2531 | if (state->fe[0]->dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO) { | 2536 | if (c->guard_interval == GUARD_INTERVAL_AUTO) { |
2532 | if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) { | 2537 | if (c->transmission_mode == TRANSMISSION_MODE_AUTO) { |
2533 | state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K; | 2538 | c->transmission_mode = TRANSMISSION_MODE_8K; |
2534 | state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8; | 2539 | c->guard_interval = GUARD_INTERVAL_1_8; |
2535 | slist = 7; | 2540 | slist = 7; |
2536 | dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13)); /* P_mode = 1 to have autosearch start ok with mode2 */ | 2541 | dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13)); /* P_mode = 1 to have autosearch start ok with mode2 */ |
2537 | } else { | 2542 | } else { |
2538 | state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8; | 2543 | c->guard_interval = GUARD_INTERVAL_1_8; |
2539 | slist = 3; | 2544 | slist = 3; |
2540 | } | 2545 | } |
2541 | } else { | 2546 | } else { |
2542 | if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) { | 2547 | if (c->transmission_mode == TRANSMISSION_MODE_AUTO) { |
2543 | state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K; | 2548 | c->transmission_mode = TRANSMISSION_MODE_8K; |
2544 | slist = 2; | 2549 | slist = 2; |
2545 | dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13)); /* P_mode = 1 */ | 2550 | dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13)); /* P_mode = 1 */ |
2546 | } else | 2551 | } else |
@@ -2653,6 +2658,7 @@ static void dib8000_set_dds(struct dib8000_state *state, s32 offset_khz) | |||
2653 | 2658 | ||
2654 | static void dib8000_set_frequency_offset(struct dib8000_state *state) | 2659 | static void dib8000_set_frequency_offset(struct dib8000_state *state) |
2655 | { | 2660 | { |
2661 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2656 | int i; | 2662 | int i; |
2657 | u32 current_rf; | 2663 | u32 current_rf; |
2658 | int total_dds_offset_khz; | 2664 | int total_dds_offset_khz; |
@@ -2660,26 +2666,26 @@ static void dib8000_set_frequency_offset(struct dib8000_state *state) | |||
2660 | if (state->fe[0]->ops.tuner_ops.get_frequency) | 2666 | if (state->fe[0]->ops.tuner_ops.get_frequency) |
2661 | state->fe[0]->ops.tuner_ops.get_frequency(state->fe[0], ¤t_rf); | 2667 | state->fe[0]->ops.tuner_ops.get_frequency(state->fe[0], ¤t_rf); |
2662 | else | 2668 | else |
2663 | current_rf = state->fe[0]->dtv_property_cache.frequency; | 2669 | current_rf = c->frequency; |
2664 | current_rf /= 1000; | 2670 | current_rf /= 1000; |
2665 | total_dds_offset_khz = (int)current_rf - (int)state->fe[0]->dtv_property_cache.frequency / 1000; | 2671 | total_dds_offset_khz = (int)current_rf - (int)c->frequency / 1000; |
2666 | 2672 | ||
2667 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) { | 2673 | if (c->isdbt_sb_mode) { |
2668 | state->subchannel = state->fe[0]->dtv_property_cache.isdbt_sb_subchannel; | 2674 | state->subchannel = c->isdbt_sb_subchannel; |
2669 | 2675 | ||
2670 | i = dib8000_read_word(state, 26) & 1; /* P_dds_invspec */ | 2676 | i = dib8000_read_word(state, 26) & 1; /* P_dds_invspec */ |
2671 | dib8000_write_word(state, 26, state->fe[0]->dtv_property_cache.inversion ^ i); | 2677 | dib8000_write_word(state, 26, c->inversion ^ i); |
2672 | 2678 | ||
2673 | if (state->cfg.pll->ifreq == 0) { /* low if tuner */ | 2679 | if (state->cfg.pll->ifreq == 0) { /* low if tuner */ |
2674 | if ((state->fe[0]->dtv_property_cache.inversion ^ i) == 0) | 2680 | if ((c->inversion ^ i) == 0) |
2675 | dib8000_write_word(state, 26, dib8000_read_word(state, 26) | 1); | 2681 | dib8000_write_word(state, 26, dib8000_read_word(state, 26) | 1); |
2676 | } else { | 2682 | } else { |
2677 | if ((state->fe[0]->dtv_property_cache.inversion ^ i) == 0) | 2683 | if ((c->inversion ^ i) == 0) |
2678 | total_dds_offset_khz *= -1; | 2684 | total_dds_offset_khz *= -1; |
2679 | } | 2685 | } |
2680 | } | 2686 | } |
2681 | 2687 | ||
2682 | dprintk("%dkhz tuner offset (frequency = %dHz & current_rf = %dHz) total_dds_offset_hz = %d", state->fe[0]->dtv_property_cache.frequency - current_rf, state->fe[0]->dtv_property_cache.frequency, current_rf, total_dds_offset_khz); | 2688 | dprintk("%dkhz tuner offset (frequency = %dHz & current_rf = %dHz) total_dds_offset_hz = %d", c->frequency - current_rf, c->frequency, current_rf, total_dds_offset_khz); |
2683 | 2689 | ||
2684 | /* apply dds offset now */ | 2690 | /* apply dds offset now */ |
2685 | dib8000_set_dds(state, total_dds_offset_khz); | 2691 | dib8000_set_dds(state, total_dds_offset_khz); |
@@ -2689,9 +2695,10 @@ static u16 LUT_isdbt_symbol_duration[4] = { 26, 101, 63 }; | |||
2689 | 2695 | ||
2690 | static u32 dib8000_get_symbol_duration(struct dib8000_state *state) | 2696 | static u32 dib8000_get_symbol_duration(struct dib8000_state *state) |
2691 | { | 2697 | { |
2698 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2692 | u16 i; | 2699 | u16 i; |
2693 | 2700 | ||
2694 | switch (state->fe[0]->dtv_property_cache.transmission_mode) { | 2701 | switch (c->transmission_mode) { |
2695 | case TRANSMISSION_MODE_2K: | 2702 | case TRANSMISSION_MODE_2K: |
2696 | i = 0; | 2703 | i = 0; |
2697 | break; | 2704 | break; |
@@ -2705,17 +2712,18 @@ static u32 dib8000_get_symbol_duration(struct dib8000_state *state) | |||
2705 | break; | 2712 | break; |
2706 | } | 2713 | } |
2707 | 2714 | ||
2708 | return (LUT_isdbt_symbol_duration[i] / (state->fe[0]->dtv_property_cache.bandwidth_hz / 1000)) + 1; | 2715 | return (LUT_isdbt_symbol_duration[i] / (c->bandwidth_hz / 1000)) + 1; |
2709 | } | 2716 | } |
2710 | 2717 | ||
2711 | static void dib8000_set_isdbt_loop_params(struct dib8000_state *state, enum param_loop_step loop_step) | 2718 | static void dib8000_set_isdbt_loop_params(struct dib8000_state *state, enum param_loop_step loop_step) |
2712 | { | 2719 | { |
2720 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2713 | u16 reg_32 = 0, reg_37 = 0; | 2721 | u16 reg_32 = 0, reg_37 = 0; |
2714 | 2722 | ||
2715 | switch (loop_step) { | 2723 | switch (loop_step) { |
2716 | case LOOP_TUNE_1: | 2724 | case LOOP_TUNE_1: |
2717 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) { | 2725 | if (c->isdbt_sb_mode) { |
2718 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) { | 2726 | if (c->isdbt_partial_reception == 0) { |
2719 | reg_32 = ((11 - state->mode) << 12) | (6 << 8) | 0x40; /* P_timf_alpha = (11-P_mode), P_corm_alpha=6, P_corm_thres=0x40 */ | 2727 | reg_32 = ((11 - state->mode) << 12) | (6 << 8) | 0x40; /* P_timf_alpha = (11-P_mode), P_corm_alpha=6, P_corm_thres=0x40 */ |
2720 | reg_37 = (3 << 5) | (0 << 4) | (10 - state->mode); /* P_ctrl_pha_off_max=3 P_ctrl_sfreq_inh =0 P_ctrl_sfreq_step = (10-P_mode) */ | 2728 | reg_37 = (3 << 5) | (0 << 4) | (10 - state->mode); /* P_ctrl_pha_off_max=3 P_ctrl_sfreq_inh =0 P_ctrl_sfreq_step = (10-P_mode) */ |
2721 | } else { /* Sound Broadcasting mode 3 seg */ | 2729 | } else { /* Sound Broadcasting mode 3 seg */ |
@@ -2728,8 +2736,8 @@ static void dib8000_set_isdbt_loop_params(struct dib8000_state *state, enum para | |||
2728 | } | 2736 | } |
2729 | break; | 2737 | break; |
2730 | case LOOP_TUNE_2: | 2738 | case LOOP_TUNE_2: |
2731 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) { | 2739 | if (c->isdbt_sb_mode) { |
2732 | if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) { /* Sound Broadcasting mode 1 seg */ | 2740 | if (c->isdbt_partial_reception == 0) { /* Sound Broadcasting mode 1 seg */ |
2733 | reg_32 = ((13-state->mode) << 12) | (6 << 8) | 0x40; /* P_timf_alpha = (13-P_mode) , P_corm_alpha=6, P_corm_thres=0x40*/ | 2741 | reg_32 = ((13-state->mode) << 12) | (6 << 8) | 0x40; /* P_timf_alpha = (13-P_mode) , P_corm_alpha=6, P_corm_thres=0x40*/ |
2734 | reg_37 = (12-state->mode) | ((5 + state->mode) << 5); | 2742 | reg_37 = (12-state->mode) | ((5 + state->mode) << 5); |
2735 | } else { /* Sound Broadcasting mode 3 seg */ | 2743 | } else { /* Sound Broadcasting mode 3 seg */ |
@@ -2755,10 +2763,11 @@ static void dib8000_demod_restart(struct dib8000_state *state) | |||
2755 | 2763 | ||
2756 | static void dib8000_set_sync_wait(struct dib8000_state *state) | 2764 | static void dib8000_set_sync_wait(struct dib8000_state *state) |
2757 | { | 2765 | { |
2766 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2758 | u16 sync_wait = 64; | 2767 | u16 sync_wait = 64; |
2759 | 2768 | ||
2760 | /* P_dvsy_sync_wait - reuse mode */ | 2769 | /* P_dvsy_sync_wait - reuse mode */ |
2761 | switch (state->fe[0]->dtv_property_cache.transmission_mode) { | 2770 | switch (c->transmission_mode) { |
2762 | case TRANSMISSION_MODE_8K: | 2771 | case TRANSMISSION_MODE_8K: |
2763 | sync_wait = 256; | 2772 | sync_wait = 256; |
2764 | break; | 2773 | break; |
@@ -2772,9 +2781,9 @@ static void dib8000_set_sync_wait(struct dib8000_state *state) | |||
2772 | } | 2781 | } |
2773 | 2782 | ||
2774 | if (state->cfg.diversity_delay == 0) | 2783 | if (state->cfg.diversity_delay == 0) |
2775 | sync_wait = (sync_wait * (1 << (state->fe[0]->dtv_property_cache.guard_interval)) * 3) / 2 + 48; /* add 50% SFN margin + compensate for one DVSY-fifo */ | 2784 | sync_wait = (sync_wait * (1 << (c->guard_interval)) * 3) / 2 + 48; /* add 50% SFN margin + compensate for one DVSY-fifo */ |
2776 | else | 2785 | else |
2777 | sync_wait = (sync_wait * (1 << (state->fe[0]->dtv_property_cache.guard_interval)) * 3) / 2 + state->cfg.diversity_delay; /* add 50% SFN margin + compensate for DVSY-fifo */ | 2786 | sync_wait = (sync_wait * (1 << (c->guard_interval)) * 3) / 2 + state->cfg.diversity_delay; /* add 50% SFN margin + compensate for DVSY-fifo */ |
2778 | 2787 | ||
2779 | dib8000_write_word(state, 273, (dib8000_read_word(state, 273) & 0x000f) | (sync_wait << 4)); | 2788 | dib8000_write_word(state, 273, (dib8000_read_word(state, 273) & 0x000f) | (sync_wait << 4)); |
2780 | } | 2789 | } |
@@ -2847,6 +2856,7 @@ static int dib8090p_init_sdram(struct dib8000_state *state) | |||
2847 | static int dib8000_tune(struct dvb_frontend *fe) | 2856 | static int dib8000_tune(struct dvb_frontend *fe) |
2848 | { | 2857 | { |
2849 | struct dib8000_state *state = fe->demodulator_priv; | 2858 | struct dib8000_state *state = fe->demodulator_priv; |
2859 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
2850 | enum frontend_tune_state *tune_state = &state->tune_state; | 2860 | enum frontend_tune_state *tune_state = &state->tune_state; |
2851 | 2861 | ||
2852 | u16 locks, deeper_interleaver = 0, i; | 2862 | u16 locks, deeper_interleaver = 0, i; |
@@ -2871,30 +2881,30 @@ static int dib8000_tune(struct dvb_frontend *fe) | |||
2871 | if (state->revision == 0x8090) | 2881 | if (state->revision == 0x8090) |
2872 | dib8090p_init_sdram(state); | 2882 | dib8090p_init_sdram(state); |
2873 | state->status = FE_STATUS_TUNE_PENDING; | 2883 | state->status = FE_STATUS_TUNE_PENDING; |
2874 | if ((state->fe[0]->dtv_property_cache.delivery_system != SYS_ISDBT) || | 2884 | if ((c->delivery_system != SYS_ISDBT) || |
2875 | (state->fe[0]->dtv_property_cache.inversion == INVERSION_AUTO) || | 2885 | (c->inversion == INVERSION_AUTO) || |
2876 | (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) || | 2886 | (c->transmission_mode == TRANSMISSION_MODE_AUTO) || |
2877 | (state->fe[0]->dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO) || | 2887 | (c->guard_interval == GUARD_INTERVAL_AUTO) || |
2878 | (((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (1 << 0)) != 0) && | 2888 | (((c->isdbt_layer_enabled & (1 << 0)) != 0) && |
2879 | (state->fe[0]->dtv_property_cache.layer[0].segment_count != 0xff) && | 2889 | (c->layer[0].segment_count != 0xff) && |
2880 | (state->fe[0]->dtv_property_cache.layer[0].segment_count != 0) && | 2890 | (c->layer[0].segment_count != 0) && |
2881 | ((state->fe[0]->dtv_property_cache.layer[0].modulation == QAM_AUTO) || | 2891 | ((c->layer[0].modulation == QAM_AUTO) || |
2882 | (state->fe[0]->dtv_property_cache.layer[0].fec == FEC_AUTO))) || | 2892 | (c->layer[0].fec == FEC_AUTO))) || |
2883 | (((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (1 << 1)) != 0) && | 2893 | (((c->isdbt_layer_enabled & (1 << 1)) != 0) && |
2884 | (state->fe[0]->dtv_property_cache.layer[1].segment_count != 0xff) && | 2894 | (c->layer[1].segment_count != 0xff) && |
2885 | (state->fe[0]->dtv_property_cache.layer[1].segment_count != 0) && | 2895 | (c->layer[1].segment_count != 0) && |
2886 | ((state->fe[0]->dtv_property_cache.layer[1].modulation == QAM_AUTO) || | 2896 | ((c->layer[1].modulation == QAM_AUTO) || |
2887 | (state->fe[0]->dtv_property_cache.layer[1].fec == FEC_AUTO))) || | 2897 | (c->layer[1].fec == FEC_AUTO))) || |
2888 | (((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (1 << 2)) != 0) && | 2898 | (((c->isdbt_layer_enabled & (1 << 2)) != 0) && |
2889 | (state->fe[0]->dtv_property_cache.layer[2].segment_count != 0xff) && | 2899 | (c->layer[2].segment_count != 0xff) && |
2890 | (state->fe[0]->dtv_property_cache.layer[2].segment_count != 0) && | 2900 | (c->layer[2].segment_count != 0) && |
2891 | ((state->fe[0]->dtv_property_cache.layer[2].modulation == QAM_AUTO) || | 2901 | ((c->layer[2].modulation == QAM_AUTO) || |
2892 | (state->fe[0]->dtv_property_cache.layer[2].fec == FEC_AUTO))) || | 2902 | (c->layer[2].fec == FEC_AUTO))) || |
2893 | (((state->fe[0]->dtv_property_cache.layer[0].segment_count == 0) || | 2903 | (((c->layer[0].segment_count == 0) || |
2894 | ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (1 << 0)) == 0)) && | 2904 | ((c->isdbt_layer_enabled & (1 << 0)) == 0)) && |
2895 | ((state->fe[0]->dtv_property_cache.layer[1].segment_count == 0) || | 2905 | ((c->layer[1].segment_count == 0) || |
2896 | ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (2 << 0)) == 0)) && | 2906 | ((c->isdbt_layer_enabled & (2 << 0)) == 0)) && |
2897 | ((state->fe[0]->dtv_property_cache.layer[2].segment_count == 0) || ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (3 << 0)) == 0)))) | 2907 | ((c->layer[2].segment_count == 0) || ((c->isdbt_layer_enabled & (3 << 0)) == 0)))) |
2898 | state->channel_parameters_set = 0; /* auto search */ | 2908 | state->channel_parameters_set = 0; /* auto search */ |
2899 | else | 2909 | else |
2900 | state->channel_parameters_set = 1; /* channel parameters are known */ | 2910 | state->channel_parameters_set = 1; /* channel parameters are known */ |
@@ -2905,7 +2915,7 @@ static int dib8000_tune(struct dvb_frontend *fe) | |||
2905 | dib8000_write_word(state, 285, dib8000_read_word(state, 285) & 0x60); | 2915 | dib8000_write_word(state, 285, dib8000_read_word(state, 285) & 0x60); |
2906 | 2916 | ||
2907 | dib8000_set_frequency_offset(state); | 2917 | dib8000_set_frequency_offset(state); |
2908 | dib8000_set_bandwidth(fe, state->fe[0]->dtv_property_cache.bandwidth_hz / 1000); | 2918 | dib8000_set_bandwidth(fe, c->bandwidth_hz / 1000); |
2909 | 2919 | ||
2910 | if (state->channel_parameters_set == 0) { /* The channel struct is unknown, search it ! */ | 2920 | if (state->channel_parameters_set == 0) { /* The channel struct is unknown, search it ! */ |
2911 | #ifdef DIB8000_AGC_FREEZE | 2921 | #ifdef DIB8000_AGC_FREEZE |
@@ -3092,7 +3102,7 @@ static int dib8000_tune(struct dvb_frontend *fe) | |||
3092 | dib8000_set_isdbt_loop_params(state, LOOP_TUNE_2); | 3102 | dib8000_set_isdbt_loop_params(state, LOOP_TUNE_2); |
3093 | 3103 | ||
3094 | /* mpeg will never lock on this condition because init_prbs is not set : search for it !*/ | 3104 | /* mpeg will never lock on this condition because init_prbs is not set : search for it !*/ |
3095 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode && state->fe[0]->dtv_property_cache.isdbt_sb_subchannel == -1 && !state->differential_constellation) { | 3105 | if (c->isdbt_sb_mode && c->isdbt_sb_subchannel == -1 && !state->differential_constellation) { |
3096 | state->subchannel = 0; | 3106 | state->subchannel = 0; |
3097 | *tune_state = CT_DEMOD_STEP_11; | 3107 | *tune_state = CT_DEMOD_STEP_11; |
3098 | } else { | 3108 | } else { |
@@ -3105,10 +3115,10 @@ static int dib8000_tune(struct dvb_frontend *fe) | |||
3105 | if ((state->revision == 0x8090) || ((dib8000_read_word(state, 1291) >> 9) & 0x1)) { /* fe capable of deinterleaving : esram */ | 3115 | if ((state->revision == 0x8090) || ((dib8000_read_word(state, 1291) >> 9) & 0x1)) { /* fe capable of deinterleaving : esram */ |
3106 | /* defines timeout for mpeg lock depending on interleaver lenght of longest layer */ | 3116 | /* defines timeout for mpeg lock depending on interleaver lenght of longest layer */ |
3107 | for (i = 0; i < 3; i++) { | 3117 | for (i = 0; i < 3; i++) { |
3108 | if (state->fe[0]->dtv_property_cache.layer[i].interleaving >= deeper_interleaver) { | 3118 | if (c->layer[i].interleaving >= deeper_interleaver) { |
3109 | dprintk("layer%i: time interleaver = %d ", i, state->fe[0]->dtv_property_cache.layer[i].interleaving); | 3119 | dprintk("layer%i: time interleaver = %d ", i, c->layer[i].interleaving); |
3110 | if (state->fe[0]->dtv_property_cache.layer[i].segment_count > 0) { /* valid layer */ | 3120 | if (c->layer[i].segment_count > 0) { /* valid layer */ |
3111 | deeper_interleaver = state->fe[0]->dtv_property_cache.layer[0].interleaving; | 3121 | deeper_interleaver = c->layer[0].interleaving; |
3112 | state->longest_intlv_layer = i; | 3122 | state->longest_intlv_layer = i; |
3113 | } | 3123 | } |
3114 | } | 3124 | } |
@@ -3136,14 +3146,14 @@ static int dib8000_tune(struct dvb_frontend *fe) | |||
3136 | locks = dib8000_read_lock(fe); | 3146 | locks = dib8000_read_lock(fe); |
3137 | if (locks&(1<<(7-state->longest_intlv_layer))) { /* mpeg lock : check the longest one */ | 3147 | if (locks&(1<<(7-state->longest_intlv_layer))) { /* mpeg lock : check the longest one */ |
3138 | dprintk("Mpeg locks [ L0 : %d | L1 : %d | L2 : %d ]", (locks>>7)&0x1, (locks>>6)&0x1, (locks>>5)&0x1); | 3148 | dprintk("Mpeg locks [ L0 : %d | L1 : %d | L2 : %d ]", (locks>>7)&0x1, (locks>>6)&0x1, (locks>>5)&0x1); |
3139 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode && state->fe[0]->dtv_property_cache.isdbt_sb_subchannel == -1 && !state->differential_constellation) | 3149 | if (c->isdbt_sb_mode && c->isdbt_sb_subchannel == -1 && !state->differential_constellation) |
3140 | /* signal to the upper layer, that there was a channel found and the parameters can be read */ | 3150 | /* signal to the upper layer, that there was a channel found and the parameters can be read */ |
3141 | state->status = FE_STATUS_DEMOD_SUCCESS; | 3151 | state->status = FE_STATUS_DEMOD_SUCCESS; |
3142 | else | 3152 | else |
3143 | state->status = FE_STATUS_DATA_LOCKED; | 3153 | state->status = FE_STATUS_DATA_LOCKED; |
3144 | *tune_state = CT_DEMOD_STOP; | 3154 | *tune_state = CT_DEMOD_STOP; |
3145 | } else if (now > *timeout) { | 3155 | } else if (now > *timeout) { |
3146 | if (state->fe[0]->dtv_property_cache.isdbt_sb_mode && state->fe[0]->dtv_property_cache.isdbt_sb_subchannel == -1 && !state->differential_constellation) { /* continue to try init prbs autosearch */ | 3156 | if (c->isdbt_sb_mode && c->isdbt_sb_subchannel == -1 && !state->differential_constellation) { /* continue to try init prbs autosearch */ |
3147 | state->subchannel += 3; | 3157 | state->subchannel += 3; |
3148 | *tune_state = CT_DEMOD_STEP_11; | 3158 | *tune_state = CT_DEMOD_STEP_11; |
3149 | } else { /* we are done mpeg of the longest interleaver xas not locking but let's try if an other layer has locked in the same time */ | 3159 | } else { /* we are done mpeg of the longest interleaver xas not locking but let's try if an other layer has locked in the same time */ |
@@ -3389,18 +3399,19 @@ static int dib8000_get_frontend(struct dvb_frontend *fe) | |||
3389 | static int dib8000_set_frontend(struct dvb_frontend *fe) | 3399 | static int dib8000_set_frontend(struct dvb_frontend *fe) |
3390 | { | 3400 | { |
3391 | struct dib8000_state *state = fe->demodulator_priv; | 3401 | struct dib8000_state *state = fe->demodulator_priv; |
3402 | struct dtv_frontend_properties *c = &state->fe[0]->dtv_property_cache; | ||
3392 | int l, i, active, time, ret, time_slave = FE_CALLBACK_TIME_NEVER; | 3403 | int l, i, active, time, ret, time_slave = FE_CALLBACK_TIME_NEVER; |
3393 | u8 exit_condition, index_frontend; | 3404 | u8 exit_condition, index_frontend; |
3394 | u32 delay, callback_time; | 3405 | u32 delay, callback_time; |
3395 | 3406 | ||
3396 | if (state->fe[0]->dtv_property_cache.frequency == 0) { | 3407 | if (c->frequency == 0) { |
3397 | dprintk("dib8000: must at least specify frequency "); | 3408 | dprintk("dib8000: must at least specify frequency "); |
3398 | return 0; | 3409 | return 0; |
3399 | } | 3410 | } |
3400 | 3411 | ||
3401 | if (state->fe[0]->dtv_property_cache.bandwidth_hz == 0) { | 3412 | if (c->bandwidth_hz == 0) { |
3402 | dprintk("dib8000: no bandwidth specified, set to default "); | 3413 | dprintk("dib8000: no bandwidth specified, set to default "); |
3403 | state->fe[0]->dtv_property_cache.bandwidth_hz = 6000000; | 3414 | c->bandwidth_hz = 6000000; |
3404 | } | 3415 | } |
3405 | 3416 | ||
3406 | for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) { | 3417 | for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) { |