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authorMauro Carvalho Chehab <mchehab@redhat.com>2013-03-04 05:10:06 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-03-04 14:36:40 -0500
commit04fa725e7b1c22c583dd71a8cd85b8d997edfce3 (patch)
treeeb0bbfe36094485938f746079ca98f2aae56b953 /drivers/media/dvb-frontends/mb86a20s.c
parent385cd33c8dcac5a166c2d034169427e263bf4608 (diff)
[media] mb86a20s: Implement set_frontend cache logic
Up to now, the driver was simply assuming TV mode, 13 segs. Implement the logic to control the ISDB operational mode. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb-frontends/mb86a20s.c')
-rw-r--r--drivers/media/dvb-frontends/mb86a20s.c74
1 files changed, 63 insertions, 11 deletions
diff --git a/drivers/media/dvb-frontends/mb86a20s.c b/drivers/media/dvb-frontends/mb86a20s.c
index 1c135aa9df44..1859e9ddba6e 100644
--- a/drivers/media/dvb-frontends/mb86a20s.c
+++ b/drivers/media/dvb-frontends/mb86a20s.c
@@ -24,6 +24,18 @@ static int debug = 1;
24module_param(debug, int, 0644); 24module_param(debug, int, 0644);
25MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); 25MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
26 26
27enum mb86a20s_bandwidth {
28 MB86A20S_13SEG = 0,
29 MB86A20S_13SEG_PARTIAL = 1,
30 MB86A20S_1SEG = 2,
31 MB86A20S_3SEG = 3,
32};
33
34u8 mb86a20s_subchannel[] = {
35 0xb0, 0xc0, 0xd0, 0xe0,
36 0xf0, 0x00, 0x10, 0x20,
37};
38
27struct mb86a20s_state { 39struct mb86a20s_state {
28 struct i2c_adapter *i2c; 40 struct i2c_adapter *i2c;
29 const struct mb86a20s_config *config; 41 const struct mb86a20s_config *config;
@@ -32,6 +44,9 @@ struct mb86a20s_state {
32 struct dvb_frontend frontend; 44 struct dvb_frontend frontend;
33 45
34 u32 if_freq; 46 u32 if_freq;
47 enum mb86a20s_bandwidth bw;
48 bool inversion;
49 u32 subchannel;
35 50
36 u32 estimated_rate[3]; 51 u32 estimated_rate[3];
37 unsigned long get_strength_time; 52 unsigned long get_strength_time;
@@ -54,10 +69,7 @@ static struct regdata mb86a20s_init1[] = {
54 { 0x70, 0x0f }, 69 { 0x70, 0x0f },
55 { 0x70, 0xff }, 70 { 0x70, 0xff },
56 { 0x08, 0x01 }, 71 { 0x08, 0x01 },
57 { 0x09, 0x3e },
58 { 0x50, 0xd1 }, { 0x51, 0x20 }, 72 { 0x50, 0xd1 }, { 0x51, 0x20 },
59 { 0x39, 0x01 },
60 { 0x71, 0x00 },
61 { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 }, 73 { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
62}; 74};
63 75
@@ -1765,7 +1777,7 @@ static int mb86a20s_initfe(struct dvb_frontend *fe)
1765 struct mb86a20s_state *state = fe->demodulator_priv; 1777 struct mb86a20s_state *state = fe->demodulator_priv;
1766 u64 pll; 1778 u64 pll;
1767 int rc; 1779 int rc;
1768 u8 regD5 = 1; 1780 u8 regD5 = 1, reg71, reg09 = 0x3a;
1769 1781
1770 dev_dbg(&state->i2c->dev, "%s called.\n", __func__); 1782 dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
1771 1783
@@ -1777,6 +1789,27 @@ static int mb86a20s_initfe(struct dvb_frontend *fe)
1777 if (rc < 0) 1789 if (rc < 0)
1778 goto err; 1790 goto err;
1779 1791
1792 if (!state->inversion)
1793 reg09 |= 0x04;
1794 rc = mb86a20s_writereg(state, 0x09, reg09);
1795 if (rc < 0)
1796 goto err;
1797 if (!state->bw)
1798 reg71 = 1;
1799 else
1800 reg71 = 0;
1801 rc = mb86a20s_writereg(state, 0x39, reg71);
1802 if (rc < 0)
1803 goto err;
1804 rc = mb86a20s_writereg(state, 0x71, state->bw);
1805 if (rc < 0)
1806 goto err;
1807 if (state->subchannel) {
1808 rc = mb86a20s_writereg(state, 0x44, state->subchannel);
1809 if (rc < 0)
1810 goto err;
1811 }
1812
1780 /* Adjust IF frequency to match tuner */ 1813 /* Adjust IF frequency to match tuner */
1781 if (fe->ops.tuner_ops.get_if_frequency) 1814 if (fe->ops.tuner_ops.get_if_frequency)
1782 fe->ops.tuner_ops.get_if_frequency(fe, &state->if_freq); 1815 fe->ops.tuner_ops.get_if_frequency(fe, &state->if_freq);
@@ -1836,15 +1869,34 @@ err:
1836static int mb86a20s_set_frontend(struct dvb_frontend *fe) 1869static int mb86a20s_set_frontend(struct dvb_frontend *fe)
1837{ 1870{
1838 struct mb86a20s_state *state = fe->demodulator_priv; 1871 struct mb86a20s_state *state = fe->demodulator_priv;
1839 int rc, if_freq;
1840#if 0
1841 /*
1842 * FIXME: Properly implement the set frontend properties
1843 */
1844 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1872 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1845#endif 1873 int rc, if_freq;
1846 dev_dbg(&state->i2c->dev, "%s called.\n", __func__); 1874 dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
1847 1875
1876 if (!c->isdbt_layer_enabled)
1877 c->isdbt_layer_enabled = 7;
1878
1879 if (c->isdbt_layer_enabled == 1)
1880 state->bw = MB86A20S_1SEG;
1881 else if (c->isdbt_partial_reception)
1882 state->bw = MB86A20S_13SEG_PARTIAL;
1883 else
1884 state->bw = MB86A20S_13SEG;
1885
1886 if (c->inversion == INVERSION_ON)
1887 state->inversion = true;
1888 else
1889 state->inversion = false;
1890
1891 if (!c->isdbt_sb_mode) {
1892 state->subchannel = 0;
1893 } else {
1894 if (c->isdbt_sb_subchannel > ARRAY_SIZE(mb86a20s_subchannel))
1895 c->isdbt_sb_subchannel = 0;
1896
1897 state->subchannel = mb86a20s_subchannel[c->isdbt_sb_subchannel];
1898 }
1899
1848 /* 1900 /*
1849 * Gate should already be opened, but it doesn't hurt to 1901 * Gate should already be opened, but it doesn't hurt to
1850 * double-check 1902 * double-check
@@ -2058,7 +2110,7 @@ static struct dvb_frontend_ops mb86a20s_ops = {
2058 /* Use dib8000 values per default */ 2110 /* Use dib8000 values per default */
2059 .info = { 2111 .info = {
2060 .name = "Fujitsu mb86A20s", 2112 .name = "Fujitsu mb86A20s",
2061 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER | 2113 .caps = FE_CAN_RECOVER |
2062 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 2114 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
2063 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 2115 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
2064 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | 2116 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |