diff options
author | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-06-08 12:54:54 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-06-19 12:27:06 -0400 |
commit | 65c8820912d9469de75e5c607cefda92f11e3d2f (patch) | |
tree | 9172a69831f5dec2201f95dd739aea5988c55e8e /drivers/media/dvb-frontends/au8522_decoder.c | |
parent | d289cdf022c5bebf09c73097404aa9faf2211381 (diff) |
[media] au8522: cleanup s-video settings at setup_decoder_defaults()
setup_decoder_defaults() doesn't really care about the input
port. All it needs to know is if the input port is s-video or
not.
As the caller function already knows that, just pass a boolean
instead.
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/dvb-frontends/au8522_decoder.c')
-rw-r--r-- | drivers/media/dvb-frontends/au8522_decoder.c | 21 |
1 files changed, 8 insertions, 13 deletions
diff --git a/drivers/media/dvb-frontends/au8522_decoder.c b/drivers/media/dvb-frontends/au8522_decoder.c index 53f6dea6b3cb..569922232eb8 100644 --- a/drivers/media/dvb-frontends/au8522_decoder.c +++ b/drivers/media/dvb-frontends/au8522_decoder.c | |||
@@ -220,7 +220,7 @@ static void setup_vbi(struct au8522_state *state, int aud_input) | |||
220 | 220 | ||
221 | } | 221 | } |
222 | 222 | ||
223 | static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode) | 223 | static void setup_decoder_defaults(struct au8522_state *state, bool is_svideo) |
224 | { | 224 | { |
225 | int i; | 225 | int i; |
226 | int filter_coef_type; | 226 | int filter_coef_type; |
@@ -237,13 +237,10 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode) | |||
237 | /* Other decoder registers */ | 237 | /* Other decoder registers */ |
238 | au8522_writereg(state, AU8522_TVDEC_INT_MASK_REG010H, 0x00); | 238 | au8522_writereg(state, AU8522_TVDEC_INT_MASK_REG010H, 0x00); |
239 | 239 | ||
240 | if (input_mode == 0x23) { | 240 | if (is_svideo) |
241 | /* S-Video input mapping */ | ||
242 | au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x04); | 241 | au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x04); |
243 | } else { | 242 | else |
244 | /* All other modes (CVBS/ATVRF etc.) */ | ||
245 | au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x00); | 243 | au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x00); |
246 | } | ||
247 | 244 | ||
248 | au8522_writereg(state, AU8522_TVDEC_PGA_REG012H, | 245 | au8522_writereg(state, AU8522_TVDEC_PGA_REG012H, |
249 | AU8522_TVDEC_PGA_REG012H_CVBS); | 246 | AU8522_TVDEC_PGA_REG012H_CVBS); |
@@ -275,8 +272,7 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode) | |||
275 | AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS); | 272 | AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS); |
276 | au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH, | 273 | au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH, |
277 | AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS); | 274 | AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS); |
278 | if (input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13 || | 275 | if (is_svideo) { |
279 | input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24) { | ||
280 | au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH, | 276 | au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH, |
281 | AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_SVIDEO); | 277 | AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_SVIDEO); |
282 | au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH, | 278 | au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH, |
@@ -317,8 +313,7 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode) | |||
317 | 313 | ||
318 | setup_vbi(state, 0); | 314 | setup_vbi(state, 0); |
319 | 315 | ||
320 | if (input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13 || | 316 | if (is_svideo) { |
321 | input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24) { | ||
322 | /* Despite what the table says, for the HVR-950q we still need | 317 | /* Despite what the table says, for the HVR-950q we still need |
323 | to be in CVBS mode for the S-Video input (reason unknown). */ | 318 | to be in CVBS mode for the S-Video input (reason unknown). */ |
324 | /* filter_coef_type = 3; */ | 319 | /* filter_coef_type = 3; */ |
@@ -360,7 +355,7 @@ static void au8522_setup_cvbs_mode(struct au8522_state *state, u8 input_mode) | |||
360 | 355 | ||
361 | au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); | 356 | au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); |
362 | 357 | ||
363 | setup_decoder_defaults(state, input_mode); | 358 | setup_decoder_defaults(state, false); |
364 | 359 | ||
365 | au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, | 360 | au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, |
366 | AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); | 361 | AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); |
@@ -386,7 +381,7 @@ static void au8522_setup_cvbs_tuner_mode(struct au8522_state *state, | |||
386 | /* Set input mode to CVBS on channel 4 with SIF audio input enabled */ | 381 | /* Set input mode to CVBS on channel 4 with SIF audio input enabled */ |
387 | au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); | 382 | au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); |
388 | 383 | ||
389 | setup_decoder_defaults(state, input_mode); | 384 | setup_decoder_defaults(state, false); |
390 | 385 | ||
391 | au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, | 386 | au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, |
392 | AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); | 387 | AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); |
@@ -407,7 +402,7 @@ static void au8522_setup_svideo_mode(struct au8522_state *state, | |||
407 | /* Enable clamping control */ | 402 | /* Enable clamping control */ |
408 | au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00); | 403 | au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00); |
409 | 404 | ||
410 | setup_decoder_defaults(state, input_mode); | 405 | setup_decoder_defaults(state, true); |
411 | 406 | ||
412 | au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, | 407 | au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, |
413 | AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); | 408 | AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); |