aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/isdn/hisax/w6692.c
diff options
context:
space:
mode:
authorJoe Perches <joe@perches.com>2012-02-19 22:52:38 -0500
committerJoe Perches <joe@perches.com>2012-02-21 12:04:01 -0500
commit475be4d85a274d0961593db41cf85689db1d583c (patch)
treeb2b8931eb747794730522c3cf1898e46948527b9 /drivers/isdn/hisax/w6692.c
parent0b0a635f79f91f3755b6518627ea06dd0dbfd523 (diff)
isdn: whitespace coding style cleanup
isdn source code uses a not-current coding style. Update the coding style used on a per-line basis so that git diff -w shows only elided blank lines at EOF. Done with emacs and some scripts and some typing. Built x86 allyesconfig. No detected change in objdump -d or size. Signed-off-by: Joe Perches <joe@perches.com>
Diffstat (limited to 'drivers/isdn/hisax/w6692.c')
-rw-r--r--drivers/isdn/hisax/w6692.c412
1 files changed, 206 insertions, 206 deletions
diff --git a/drivers/isdn/hisax/w6692.c b/drivers/isdn/hisax/w6692.c
index e2cfb6f5aa42..0f0d094af85b 100644
--- a/drivers/isdn/hisax/w6692.c
+++ b/drivers/isdn/hisax/w6692.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Petr Novak 5 * Author Petr Novak
6 * Copyright by Petr Novak <petr.novak@i.cz> 6 * Copyright by Petr Novak <petr.novak@i.cz>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -69,33 +69,33 @@ static void
69W6692_new_ph(struct IsdnCardState *cs) 69W6692_new_ph(struct IsdnCardState *cs)
70{ 70{
71 switch (cs->dc.w6692.ph_state) { 71 switch (cs->dc.w6692.ph_state) {
72 case (W_L1CMD_RST): 72 case (W_L1CMD_RST):
73 ph_command(cs, W_L1CMD_DRC); 73 ph_command(cs, W_L1CMD_DRC);
74 l1_msg(cs, HW_RESET | INDICATION, NULL); 74 l1_msg(cs, HW_RESET | INDICATION, NULL);
75 /* fallthru */ 75 /* fallthru */
76 case (W_L1IND_CD): 76 case (W_L1IND_CD):
77 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL); 77 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
78 break; 78 break;
79 case (W_L1IND_DRD): 79 case (W_L1IND_DRD):
80 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); 80 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
81 break; 81 break;
82 case (W_L1IND_CE): 82 case (W_L1IND_CE):
83 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 83 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
84 break; 84 break;
85 case (W_L1IND_LD): 85 case (W_L1IND_LD):
86 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 86 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
87 break; 87 break;
88 case (W_L1IND_ARD): 88 case (W_L1IND_ARD):
89 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 89 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
90 break; 90 break;
91 case (W_L1IND_AI8): 91 case (W_L1IND_AI8):
92 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 92 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
93 break; 93 break;
94 case (W_L1IND_AI10): 94 case (W_L1IND_AI10):
95 l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL); 95 l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
96 break; 96 break;
97 default: 97 default:
98 break; 98 break;
99 } 99 }
100} 100}
101 101
@@ -122,11 +122,11 @@ W6692_bh(struct work_struct *work)
122 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) 122 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
123 DChannel_proc_xmt(cs); 123 DChannel_proc_xmt(cs);
124/* 124/*
125 if (test_and_clear_bit(D_RX_MON1, &cs->event)) 125 if (test_and_clear_bit(D_RX_MON1, &cs->event))
126 arcofi_fsm(cs, ARCOFI_RX_END, NULL); 126 arcofi_fsm(cs, ARCOFI_RX_END, NULL);
127 if (test_and_clear_bit(D_TX_MON1, &cs->event)) 127 if (test_and_clear_bit(D_TX_MON1, &cs->event))
128 arcofi_fsm(cs, ARCOFI_TX_END, NULL); 128 arcofi_fsm(cs, ARCOFI_TX_END, NULL);
129 */ 129*/
130} 130}
131 131
132static void 132static void
@@ -250,7 +250,7 @@ W6692B_fill_fifo(struct BCState *bcs)
250 count = bcs->tx_skb->len; 250 count = bcs->tx_skb->len;
251 251
252 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) 252 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
253 debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " ": " last "), count); 253 debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " " : " last "), count);
254 254
255 ptr = bcs->tx_skb->data; 255 ptr = bcs->tx_skb->data;
256 skb_pull(bcs->tx_skb, count); 256 skb_pull(bcs->tx_skb, count);
@@ -277,7 +277,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
277 struct sk_buff *skb; 277 struct sk_buff *skb;
278 int count; 278 int count;
279 279
280 bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs+1); 280 bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs + 1);
281 val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR); 281 val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR);
282 debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val); 282 debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val);
283 283
@@ -322,7 +322,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
322 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR); 322 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
323 if (r & W_B_STAR_RDOV) { 323 if (r & W_B_STAR_RDOV) {
324 if (cs->debug & L1_DEB_WARN) 324 if (cs->debug & L1_DEB_WARN)
325 debugl1(cs, "W6692 B RDOV(RMR) mode=%d",bcs->mode); 325 debugl1(cs, "W6692 B RDOV(RMR) mode=%d", bcs->mode);
326 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT); 326 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
327 if (bcs->mode != L1_MODE_TRANS) 327 if (bcs->mode != L1_MODE_TRANS)
328 bcs->hw.w6692.rcvidx = 0; 328 bcs->hw.w6692.rcvidx = 0;
@@ -347,7 +347,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
347 W6692B_fill_fifo(bcs); 347 W6692B_fill_fifo(bcs);
348 else { 348 else {
349 /* Here we lost an TX interrupt, so 349 /* Here we lost an TX interrupt, so
350 * restart transmitting the whole frame. 350 * restart transmitting the whole frame.
351 */ 351 */
352 if (bcs->tx_skb) { 352 if (bcs->tx_skb) {
353 skb_push(bcs->tx_skb, bcs->hw.w6692.count); 353 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
@@ -374,9 +374,9 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
374 W6692B_fill_fifo(bcs); 374 W6692B_fill_fifo(bcs);
375 return; 375 return;
376 } else { 376 } else {
377 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 377 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
378 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 378 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
379 u_long flags; 379 u_long flags;
380 spin_lock_irqsave(&bcs->aclock, flags); 380 spin_lock_irqsave(&bcs->aclock, flags);
381 bcs->ackcnt += bcs->hw.w6692.count; 381 bcs->ackcnt += bcs->hw.w6692.count;
382 spin_unlock_irqrestore(&bcs->aclock, flags); 382 spin_unlock_irqrestore(&bcs->aclock, flags);
@@ -414,7 +414,7 @@ W6692_interrupt(int intno, void *dev_id)
414 spin_unlock_irqrestore(&cs->lock, flags); 414 spin_unlock_irqrestore(&cs->lock, flags);
415 return IRQ_NONE; 415 return IRQ_NONE;
416 } 416 }
417 StartW6692: 417StartW6692:
418 if (cs->debug & L1_DEB_ISAC) 418 if (cs->debug & L1_DEB_ISAC)
419 debugl1(cs, "W6692 ISTA %x", val); 419 debugl1(cs, "W6692 ISTA %x", val);
420 420
@@ -473,7 +473,7 @@ W6692_interrupt(int intno, void *dev_id)
473 } else 473 } else
474 schedule_event(cs, D_XMTBUFREADY); 474 schedule_event(cs, D_XMTBUFREADY);
475 } 475 }
476 afterXFR: 476afterXFR:
477 if (val & (W_INT_XINT0 | W_INT_XINT1)) { /* XINT0/1 - never */ 477 if (val & (W_INT_XINT0 | W_INT_XINT1)) { /* XINT0/1 - never */
478 if (cs->debug & L1_DEB_ISAC) 478 if (cs->debug & L1_DEB_ISAC)
479 debugl1(cs, "W6692 spurious XINT!"); 479 debugl1(cs, "W6692 spurious XINT!");
@@ -564,108 +564,108 @@ W6692_l1hw(struct PStack *st, int pr, void *arg)
564 int val; 564 int val;
565 565
566 switch (pr) { 566 switch (pr) {
567 case (PH_DATA | REQUEST): 567 case (PH_DATA | REQUEST):
568 if (cs->debug & DEB_DLOG_HEX) 568 if (cs->debug & DEB_DLOG_HEX)
569 LogFrame(cs, skb->data, skb->len); 569 LogFrame(cs, skb->data, skb->len);
570 if (cs->debug & DEB_DLOG_VERBOSE) 570 if (cs->debug & DEB_DLOG_VERBOSE)
571 dlogframe(cs, skb, 0); 571 dlogframe(cs, skb, 0);
572 spin_lock_irqsave(&cs->lock, flags); 572 spin_lock_irqsave(&cs->lock, flags);
573 if (cs->tx_skb) { 573 if (cs->tx_skb) {
574 skb_queue_tail(&cs->sq, skb); 574 skb_queue_tail(&cs->sq, skb);
575#ifdef L2FRAME_DEBUG /* psa */
576 if (cs->debug & L1_DEB_LAPD)
577 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
578#endif
579 } else {
580 cs->tx_skb = skb;
581 cs->tx_cnt = 0;
582#ifdef L2FRAME_DEBUG /* psa */ 575#ifdef L2FRAME_DEBUG /* psa */
583 if (cs->debug & L1_DEB_LAPD) 576 if (cs->debug & L1_DEB_LAPD)
584 Logl2Frame(cs, skb, "PH_DATA", 0); 577 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
585#endif 578#endif
586 W6692_fill_fifo(cs); 579 } else {
587 }
588 spin_unlock_irqrestore(&cs->lock, flags);
589 break;
590 case (PH_PULL | INDICATION):
591 spin_lock_irqsave(&cs->lock, flags);
592 if (cs->tx_skb) {
593 if (cs->debug & L1_DEB_WARN)
594 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
595 skb_queue_tail(&cs->sq, skb);
596 spin_unlock_irqrestore(&cs->lock, flags);
597 break;
598 }
599 if (cs->debug & DEB_DLOG_HEX)
600 LogFrame(cs, skb->data, skb->len);
601 if (cs->debug & DEB_DLOG_VERBOSE)
602 dlogframe(cs, skb, 0);
603 cs->tx_skb = skb; 580 cs->tx_skb = skb;
604 cs->tx_cnt = 0; 581 cs->tx_cnt = 0;
605#ifdef L2FRAME_DEBUG /* psa */ 582#ifdef L2FRAME_DEBUG /* psa */
606 if (cs->debug & L1_DEB_LAPD) 583 if (cs->debug & L1_DEB_LAPD)
607 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); 584 Logl2Frame(cs, skb, "PH_DATA", 0);
608#endif 585#endif
609 W6692_fill_fifo(cs); 586 W6692_fill_fifo(cs);
587 }
588 spin_unlock_irqrestore(&cs->lock, flags);
589 break;
590 case (PH_PULL | INDICATION):
591 spin_lock_irqsave(&cs->lock, flags);
592 if (cs->tx_skb) {
593 if (cs->debug & L1_DEB_WARN)
594 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
595 skb_queue_tail(&cs->sq, skb);
610 spin_unlock_irqrestore(&cs->lock, flags); 596 spin_unlock_irqrestore(&cs->lock, flags);
611 break; 597 break;
612 case (PH_PULL | REQUEST): 598 }
599 if (cs->debug & DEB_DLOG_HEX)
600 LogFrame(cs, skb->data, skb->len);
601 if (cs->debug & DEB_DLOG_VERBOSE)
602 dlogframe(cs, skb, 0);
603 cs->tx_skb = skb;
604 cs->tx_cnt = 0;
613#ifdef L2FRAME_DEBUG /* psa */ 605#ifdef L2FRAME_DEBUG /* psa */
614 if (cs->debug & L1_DEB_LAPD) 606 if (cs->debug & L1_DEB_LAPD)
615 debugl1(cs, "-> PH_REQUEST_PULL"); 607 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
616#endif 608#endif
617 if (!cs->tx_skb) { 609 W6692_fill_fifo(cs);
618 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 610 spin_unlock_irqrestore(&cs->lock, flags);
619 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 611 break;
620 } else 612 case (PH_PULL | REQUEST):
621 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 613#ifdef L2FRAME_DEBUG /* psa */
622 break; 614 if (cs->debug & L1_DEB_LAPD)
623 case (HW_RESET | REQUEST): 615 debugl1(cs, "-> PH_REQUEST_PULL");
624 spin_lock_irqsave(&cs->lock, flags); 616#endif
625 if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) { 617 if (!cs->tx_skb) {
626 ph_command(cs, W_L1CMD_ECK); 618 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
627 spin_unlock_irqrestore(&cs->lock, flags); 619 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
628 } else { 620 } else
629 ph_command(cs, W_L1CMD_RST); 621 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
630 cs->dc.w6692.ph_state = W_L1CMD_RST; 622 break;
631 spin_unlock_irqrestore(&cs->lock, flags); 623 case (HW_RESET | REQUEST):
632 W6692_new_ph(cs); 624 spin_lock_irqsave(&cs->lock, flags);
633 } 625 if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
634 break;
635 case (HW_ENABLE | REQUEST):
636 spin_lock_irqsave(&cs->lock, flags);
637 ph_command(cs, W_L1CMD_ECK); 626 ph_command(cs, W_L1CMD_ECK);
638 spin_unlock_irqrestore(&cs->lock, flags); 627 spin_unlock_irqrestore(&cs->lock, flags);
639 break; 628 } else {
640 case (HW_INFO3 | REQUEST): 629 ph_command(cs, W_L1CMD_RST);
641 spin_lock_irqsave(&cs->lock, flags); 630 cs->dc.w6692.ph_state = W_L1CMD_RST;
642 ph_command(cs, W_L1CMD_AR8);
643 spin_unlock_irqrestore(&cs->lock, flags); 631 spin_unlock_irqrestore(&cs->lock, flags);
644 break; 632 W6692_new_ph(cs);
645 case (HW_TESTLOOP | REQUEST): 633 }
646 val = 0; 634 break;
647 if (1 & (long) arg) 635 case (HW_ENABLE | REQUEST):
648 val |= 0x0c; 636 spin_lock_irqsave(&cs->lock, flags);
649 if (2 & (long) arg) 637 ph_command(cs, W_L1CMD_ECK);
650 val |= 0x3; 638 spin_unlock_irqrestore(&cs->lock, flags);
651 /* !!! not implemented yet */ 639 break;
652 break; 640 case (HW_INFO3 | REQUEST):
653 case (HW_DEACTIVATE | RESPONSE): 641 spin_lock_irqsave(&cs->lock, flags);
654 skb_queue_purge(&cs->rq); 642 ph_command(cs, W_L1CMD_AR8);
655 skb_queue_purge(&cs->sq); 643 spin_unlock_irqrestore(&cs->lock, flags);
656 if (cs->tx_skb) { 644 break;
657 dev_kfree_skb_any(cs->tx_skb); 645 case (HW_TESTLOOP | REQUEST):
658 cs->tx_skb = NULL; 646 val = 0;
659 } 647 if (1 & (long) arg)
660 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 648 val |= 0x0c;
661 del_timer(&cs->dbusytimer); 649 if (2 & (long) arg)
662 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 650 val |= 0x3;
663 schedule_event(cs, D_CLEARBUSY); 651 /* !!! not implemented yet */
664 break; 652 break;
665 default: 653 case (HW_DEACTIVATE | RESPONSE):
666 if (cs->debug & L1_DEB_WARN) 654 skb_queue_purge(&cs->rq);
667 debugl1(cs, "W6692_l1hw unknown %04x", pr); 655 skb_queue_purge(&cs->sq);
668 break; 656 if (cs->tx_skb) {
657 dev_kfree_skb_any(cs->tx_skb);
658 cs->tx_skb = NULL;
659 }
660 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
661 del_timer(&cs->dbusytimer);
662 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
663 schedule_event(cs, D_CLEARBUSY);
664 break;
665 default:
666 if (cs->debug & L1_DEB_WARN)
667 debugl1(cs, "W6692_l1hw unknown %04x", pr);
668 break;
669 } 669 }
670} 670}
671 671
@@ -734,17 +734,17 @@ W6692Bmode(struct BCState *bcs, int mode, int bchan)
734 bcs->hw.w6692.bchan = bchan; 734 bcs->hw.w6692.bchan = bchan;
735 735
736 switch (mode) { 736 switch (mode) {
737 case (L1_MODE_NULL): 737 case (L1_MODE_NULL):
738 cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0); 738 cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0);
739 break; 739 break;
740 case (L1_MODE_TRANS): 740 case (L1_MODE_TRANS):
741 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS); 741 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS);
742 break; 742 break;
743 case (L1_MODE_HDLC): 743 case (L1_MODE_HDLC):
744 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF); 744 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF);
745 cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff); 745 cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff);
746 cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff); 746 cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff);
747 break; 747 break;
748 } 748 }
749 if (mode) 749 if (mode)
750 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST | 750 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST |
@@ -756,59 +756,59 @@ static void
756W6692_l2l1(struct PStack *st, int pr, void *arg) 756W6692_l2l1(struct PStack *st, int pr, void *arg)
757{ 757{
758 struct sk_buff *skb = arg; 758 struct sk_buff *skb = arg;
759 struct BCState *bcs = st->l1.bcs; 759 struct BCState *bcs = st->l1.bcs;
760 u_long flags; 760 u_long flags;
761 761
762 switch (pr) { 762 switch (pr) {
763 case (PH_DATA | REQUEST): 763 case (PH_DATA | REQUEST):
764 spin_lock_irqsave(&bcs->cs->lock, flags); 764 spin_lock_irqsave(&bcs->cs->lock, flags);
765 if (bcs->tx_skb) { 765 if (bcs->tx_skb) {
766 skb_queue_tail(&bcs->squeue, skb); 766 skb_queue_tail(&bcs->squeue, skb);
767 } else { 767 } else {
768 bcs->tx_skb = skb;
769 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
770 bcs->hw.w6692.count = 0;
771 bcs->cs->BC_Send_Data(bcs);
772 }
773 spin_unlock_irqrestore(&bcs->cs->lock, flags);
774 break;
775 case (PH_PULL | INDICATION):
776 if (bcs->tx_skb) {
777 printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
778 break;
779 }
780 spin_lock_irqsave(&bcs->cs->lock, flags);
781 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
782 bcs->tx_skb = skb; 768 bcs->tx_skb = skb;
769 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
783 bcs->hw.w6692.count = 0; 770 bcs->hw.w6692.count = 0;
784 bcs->cs->BC_Send_Data(bcs); 771 bcs->cs->BC_Send_Data(bcs);
785 spin_unlock_irqrestore(&bcs->cs->lock, flags); 772 }
786 break; 773 spin_unlock_irqrestore(&bcs->cs->lock, flags);
787 case (PH_PULL | REQUEST): 774 break;
788 if (!bcs->tx_skb) { 775 case (PH_PULL | INDICATION):
789 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 776 if (bcs->tx_skb) {
790 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 777 printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
791 } else
792 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
793 break;
794 case (PH_ACTIVATE | REQUEST):
795 spin_lock_irqsave(&bcs->cs->lock, flags);
796 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
797 W6692Bmode(bcs, st->l1.mode, st->l1.bc);
798 spin_unlock_irqrestore(&bcs->cs->lock, flags);
799 l1_msg_b(st, pr, arg);
800 break;
801 case (PH_DEACTIVATE | REQUEST):
802 l1_msg_b(st, pr, arg);
803 break;
804 case (PH_DEACTIVATE | CONFIRM):
805 spin_lock_irqsave(&bcs->cs->lock, flags);
806 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
807 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
808 W6692Bmode(bcs, 0, st->l1.bc);
809 spin_unlock_irqrestore(&bcs->cs->lock, flags);
810 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
811 break; 778 break;
779 }
780 spin_lock_irqsave(&bcs->cs->lock, flags);
781 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
782 bcs->tx_skb = skb;
783 bcs->hw.w6692.count = 0;
784 bcs->cs->BC_Send_Data(bcs);
785 spin_unlock_irqrestore(&bcs->cs->lock, flags);
786 break;
787 case (PH_PULL | REQUEST):
788 if (!bcs->tx_skb) {
789 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
790 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
791 } else
792 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
793 break;
794 case (PH_ACTIVATE | REQUEST):
795 spin_lock_irqsave(&bcs->cs->lock, flags);
796 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
797 W6692Bmode(bcs, st->l1.mode, st->l1.bc);
798 spin_unlock_irqrestore(&bcs->cs->lock, flags);
799 l1_msg_b(st, pr, arg);
800 break;
801 case (PH_DEACTIVATE | REQUEST):
802 l1_msg_b(st, pr, arg);
803 break;
804 case (PH_DEACTIVATE | CONFIRM):
805 spin_lock_irqsave(&bcs->cs->lock, flags);
806 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
807 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
808 W6692Bmode(bcs, 0, st->l1.bc);
809 spin_unlock_irqrestore(&bcs->cs->lock, flags);
810 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
811 break;
812 } 812 }
813} 813}
814 814
@@ -943,13 +943,13 @@ WriteW6692(struct IsdnCardState *cs, u_char offset, u_char value)
943} 943}
944 944
945static void 945static void
946ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 946ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
947{ 947{
948 insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size); 948 insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size);
949} 949}
950 950
951static void 951static void
952WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 952WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
953{ 953{
954 outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size); 954 outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size);
955} 955}
@@ -970,26 +970,26 @@ static int
970w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg) 970w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg)
971{ 971{
972 switch (mt) { 972 switch (mt) {
973 case CARD_RESET: 973 case CARD_RESET:
974 resetW6692(cs); 974 resetW6692(cs);
975 return (0); 975 return (0);
976 case CARD_RELEASE: 976 case CARD_RELEASE:
977 cs->writeW6692(cs, W_IMASK, 0xff); 977 cs->writeW6692(cs, W_IMASK, 0xff);
978 release_region(cs->hw.w6692.iobase, 256); 978 release_region(cs->hw.w6692.iobase, 256);
979 if (cs->subtyp == W6692_USR) { 979 if (cs->subtyp == W6692_USR) {
980 cs->writeW6692(cs, W_XDATA, 0x04); 980 cs->writeW6692(cs, W_XDATA, 0x04);
981 } 981 }
982 return (0); 982 return (0);
983 case CARD_INIT: 983 case CARD_INIT:
984 initW6692(cs, 3); 984 initW6692(cs, 3);
985 return (0); 985 return (0);
986 case CARD_TEST: 986 case CARD_TEST:
987 return (0); 987 return (0);
988 } 988 }
989 return (0); 989 return (0);
990} 990}
991 991
992static int id_idx ; 992static int id_idx;
993 993
994static struct pci_dev *dev_w6692 __devinitdata = NULL; 994static struct pci_dev *dev_w6692 __devinitdata = NULL;
995 995
@@ -1009,8 +1009,8 @@ setup_w6692(struct IsdnCard *card)
1009 1009
1010 while (id_list[id_idx].vendor_id) { 1010 while (id_list[id_idx].vendor_id) {
1011 dev_w6692 = hisax_find_pci_device(id_list[id_idx].vendor_id, 1011 dev_w6692 = hisax_find_pci_device(id_list[id_idx].vendor_id,
1012 id_list[id_idx].device_id, 1012 id_list[id_idx].device_id,
1013 dev_w6692); 1013 dev_w6692);
1014 if (dev_w6692) { 1014 if (dev_w6692) {
1015 if (pci_enable_device(dev_w6692)) 1015 if (pci_enable_device(dev_w6692))
1016 continue; 1016 continue;