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authorJoe Perches <joe@perches.com>2012-02-19 22:52:38 -0500
committerJoe Perches <joe@perches.com>2012-02-21 12:04:01 -0500
commit475be4d85a274d0961593db41cf85689db1d583c (patch)
treeb2b8931eb747794730522c3cf1898e46948527b9 /drivers/isdn/hardware/mISDN/hfcmulti.c
parent0b0a635f79f91f3755b6518627ea06dd0dbfd523 (diff)
isdn: whitespace coding style cleanup
isdn source code uses a not-current coding style. Update the coding style used on a per-line basis so that git diff -w shows only elided blank lines at EOF. Done with emacs and some scripts and some typing. Built x86 allyesconfig. No detected change in objdump -d or size. Signed-off-by: Joe Perches <joe@perches.com>
Diffstat (limited to 'drivers/isdn/hardware/mISDN/hfcmulti.c')
-rw-r--r--drivers/isdn/hardware/mISDN/hfcmulti.c1364
1 files changed, 682 insertions, 682 deletions
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c
index a440d7fff0ad..033223180b55 100644
--- a/drivers/isdn/hardware/mISDN/hfcmulti.c
+++ b/drivers/isdn/hardware/mISDN/hfcmulti.c
@@ -142,7 +142,7 @@
142 * 142 *
143 * hwid: 143 * hwid:
144 * NOTE: only one hwid value must be given once 144 * NOTE: only one hwid value must be given once
145 * Enable special embedded devices with XHFC controllers. 145 * Enable special embedded devices with XHFC controllers.
146 */ 146 */
147 147
148/* 148/*
@@ -161,8 +161,8 @@
161#include <linux/mISDNdsp.h> 161#include <linux/mISDNdsp.h>
162 162
163/* 163/*
164#define IRQCOUNT_DEBUG 164 #define IRQCOUNT_DEBUG
165#define IRQ_DEBUG 165 #define IRQ_DEBUG
166*/ 166*/
167 167
168#include "hfc_multi.h" 168#include "hfc_multi.h"
@@ -237,21 +237,21 @@ module_param_array(port, uint, NULL, S_IRUGO | S_IWUSR);
237module_param(hwid, uint, S_IRUGO | S_IWUSR); /* The hardware ID */ 237module_param(hwid, uint, S_IRUGO | S_IWUSR); /* The hardware ID */
238 238
239#ifdef HFC_REGISTER_DEBUG 239#ifdef HFC_REGISTER_DEBUG
240#define HFC_outb(hc, reg, val) \ 240#define HFC_outb(hc, reg, val) \
241 (hc->HFC_outb(hc, reg, val, __func__, __LINE__)) 241 (hc->HFC_outb(hc, reg, val, __func__, __LINE__))
242#define HFC_outb_nodebug(hc, reg, val) \ 242#define HFC_outb_nodebug(hc, reg, val) \
243 (hc->HFC_outb_nodebug(hc, reg, val, __func__, __LINE__)) 243 (hc->HFC_outb_nodebug(hc, reg, val, __func__, __LINE__))
244#define HFC_inb(hc, reg) \ 244#define HFC_inb(hc, reg) \
245 (hc->HFC_inb(hc, reg, __func__, __LINE__)) 245 (hc->HFC_inb(hc, reg, __func__, __LINE__))
246#define HFC_inb_nodebug(hc, reg) \ 246#define HFC_inb_nodebug(hc, reg) \
247 (hc->HFC_inb_nodebug(hc, reg, __func__, __LINE__)) 247 (hc->HFC_inb_nodebug(hc, reg, __func__, __LINE__))
248#define HFC_inw(hc, reg) \ 248#define HFC_inw(hc, reg) \
249 (hc->HFC_inw(hc, reg, __func__, __LINE__)) 249 (hc->HFC_inw(hc, reg, __func__, __LINE__))
250#define HFC_inw_nodebug(hc, reg) \ 250#define HFC_inw_nodebug(hc, reg) \
251 (hc->HFC_inw_nodebug(hc, reg, __func__, __LINE__)) 251 (hc->HFC_inw_nodebug(hc, reg, __func__, __LINE__))
252#define HFC_wait(hc) \ 252#define HFC_wait(hc) \
253 (hc->HFC_wait(hc, __func__, __LINE__)) 253 (hc->HFC_wait(hc, __func__, __LINE__))
254#define HFC_wait_nodebug(hc) \ 254#define HFC_wait_nodebug(hc) \
255 (hc->HFC_wait_nodebug(hc, __func__, __LINE__)) 255 (hc->HFC_wait_nodebug(hc, __func__, __LINE__))
256#else 256#else
257#define HFC_outb(hc, reg, val) (hc->HFC_outb(hc, reg, val)) 257#define HFC_outb(hc, reg, val) (hc->HFC_outb(hc, reg, val))
@@ -274,7 +274,7 @@ static void
274HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val, 274HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val,
275 const char *function, int line) 275 const char *function, int line)
276#else 276#else
277HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val) 277 HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val)
278#endif 278#endif
279{ 279{
280 writeb(val, hc->pci_membase + reg); 280 writeb(val, hc->pci_membase + reg);
@@ -283,7 +283,7 @@ static u_char
283#ifdef HFC_REGISTER_DEBUG 283#ifdef HFC_REGISTER_DEBUG
284HFC_inb_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line) 284HFC_inb_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line)
285#else 285#else
286HFC_inb_pcimem(struct hfc_multi *hc, u_char reg) 286 HFC_inb_pcimem(struct hfc_multi *hc, u_char reg)
287#endif 287#endif
288{ 288{
289 return readb(hc->pci_membase + reg); 289 return readb(hc->pci_membase + reg);
@@ -292,7 +292,7 @@ static u_short
292#ifdef HFC_REGISTER_DEBUG 292#ifdef HFC_REGISTER_DEBUG
293HFC_inw_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line) 293HFC_inw_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line)
294#else 294#else
295HFC_inw_pcimem(struct hfc_multi *hc, u_char reg) 295 HFC_inw_pcimem(struct hfc_multi *hc, u_char reg)
296#endif 296#endif
297{ 297{
298 return readw(hc->pci_membase + reg); 298 return readw(hc->pci_membase + reg);
@@ -301,7 +301,7 @@ static void
301#ifdef HFC_REGISTER_DEBUG 301#ifdef HFC_REGISTER_DEBUG
302HFC_wait_pcimem(struct hfc_multi *hc, const char *function, int line) 302HFC_wait_pcimem(struct hfc_multi *hc, const char *function, int line)
303#else 303#else
304HFC_wait_pcimem(struct hfc_multi *hc) 304 HFC_wait_pcimem(struct hfc_multi *hc)
305#endif 305#endif
306{ 306{
307 while (readb(hc->pci_membase + R_STATUS) & V_BUSY) 307 while (readb(hc->pci_membase + R_STATUS) & V_BUSY)
@@ -312,9 +312,9 @@ HFC_wait_pcimem(struct hfc_multi *hc)
312static void 312static void
313#ifdef HFC_REGISTER_DEBUG 313#ifdef HFC_REGISTER_DEBUG
314HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val, 314HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val,
315 const char *function, int line) 315 const char *function, int line)
316#else 316#else
317HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val) 317 HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val)
318#endif 318#endif
319{ 319{
320 outb(reg, hc->pci_iobase + 4); 320 outb(reg, hc->pci_iobase + 4);
@@ -324,7 +324,7 @@ static u_char
324#ifdef HFC_REGISTER_DEBUG 324#ifdef HFC_REGISTER_DEBUG
325HFC_inb_regio(struct hfc_multi *hc, u_char reg, const char *function, int line) 325HFC_inb_regio(struct hfc_multi *hc, u_char reg, const char *function, int line)
326#else 326#else
327HFC_inb_regio(struct hfc_multi *hc, u_char reg) 327 HFC_inb_regio(struct hfc_multi *hc, u_char reg)
328#endif 328#endif
329{ 329{
330 outb(reg, hc->pci_iobase + 4); 330 outb(reg, hc->pci_iobase + 4);
@@ -334,7 +334,7 @@ static u_short
334#ifdef HFC_REGISTER_DEBUG 334#ifdef HFC_REGISTER_DEBUG
335HFC_inw_regio(struct hfc_multi *hc, u_char reg, const char *function, int line) 335HFC_inw_regio(struct hfc_multi *hc, u_char reg, const char *function, int line)
336#else 336#else
337HFC_inw_regio(struct hfc_multi *hc, u_char reg) 337 HFC_inw_regio(struct hfc_multi *hc, u_char reg)
338#endif 338#endif
339{ 339{
340 outb(reg, hc->pci_iobase + 4); 340 outb(reg, hc->pci_iobase + 4);
@@ -344,7 +344,7 @@ static void
344#ifdef HFC_REGISTER_DEBUG 344#ifdef HFC_REGISTER_DEBUG
345HFC_wait_regio(struct hfc_multi *hc, const char *function, int line) 345HFC_wait_regio(struct hfc_multi *hc, const char *function, int line)
346#else 346#else
347HFC_wait_regio(struct hfc_multi *hc) 347 HFC_wait_regio(struct hfc_multi *hc)
348#endif 348#endif
349{ 349{
350 outb(R_STATUS, hc->pci_iobase + 4); 350 outb(R_STATUS, hc->pci_iobase + 4);
@@ -355,7 +355,7 @@ HFC_wait_regio(struct hfc_multi *hc)
355#ifdef HFC_REGISTER_DEBUG 355#ifdef HFC_REGISTER_DEBUG
356static void 356static void
357HFC_outb_debug(struct hfc_multi *hc, u_char reg, u_char val, 357HFC_outb_debug(struct hfc_multi *hc, u_char reg, u_char val,
358 const char *function, int line) 358 const char *function, int line)
359{ 359{
360 char regname[256] = "", bits[9] = "xxxxxxxx"; 360 char regname[256] = "", bits[9] = "xxxxxxxx";
361 int i; 361 int i;
@@ -377,8 +377,8 @@ HFC_outb_debug(struct hfc_multi *hc, u_char reg, u_char val,
377 bits[1] = '0' + (!!(val & 64)); 377 bits[1] = '0' + (!!(val & 64));
378 bits[0] = '0' + (!!(val & 128)); 378 bits[0] = '0' + (!!(val & 128));
379 printk(KERN_DEBUG 379 printk(KERN_DEBUG
380 "HFC_outb(chip %d, %02x=%s, 0x%02x=%s); in %s() line %d\n", 380 "HFC_outb(chip %d, %02x=%s, 0x%02x=%s); in %s() line %d\n",
381 hc->id, reg, regname, val, bits, function, line); 381 hc->id, reg, regname, val, bits, function, line);
382 HFC_outb_nodebug(hc, reg, val); 382 HFC_outb_nodebug(hc, reg, val);
383} 383}
384static u_char 384static u_char
@@ -407,8 +407,8 @@ HFC_inb_debug(struct hfc_multi *hc, u_char reg, const char *function, int line)
407 bits[1] = '0' + (!!(val & 64)); 407 bits[1] = '0' + (!!(val & 64));
408 bits[0] = '0' + (!!(val & 128)); 408 bits[0] = '0' + (!!(val & 128));
409 printk(KERN_DEBUG 409 printk(KERN_DEBUG
410 "HFC_inb(chip %d, %02x=%s) = 0x%02x=%s; in %s() line %d\n", 410 "HFC_inb(chip %d, %02x=%s) = 0x%02x=%s; in %s() line %d\n",
411 hc->id, reg, regname, val, bits, function, line); 411 hc->id, reg, regname, val, bits, function, line);
412 return val; 412 return val;
413} 413}
414static u_short 414static u_short
@@ -429,15 +429,15 @@ HFC_inw_debug(struct hfc_multi *hc, u_char reg, const char *function, int line)
429 strcpy(regname, "register"); 429 strcpy(regname, "register");
430 430
431 printk(KERN_DEBUG 431 printk(KERN_DEBUG
432 "HFC_inw(chip %d, %02x=%s) = 0x%04x; in %s() line %d\n", 432 "HFC_inw(chip %d, %02x=%s) = 0x%04x; in %s() line %d\n",
433 hc->id, reg, regname, val, function, line); 433 hc->id, reg, regname, val, function, line);
434 return val; 434 return val;
435} 435}
436static void 436static void
437HFC_wait_debug(struct hfc_multi *hc, const char *function, int line) 437HFC_wait_debug(struct hfc_multi *hc, const char *function, int line)
438{ 438{
439 printk(KERN_DEBUG "HFC_wait(chip %d); in %s() line %d\n", 439 printk(KERN_DEBUG "HFC_wait(chip %d); in %s() line %d\n",
440 hc->id, function, line); 440 hc->id, function, line);
441 HFC_wait_nodebug(hc); 441 HFC_wait_nodebug(hc);
442} 442}
443#endif 443#endif
@@ -446,13 +446,13 @@ HFC_wait_debug(struct hfc_multi *hc, const char *function, int line)
446static void 446static void
447write_fifo_regio(struct hfc_multi *hc, u_char *data, int len) 447write_fifo_regio(struct hfc_multi *hc, u_char *data, int len)
448{ 448{
449 outb(A_FIFO_DATA0, (hc->pci_iobase)+4); 449 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4);
450 while (len>>2) { 450 while (len >> 2) {
451 outl(cpu_to_le32(*(u32 *)data), hc->pci_iobase); 451 outl(cpu_to_le32(*(u32 *)data), hc->pci_iobase);
452 data += 4; 452 data += 4;
453 len -= 4; 453 len -= 4;
454 } 454 }
455 while (len>>1) { 455 while (len >> 1) {
456 outw(cpu_to_le16(*(u16 *)data), hc->pci_iobase); 456 outw(cpu_to_le16(*(u16 *)data), hc->pci_iobase);
457 data += 2; 457 data += 2;
458 len -= 2; 458 len -= 2;
@@ -467,15 +467,15 @@ write_fifo_regio(struct hfc_multi *hc, u_char *data, int len)
467static void 467static void
468write_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len) 468write_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len)
469{ 469{
470 while (len>>2) { 470 while (len >> 2) {
471 writel(cpu_to_le32(*(u32 *)data), 471 writel(cpu_to_le32(*(u32 *)data),
472 hc->pci_membase + A_FIFO_DATA0); 472 hc->pci_membase + A_FIFO_DATA0);
473 data += 4; 473 data += 4;
474 len -= 4; 474 len -= 4;
475 } 475 }
476 while (len>>1) { 476 while (len >> 1) {
477 writew(cpu_to_le16(*(u16 *)data), 477 writew(cpu_to_le16(*(u16 *)data),
478 hc->pci_membase + A_FIFO_DATA0); 478 hc->pci_membase + A_FIFO_DATA0);
479 data += 2; 479 data += 2;
480 len -= 2; 480 len -= 2;
481 } 481 }
@@ -490,13 +490,13 @@ write_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len)
490static void 490static void
491read_fifo_regio(struct hfc_multi *hc, u_char *data, int len) 491read_fifo_regio(struct hfc_multi *hc, u_char *data, int len)
492{ 492{
493 outb(A_FIFO_DATA0, (hc->pci_iobase)+4); 493 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4);
494 while (len>>2) { 494 while (len >> 2) {
495 *(u32 *)data = le32_to_cpu(inl(hc->pci_iobase)); 495 *(u32 *)data = le32_to_cpu(inl(hc->pci_iobase));
496 data += 4; 496 data += 4;
497 len -= 4; 497 len -= 4;
498 } 498 }
499 while (len>>1) { 499 while (len >> 1) {
500 *(u16 *)data = le16_to_cpu(inw(hc->pci_iobase)); 500 *(u16 *)data = le16_to_cpu(inw(hc->pci_iobase));
501 data += 2; 501 data += 2;
502 len -= 2; 502 len -= 2;
@@ -512,13 +512,13 @@ read_fifo_regio(struct hfc_multi *hc, u_char *data, int len)
512static void 512static void
513read_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len) 513read_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len)
514{ 514{
515 while (len>>2) { 515 while (len >> 2) {
516 *(u32 *)data = 516 *(u32 *)data =
517 le32_to_cpu(readl(hc->pci_membase + A_FIFO_DATA0)); 517 le32_to_cpu(readl(hc->pci_membase + A_FIFO_DATA0));
518 data += 4; 518 data += 4;
519 len -= 4; 519 len -= 4;
520 } 520 }
521 while (len>>1) { 521 while (len >> 1) {
522 *(u16 *)data = 522 *(u16 *)data =
523 le16_to_cpu(readw(hc->pci_membase + A_FIFO_DATA0)); 523 le16_to_cpu(readw(hc->pci_membase + A_FIFO_DATA0));
524 data += 2; 524 data += 2;
@@ -607,7 +607,7 @@ writepcibridge(struct hfc_multi *hc, unsigned char address, unsigned char data)
607 outw(cipv, hc->pci_iobase + 4); 607 outw(cipv, hc->pci_iobase + 4);
608 /* define a 32 bit dword with 4 identical bytes for write sequence */ 608 /* define a 32 bit dword with 4 identical bytes for write sequence */
609 datav = data | ((__u32) data << 8) | ((__u32) data << 16) | 609 datav = data | ((__u32) data << 8) | ((__u32) data << 16) |
610 ((__u32) data << 24); 610 ((__u32) data << 24);
611 611
612 /* 612 /*
613 * write this 32 bit dword to the bridge data port 613 * write this 32 bit dword to the bridge data port
@@ -699,7 +699,7 @@ vpm_in(struct hfc_multi *c, int which, unsigned short addr)
699 699
700inline void 700inline void
701vpm_out(struct hfc_multi *c, int which, unsigned short addr, 701vpm_out(struct hfc_multi *c, int which, unsigned short addr,
702 unsigned char data) 702 unsigned char data)
703{ 703{
704 vpm_write_address(c, addr); 704 vpm_write_address(c, addr);
705 705
@@ -717,11 +717,11 @@ vpm_out(struct hfc_multi *c, int which, unsigned short addr,
717 disablepcibridge(c); 717 disablepcibridge(c);
718 718
719 { 719 {
720 unsigned char regin; 720 unsigned char regin;
721 regin = vpm_in(c, which, addr); 721 regin = vpm_in(c, which, addr);
722 if (regin != data) 722 if (regin != data)
723 printk(KERN_DEBUG "Wrote 0x%x to register 0x%x but got back " 723 printk(KERN_DEBUG "Wrote 0x%x to register 0x%x but got back "
724 "0x%x\n", data, addr, regin); 724 "0x%x\n", data, addr, regin);
725 } 725 }
726 726
727} 727}
@@ -853,16 +853,16 @@ vpm_echocan_on(struct hfc_multi *hc, int ch, int taps)
853 853
854#ifdef TXADJ 854#ifdef TXADJ
855 skb = _alloc_mISDN_skb(PH_CONTROL_IND, HFC_VOL_CHANGE_TX, 855 skb = _alloc_mISDN_skb(PH_CONTROL_IND, HFC_VOL_CHANGE_TX,
856 sizeof(int), &txadj, GFP_ATOMIC); 856 sizeof(int), &txadj, GFP_ATOMIC);
857 if (skb) 857 if (skb)
858 recv_Bchannel_skb(bch, skb); 858 recv_Bchannel_skb(bch, skb);
859#endif 859#endif
860 860
861 timeslot = ((ch/4)*8) + ((ch%4)*4) + 1; 861 timeslot = ((ch / 4) * 8) + ((ch % 4) * 4) + 1;
862 unit = ch % 4; 862 unit = ch % 4;
863 863
864 printk(KERN_NOTICE "vpm_echocan_on called taps [%d] on timeslot %d\n", 864 printk(KERN_NOTICE "vpm_echocan_on called taps [%d] on timeslot %d\n",
865 taps, timeslot); 865 taps, timeslot);
866 866
867 vpm_out(hc, unit, timeslot, 0x7e); 867 vpm_out(hc, unit, timeslot, 0x7e);
868} 868}
@@ -886,16 +886,16 @@ vpm_echocan_off(struct hfc_multi *hc, int ch)
886 886
887#ifdef TXADJ 887#ifdef TXADJ
888 skb = _alloc_mISDN_skb(PH_CONTROL_IND, HFC_VOL_CHANGE_TX, 888 skb = _alloc_mISDN_skb(PH_CONTROL_IND, HFC_VOL_CHANGE_TX,
889 sizeof(int), &txadj, GFP_ATOMIC); 889 sizeof(int), &txadj, GFP_ATOMIC);
890 if (skb) 890 if (skb)
891 recv_Bchannel_skb(bch, skb); 891 recv_Bchannel_skb(bch, skb);
892#endif 892#endif
893 893
894 timeslot = ((ch/4)*8) + ((ch%4)*4) + 1; 894 timeslot = ((ch / 4) * 8) + ((ch % 4) * 4) + 1;
895 unit = ch % 4; 895 unit = ch % 4;
896 896
897 printk(KERN_NOTICE "vpm_echocan_off called on timeslot %d\n", 897 printk(KERN_NOTICE "vpm_echocan_off called on timeslot %d\n",
898 timeslot); 898 timeslot);
899 /* FILLME */ 899 /* FILLME */
900 vpm_out(hc, unit, timeslot, 0x01); 900 vpm_out(hc, unit, timeslot, 0x01);
901} 901}
@@ -920,7 +920,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
920 920
921 if (debug & DEBUG_HFCMULTI_PLXSD) 921 if (debug & DEBUG_HFCMULTI_PLXSD)
922 printk(KERN_DEBUG "%s: RESYNC(syncmaster=0x%p)\n", 922 printk(KERN_DEBUG "%s: RESYNC(syncmaster=0x%p)\n",
923 __func__, syncmaster); 923 __func__, syncmaster);
924 924
925 /* select new master */ 925 /* select new master */
926 if (newmaster) { 926 if (newmaster) {
@@ -949,7 +949,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
949 if (hc->ctype == HFC_TYPE_E1) { 949 if (hc->ctype == HFC_TYPE_E1) {
950 if (debug & DEBUG_HFCMULTI_PLXSD) 950 if (debug & DEBUG_HFCMULTI_PLXSD)
951 printk(KERN_DEBUG 951 printk(KERN_DEBUG
952 "Schedule SYNC_I\n"); 952 "Schedule SYNC_I\n");
953 hc->e1_resync |= 1; /* get SYNC_I */ 953 hc->e1_resync |= 1; /* get SYNC_I */
954 } 954 }
955 } 955 }
@@ -960,7 +960,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
960 hc = newmaster; 960 hc = newmaster;
961 if (debug & DEBUG_HFCMULTI_PLXSD) 961 if (debug & DEBUG_HFCMULTI_PLXSD)
962 printk(KERN_DEBUG "id=%d (0x%p) = syncronized with " 962 printk(KERN_DEBUG "id=%d (0x%p) = syncronized with "
963 "interface.\n", hc->id, hc); 963 "interface.\n", hc->id, hc);
964 /* Enable new sync master */ 964 /* Enable new sync master */
965 plx_acc_32 = hc->plx_membase + PLX_GPIOC; 965 plx_acc_32 = hc->plx_membase + PLX_GPIOC;
966 pv = readl(plx_acc_32); 966 pv = readl(plx_acc_32);
@@ -968,7 +968,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
968 writel(pv, plx_acc_32); 968 writel(pv, plx_acc_32);
969 /* switch to jatt PLL, if not disabled by RX_SYNC */ 969 /* switch to jatt PLL, if not disabled by RX_SYNC */
970 if (hc->ctype == HFC_TYPE_E1 970 if (hc->ctype == HFC_TYPE_E1
971 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) { 971 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) {
972 if (debug & DEBUG_HFCMULTI_PLXSD) 972 if (debug & DEBUG_HFCMULTI_PLXSD)
973 printk(KERN_DEBUG "Schedule jatt PLL\n"); 973 printk(KERN_DEBUG "Schedule jatt PLL\n");
974 hc->e1_resync |= 2; /* switch to jatt */ 974 hc->e1_resync |= 2; /* switch to jatt */
@@ -978,20 +978,20 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
978 hc = pcmmaster; 978 hc = pcmmaster;
979 if (debug & DEBUG_HFCMULTI_PLXSD) 979 if (debug & DEBUG_HFCMULTI_PLXSD)
980 printk(KERN_DEBUG 980 printk(KERN_DEBUG
981 "id=%d (0x%p) = PCM master syncronized " 981 "id=%d (0x%p) = PCM master syncronized "
982 "with QUARTZ\n", hc->id, hc); 982 "with QUARTZ\n", hc->id, hc);
983 if (hc->ctype == HFC_TYPE_E1) { 983 if (hc->ctype == HFC_TYPE_E1) {
984 /* Use the crystal clock for the PCM 984 /* Use the crystal clock for the PCM
985 master card */ 985 master card */
986 if (debug & DEBUG_HFCMULTI_PLXSD) 986 if (debug & DEBUG_HFCMULTI_PLXSD)
987 printk(KERN_DEBUG 987 printk(KERN_DEBUG
988 "Schedule QUARTZ for HFC-E1\n"); 988 "Schedule QUARTZ for HFC-E1\n");
989 hc->e1_resync |= 4; /* switch quartz */ 989 hc->e1_resync |= 4; /* switch quartz */
990 } else { 990 } else {
991 if (debug & DEBUG_HFCMULTI_PLXSD) 991 if (debug & DEBUG_HFCMULTI_PLXSD)
992 printk(KERN_DEBUG 992 printk(KERN_DEBUG
993 "QUARTZ is automatically " 993 "QUARTZ is automatically "
994 "enabled by HFC-%dS\n", hc->ctype); 994 "enabled by HFC-%dS\n", hc->ctype);
995 } 995 }
996 plx_acc_32 = hc->plx_membase + PLX_GPIOC; 996 plx_acc_32 = hc->plx_membase + PLX_GPIOC;
997 pv = readl(plx_acc_32); 997 pv = readl(plx_acc_32);
@@ -1000,7 +1000,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
1000 } else 1000 } else
1001 if (!rm) 1001 if (!rm)
1002 printk(KERN_ERR "%s no pcm master, this MUST " 1002 printk(KERN_ERR "%s no pcm master, this MUST "
1003 "not happen!\n", __func__); 1003 "not happen!\n", __func__);
1004 } 1004 }
1005 syncmaster = newmaster; 1005 syncmaster = newmaster;
1006 1006
@@ -1016,16 +1016,16 @@ plxsd_checksync(struct hfc_multi *hc, int rm)
1016 if (syncmaster == NULL) { 1016 if (syncmaster == NULL) {
1017 if (debug & DEBUG_HFCMULTI_PLXSD) 1017 if (debug & DEBUG_HFCMULTI_PLXSD)
1018 printk(KERN_DEBUG "%s: GOT sync on card %d" 1018 printk(KERN_DEBUG "%s: GOT sync on card %d"
1019 " (id=%d)\n", __func__, hc->id + 1, 1019 " (id=%d)\n", __func__, hc->id + 1,
1020 hc->id); 1020 hc->id);
1021 hfcmulti_resync(hc, hc, rm); 1021 hfcmulti_resync(hc, hc, rm);
1022 } 1022 }
1023 } else { 1023 } else {
1024 if (syncmaster == hc) { 1024 if (syncmaster == hc) {
1025 if (debug & DEBUG_HFCMULTI_PLXSD) 1025 if (debug & DEBUG_HFCMULTI_PLXSD)
1026 printk(KERN_DEBUG "%s: LOST sync on card %d" 1026 printk(KERN_DEBUG "%s: LOST sync on card %d"
1027 " (id=%d)\n", __func__, hc->id + 1, 1027 " (id=%d)\n", __func__, hc->id + 1,
1028 hc->id); 1028 hc->id);
1029 hfcmulti_resync(hc, NULL, rm); 1029 hfcmulti_resync(hc, NULL, rm);
1030 } 1030 }
1031 } 1031 }
@@ -1057,7 +1057,7 @@ release_io_hfcmulti(struct hfc_multi *hc)
1057 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && hc->plx_membase) { 1057 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && hc->plx_membase) {
1058 if (debug & DEBUG_HFCMULTI_PLXSD) 1058 if (debug & DEBUG_HFCMULTI_PLXSD)
1059 printk(KERN_DEBUG "%s: release PLXSD card %d\n", 1059 printk(KERN_DEBUG "%s: release PLXSD card %d\n",
1060 __func__, hc->id + 1); 1060 __func__, hc->id + 1);
1061 spin_lock_irqsave(&plx_lock, plx_flags); 1061 spin_lock_irqsave(&plx_lock, plx_flags);
1062 plx_acc_32 = hc->plx_membase + PLX_GPIOC; 1062 plx_acc_32 = hc->plx_membase + PLX_GPIOC;
1063 writel(PLX_GPIOC_INIT, plx_acc_32); 1063 writel(PLX_GPIOC_INIT, plx_acc_32);
@@ -1073,7 +1073,7 @@ release_io_hfcmulti(struct hfc_multi *hc)
1073 writel(pv, plx_acc_32); 1073 writel(pv, plx_acc_32);
1074 if (debug & DEBUG_HFCMULTI_INIT) 1074 if (debug & DEBUG_HFCMULTI_INIT)
1075 printk(KERN_DEBUG "%s: PCM off: PLX_GPIO=%x\n", 1075 printk(KERN_DEBUG "%s: PCM off: PLX_GPIO=%x\n",
1076 __func__, pv); 1076 __func__, pv);
1077 spin_unlock_irqrestore(&plx_lock, plx_flags); 1077 spin_unlock_irqrestore(&plx_lock, plx_flags);
1078 } 1078 }
1079 1079
@@ -1131,22 +1131,22 @@ init_chip(struct hfc_multi *hc)
1131 } 1131 }
1132 rev = HFC_inb(hc, R_CHIP_RV); 1132 rev = HFC_inb(hc, R_CHIP_RV);
1133 printk(KERN_INFO 1133 printk(KERN_INFO
1134 "HFC_multi: detected HFC with chip ID=0x%lx revision=%ld%s\n", 1134 "HFC_multi: detected HFC with chip ID=0x%lx revision=%ld%s\n",
1135 val, rev, (rev == 0 && (hc->ctype != HFC_TYPE_XHFC)) ? 1135 val, rev, (rev == 0 && (hc->ctype != HFC_TYPE_XHFC)) ?
1136 " (old FIFO handling)" : ""); 1136 " (old FIFO handling)" : "");
1137 if (hc->ctype != HFC_TYPE_XHFC && rev == 0) { 1137 if (hc->ctype != HFC_TYPE_XHFC && rev == 0) {
1138 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip); 1138 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip);
1139 printk(KERN_WARNING 1139 printk(KERN_WARNING
1140 "HFC_multi: NOTE: Your chip is revision 0, " 1140 "HFC_multi: NOTE: Your chip is revision 0, "
1141 "ask Cologne Chip for update. Newer chips " 1141 "ask Cologne Chip for update. Newer chips "
1142 "have a better FIFO handling. Old chips " 1142 "have a better FIFO handling. Old chips "
1143 "still work but may have slightly lower " 1143 "still work but may have slightly lower "
1144 "HDLC transmit performance.\n"); 1144 "HDLC transmit performance.\n");
1145 } 1145 }
1146 if (rev > 1) { 1146 if (rev > 1) {
1147 printk(KERN_WARNING "HFC_multi: WARNING: This driver doesn't " 1147 printk(KERN_WARNING "HFC_multi: WARNING: This driver doesn't "
1148 "consider chip revision = %ld. The chip / " 1148 "consider chip revision = %ld. The chip / "
1149 "bridge may not work.\n", rev); 1149 "bridge may not work.\n", rev);
1150 } 1150 }
1151 1151
1152 /* set s-ram size */ 1152 /* set s-ram size */
@@ -1157,7 +1157,7 @@ init_chip(struct hfc_multi *hc)
1157 if (test_bit(HFC_CHIP_EXRAM_128, &hc->chip)) { 1157 if (test_bit(HFC_CHIP_EXRAM_128, &hc->chip)) {
1158 if (debug & DEBUG_HFCMULTI_INIT) 1158 if (debug & DEBUG_HFCMULTI_INIT)
1159 printk(KERN_DEBUG "%s: changing to 128K extenal RAM\n", 1159 printk(KERN_DEBUG "%s: changing to 128K extenal RAM\n",
1160 __func__); 1160 __func__);
1161 hc->hw.r_ctrl |= V_EXT_RAM; 1161 hc->hw.r_ctrl |= V_EXT_RAM;
1162 hc->hw.r_ram_sz = 1; 1162 hc->hw.r_ram_sz = 1;
1163 hc->Flen = 0x20; 1163 hc->Flen = 0x20;
@@ -1168,7 +1168,7 @@ init_chip(struct hfc_multi *hc)
1168 if (test_bit(HFC_CHIP_EXRAM_512, &hc->chip)) { 1168 if (test_bit(HFC_CHIP_EXRAM_512, &hc->chip)) {
1169 if (debug & DEBUG_HFCMULTI_INIT) 1169 if (debug & DEBUG_HFCMULTI_INIT)
1170 printk(KERN_DEBUG "%s: changing to 512K extenal RAM\n", 1170 printk(KERN_DEBUG "%s: changing to 512K extenal RAM\n",
1171 __func__); 1171 __func__);
1172 hc->hw.r_ctrl |= V_EXT_RAM; 1172 hc->hw.r_ctrl |= V_EXT_RAM;
1173 hc->hw.r_ram_sz = 2; 1173 hc->hw.r_ram_sz = 2;
1174 hc->Flen = 0x20; 1174 hc->Flen = 0x20;
@@ -1190,7 +1190,7 @@ init_chip(struct hfc_multi *hc)
1190 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 1190 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
1191 if (debug & DEBUG_HFCMULTI_PLXSD) 1191 if (debug & DEBUG_HFCMULTI_PLXSD)
1192 printk(KERN_DEBUG "%s: initializing PLXSD card %d\n", 1192 printk(KERN_DEBUG "%s: initializing PLXSD card %d\n",
1193 __func__, hc->id + 1); 1193 __func__, hc->id + 1);
1194 spin_lock_irqsave(&plx_lock, plx_flags); 1194 spin_lock_irqsave(&plx_lock, plx_flags);
1195 plx_acc_32 = hc->plx_membase + PLX_GPIOC; 1195 plx_acc_32 = hc->plx_membase + PLX_GPIOC;
1196 writel(PLX_GPIOC_INIT, plx_acc_32); 1196 writel(PLX_GPIOC_INIT, plx_acc_32);
@@ -1207,7 +1207,7 @@ init_chip(struct hfc_multi *hc)
1207 spin_unlock_irqrestore(&plx_lock, plx_flags); 1207 spin_unlock_irqrestore(&plx_lock, plx_flags);
1208 if (debug & DEBUG_HFCMULTI_INIT) 1208 if (debug & DEBUG_HFCMULTI_INIT)
1209 printk(KERN_DEBUG "%s: slave/term: PLX_GPIO=%x\n", 1209 printk(KERN_DEBUG "%s: slave/term: PLX_GPIO=%x\n",
1210 __func__, pv); 1210 __func__, pv);
1211 /* 1211 /*
1212 * If we are the 3rd PLXSD card or higher, we must turn 1212 * If we are the 3rd PLXSD card or higher, we must turn
1213 * termination of last PLXSD card off. 1213 * termination of last PLXSD card off.
@@ -1225,8 +1225,8 @@ init_chip(struct hfc_multi *hc)
1225 if (plx_count >= 3) { 1225 if (plx_count >= 3) {
1226 if (debug & DEBUG_HFCMULTI_PLXSD) 1226 if (debug & DEBUG_HFCMULTI_PLXSD)
1227 printk(KERN_DEBUG "%s: card %d is between, so " 1227 printk(KERN_DEBUG "%s: card %d is between, so "
1228 "we disable termination\n", 1228 "we disable termination\n",
1229 __func__, plx_last_hc->id + 1); 1229 __func__, plx_last_hc->id + 1);
1230 spin_lock_irqsave(&plx_lock, plx_flags); 1230 spin_lock_irqsave(&plx_lock, plx_flags);
1231 plx_acc_32 = plx_last_hc->plx_membase + PLX_GPIOC; 1231 plx_acc_32 = plx_last_hc->plx_membase + PLX_GPIOC;
1232 pv = readl(plx_acc_32); 1232 pv = readl(plx_acc_32);
@@ -1235,8 +1235,8 @@ init_chip(struct hfc_multi *hc)
1235 spin_unlock_irqrestore(&plx_lock, plx_flags); 1235 spin_unlock_irqrestore(&plx_lock, plx_flags);
1236 if (debug & DEBUG_HFCMULTI_INIT) 1236 if (debug & DEBUG_HFCMULTI_INIT)
1237 printk(KERN_DEBUG 1237 printk(KERN_DEBUG
1238 "%s: term off: PLX_GPIO=%x\n", 1238 "%s: term off: PLX_GPIO=%x\n",
1239 __func__, pv); 1239 __func__, pv);
1240 } 1240 }
1241 spin_unlock_irqrestore(&HFClock, hfc_flags); 1241 spin_unlock_irqrestore(&HFClock, hfc_flags);
1242 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ 1242 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */
@@ -1253,24 +1253,24 @@ init_chip(struct hfc_multi *hc)
1253 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { 1253 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) {
1254 if (debug & DEBUG_HFCMULTI_INIT) 1254 if (debug & DEBUG_HFCMULTI_INIT)
1255 printk(KERN_DEBUG "%s: setting PCM into slave mode\n", 1255 printk(KERN_DEBUG "%s: setting PCM into slave mode\n",
1256 __func__); 1256 __func__);
1257 } else 1257 } else
1258 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) && !plxsd_master) { 1258 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) && !plxsd_master) {
1259 if (debug & DEBUG_HFCMULTI_INIT) 1259 if (debug & DEBUG_HFCMULTI_INIT)
1260 printk(KERN_DEBUG "%s: setting PCM into master mode\n", 1260 printk(KERN_DEBUG "%s: setting PCM into master mode\n",
1261 __func__); 1261 __func__);
1262 hc->hw.r_pcm_md0 |= V_PCM_MD; 1262 hc->hw.r_pcm_md0 |= V_PCM_MD;
1263 } else { 1263 } else {
1264 if (debug & DEBUG_HFCMULTI_INIT) 1264 if (debug & DEBUG_HFCMULTI_INIT)
1265 printk(KERN_DEBUG "%s: performing PCM auto detect\n", 1265 printk(KERN_DEBUG "%s: performing PCM auto detect\n",
1266 __func__); 1266 __func__);
1267 } 1267 }
1268 1268
1269 /* soft reset */ 1269 /* soft reset */
1270 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl); 1270 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl);
1271 if (hc->ctype == HFC_TYPE_XHFC) 1271 if (hc->ctype == HFC_TYPE_XHFC)
1272 HFC_outb(hc, 0x0C /* R_FIFO_THRES */, 1272 HFC_outb(hc, 0x0C /* R_FIFO_THRES */,
1273 0x11 /* 16 Bytes TX/RX */); 1273 0x11 /* 16 Bytes TX/RX */);
1274 else 1274 else
1275 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); 1275 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz);
1276 HFC_outb(hc, R_FIFO_MD, 0); 1276 HFC_outb(hc, R_FIFO_MD, 0);
@@ -1298,13 +1298,13 @@ init_chip(struct hfc_multi *hc)
1298 pv |= PLX_SYNC_O_EN; 1298 pv |= PLX_SYNC_O_EN;
1299 if (debug & DEBUG_HFCMULTI_INIT) 1299 if (debug & DEBUG_HFCMULTI_INIT)
1300 printk(KERN_DEBUG "%s: master: PLX_GPIO=%x\n", 1300 printk(KERN_DEBUG "%s: master: PLX_GPIO=%x\n",
1301 __func__, pv); 1301 __func__, pv);
1302 } else { 1302 } else {
1303 pv &= ~(PLX_MASTER_EN | PLX_SLAVE_EN_N); 1303 pv &= ~(PLX_MASTER_EN | PLX_SLAVE_EN_N);
1304 pv &= ~PLX_SYNC_O_EN; 1304 pv &= ~PLX_SYNC_O_EN;
1305 if (debug & DEBUG_HFCMULTI_INIT) 1305 if (debug & DEBUG_HFCMULTI_INIT)
1306 printk(KERN_DEBUG "%s: slave: PLX_GPIO=%x\n", 1306 printk(KERN_DEBUG "%s: slave: PLX_GPIO=%x\n",
1307 __func__, pv); 1307 __func__, pv);
1308 } 1308 }
1309 writel(pv, plx_acc_32); 1309 writel(pv, plx_acc_32);
1310 spin_unlock_irqrestore(&plx_lock, plx_flags); 1310 spin_unlock_irqrestore(&plx_lock, plx_flags);
@@ -1338,7 +1338,7 @@ init_chip(struct hfc_multi *hc)
1338 if (test_bit(HFC_CHIP_CLOCK2, &hc->chip)) { 1338 if (test_bit(HFC_CHIP_CLOCK2, &hc->chip)) {
1339 if (debug & DEBUG_HFCMULTI_INIT) 1339 if (debug & DEBUG_HFCMULTI_INIT)
1340 printk(KERN_DEBUG 1340 printk(KERN_DEBUG
1341 "%s: setting double clock\n", __func__); 1341 "%s: setting double clock\n", __func__);
1342 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK); 1342 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK);
1343 } 1343 }
1344 1344
@@ -1360,48 +1360,48 @@ init_chip(struct hfc_multi *hc)
1360 val += HFC_inb(hc, R_F0_CNTH) << 8; 1360 val += HFC_inb(hc, R_F0_CNTH) << 8;
1361 if (debug & DEBUG_HFCMULTI_INIT) 1361 if (debug & DEBUG_HFCMULTI_INIT)
1362 printk(KERN_DEBUG 1362 printk(KERN_DEBUG
1363 "HFC_multi F0_CNT %ld after reset\n", val); 1363 "HFC_multi F0_CNT %ld after reset\n", val);
1364 spin_unlock_irqrestore(&hc->lock, flags); 1364 spin_unlock_irqrestore(&hc->lock, flags);
1365 set_current_state(TASK_UNINTERRUPTIBLE); 1365 set_current_state(TASK_UNINTERRUPTIBLE);
1366 schedule_timeout((HZ/100)?:1); /* Timeout minimum 10ms */ 1366 schedule_timeout((HZ / 100) ? : 1); /* Timeout minimum 10ms */
1367 spin_lock_irqsave(&hc->lock, flags); 1367 spin_lock_irqsave(&hc->lock, flags);
1368 val2 = HFC_inb(hc, R_F0_CNTL); 1368 val2 = HFC_inb(hc, R_F0_CNTL);
1369 val2 += HFC_inb(hc, R_F0_CNTH) << 8; 1369 val2 += HFC_inb(hc, R_F0_CNTH) << 8;
1370 if (debug & DEBUG_HFCMULTI_INIT) 1370 if (debug & DEBUG_HFCMULTI_INIT)
1371 printk(KERN_DEBUG 1371 printk(KERN_DEBUG
1372 "HFC_multi F0_CNT %ld after 10 ms (1st try)\n", 1372 "HFC_multi F0_CNT %ld after 10 ms (1st try)\n",
1373 val2); 1373 val2);
1374 if (val2 >= val+8) { /* 1 ms */ 1374 if (val2 >= val + 8) { /* 1 ms */
1375 /* it counts, so we keep the pcm mode */ 1375 /* it counts, so we keep the pcm mode */
1376 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) 1376 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip))
1377 printk(KERN_INFO "controller is PCM bus MASTER\n"); 1377 printk(KERN_INFO "controller is PCM bus MASTER\n");
1378 else 1378 else
1379 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) 1379 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip))
1380 printk(KERN_INFO "controller is PCM bus SLAVE\n"); 1380 printk(KERN_INFO "controller is PCM bus SLAVE\n");
1381 else { 1381 else {
1382 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); 1382 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip);
1383 printk(KERN_INFO "controller is PCM bus SLAVE " 1383 printk(KERN_INFO "controller is PCM bus SLAVE "
1384 "(auto detected)\n"); 1384 "(auto detected)\n");
1385 } 1385 }
1386 } else { 1386 } else {
1387 /* does not count */ 1387 /* does not count */
1388 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { 1388 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) {
1389controller_fail: 1389 controller_fail:
1390 printk(KERN_ERR "HFC_multi ERROR, getting no 125us " 1390 printk(KERN_ERR "HFC_multi ERROR, getting no 125us "
1391 "pulse. Seems that controller fails.\n"); 1391 "pulse. Seems that controller fails.\n");
1392 err = -EIO; 1392 err = -EIO;
1393 goto out; 1393 goto out;
1394 } 1394 }
1395 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { 1395 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) {
1396 printk(KERN_INFO "controller is PCM bus SLAVE " 1396 printk(KERN_INFO "controller is PCM bus SLAVE "
1397 "(ignoring missing PCM clock)\n"); 1397 "(ignoring missing PCM clock)\n");
1398 } else { 1398 } else {
1399 /* only one pcm master */ 1399 /* only one pcm master */
1400 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) 1400 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)
1401 && plxsd_master) { 1401 && plxsd_master) {
1402 printk(KERN_ERR "HFC_multi ERROR, no clock " 1402 printk(KERN_ERR "HFC_multi ERROR, no clock "
1403 "on another Speech Design card found. " 1403 "on another Speech Design card found. "
1404 "Please be sure to connect PCM cable.\n"); 1404 "Please be sure to connect PCM cable.\n");
1405 err = -EIO; 1405 err = -EIO;
1406 goto out; 1406 goto out;
1407 } 1407 }
@@ -1416,24 +1416,24 @@ controller_fail:
1416 spin_unlock_irqrestore(&plx_lock, plx_flags); 1416 spin_unlock_irqrestore(&plx_lock, plx_flags);
1417 if (debug & DEBUG_HFCMULTI_INIT) 1417 if (debug & DEBUG_HFCMULTI_INIT)
1418 printk(KERN_DEBUG "%s: master: " 1418 printk(KERN_DEBUG "%s: master: "
1419 "PLX_GPIO=%x\n", __func__, pv); 1419 "PLX_GPIO=%x\n", __func__, pv);
1420 } 1420 }
1421 hc->hw.r_pcm_md0 |= V_PCM_MD; 1421 hc->hw.r_pcm_md0 |= V_PCM_MD;
1422 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); 1422 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00);
1423 spin_unlock_irqrestore(&hc->lock, flags); 1423 spin_unlock_irqrestore(&hc->lock, flags);
1424 set_current_state(TASK_UNINTERRUPTIBLE); 1424 set_current_state(TASK_UNINTERRUPTIBLE);
1425 schedule_timeout((HZ/100)?:1); /* Timeout min. 10ms */ 1425 schedule_timeout((HZ / 100) ?: 1); /* Timeout min. 10ms */
1426 spin_lock_irqsave(&hc->lock, flags); 1426 spin_lock_irqsave(&hc->lock, flags);
1427 val2 = HFC_inb(hc, R_F0_CNTL); 1427 val2 = HFC_inb(hc, R_F0_CNTL);
1428 val2 += HFC_inb(hc, R_F0_CNTH) << 8; 1428 val2 += HFC_inb(hc, R_F0_CNTH) << 8;
1429 if (debug & DEBUG_HFCMULTI_INIT) 1429 if (debug & DEBUG_HFCMULTI_INIT)
1430 printk(KERN_DEBUG "HFC_multi F0_CNT %ld after " 1430 printk(KERN_DEBUG "HFC_multi F0_CNT %ld after "
1431 "10 ms (2nd try)\n", val2); 1431 "10 ms (2nd try)\n", val2);
1432 if (val2 >= val+8) { /* 1 ms */ 1432 if (val2 >= val + 8) { /* 1 ms */
1433 test_and_set_bit(HFC_CHIP_PCM_MASTER, 1433 test_and_set_bit(HFC_CHIP_PCM_MASTER,
1434 &hc->chip); 1434 &hc->chip);
1435 printk(KERN_INFO "controller is PCM bus MASTER " 1435 printk(KERN_INFO "controller is PCM bus MASTER "
1436 "(auto detected)\n"); 1436 "(auto detected)\n");
1437 } else 1437 } else
1438 goto controller_fail; 1438 goto controller_fail;
1439 } 1439 }
@@ -1451,21 +1451,21 @@ controller_fail:
1451 spin_unlock_irqrestore(&plx_lock, plx_flags); 1451 spin_unlock_irqrestore(&plx_lock, plx_flags);
1452 if (debug & DEBUG_HFCMULTI_INIT) 1452 if (debug & DEBUG_HFCMULTI_INIT)
1453 printk(KERN_DEBUG "%s: reset off: PLX_GPIO=%x\n", 1453 printk(KERN_DEBUG "%s: reset off: PLX_GPIO=%x\n",
1454 __func__, pv); 1454 __func__, pv);
1455 } 1455 }
1456 1456
1457 /* pcm id */ 1457 /* pcm id */
1458 if (hc->pcm) 1458 if (hc->pcm)
1459 printk(KERN_INFO "controller has given PCM BUS ID %d\n", 1459 printk(KERN_INFO "controller has given PCM BUS ID %d\n",
1460 hc->pcm); 1460 hc->pcm);
1461 else { 1461 else {
1462 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) 1462 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)
1463 || test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 1463 || test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
1464 PCM_cnt++; /* SD has proprietary bridging */ 1464 PCM_cnt++; /* SD has proprietary bridging */
1465 } 1465 }
1466 hc->pcm = PCM_cnt; 1466 hc->pcm = PCM_cnt;
1467 printk(KERN_INFO "controller has PCM BUS ID %d " 1467 printk(KERN_INFO "controller has PCM BUS ID %d "
1468 "(auto selected)\n", hc->pcm); 1468 "(auto selected)\n", hc->pcm);
1469 } 1469 }
1470 1470
1471 /* set up timer */ 1471 /* set up timer */
@@ -1480,7 +1480,7 @@ controller_fail:
1480 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) { 1480 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) {
1481 if (debug & DEBUG_HFCMULTI_INIT) 1481 if (debug & DEBUG_HFCMULTI_INIT)
1482 printk(KERN_DEBUG "%s: enabling DTMF detection " 1482 printk(KERN_DEBUG "%s: enabling DTMF detection "
1483 "for all B-channel\n", __func__); 1483 "for all B-channel\n", __func__);
1484 hc->hw.r_dtmf = V_DTMF_EN | V_DTMF_STOP; 1484 hc->hw.r_dtmf = V_DTMF_EN | V_DTMF_STOP;
1485 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) 1485 if (test_bit(HFC_CHIP_ULAW, &hc->chip))
1486 hc->hw.r_dtmf |= V_ULAW_SEL; 1486 hc->hw.r_dtmf |= V_ULAW_SEL;
@@ -1527,8 +1527,8 @@ controller_fail:
1527 if (hc->masterclk >= 0) { 1527 if (hc->masterclk >= 0) {
1528 if (debug & DEBUG_HFCMULTI_INIT) 1528 if (debug & DEBUG_HFCMULTI_INIT)
1529 printk(KERN_DEBUG "%s: setting ST master clock " 1529 printk(KERN_DEBUG "%s: setting ST master clock "
1530 "to port %d (0..%d)\n", 1530 "to port %d (0..%d)\n",
1531 __func__, hc->masterclk, hc->ports-1); 1531 __func__, hc->masterclk, hc->ports - 1);
1532 hc->hw.r_st_sync |= (hc->masterclk | V_AUTO_SYNC); 1532 hc->hw.r_st_sync |= (hc->masterclk | V_AUTO_SYNC);
1533 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); 1533 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync);
1534 } 1534 }
@@ -1539,7 +1539,7 @@ controller_fail:
1539 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc); 1539 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc);
1540 if (debug & DEBUG_HFCMULTI_INIT) 1540 if (debug & DEBUG_HFCMULTI_INIT)
1541 printk(KERN_DEBUG "r_irqmsk_misc.2: 0x%x\n", 1541 printk(KERN_DEBUG "r_irqmsk_misc.2: 0x%x\n",
1542 hc->hw.r_irqmsk_misc); 1542 hc->hw.r_irqmsk_misc);
1543 1543
1544 /* RAM access test */ 1544 /* RAM access test */
1545 HFC_outb(hc, R_RAM_ADDR0, 0); 1545 HFC_outb(hc, R_RAM_ADDR0, 0);
@@ -1547,7 +1547,7 @@ controller_fail:
1547 HFC_outb(hc, R_RAM_ADDR2, 0); 1547 HFC_outb(hc, R_RAM_ADDR2, 0);
1548 for (i = 0; i < 256; i++) { 1548 for (i = 0; i < 256; i++) {
1549 HFC_outb_nodebug(hc, R_RAM_ADDR0, i); 1549 HFC_outb_nodebug(hc, R_RAM_ADDR0, i);
1550 HFC_outb_nodebug(hc, R_RAM_DATA, ((i*3)&0xff)); 1550 HFC_outb_nodebug(hc, R_RAM_DATA, ((i * 3) & 0xff));
1551 } 1551 }
1552 for (i = 0; i < 256; i++) { 1552 for (i = 0; i < 256; i++) {
1553 HFC_outb_nodebug(hc, R_RAM_ADDR0, i); 1553 HFC_outb_nodebug(hc, R_RAM_ADDR0, i);
@@ -1555,8 +1555,8 @@ controller_fail:
1555 rval = HFC_inb_nodebug(hc, R_INT_DATA); 1555 rval = HFC_inb_nodebug(hc, R_INT_DATA);
1556 if (rval != ((i * 3) & 0xff)) { 1556 if (rval != ((i * 3) & 0xff)) {
1557 printk(KERN_DEBUG 1557 printk(KERN_DEBUG
1558 "addr:%x val:%x should:%x\n", i, rval, 1558 "addr:%x val:%x should:%x\n", i, rval,
1559 (i * 3) & 0xff); 1559 (i * 3) & 0xff);
1560 err++; 1560 err++;
1561 } 1561 }
1562 } 1562 }
@@ -1585,9 +1585,9 @@ hfcmulti_watchdog(struct hfc_multi *hc)
1585 if (hc->wdcount > 10) { 1585 if (hc->wdcount > 10) {
1586 hc->wdcount = 0; 1586 hc->wdcount = 0;
1587 hc->wdbyte = hc->wdbyte == V_GPIO_OUT2 ? 1587 hc->wdbyte = hc->wdbyte == V_GPIO_OUT2 ?
1588 V_GPIO_OUT3 : V_GPIO_OUT2; 1588 V_GPIO_OUT3 : V_GPIO_OUT2;
1589 1589
1590 /* printk("Sending Watchdog Kill %x\n",hc->wdbyte); */ 1590 /* printk("Sending Watchdog Kill %x\n",hc->wdbyte); */
1591 HFC_outb(hc, R_GPIO_EN0, V_GPIO_EN2 | V_GPIO_EN3); 1591 HFC_outb(hc, R_GPIO_EN0, V_GPIO_EN2 | V_GPIO_EN3);
1592 HFC_outb(hc, R_GPIO_OUT0, hc->wdbyte); 1592 HFC_outb(hc, R_GPIO_OUT0, hc->wdbyte);
1593 } 1593 }
@@ -1623,10 +1623,10 @@ hfcmulti_leds(struct hfc_multi *hc)
1623 */ 1623 */
1624 if (hc->chan[hc->dslot].sync != 2) { /* no frame sync */ 1624 if (hc->chan[hc->dslot].sync != 2) { /* no frame sync */
1625 if (hc->chan[hc->dslot].dch->dev.D.protocol 1625 if (hc->chan[hc->dslot].dch->dev.D.protocol
1626 != ISDN_P_NT_E1) { 1626 != ISDN_P_NT_E1) {
1627 led[0] = 1; 1627 led[0] = 1;
1628 led[1] = 1; 1628 led[1] = 1;
1629 } else if (hc->ledcount>>11) { 1629 } else if (hc->ledcount >> 11) {
1630 led[0] = 1; 1630 led[0] = 1;
1631 led[1] = 1; 1631 led[1] = 1;
1632 } else { 1632 } else {
@@ -1643,7 +1643,7 @@ hfcmulti_leds(struct hfc_multi *hc)
1643 led[3] = 1; 1643 led[3] = 1;
1644 } 1644 }
1645 leds = (led[0] | (led[1]<<2) | (led[2]<<1) | (led[3]<<3))^0xF; 1645 leds = (led[0] | (led[1]<<2) | (led[2]<<1) | (led[3]<<3))^0xF;
1646 /* leds are inverted */ 1646 /* leds are inverted */
1647 if (leds != (int)hc->ledstate) { 1647 if (leds != (int)hc->ledstate) {
1648 HFC_outb_nodebug(hc, R_GPIO_OUT1, leds); 1648 HFC_outb_nodebug(hc, R_GPIO_OUT1, leds);
1649 hc->ledstate = leds; 1649 hc->ledstate = leds;
@@ -1674,7 +1674,7 @@ hfcmulti_leds(struct hfc_multi *hc)
1674 /* TE mode: led red */ 1674 /* TE mode: led red */
1675 led[i] = 2; 1675 led[i] = 2;
1676 else 1676 else
1677 if (hc->ledcount>>11) 1677 if (hc->ledcount >> 11)
1678 /* led red */ 1678 /* led red */
1679 led[i] = 2; 1679 led[i] = 2;
1680 else 1680 else
@@ -1700,9 +1700,9 @@ hfcmulti_leds(struct hfc_multi *hc)
1700 } 1700 }
1701 } else { 1701 } else {
1702 leds = ((led[3] > 0) << 0) | ((led[1] > 0) << 1) | 1702 leds = ((led[3] > 0) << 0) | ((led[1] > 0) << 1) |
1703 ((led[0] > 0) << 2) | ((led[2] > 0) << 3) | 1703 ((led[0] > 0) << 2) | ((led[2] > 0) << 3) |
1704 ((led[3] & 1) << 4) | ((led[1] & 1) << 5) | 1704 ((led[3] & 1) << 4) | ((led[1] & 1) << 5) |
1705 ((led[0] & 1) << 6) | ((led[2] & 1) << 7); 1705 ((led[0] & 1) << 6) | ((led[2] & 1) << 7);
1706 if (leds != (int)hc->ledstate) { 1706 if (leds != (int)hc->ledstate) {
1707 HFC_outb_nodebug(hc, R_GPIO_EN1, leds & 0x0F); 1707 HFC_outb_nodebug(hc, R_GPIO_EN1, leds & 0x0F);
1708 HFC_outb_nodebug(hc, R_GPIO_OUT1, leds >> 4); 1708 HFC_outb_nodebug(hc, R_GPIO_OUT1, leds >> 4);
@@ -1746,13 +1746,13 @@ hfcmulti_leds(struct hfc_multi *hc)
1746 } 1746 }
1747 1747
1748 1748
1749 leds = (led[0] > 0) | ((led[1] > 0)<<1) | ((led[0]&1)<<2) 1749 leds = (led[0] > 0) | ((led[1] > 0) << 1) | ((led[0]&1) << 2)
1750 | ((led[1]&1)<<3); 1750 | ((led[1]&1) << 3);
1751 if (leds != (int)hc->ledstate) { 1751 if (leds != (int)hc->ledstate) {
1752 HFC_outb_nodebug(hc, R_GPIO_EN1, 1752 HFC_outb_nodebug(hc, R_GPIO_EN1,
1753 ((led[0] > 0) << 2) | ((led[1] > 0) << 3)); 1753 ((led[0] > 0) << 2) | ((led[1] > 0) << 3));
1754 HFC_outb_nodebug(hc, R_GPIO_OUT1, 1754 HFC_outb_nodebug(hc, R_GPIO_OUT1,
1755 ((led[0] & 1) << 2) | ((led[1] & 1) << 3)); 1755 ((led[0] & 1) << 2) | ((led[1] & 1) << 3));
1756 hc->ledstate = leds; 1756 hc->ledstate = leds;
1757 } 1757 }
1758 break; 1758 break;
@@ -1784,7 +1784,7 @@ hfcmulti_leds(struct hfc_multi *hc)
1784 leddw = lled << 24 | lled << 16 | lled << 8 | lled; 1784 leddw = lled << 24 | lled << 16 | lled << 8 | lled;
1785 if (leddw != hc->ledstate) { 1785 if (leddw != hc->ledstate) {
1786 /* HFC_outb(hc, R_BRG_PCM_CFG, 1); 1786 /* HFC_outb(hc, R_BRG_PCM_CFG, 1);
1787 HFC_outb(c, R_BRG_PCM_CFG, (0x0 << 6) | 0x3); */ 1787 HFC_outb(c, R_BRG_PCM_CFG, (0x0 << 6) | 0x3); */
1788 /* was _io before */ 1788 /* was _io before */
1789 HFC_outb_nodebug(hc, R_BRG_PCM_CFG, 1 | V_PCM_CLK); 1789 HFC_outb_nodebug(hc, R_BRG_PCM_CFG, 1 | V_PCM_CLK);
1790 outw(0x4000, hc->pci_iobase + 4); 1790 outw(0x4000, hc->pci_iobase + 4);
@@ -1826,16 +1826,16 @@ hfcmulti_dtmf(struct hfc_multi *hc)
1826 continue; 1826 continue;
1827 if (debug & DEBUG_HFCMULTI_DTMF) 1827 if (debug & DEBUG_HFCMULTI_DTMF)
1828 printk(KERN_DEBUG "%s: dtmf channel %d:", 1828 printk(KERN_DEBUG "%s: dtmf channel %d:",
1829 __func__, ch); 1829 __func__, ch);
1830 coeff = &(hc->chan[ch].coeff[hc->chan[ch].coeff_count * 16]); 1830 coeff = &(hc->chan[ch].coeff[hc->chan[ch].coeff_count * 16]);
1831 dtmf = 1; 1831 dtmf = 1;
1832 for (co = 0; co < 8; co++) { 1832 for (co = 0; co < 8; co++) {
1833 /* read W(n-1) coefficient */ 1833 /* read W(n-1) coefficient */
1834 addr = hc->DTMFbase + ((co<<7) | (ch<<2)); 1834 addr = hc->DTMFbase + ((co << 7) | (ch << 2));
1835 HFC_outb_nodebug(hc, R_RAM_ADDR0, addr); 1835 HFC_outb_nodebug(hc, R_RAM_ADDR0, addr);
1836 HFC_outb_nodebug(hc, R_RAM_ADDR1, addr>>8); 1836 HFC_outb_nodebug(hc, R_RAM_ADDR1, addr >> 8);
1837 HFC_outb_nodebug(hc, R_RAM_ADDR2, (addr>>16) 1837 HFC_outb_nodebug(hc, R_RAM_ADDR2, (addr >> 16)
1838 | V_ADDR_INC); 1838 | V_ADDR_INC);
1839 w_float = HFC_inb_nodebug(hc, R_RAM_DATA); 1839 w_float = HFC_inb_nodebug(hc, R_RAM_DATA);
1840 w_float |= (HFC_inb_nodebug(hc, R_RAM_DATA) << 8); 1840 w_float |= (HFC_inb_nodebug(hc, R_RAM_DATA) << 8);
1841 if (debug & DEBUG_HFCMULTI_DTMF) 1841 if (debug & DEBUG_HFCMULTI_DTMF)
@@ -1845,14 +1845,14 @@ hfcmulti_dtmf(struct hfc_multi *hc)
1845 mantissa = w_float & 0x0fff; 1845 mantissa = w_float & 0x0fff;
1846 if (w_float & 0x8000) 1846 if (w_float & 0x8000)
1847 mantissa |= 0xfffff000; 1847 mantissa |= 0xfffff000;
1848 exponent = (w_float>>12) & 0x7; 1848 exponent = (w_float >> 12) & 0x7;
1849 if (exponent) { 1849 if (exponent) {
1850 mantissa ^= 0x1000; 1850 mantissa ^= 0x1000;
1851 mantissa <<= (exponent-1); 1851 mantissa <<= (exponent - 1);
1852 } 1852 }
1853 1853
1854 /* store coefficient */ 1854 /* store coefficient */
1855 coeff[co<<1] = mantissa; 1855 coeff[co << 1] = mantissa;
1856 1856
1857 /* read W(n) coefficient */ 1857 /* read W(n) coefficient */
1858 w_float = HFC_inb_nodebug(hc, R_RAM_DATA); 1858 w_float = HFC_inb_nodebug(hc, R_RAM_DATA);
@@ -1864,27 +1864,27 @@ hfcmulti_dtmf(struct hfc_multi *hc)
1864 mantissa = w_float & 0x0fff; 1864 mantissa = w_float & 0x0fff;
1865 if (w_float & 0x8000) 1865 if (w_float & 0x8000)
1866 mantissa |= 0xfffff000; 1866 mantissa |= 0xfffff000;
1867 exponent = (w_float>>12) & 0x7; 1867 exponent = (w_float >> 12) & 0x7;
1868 if (exponent) { 1868 if (exponent) {
1869 mantissa ^= 0x1000; 1869 mantissa ^= 0x1000;
1870 mantissa <<= (exponent-1); 1870 mantissa <<= (exponent - 1);
1871 } 1871 }
1872 1872
1873 /* store coefficient */ 1873 /* store coefficient */
1874 coeff[(co<<1)|1] = mantissa; 1874 coeff[(co << 1) | 1] = mantissa;
1875 } 1875 }
1876 if (debug & DEBUG_HFCMULTI_DTMF) 1876 if (debug & DEBUG_HFCMULTI_DTMF)
1877 printk(" DTMF ready %08x %08x %08x %08x " 1877 printk(" DTMF ready %08x %08x %08x %08x "
1878 "%08x %08x %08x %08x\n", 1878 "%08x %08x %08x %08x\n",
1879 coeff[0], coeff[1], coeff[2], coeff[3], 1879 coeff[0], coeff[1], coeff[2], coeff[3],
1880 coeff[4], coeff[5], coeff[6], coeff[7]); 1880 coeff[4], coeff[5], coeff[6], coeff[7]);
1881 hc->chan[ch].coeff_count++; 1881 hc->chan[ch].coeff_count++;
1882 if (hc->chan[ch].coeff_count == 8) { 1882 if (hc->chan[ch].coeff_count == 8) {
1883 hc->chan[ch].coeff_count = 0; 1883 hc->chan[ch].coeff_count = 0;
1884 skb = mI_alloc_skb(512, GFP_ATOMIC); 1884 skb = mI_alloc_skb(512, GFP_ATOMIC);
1885 if (!skb) { 1885 if (!skb) {
1886 printk(KERN_DEBUG "%s: No memory for skb\n", 1886 printk(KERN_DEBUG "%s: No memory for skb\n",
1887 __func__); 1887 __func__);
1888 continue; 1888 continue;
1889 } 1889 }
1890 hh = mISDN_HEAD_P(skb); 1890 hh = mISDN_HEAD_P(skb);
@@ -1966,8 +1966,8 @@ next_frame:
1966 while (f2 != (temp = HFC_inb_nodebug(hc, A_F2))) { 1966 while (f2 != (temp = HFC_inb_nodebug(hc, A_F2))) {
1967 if (debug & DEBUG_HFCMULTI_FIFO) 1967 if (debug & DEBUG_HFCMULTI_FIFO)
1968 printk(KERN_DEBUG 1968 printk(KERN_DEBUG
1969 "%s(card %d): reread f2 because %d!=%d\n", 1969 "%s(card %d): reread f2 because %d!=%d\n",
1970 __func__, hc->id + 1, temp, f2); 1970 __func__, hc->id + 1, temp, f2);
1971 f2 = temp; /* repeat until F2 is equal */ 1971 f2 = temp; /* repeat until F2 is equal */
1972 } 1972 }
1973 Fspace = f2 - f1 - 1; 1973 Fspace = f2 - f1 - 1;
@@ -1999,7 +1999,7 @@ next_frame:
1999 while (z2 != (temp = (HFC_inw_nodebug(hc, A_Z2) - hc->Zmin))) { 1999 while (z2 != (temp = (HFC_inw_nodebug(hc, A_Z2) - hc->Zmin))) {
2000 if (debug & DEBUG_HFCMULTI_FIFO) 2000 if (debug & DEBUG_HFCMULTI_FIFO)
2001 printk(KERN_DEBUG "%s(card %d): reread z2 because " 2001 printk(KERN_DEBUG "%s(card %d): reread z2 because "
2002 "%d!=%d\n", __func__, hc->id + 1, temp, z2); 2002 "%d!=%d\n", __func__, hc->id + 1, temp, z2);
2003 z2 = temp; /* repeat unti Z2 is equal */ 2003 z2 = temp; /* repeat unti Z2 is equal */
2004 } 2004 }
2005 hc->chan[ch].Zfill = z1 - z2; 2005 hc->chan[ch].Zfill = z1 - z2;
@@ -2023,28 +2023,28 @@ next_frame:
2023 *txpending && slot_tx >= 0) { 2023 *txpending && slot_tx >= 0) {
2024 if (debug & DEBUG_HFCMULTI_MODE) 2024 if (debug & DEBUG_HFCMULTI_MODE)
2025 printk(KERN_DEBUG 2025 printk(KERN_DEBUG
2026 "%s: reconnecting PCM due to no " 2026 "%s: reconnecting PCM due to no "
2027 "more FIFO data: channel %d " 2027 "more FIFO data: channel %d "
2028 "slot_tx %d\n", 2028 "slot_tx %d\n",
2029 __func__, ch, slot_tx); 2029 __func__, ch, slot_tx);
2030 /* connect slot */ 2030 /* connect slot */
2031 if (hc->ctype == HFC_TYPE_XHFC) 2031 if (hc->ctype == HFC_TYPE_XHFC)
2032 HFC_outb(hc, A_CON_HDLC, 0xc0 2032 HFC_outb(hc, A_CON_HDLC, 0xc0
2033 | 0x07 << 2 | V_HDLC_TRP | V_IFF); 2033 | 0x07 << 2 | V_HDLC_TRP | V_IFF);
2034 /* Enable FIFO, no interrupt */ 2034 /* Enable FIFO, no interrupt */
2035 else 2035 else
2036 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 | 2036 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 |
2037 V_HDLC_TRP | V_IFF); 2037 V_HDLC_TRP | V_IFF);
2038 HFC_outb_nodebug(hc, R_FIFO, ch<<1 | 1); 2038 HFC_outb_nodebug(hc, R_FIFO, ch << 1 | 1);
2039 HFC_wait_nodebug(hc); 2039 HFC_wait_nodebug(hc);
2040 if (hc->ctype == HFC_TYPE_XHFC) 2040 if (hc->ctype == HFC_TYPE_XHFC)
2041 HFC_outb(hc, A_CON_HDLC, 0xc0 2041 HFC_outb(hc, A_CON_HDLC, 0xc0
2042 | 0x07 << 2 | V_HDLC_TRP | V_IFF); 2042 | 0x07 << 2 | V_HDLC_TRP | V_IFF);
2043 /* Enable FIFO, no interrupt */ 2043 /* Enable FIFO, no interrupt */
2044 else 2044 else
2045 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 | 2045 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 |
2046 V_HDLC_TRP | V_IFF); 2046 V_HDLC_TRP | V_IFF);
2047 HFC_outb_nodebug(hc, R_FIFO, ch<<1); 2047 HFC_outb_nodebug(hc, R_FIFO, ch << 1);
2048 HFC_wait_nodebug(hc); 2048 HFC_wait_nodebug(hc);
2049 } 2049 }
2050 *txpending = 0; 2050 *txpending = 0;
@@ -2054,10 +2054,10 @@ next_frame:
2054 2054
2055 /* "fill fifo if empty" feature */ 2055 /* "fill fifo if empty" feature */
2056 if (bch && test_bit(FLG_FILLEMPTY, &bch->Flags) 2056 if (bch && test_bit(FLG_FILLEMPTY, &bch->Flags)
2057 && !test_bit(FLG_HDLC, &bch->Flags) && z2 == z1) { 2057 && !test_bit(FLG_HDLC, &bch->Flags) && z2 == z1) {
2058 if (debug & DEBUG_HFCMULTI_FILL) 2058 if (debug & DEBUG_HFCMULTI_FILL)
2059 printk(KERN_DEBUG "%s: buffer empty, so we have " 2059 printk(KERN_DEBUG "%s: buffer empty, so we have "
2060 "underrun\n", __func__); 2060 "underrun\n", __func__);
2061 /* fill buffer, to prevent future underrun */ 2061 /* fill buffer, to prevent future underrun */
2062 hc->write_fifo(hc, hc->silence_data, poll >> 1); 2062 hc->write_fifo(hc, hc->silence_data, poll >> 1);
2063 Zspace -= (poll >> 1); 2063 Zspace -= (poll >> 1);
@@ -2065,29 +2065,29 @@ next_frame:
2065 2065
2066 /* if audio data and connected slot */ 2066 /* if audio data and connected slot */
2067 if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && (!*txpending) 2067 if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && (!*txpending)
2068 && slot_tx >= 0) { 2068 && slot_tx >= 0) {
2069 if (debug & DEBUG_HFCMULTI_MODE) 2069 if (debug & DEBUG_HFCMULTI_MODE)
2070 printk(KERN_DEBUG "%s: disconnecting PCM due to " 2070 printk(KERN_DEBUG "%s: disconnecting PCM due to "
2071 "FIFO data: channel %d slot_tx %d\n", 2071 "FIFO data: channel %d slot_tx %d\n",
2072 __func__, ch, slot_tx); 2072 __func__, ch, slot_tx);
2073 /* disconnect slot */ 2073 /* disconnect slot */
2074 if (hc->ctype == HFC_TYPE_XHFC) 2074 if (hc->ctype == HFC_TYPE_XHFC)
2075 HFC_outb(hc, A_CON_HDLC, 0x80 2075 HFC_outb(hc, A_CON_HDLC, 0x80
2076 | 0x07 << 2 | V_HDLC_TRP | V_IFF); 2076 | 0x07 << 2 | V_HDLC_TRP | V_IFF);
2077 /* Enable FIFO, no interrupt */ 2077 /* Enable FIFO, no interrupt */
2078 else 2078 else
2079 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 | 2079 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 |
2080 V_HDLC_TRP | V_IFF); 2080 V_HDLC_TRP | V_IFF);
2081 HFC_outb_nodebug(hc, R_FIFO, ch<<1 | 1); 2081 HFC_outb_nodebug(hc, R_FIFO, ch << 1 | 1);
2082 HFC_wait_nodebug(hc); 2082 HFC_wait_nodebug(hc);
2083 if (hc->ctype == HFC_TYPE_XHFC) 2083 if (hc->ctype == HFC_TYPE_XHFC)
2084 HFC_outb(hc, A_CON_HDLC, 0x80 2084 HFC_outb(hc, A_CON_HDLC, 0x80
2085 | 0x07 << 2 | V_HDLC_TRP | V_IFF); 2085 | 0x07 << 2 | V_HDLC_TRP | V_IFF);
2086 /* Enable FIFO, no interrupt */ 2086 /* Enable FIFO, no interrupt */
2087 else 2087 else
2088 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 | 2088 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 |
2089 V_HDLC_TRP | V_IFF); 2089 V_HDLC_TRP | V_IFF);
2090 HFC_outb_nodebug(hc, R_FIFO, ch<<1); 2090 HFC_outb_nodebug(hc, R_FIFO, ch << 1);
2091 HFC_wait_nodebug(hc); 2091 HFC_wait_nodebug(hc);
2092 } 2092 }
2093 *txpending = 1; 2093 *txpending = 1;
@@ -2107,9 +2107,9 @@ next_frame:
2107 ii = Zspace + i; 2107 ii = Zspace + i;
2108 if (debug & DEBUG_HFCMULTI_FIFO) 2108 if (debug & DEBUG_HFCMULTI_FIFO)
2109 printk(KERN_DEBUG "%s(card %d): fifo(%d) has %d bytes space " 2109 printk(KERN_DEBUG "%s(card %d): fifo(%d) has %d bytes space "
2110 "left (z1=%04x, z2=%04x) sending %d of %d bytes %s\n", 2110 "left (z1=%04x, z2=%04x) sending %d of %d bytes %s\n",
2111 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i, 2111 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i,
2112 temp ? "HDLC" : "TRANS"); 2112 temp ? "HDLC" : "TRANS");
2113 2113
2114 /* Have to prep the audio data */ 2114 /* Have to prep the audio data */
2115 hc->write_fifo(hc, d, ii - i); 2115 hc->write_fifo(hc, d, ii - i);
@@ -2189,9 +2189,9 @@ next_frame:
2189 (hc->chan[ch].protocol == ISDN_P_B_RAW) && 2189 (hc->chan[ch].protocol == ISDN_P_B_RAW) &&
2190 (hc->chan[ch].slot_rx < 0) && 2190 (hc->chan[ch].slot_rx < 0) &&
2191 (hc->chan[ch].slot_tx < 0)) 2191 (hc->chan[ch].slot_tx < 0))
2192 HFC_outb_nodebug(hc, R_FIFO, 0x20 | (ch<<1) | 1); 2192 HFC_outb_nodebug(hc, R_FIFO, 0x20 | (ch << 1) | 1);
2193 else 2193 else
2194 HFC_outb_nodebug(hc, R_FIFO, (ch<<1)|1); 2194 HFC_outb_nodebug(hc, R_FIFO, (ch << 1) | 1);
2195 HFC_wait_nodebug(hc); 2195 HFC_wait_nodebug(hc);
2196 2196
2197 /* ignore if rx is off BUT change fifo (above) to start pending TX */ 2197 /* ignore if rx is off BUT change fifo (above) to start pending TX */
@@ -2203,8 +2203,8 @@ next_frame:
2203 while (f1 != (temp = HFC_inb_nodebug(hc, A_F1))) { 2203 while (f1 != (temp = HFC_inb_nodebug(hc, A_F1))) {
2204 if (debug & DEBUG_HFCMULTI_FIFO) 2204 if (debug & DEBUG_HFCMULTI_FIFO)
2205 printk(KERN_DEBUG 2205 printk(KERN_DEBUG
2206 "%s(card %d): reread f1 because %d!=%d\n", 2206 "%s(card %d): reread f1 because %d!=%d\n",
2207 __func__, hc->id + 1, temp, f1); 2207 __func__, hc->id + 1, temp, f1);
2208 f1 = temp; /* repeat until F1 is equal */ 2208 f1 = temp; /* repeat until F1 is equal */
2209 } 2209 }
2210 f2 = HFC_inb_nodebug(hc, A_F2); 2210 f2 = HFC_inb_nodebug(hc, A_F2);
@@ -2213,7 +2213,7 @@ next_frame:
2213 while (z1 != (temp = (HFC_inw_nodebug(hc, A_Z1) - hc->Zmin))) { 2213 while (z1 != (temp = (HFC_inw_nodebug(hc, A_Z1) - hc->Zmin))) {
2214 if (debug & DEBUG_HFCMULTI_FIFO) 2214 if (debug & DEBUG_HFCMULTI_FIFO)
2215 printk(KERN_DEBUG "%s(card %d): reread z2 because " 2215 printk(KERN_DEBUG "%s(card %d): reread z2 because "
2216 "%d!=%d\n", __func__, hc->id + 1, temp, z2); 2216 "%d!=%d\n", __func__, hc->id + 1, temp, z2);
2217 z1 = temp; /* repeat until Z1 is equal */ 2217 z1 = temp; /* repeat until Z1 is equal */
2218 } 2218 }
2219 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; 2219 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin;
@@ -2231,7 +2231,7 @@ next_frame:
2231 *sp = mI_alloc_skb(maxlen + 3, GFP_ATOMIC); 2231 *sp = mI_alloc_skb(maxlen + 3, GFP_ATOMIC);
2232 if (*sp == NULL) { 2232 if (*sp == NULL) {
2233 printk(KERN_DEBUG "%s: No mem for rx_skb\n", 2233 printk(KERN_DEBUG "%s: No mem for rx_skb\n",
2234 __func__); 2234 __func__);
2235 return; 2235 return;
2236 } 2236 }
2237 } 2237 }
@@ -2242,16 +2242,16 @@ next_frame:
2242 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { 2242 if (dch || test_bit(FLG_HDLC, &bch->Flags)) {
2243 if (debug & DEBUG_HFCMULTI_FIFO) 2243 if (debug & DEBUG_HFCMULTI_FIFO)
2244 printk(KERN_DEBUG "%s(card %d): fifo(%d) reading %d " 2244 printk(KERN_DEBUG "%s(card %d): fifo(%d) reading %d "
2245 "bytes (z1=%04x, z2=%04x) HDLC %s (f1=%d, f2=%d) " 2245 "bytes (z1=%04x, z2=%04x) HDLC %s (f1=%d, f2=%d) "
2246 "got=%d (again %d)\n", __func__, hc->id + 1, ch, 2246 "got=%d (again %d)\n", __func__, hc->id + 1, ch,
2247 Zsize, z1, z2, (f1 == f2) ? "fragment" : "COMPLETE", 2247 Zsize, z1, z2, (f1 == f2) ? "fragment" : "COMPLETE",
2248 f1, f2, Zsize + (*sp)->len, again); 2248 f1, f2, Zsize + (*sp)->len, again);
2249 /* HDLC */ 2249 /* HDLC */
2250 if ((Zsize + (*sp)->len) > (maxlen + 3)) { 2250 if ((Zsize + (*sp)->len) > (maxlen + 3)) {
2251 if (debug & DEBUG_HFCMULTI_FIFO) 2251 if (debug & DEBUG_HFCMULTI_FIFO)
2252 printk(KERN_DEBUG 2252 printk(KERN_DEBUG
2253 "%s(card %d): hdlc-frame too large.\n", 2253 "%s(card %d): hdlc-frame too large.\n",
2254 __func__, hc->id + 1); 2254 __func__, hc->id + 1);
2255 skb_trim(*sp, 0); 2255 skb_trim(*sp, 0);
2256 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_RES_F); 2256 HFC_outb_nodebug(hc, R_INC_RES_FIFO, V_RES_F);
2257 HFC_wait_nodebug(hc); 2257 HFC_wait_nodebug(hc);
@@ -2268,8 +2268,8 @@ next_frame:
2268 if ((*sp)->len < 4) { 2268 if ((*sp)->len < 4) {
2269 if (debug & DEBUG_HFCMULTI_FIFO) 2269 if (debug & DEBUG_HFCMULTI_FIFO)
2270 printk(KERN_DEBUG 2270 printk(KERN_DEBUG
2271 "%s(card %d): Frame below minimum " 2271 "%s(card %d): Frame below minimum "
2272 "size\n", __func__, hc->id + 1); 2272 "size\n", __func__, hc->id + 1);
2273 skb_trim(*sp, 0); 2273 skb_trim(*sp, 0);
2274 goto next_frame; 2274 goto next_frame;
2275 } 2275 }
@@ -2277,7 +2277,7 @@ next_frame:
2277 if ((*sp)->data[(*sp)->len - 1]) { 2277 if ((*sp)->data[(*sp)->len - 1]) {
2278 if (debug & DEBUG_HFCMULTI_CRC) 2278 if (debug & DEBUG_HFCMULTI_CRC)
2279 printk(KERN_DEBUG 2279 printk(KERN_DEBUG
2280 "%s: CRC-error\n", __func__); 2280 "%s: CRC-error\n", __func__);
2281 skb_trim(*sp, 0); 2281 skb_trim(*sp, 0);
2282 goto next_frame; 2282 goto next_frame;
2283 } 2283 }
@@ -2287,11 +2287,11 @@ next_frame:
2287 *sp = mI_alloc_skb(skb->len, GFP_ATOMIC); 2287 *sp = mI_alloc_skb(skb->len, GFP_ATOMIC);
2288 if (*sp) { 2288 if (*sp) {
2289 memcpy(skb_put(*sp, skb->len), 2289 memcpy(skb_put(*sp, skb->len),
2290 skb->data, skb->len); 2290 skb->data, skb->len);
2291 skb_trim(skb, 0); 2291 skb_trim(skb, 0);
2292 } else { 2292 } else {
2293 printk(KERN_DEBUG "%s: No mem\n", 2293 printk(KERN_DEBUG "%s: No mem\n",
2294 __func__); 2294 __func__);
2295 *sp = skb; 2295 *sp = skb;
2296 skb = NULL; 2296 skb = NULL;
2297 } 2297 }
@@ -2300,7 +2300,7 @@ next_frame:
2300 } 2300 }
2301 if (debug & DEBUG_HFCMULTI_FIFO) { 2301 if (debug & DEBUG_HFCMULTI_FIFO) {
2302 printk(KERN_DEBUG "%s(card %d):", 2302 printk(KERN_DEBUG "%s(card %d):",
2303 __func__, hc->id + 1); 2303 __func__, hc->id + 1);
2304 temp = 0; 2304 temp = 0;
2305 while (temp < (*sp)->len) 2305 while (temp < (*sp)->len)
2306 printk(" %02x", (*sp)->data[temp++]); 2306 printk(" %02x", (*sp)->data[temp++]);
@@ -2325,7 +2325,7 @@ next_frame:
2325 *sp = mI_alloc_skb(skb->len, GFP_ATOMIC); 2325 *sp = mI_alloc_skb(skb->len, GFP_ATOMIC);
2326 if (*sp) { 2326 if (*sp) {
2327 memcpy(skb_put(*sp, skb->len), 2327 memcpy(skb_put(*sp, skb->len),
2328 skb->data, skb->len); 2328 skb->data, skb->len);
2329 skb_trim(skb, 0); 2329 skb_trim(skb, 0);
2330 } else { 2330 } else {
2331 printk(KERN_DEBUG "%s: No mem\n", __func__); 2331 printk(KERN_DEBUG "%s: No mem\n", __func__);
@@ -2337,9 +2337,9 @@ next_frame:
2337 } 2337 }
2338 if (debug & DEBUG_HFCMULTI_FIFO) 2338 if (debug & DEBUG_HFCMULTI_FIFO)
2339 printk(KERN_DEBUG 2339 printk(KERN_DEBUG
2340 "%s(card %d): fifo(%d) reading %d bytes " 2340 "%s(card %d): fifo(%d) reading %d bytes "
2341 "(z1=%04x, z2=%04x) TRANS\n", 2341 "(z1=%04x, z2=%04x) TRANS\n",
2342 __func__, hc->id + 1, ch, Zsize, z1, z2); 2342 __func__, hc->id + 1, ch, Zsize, z1, z2);
2343 /* only bch is transparent */ 2343 /* only bch is transparent */
2344 recv_Bchannel(bch, hc->chan[ch].Zfill); 2344 recv_Bchannel(bch, hc->chan[ch].Zfill);
2345 *sp = skb; 2345 *sp = skb;
@@ -2362,7 +2362,7 @@ signal_state_up(struct dchannel *dch, int info, char *msg)
2362 id = TEI_SAPI | (GROUP_TEI << 8); /* manager address */ 2362 id = TEI_SAPI | (GROUP_TEI << 8); /* manager address */
2363 2363
2364 skb = _alloc_mISDN_skb(MPH_INFORMATION_IND, id, sizeof(data), &data, 2364 skb = _alloc_mISDN_skb(MPH_INFORMATION_IND, id, sizeof(data), &data,
2365 GFP_ATOMIC); 2365 GFP_ATOMIC);
2366 if (!skb) 2366 if (!skb)
2367 return; 2367 return;
2368 recv_Dchannel_skb(dch, skb); 2368 recv_Dchannel_skb(dch, skb);
@@ -2395,10 +2395,10 @@ handle_timer_irq(struct hfc_multi *hc)
2395 if (hc->e1_resync & 4) { 2395 if (hc->e1_resync & 4) {
2396 if (debug & DEBUG_HFCMULTI_PLXSD) 2396 if (debug & DEBUG_HFCMULTI_PLXSD)
2397 printk(KERN_DEBUG 2397 printk(KERN_DEBUG
2398 "Enable QUARTZ for HFC-E1\n"); 2398 "Enable QUARTZ for HFC-E1\n");
2399 /* set jatt to quartz */ 2399 /* set jatt to quartz */
2400 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC 2400 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC
2401 | V_JATT_OFF); 2401 | V_JATT_OFF);
2402 /* switch to JATT, in case it is not already */ 2402 /* switch to JATT, in case it is not already */
2403 HFC_outb(hc, R_SYNC_OUT, 0); 2403 HFC_outb(hc, R_SYNC_OUT, 0);
2404 } 2404 }
@@ -2417,14 +2417,14 @@ handle_timer_irq(struct hfc_multi *hc)
2417 dch = hc->chan[ch].dch; 2417 dch = hc->chan[ch].dch;
2418 if (!(--hc->chan[ch].nt_timer)) { 2418 if (!(--hc->chan[ch].nt_timer)) {
2419 schedule_event(dch, 2419 schedule_event(dch,
2420 FLG_PHCHANGE); 2420 FLG_PHCHANGE);
2421 if (debug & 2421 if (debug &
2422 DEBUG_HFCMULTI_STATE) 2422 DEBUG_HFCMULTI_STATE)
2423 printk(KERN_DEBUG 2423 printk(KERN_DEBUG
2424 "%s: nt_timer at " 2424 "%s: nt_timer at "
2425 "state %x\n", 2425 "state %x\n",
2426 __func__, 2426 __func__,
2427 dch->state); 2427 dch->state);
2428 } 2428 }
2429 } 2429 }
2430 } 2430 }
@@ -2436,10 +2436,10 @@ handle_timer_irq(struct hfc_multi *hc)
2436 temp = HFC_inb_nodebug(hc, R_SYNC_STA) & V_SIG_LOS; 2436 temp = HFC_inb_nodebug(hc, R_SYNC_STA) & V_SIG_LOS;
2437 if (!temp && hc->chan[hc->dslot].los) 2437 if (!temp && hc->chan[hc->dslot].los)
2438 signal_state_up(dch, L1_SIGNAL_LOS_ON, 2438 signal_state_up(dch, L1_SIGNAL_LOS_ON,
2439 "LOS detected"); 2439 "LOS detected");
2440 if (temp && !hc->chan[hc->dslot].los) 2440 if (temp && !hc->chan[hc->dslot].los)
2441 signal_state_up(dch, L1_SIGNAL_LOS_OFF, 2441 signal_state_up(dch, L1_SIGNAL_LOS_OFF,
2442 "LOS gone"); 2442 "LOS gone");
2443 hc->chan[hc->dslot].los = temp; 2443 hc->chan[hc->dslot].los = temp;
2444 } 2444 }
2445 if (test_bit(HFC_CFG_REPORT_AIS, &hc->chan[hc->dslot].cfg)) { 2445 if (test_bit(HFC_CFG_REPORT_AIS, &hc->chan[hc->dslot].cfg)) {
@@ -2447,10 +2447,10 @@ handle_timer_irq(struct hfc_multi *hc)
2447 temp = HFC_inb_nodebug(hc, R_SYNC_STA) & V_AIS; 2447 temp = HFC_inb_nodebug(hc, R_SYNC_STA) & V_AIS;
2448 if (!temp && hc->chan[hc->dslot].ais) 2448 if (!temp && hc->chan[hc->dslot].ais)
2449 signal_state_up(dch, L1_SIGNAL_AIS_ON, 2449 signal_state_up(dch, L1_SIGNAL_AIS_ON,
2450 "AIS detected"); 2450 "AIS detected");
2451 if (temp && !hc->chan[hc->dslot].ais) 2451 if (temp && !hc->chan[hc->dslot].ais)
2452 signal_state_up(dch, L1_SIGNAL_AIS_OFF, 2452 signal_state_up(dch, L1_SIGNAL_AIS_OFF,
2453 "AIS gone"); 2453 "AIS gone");
2454 hc->chan[hc->dslot].ais = temp; 2454 hc->chan[hc->dslot].ais = temp;
2455 } 2455 }
2456 if (test_bit(HFC_CFG_REPORT_SLIP, &hc->chan[hc->dslot].cfg)) { 2456 if (test_bit(HFC_CFG_REPORT_SLIP, &hc->chan[hc->dslot].cfg)) {
@@ -2458,12 +2458,12 @@ handle_timer_irq(struct hfc_multi *hc)
2458 temp = HFC_inb_nodebug(hc, R_SLIP) & V_FOSLIP_RX; 2458 temp = HFC_inb_nodebug(hc, R_SLIP) & V_FOSLIP_RX;
2459 if (!temp && hc->chan[hc->dslot].slip_rx) 2459 if (!temp && hc->chan[hc->dslot].slip_rx)
2460 signal_state_up(dch, L1_SIGNAL_SLIP_RX, 2460 signal_state_up(dch, L1_SIGNAL_SLIP_RX,
2461 " bit SLIP detected RX"); 2461 " bit SLIP detected RX");
2462 hc->chan[hc->dslot].slip_rx = temp; 2462 hc->chan[hc->dslot].slip_rx = temp;
2463 temp = HFC_inb_nodebug(hc, R_SLIP) & V_FOSLIP_TX; 2463 temp = HFC_inb_nodebug(hc, R_SLIP) & V_FOSLIP_TX;
2464 if (!temp && hc->chan[hc->dslot].slip_tx) 2464 if (!temp && hc->chan[hc->dslot].slip_tx)
2465 signal_state_up(dch, L1_SIGNAL_SLIP_TX, 2465 signal_state_up(dch, L1_SIGNAL_SLIP_TX,
2466 " bit SLIP detected TX"); 2466 " bit SLIP detected TX");
2467 hc->chan[hc->dslot].slip_tx = temp; 2467 hc->chan[hc->dslot].slip_tx = temp;
2468 } 2468 }
2469 if (test_bit(HFC_CFG_REPORT_RDI, &hc->chan[hc->dslot].cfg)) { 2469 if (test_bit(HFC_CFG_REPORT_RDI, &hc->chan[hc->dslot].cfg)) {
@@ -2471,10 +2471,10 @@ handle_timer_irq(struct hfc_multi *hc)
2471 temp = HFC_inb_nodebug(hc, R_RX_SL0_0) & V_A; 2471 temp = HFC_inb_nodebug(hc, R_RX_SL0_0) & V_A;
2472 if (!temp && hc->chan[hc->dslot].rdi) 2472 if (!temp && hc->chan[hc->dslot].rdi)
2473 signal_state_up(dch, L1_SIGNAL_RDI_ON, 2473 signal_state_up(dch, L1_SIGNAL_RDI_ON,
2474 "RDI detected"); 2474 "RDI detected");
2475 if (temp && !hc->chan[hc->dslot].rdi) 2475 if (temp && !hc->chan[hc->dslot].rdi)
2476 signal_state_up(dch, L1_SIGNAL_RDI_OFF, 2476 signal_state_up(dch, L1_SIGNAL_RDI_OFF,
2477 "RDI gone"); 2477 "RDI gone");
2478 hc->chan[hc->dslot].rdi = temp; 2478 hc->chan[hc->dslot].rdi = temp;
2479 } 2479 }
2480 temp = HFC_inb_nodebug(hc, R_JATT_DIR); 2480 temp = HFC_inb_nodebug(hc, R_JATT_DIR);
@@ -2483,13 +2483,13 @@ handle_timer_irq(struct hfc_multi *hc)
2483 if ((temp & 0x60) == 0x60) { 2483 if ((temp & 0x60) == 0x60) {
2484 if (debug & DEBUG_HFCMULTI_SYNC) 2484 if (debug & DEBUG_HFCMULTI_SYNC)
2485 printk(KERN_DEBUG 2485 printk(KERN_DEBUG
2486 "%s: (id=%d) E1 now " 2486 "%s: (id=%d) E1 now "
2487 "in clock sync\n", 2487 "in clock sync\n",
2488 __func__, hc->id); 2488 __func__, hc->id);
2489 HFC_outb(hc, R_RX_OFF, 2489 HFC_outb(hc, R_RX_OFF,
2490 hc->chan[hc->dslot].jitter | V_RX_INIT); 2490 hc->chan[hc->dslot].jitter | V_RX_INIT);
2491 HFC_outb(hc, R_TX_OFF, 2491 HFC_outb(hc, R_TX_OFF,
2492 hc->chan[hc->dslot].jitter | V_RX_INIT); 2492 hc->chan[hc->dslot].jitter | V_RX_INIT);
2493 hc->chan[hc->dslot].sync = 1; 2493 hc->chan[hc->dslot].sync = 1;
2494 goto check_framesync; 2494 goto check_framesync;
2495 } 2495 }
@@ -2498,20 +2498,20 @@ handle_timer_irq(struct hfc_multi *hc)
2498 if ((temp & 0x60) != 0x60) { 2498 if ((temp & 0x60) != 0x60) {
2499 if (debug & DEBUG_HFCMULTI_SYNC) 2499 if (debug & DEBUG_HFCMULTI_SYNC)
2500 printk(KERN_DEBUG 2500 printk(KERN_DEBUG
2501 "%s: (id=%d) E1 " 2501 "%s: (id=%d) E1 "
2502 "lost clock sync\n", 2502 "lost clock sync\n",
2503 __func__, hc->id); 2503 __func__, hc->id);
2504 hc->chan[hc->dslot].sync = 0; 2504 hc->chan[hc->dslot].sync = 0;
2505 break; 2505 break;
2506 } 2506 }
2507check_framesync: 2507 check_framesync:
2508 temp = HFC_inb_nodebug(hc, R_SYNC_STA); 2508 temp = HFC_inb_nodebug(hc, R_SYNC_STA);
2509 if (temp == 0x27) { 2509 if (temp == 0x27) {
2510 if (debug & DEBUG_HFCMULTI_SYNC) 2510 if (debug & DEBUG_HFCMULTI_SYNC)
2511 printk(KERN_DEBUG 2511 printk(KERN_DEBUG
2512 "%s: (id=%d) E1 " 2512 "%s: (id=%d) E1 "
2513 "now in frame sync\n", 2513 "now in frame sync\n",
2514 __func__, hc->id); 2514 __func__, hc->id);
2515 hc->chan[hc->dslot].sync = 2; 2515 hc->chan[hc->dslot].sync = 2;
2516 } 2516 }
2517 break; 2517 break;
@@ -2519,9 +2519,9 @@ check_framesync:
2519 if ((temp & 0x60) != 0x60) { 2519 if ((temp & 0x60) != 0x60) {
2520 if (debug & DEBUG_HFCMULTI_SYNC) 2520 if (debug & DEBUG_HFCMULTI_SYNC)
2521 printk(KERN_DEBUG 2521 printk(KERN_DEBUG
2522 "%s: (id=%d) E1 lost " 2522 "%s: (id=%d) E1 lost "
2523 "clock & frame sync\n", 2523 "clock & frame sync\n",
2524 __func__, hc->id); 2524 __func__, hc->id);
2525 hc->chan[hc->dslot].sync = 0; 2525 hc->chan[hc->dslot].sync = 0;
2526 break; 2526 break;
2527 } 2527 }
@@ -2529,9 +2529,9 @@ check_framesync:
2529 if (temp != 0x27) { 2529 if (temp != 0x27) {
2530 if (debug & DEBUG_HFCMULTI_SYNC) 2530 if (debug & DEBUG_HFCMULTI_SYNC)
2531 printk(KERN_DEBUG 2531 printk(KERN_DEBUG
2532 "%s: (id=%d) E1 " 2532 "%s: (id=%d) E1 "
2533 "lost frame sync\n", 2533 "lost frame sync\n",
2534 __func__, hc->id); 2534 __func__, hc->id);
2535 hc->chan[hc->dslot].sync = 1; 2535 hc->chan[hc->dslot].sync = 1;
2536 } 2536 }
2537 break; 2537 break;
@@ -2559,30 +2559,30 @@ ph_state_irq(struct hfc_multi *hc, u_char r_irq_statech)
2559 dch = hc->chan[ch].dch; 2559 dch = hc->chan[ch].dch;
2560 if (r_irq_statech & 1) { 2560 if (r_irq_statech & 1) {
2561 HFC_outb_nodebug(hc, R_ST_SEL, 2561 HFC_outb_nodebug(hc, R_ST_SEL,
2562 hc->chan[ch].port); 2562 hc->chan[ch].port);
2563 /* undocumented: delay after R_ST_SEL */ 2563 /* undocumented: delay after R_ST_SEL */
2564 udelay(1); 2564 udelay(1);
2565 /* undocumented: status changes during read */ 2565 /* undocumented: status changes during read */
2566 st_status = HFC_inb_nodebug(hc, A_ST_RD_STATE); 2566 st_status = HFC_inb_nodebug(hc, A_ST_RD_STATE);
2567 while (st_status != (temp = 2567 while (st_status != (temp =
2568 HFC_inb_nodebug(hc, A_ST_RD_STATE))) { 2568 HFC_inb_nodebug(hc, A_ST_RD_STATE))) {
2569 if (debug & DEBUG_HFCMULTI_STATE) 2569 if (debug & DEBUG_HFCMULTI_STATE)
2570 printk(KERN_DEBUG "%s: reread " 2570 printk(KERN_DEBUG "%s: reread "
2571 "STATE because %d!=%d\n", 2571 "STATE because %d!=%d\n",
2572 __func__, temp, 2572 __func__, temp,
2573 st_status); 2573 st_status);
2574 st_status = temp; /* repeat */ 2574 st_status = temp; /* repeat */
2575 } 2575 }
2576 2576
2577 /* Speech Design TE-sync indication */ 2577 /* Speech Design TE-sync indication */
2578 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && 2578 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) &&
2579 dch->dev.D.protocol == ISDN_P_TE_S0) { 2579 dch->dev.D.protocol == ISDN_P_TE_S0) {
2580 if (st_status & V_FR_SYNC_ST) 2580 if (st_status & V_FR_SYNC_ST)
2581 hc->syncronized |= 2581 hc->syncronized |=
2582 (1 << hc->chan[ch].port); 2582 (1 << hc->chan[ch].port);
2583 else 2583 else
2584 hc->syncronized &= 2584 hc->syncronized &=
2585 ~(1 << hc->chan[ch].port); 2585 ~(1 << hc->chan[ch].port);
2586 } 2586 }
2587 dch->state = st_status & 0x0f; 2587 dch->state = st_status & 0x0f;
2588 if (dch->dev.D.protocol == ISDN_P_NT_S0) 2588 if (dch->dev.D.protocol == ISDN_P_NT_S0)
@@ -2591,19 +2591,19 @@ ph_state_irq(struct hfc_multi *hc, u_char r_irq_statech)
2591 active = 7; 2591 active = 7;
2592 if (dch->state == active) { 2592 if (dch->state == active) {
2593 HFC_outb_nodebug(hc, R_FIFO, 2593 HFC_outb_nodebug(hc, R_FIFO,
2594 (ch << 1) | 1); 2594 (ch << 1) | 1);
2595 HFC_wait_nodebug(hc); 2595 HFC_wait_nodebug(hc);
2596 HFC_outb_nodebug(hc, 2596 HFC_outb_nodebug(hc,
2597 R_INC_RES_FIFO, V_RES_F); 2597 R_INC_RES_FIFO, V_RES_F);
2598 HFC_wait_nodebug(hc); 2598 HFC_wait_nodebug(hc);
2599 dch->tx_idx = 0; 2599 dch->tx_idx = 0;
2600 } 2600 }
2601 schedule_event(dch, FLG_PHCHANGE); 2601 schedule_event(dch, FLG_PHCHANGE);
2602 if (debug & DEBUG_HFCMULTI_STATE) 2602 if (debug & DEBUG_HFCMULTI_STATE)
2603 printk(KERN_DEBUG 2603 printk(KERN_DEBUG
2604 "%s: S/T newstate %x port %d\n", 2604 "%s: S/T newstate %x port %d\n",
2605 __func__, dch->state, 2605 __func__, dch->state,
2606 hc->chan[ch].port); 2606 hc->chan[ch].port);
2607 } 2607 }
2608 r_irq_statech >>= 1; 2608 r_irq_statech >>= 1;
2609 } 2609 }
@@ -2665,7 +2665,7 @@ hfcmulti_interrupt(int intno, void *dev_id)
2665{ 2665{
2666#ifdef IRQCOUNT_DEBUG 2666#ifdef IRQCOUNT_DEBUG
2667 static int iq1 = 0, iq2 = 0, iq3 = 0, iq4 = 0, 2667 static int iq1 = 0, iq2 = 0, iq3 = 0, iq4 = 0,
2668 iq5 = 0, iq6 = 0, iqcnt = 0; 2668 iq5 = 0, iq6 = 0, iqcnt = 0;
2669#endif 2669#endif
2670 struct hfc_multi *hc = dev_id; 2670 struct hfc_multi *hc = dev_id;
2671 struct dchannel *dch; 2671 struct dchannel *dch;
@@ -2686,7 +2686,7 @@ hfcmulti_interrupt(int intno, void *dev_id)
2686#ifdef IRQ_DEBUG 2686#ifdef IRQ_DEBUG
2687 if (irqsem) 2687 if (irqsem)
2688 printk(KERN_ERR "irq for card %d during irq from " 2688 printk(KERN_ERR "irq for card %d during irq from "
2689 "card %d, this is no bug.\n", hc->id + 1, irqsem); 2689 "card %d, this is no bug.\n", hc->id + 1, irqsem);
2690 irqsem = hc->id + 1; 2690 irqsem = hc->id + 1;
2691#endif 2691#endif
2692#ifdef CONFIG_MISDN_HFCMULTI_8xx 2692#ifdef CONFIG_MISDN_HFCMULTI_8xx
@@ -2719,14 +2719,14 @@ hfcmulti_interrupt(int intno, void *dev_id)
2719 iq6++; 2719 iq6++;
2720 if (iqcnt++ > 5000) { 2720 if (iqcnt++ > 5000) {
2721 printk(KERN_ERR "iq1:%x iq2:%x iq3:%x iq4:%x iq5:%x iq6:%x\n", 2721 printk(KERN_ERR "iq1:%x iq2:%x iq3:%x iq4:%x iq5:%x iq6:%x\n",
2722 iq1, iq2, iq3, iq4, iq5, iq6); 2722 iq1, iq2, iq3, iq4, iq5, iq6);
2723 iqcnt = 0; 2723 iqcnt = 0;
2724 } 2724 }
2725#endif 2725#endif
2726 2726
2727 if (!r_irq_statech && 2727 if (!r_irq_statech &&
2728 !(status & (V_DTMF_STA | V_LOST_STA | V_EXT_IRQSTA | 2728 !(status & (V_DTMF_STA | V_LOST_STA | V_EXT_IRQSTA |
2729 V_MISC_IRQSTA | V_FR_IRQSTA))) { 2729 V_MISC_IRQSTA | V_FR_IRQSTA))) {
2730 /* irq is not for us */ 2730 /* irq is not for us */
2731 goto irq_notforus; 2731 goto irq_notforus;
2732 } 2732 }
@@ -2751,7 +2751,7 @@ hfcmulti_interrupt(int intno, void *dev_id)
2751 dch = hc->chan[hc->dslot].dch; 2751 dch = hc->chan[hc->dslot].dch;
2752 e1_syncsta = HFC_inb_nodebug(hc, R_SYNC_STA); 2752 e1_syncsta = HFC_inb_nodebug(hc, R_SYNC_STA);
2753 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) 2753 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)
2754 && hc->e1_getclock) { 2754 && hc->e1_getclock) {
2755 if (e1_syncsta & V_FR_SYNC_E1) 2755 if (e1_syncsta & V_FR_SYNC_E1)
2756 hc->syncronized = 1; 2756 hc->syncronized = 1;
2757 else 2757 else
@@ -2760,12 +2760,12 @@ hfcmulti_interrupt(int intno, void *dev_id)
2760 /* undocumented: status changes during read */ 2760 /* undocumented: status changes during read */
2761 dch->state = HFC_inb_nodebug(hc, R_E1_RD_STA); 2761 dch->state = HFC_inb_nodebug(hc, R_E1_RD_STA);
2762 while (dch->state != (temp = 2762 while (dch->state != (temp =
2763 HFC_inb_nodebug(hc, R_E1_RD_STA))) { 2763 HFC_inb_nodebug(hc, R_E1_RD_STA))) {
2764 if (debug & DEBUG_HFCMULTI_STATE) 2764 if (debug & DEBUG_HFCMULTI_STATE)
2765 printk(KERN_DEBUG "%s: reread " 2765 printk(KERN_DEBUG "%s: reread "
2766 "STATE because %d!=%d\n", 2766 "STATE because %d!=%d\n",
2767 __func__, temp, 2767 __func__, temp,
2768 dch->state); 2768 dch->state);
2769 dch->state = temp; /* repeat */ 2769 dch->state = temp; /* repeat */
2770 } 2770 }
2771 dch->state = HFC_inb_nodebug(hc, R_E1_RD_STA) 2771 dch->state = HFC_inb_nodebug(hc, R_E1_RD_STA)
@@ -2773,8 +2773,8 @@ hfcmulti_interrupt(int intno, void *dev_id)
2773 schedule_event(dch, FLG_PHCHANGE); 2773 schedule_event(dch, FLG_PHCHANGE);
2774 if (debug & DEBUG_HFCMULTI_STATE) 2774 if (debug & DEBUG_HFCMULTI_STATE)
2775 printk(KERN_DEBUG 2775 printk(KERN_DEBUG
2776 "%s: E1 (id=%d) newstate %x\n", 2776 "%s: E1 (id=%d) newstate %x\n",
2777 __func__, hc->id, dch->state); 2777 __func__, hc->id, dch->state);
2778 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) 2778 if (test_bit(HFC_CHIP_PLXSD, &hc->chip))
2779 plxsd_checksync(hc, 0); 2779 plxsd_checksync(hc, 0);
2780 } 2780 }
@@ -2792,7 +2792,7 @@ hfcmulti_interrupt(int intno, void *dev_id)
2792 static int irq_proc_cnt; 2792 static int irq_proc_cnt;
2793 if (!irq_proc_cnt++) 2793 if (!irq_proc_cnt++)
2794 printk(KERN_DEBUG "%s: got V_IRQ_PROC -" 2794 printk(KERN_DEBUG "%s: got V_IRQ_PROC -"
2795 " this should not happen\n", __func__); 2795 " this should not happen\n", __func__);
2796 } 2796 }
2797 2797
2798 } 2798 }
@@ -2841,7 +2841,7 @@ hfcmulti_dbusy_timer(struct hfc_multi *hc)
2841 */ 2841 */
2842static int 2842static int
2843mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx, 2843mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2844 int bank_tx, int slot_rx, int bank_rx) 2844 int bank_tx, int slot_rx, int bank_rx)
2845{ 2845{
2846 int flow_tx = 0, flow_rx = 0, routing = 0; 2846 int flow_tx = 0, flow_rx = 0, routing = 0;
2847 int oslot_tx, oslot_rx; 2847 int oslot_tx, oslot_rx;
@@ -2855,28 +2855,28 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2855 2855
2856 if (debug & DEBUG_HFCMULTI_MODE) 2856 if (debug & DEBUG_HFCMULTI_MODE)
2857 printk(KERN_DEBUG 2857 printk(KERN_DEBUG
2858 "%s: card %d channel %d protocol %x slot old=%d new=%d " 2858 "%s: card %d channel %d protocol %x slot old=%d new=%d "
2859 "bank new=%d (TX) slot old=%d new=%d bank new=%d (RX)\n", 2859 "bank new=%d (TX) slot old=%d new=%d bank new=%d (RX)\n",
2860 __func__, hc->id, ch, protocol, oslot_tx, slot_tx, 2860 __func__, hc->id, ch, protocol, oslot_tx, slot_tx,
2861 bank_tx, oslot_rx, slot_rx, bank_rx); 2861 bank_tx, oslot_rx, slot_rx, bank_rx);
2862 2862
2863 if (oslot_tx >= 0 && slot_tx != oslot_tx) { 2863 if (oslot_tx >= 0 && slot_tx != oslot_tx) {
2864 /* remove from slot */ 2864 /* remove from slot */
2865 if (debug & DEBUG_HFCMULTI_MODE) 2865 if (debug & DEBUG_HFCMULTI_MODE)
2866 printk(KERN_DEBUG "%s: remove from slot %d (TX)\n", 2866 printk(KERN_DEBUG "%s: remove from slot %d (TX)\n",
2867 __func__, oslot_tx); 2867 __func__, oslot_tx);
2868 if (hc->slot_owner[oslot_tx<<1] == ch) { 2868 if (hc->slot_owner[oslot_tx << 1] == ch) {
2869 HFC_outb(hc, R_SLOT, oslot_tx << 1); 2869 HFC_outb(hc, R_SLOT, oslot_tx << 1);
2870 HFC_outb(hc, A_SL_CFG, 0); 2870 HFC_outb(hc, A_SL_CFG, 0);
2871 if (hc->ctype != HFC_TYPE_XHFC) 2871 if (hc->ctype != HFC_TYPE_XHFC)
2872 HFC_outb(hc, A_CONF, 0); 2872 HFC_outb(hc, A_CONF, 0);
2873 hc->slot_owner[oslot_tx<<1] = -1; 2873 hc->slot_owner[oslot_tx << 1] = -1;
2874 } else { 2874 } else {
2875 if (debug & DEBUG_HFCMULTI_MODE) 2875 if (debug & DEBUG_HFCMULTI_MODE)
2876 printk(KERN_DEBUG 2876 printk(KERN_DEBUG
2877 "%s: we are not owner of this tx slot " 2877 "%s: we are not owner of this tx slot "
2878 "anymore, channel %d is.\n", 2878 "anymore, channel %d is.\n",
2879 __func__, hc->slot_owner[oslot_tx<<1]); 2879 __func__, hc->slot_owner[oslot_tx << 1]);
2880 } 2880 }
2881 } 2881 }
2882 2882
@@ -2884,8 +2884,8 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2884 /* remove from slot */ 2884 /* remove from slot */
2885 if (debug & DEBUG_HFCMULTI_MODE) 2885 if (debug & DEBUG_HFCMULTI_MODE)
2886 printk(KERN_DEBUG 2886 printk(KERN_DEBUG
2887 "%s: remove from slot %d (RX)\n", 2887 "%s: remove from slot %d (RX)\n",
2888 __func__, oslot_rx); 2888 __func__, oslot_rx);
2889 if (hc->slot_owner[(oslot_rx << 1) | 1] == ch) { 2889 if (hc->slot_owner[(oslot_rx << 1) | 1] == ch) {
2890 HFC_outb(hc, R_SLOT, (oslot_rx << 1) | V_SL_DIR); 2890 HFC_outb(hc, R_SLOT, (oslot_rx << 1) | V_SL_DIR);
2891 HFC_outb(hc, A_SL_CFG, 0); 2891 HFC_outb(hc, A_SL_CFG, 0);
@@ -2893,10 +2893,10 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2893 } else { 2893 } else {
2894 if (debug & DEBUG_HFCMULTI_MODE) 2894 if (debug & DEBUG_HFCMULTI_MODE)
2895 printk(KERN_DEBUG 2895 printk(KERN_DEBUG
2896 "%s: we are not owner of this rx slot " 2896 "%s: we are not owner of this rx slot "
2897 "anymore, channel %d is.\n", 2897 "anymore, channel %d is.\n",
2898 __func__, 2898 __func__,
2899 hc->slot_owner[(oslot_rx << 1) | 1]); 2899 hc->slot_owner[(oslot_rx << 1) | 1]);
2900 } 2900 }
2901 } 2901 }
2902 2902
@@ -2917,14 +2917,14 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2917 routing = 0x40; /* loop */ 2917 routing = 0x40; /* loop */
2918 if (debug & DEBUG_HFCMULTI_MODE) 2918 if (debug & DEBUG_HFCMULTI_MODE)
2919 printk(KERN_DEBUG "%s: put channel %d to slot %d bank" 2919 printk(KERN_DEBUG "%s: put channel %d to slot %d bank"
2920 " %d flow %02x routing %02x conf %d (TX)\n", 2920 " %d flow %02x routing %02x conf %d (TX)\n",
2921 __func__, ch, slot_tx, bank_tx, 2921 __func__, ch, slot_tx, bank_tx,
2922 flow_tx, routing, conf); 2922 flow_tx, routing, conf);
2923 HFC_outb(hc, R_SLOT, slot_tx << 1); 2923 HFC_outb(hc, R_SLOT, slot_tx << 1);
2924 HFC_outb(hc, A_SL_CFG, (ch<<1) | routing); 2924 HFC_outb(hc, A_SL_CFG, (ch << 1) | routing);
2925 if (hc->ctype != HFC_TYPE_XHFC) 2925 if (hc->ctype != HFC_TYPE_XHFC)
2926 HFC_outb(hc, A_CONF, 2926 HFC_outb(hc, A_CONF,
2927 (conf < 0) ? 0 : (conf | V_CONF_SL)); 2927 (conf < 0) ? 0 : (conf | V_CONF_SL));
2928 hc->slot_owner[slot_tx << 1] = ch; 2928 hc->slot_owner[slot_tx << 1] = ch;
2929 hc->chan[ch].slot_tx = slot_tx; 2929 hc->chan[ch].slot_tx = slot_tx;
2930 hc->chan[ch].bank_tx = bank_tx; 2930 hc->chan[ch].bank_tx = bank_tx;
@@ -2946,12 +2946,12 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2946 routing = 0x40; /* loop */ 2946 routing = 0x40; /* loop */
2947 if (debug & DEBUG_HFCMULTI_MODE) 2947 if (debug & DEBUG_HFCMULTI_MODE)
2948 printk(KERN_DEBUG "%s: put channel %d to slot %d bank" 2948 printk(KERN_DEBUG "%s: put channel %d to slot %d bank"
2949 " %d flow %02x routing %02x conf %d (RX)\n", 2949 " %d flow %02x routing %02x conf %d (RX)\n",
2950 __func__, ch, slot_rx, bank_rx, 2950 __func__, ch, slot_rx, bank_rx,
2951 flow_rx, routing, conf); 2951 flow_rx, routing, conf);
2952 HFC_outb(hc, R_SLOT, (slot_rx<<1) | V_SL_DIR); 2952 HFC_outb(hc, R_SLOT, (slot_rx << 1) | V_SL_DIR);
2953 HFC_outb(hc, A_SL_CFG, (ch<<1) | V_CH_DIR | routing); 2953 HFC_outb(hc, A_SL_CFG, (ch << 1) | V_CH_DIR | routing);
2954 hc->slot_owner[(slot_rx<<1)|1] = ch; 2954 hc->slot_owner[(slot_rx << 1) | 1] = ch;
2955 hc->chan[ch].slot_rx = slot_rx; 2955 hc->chan[ch].slot_rx = slot_rx;
2956 hc->chan[ch].bank_rx = bank_rx; 2956 hc->chan[ch].bank_rx = bank_rx;
2957 } 2957 }
@@ -2967,7 +2967,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2967 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); 2967 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);
2968 HFC_wait(hc); 2968 HFC_wait(hc);
2969 /* disable RX fifo */ 2969 /* disable RX fifo */
2970 HFC_outb(hc, R_FIFO, (ch<<1)|1); 2970 HFC_outb(hc, R_FIFO, (ch << 1) | 1);
2971 HFC_wait(hc); 2971 HFC_wait(hc);
2972 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00); 2972 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00);
2973 HFC_outb(hc, A_SUBCH_CFG, 0); 2973 HFC_outb(hc, A_SUBCH_CFG, 0);
@@ -2976,17 +2976,17 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2976 HFC_wait(hc); 2976 HFC_wait(hc);
2977 if (hc->chan[ch].bch && hc->ctype != HFC_TYPE_E1) { 2977 if (hc->chan[ch].bch && hc->ctype != HFC_TYPE_E1) {
2978 hc->hw.a_st_ctrl0[hc->chan[ch].port] &= 2978 hc->hw.a_st_ctrl0[hc->chan[ch].port] &=
2979 ((ch & 0x3) == 0) ? ~V_B1_EN : ~V_B2_EN; 2979 ((ch & 0x3) == 0) ? ~V_B1_EN : ~V_B2_EN;
2980 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); 2980 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port);
2981 /* undocumented: delay after R_ST_SEL */ 2981 /* undocumented: delay after R_ST_SEL */
2982 udelay(1); 2982 udelay(1);
2983 HFC_outb(hc, A_ST_CTRL0, 2983 HFC_outb(hc, A_ST_CTRL0,
2984 hc->hw.a_st_ctrl0[hc->chan[ch].port]); 2984 hc->hw.a_st_ctrl0[hc->chan[ch].port]);
2985 } 2985 }
2986 if (hc->chan[ch].bch) { 2986 if (hc->chan[ch].bch) {
2987 test_and_clear_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); 2987 test_and_clear_bit(FLG_HDLC, &hc->chan[ch].bch->Flags);
2988 test_and_clear_bit(FLG_TRANSPARENT, 2988 test_and_clear_bit(FLG_TRANSPARENT,
2989 &hc->chan[ch].bch->Flags); 2989 &hc->chan[ch].bch->Flags);
2990 } 2990 }
2991 break; 2991 break;
2992 case (ISDN_P_B_RAW): /* B-channel */ 2992 case (ISDN_P_B_RAW): /* B-channel */
@@ -2996,20 +2996,20 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2996 (hc->chan[ch].slot_tx < 0)) { 2996 (hc->chan[ch].slot_tx < 0)) {
2997 2997
2998 printk(KERN_DEBUG 2998 printk(KERN_DEBUG
2999 "Setting B-channel %d to echo cancelable " 2999 "Setting B-channel %d to echo cancelable "
3000 "state on PCM slot %d\n", ch, 3000 "state on PCM slot %d\n", ch,
3001 ((ch / 4) * 8) + ((ch % 4) * 4) + 1); 3001 ((ch / 4) * 8) + ((ch % 4) * 4) + 1);
3002 printk(KERN_DEBUG 3002 printk(KERN_DEBUG
3003 "Enabling pass through for channel\n"); 3003 "Enabling pass through for channel\n");
3004 vpm_out(hc, ch, ((ch / 4) * 8) + 3004 vpm_out(hc, ch, ((ch / 4) * 8) +
3005 ((ch % 4) * 4) + 1, 0x01); 3005 ((ch % 4) * 4) + 1, 0x01);
3006 /* rx path */ 3006 /* rx path */
3007 /* S/T -> PCM */ 3007 /* S/T -> PCM */
3008 HFC_outb(hc, R_FIFO, (ch << 1)); 3008 HFC_outb(hc, R_FIFO, (ch << 1));
3009 HFC_wait(hc); 3009 HFC_wait(hc);
3010 HFC_outb(hc, A_CON_HDLC, 0xc0 | V_HDLC_TRP | V_IFF); 3010 HFC_outb(hc, A_CON_HDLC, 0xc0 | V_HDLC_TRP | V_IFF);
3011 HFC_outb(hc, R_SLOT, (((ch / 4) * 8) + 3011 HFC_outb(hc, R_SLOT, (((ch / 4) * 8) +
3012 ((ch % 4) * 4) + 1) << 1); 3012 ((ch % 4) * 4) + 1) << 1);
3013 HFC_outb(hc, A_SL_CFG, 0x80 | (ch << 1)); 3013 HFC_outb(hc, A_SL_CFG, 0x80 | (ch << 1));
3014 3014
3015 /* PCM -> FIFO */ 3015 /* PCM -> FIFO */
@@ -3021,7 +3021,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3021 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); 3021 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);
3022 HFC_wait(hc); 3022 HFC_wait(hc);
3023 HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) + 3023 HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) +
3024 ((ch % 4) * 4) + 1) << 1) | 1); 3024 ((ch % 4) * 4) + 1) << 1) | 1);
3025 HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch << 1) | 1); 3025 HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch << 1) | 1);
3026 3026
3027 /* tx path */ 3027 /* tx path */
@@ -3030,7 +3030,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3030 HFC_wait(hc); 3030 HFC_wait(hc);
3031 HFC_outb(hc, A_CON_HDLC, 0xc0 | V_HDLC_TRP | V_IFF); 3031 HFC_outb(hc, A_CON_HDLC, 0xc0 | V_HDLC_TRP | V_IFF);
3032 HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) + 3032 HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) +
3033 ((ch % 4) * 4)) << 1) | 1); 3033 ((ch % 4) * 4)) << 1) | 1);
3034 HFC_outb(hc, A_SL_CFG, 0x80 | 0x40 | (ch << 1) | 1); 3034 HFC_outb(hc, A_SL_CFG, 0x80 | 0x40 | (ch << 1) | 1);
3035 3035
3036 /* FIFO -> PCM */ 3036 /* FIFO -> PCM */
@@ -3044,7 +3044,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3044 /* tx silence */ 3044 /* tx silence */
3045 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); 3045 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence);
3046 HFC_outb(hc, R_SLOT, (((ch / 4) * 8) + 3046 HFC_outb(hc, R_SLOT, (((ch / 4) * 8) +
3047 ((ch % 4) * 4)) << 1); 3047 ((ch % 4) * 4)) << 1);
3048 HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch << 1)); 3048 HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch << 1));
3049 } else { 3049 } else {
3050 /* enable TX fifo */ 3050 /* enable TX fifo */
@@ -3052,11 +3052,11 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3052 HFC_wait(hc); 3052 HFC_wait(hc);
3053 if (hc->ctype == HFC_TYPE_XHFC) 3053 if (hc->ctype == HFC_TYPE_XHFC)
3054 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x07 << 2 | 3054 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x07 << 2 |
3055 V_HDLC_TRP | V_IFF); 3055 V_HDLC_TRP | V_IFF);
3056 /* Enable FIFO, no interrupt */ 3056 /* Enable FIFO, no interrupt */
3057 else 3057 else
3058 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x00 | 3058 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x00 |
3059 V_HDLC_TRP | V_IFF); 3059 V_HDLC_TRP | V_IFF);
3060 HFC_outb(hc, A_SUBCH_CFG, 0); 3060 HFC_outb(hc, A_SUBCH_CFG, 0);
3061 HFC_outb(hc, A_IRQ_MSK, 0); 3061 HFC_outb(hc, A_IRQ_MSK, 0);
3062 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); 3062 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);
@@ -3064,15 +3064,15 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3064 /* tx silence */ 3064 /* tx silence */
3065 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); 3065 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence);
3066 /* enable RX fifo */ 3066 /* enable RX fifo */
3067 HFC_outb(hc, R_FIFO, (ch<<1)|1); 3067 HFC_outb(hc, R_FIFO, (ch << 1) | 1);
3068 HFC_wait(hc); 3068 HFC_wait(hc);
3069 if (hc->ctype == HFC_TYPE_XHFC) 3069 if (hc->ctype == HFC_TYPE_XHFC)
3070 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x07 << 2 | 3070 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x07 << 2 |
3071 V_HDLC_TRP); 3071 V_HDLC_TRP);
3072 /* Enable FIFO, no interrupt*/ 3072 /* Enable FIFO, no interrupt*/
3073 else 3073 else
3074 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00 | 3074 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00 |
3075 V_HDLC_TRP); 3075 V_HDLC_TRP);
3076 HFC_outb(hc, A_SUBCH_CFG, 0); 3076 HFC_outb(hc, A_SUBCH_CFG, 0);
3077 HFC_outb(hc, A_IRQ_MSK, 0); 3077 HFC_outb(hc, A_IRQ_MSK, 0);
3078 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); 3078 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);
@@ -3080,16 +3080,16 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3080 } 3080 }
3081 if (hc->ctype != HFC_TYPE_E1) { 3081 if (hc->ctype != HFC_TYPE_E1) {
3082 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= 3082 hc->hw.a_st_ctrl0[hc->chan[ch].port] |=
3083 ((ch & 0x3) == 0) ? V_B1_EN : V_B2_EN; 3083 ((ch & 0x3) == 0) ? V_B1_EN : V_B2_EN;
3084 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); 3084 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port);
3085 /* undocumented: delay after R_ST_SEL */ 3085 /* undocumented: delay after R_ST_SEL */
3086 udelay(1); 3086 udelay(1);
3087 HFC_outb(hc, A_ST_CTRL0, 3087 HFC_outb(hc, A_ST_CTRL0,
3088 hc->hw.a_st_ctrl0[hc->chan[ch].port]); 3088 hc->hw.a_st_ctrl0[hc->chan[ch].port]);
3089 } 3089 }
3090 if (hc->chan[ch].bch) 3090 if (hc->chan[ch].bch)
3091 test_and_set_bit(FLG_TRANSPARENT, 3091 test_and_set_bit(FLG_TRANSPARENT,
3092 &hc->chan[ch].bch->Flags); 3092 &hc->chan[ch].bch->Flags);
3093 break; 3093 break;
3094 case (ISDN_P_B_HDLC): /* B-channel */ 3094 case (ISDN_P_B_HDLC): /* B-channel */
3095 case (ISDN_P_TE_S0): /* D-channel */ 3095 case (ISDN_P_TE_S0): /* D-channel */
@@ -3097,7 +3097,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3097 case (ISDN_P_TE_E1): 3097 case (ISDN_P_TE_E1):
3098 case (ISDN_P_NT_E1): 3098 case (ISDN_P_NT_E1):
3099 /* enable TX fifo */ 3099 /* enable TX fifo */
3100 HFC_outb(hc, R_FIFO, ch<<1); 3100 HFC_outb(hc, R_FIFO, ch << 1);
3101 HFC_wait(hc); 3101 HFC_wait(hc);
3102 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) { 3102 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) {
3103 /* E1 or B-channel */ 3103 /* E1 or B-channel */
@@ -3112,7 +3112,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3112 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); 3112 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);
3113 HFC_wait(hc); 3113 HFC_wait(hc);
3114 /* enable RX fifo */ 3114 /* enable RX fifo */
3115 HFC_outb(hc, R_FIFO, (ch<<1)|1); 3115 HFC_outb(hc, R_FIFO, (ch << 1) | 1);
3116 HFC_wait(hc); 3116 HFC_wait(hc);
3117 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x04); 3117 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x04);
3118 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) 3118 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch)
@@ -3126,18 +3126,18 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3126 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); 3126 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags);
3127 if (hc->ctype != HFC_TYPE_E1) { 3127 if (hc->ctype != HFC_TYPE_E1) {
3128 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= 3128 hc->hw.a_st_ctrl0[hc->chan[ch].port] |=
3129 ((ch&0x3) == 0) ? V_B1_EN : V_B2_EN; 3129 ((ch & 0x3) == 0) ? V_B1_EN : V_B2_EN;
3130 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); 3130 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port);
3131 /* undocumented: delay after R_ST_SEL */ 3131 /* undocumented: delay after R_ST_SEL */
3132 udelay(1); 3132 udelay(1);
3133 HFC_outb(hc, A_ST_CTRL0, 3133 HFC_outb(hc, A_ST_CTRL0,
3134 hc->hw.a_st_ctrl0[hc->chan[ch].port]); 3134 hc->hw.a_st_ctrl0[hc->chan[ch].port]);
3135 } 3135 }
3136 } 3136 }
3137 break; 3137 break;
3138 default: 3138 default:
3139 printk(KERN_DEBUG "%s: protocol not known %x\n", 3139 printk(KERN_DEBUG "%s: protocol not known %x\n",
3140 __func__, protocol); 3140 __func__, protocol);
3141 hc->chan[ch].protocol = ISDN_P_NONE; 3141 hc->chan[ch].protocol = ISDN_P_NONE;
3142 return -ENOPROTOOPT; 3142 return -ENOPROTOOPT;
3143 } 3143 }
@@ -3152,7 +3152,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3152 3152
3153static void 3153static void
3154hfcmulti_pcm(struct hfc_multi *hc, int ch, int slot_tx, int bank_tx, 3154hfcmulti_pcm(struct hfc_multi *hc, int ch, int slot_tx, int bank_tx,
3155 int slot_rx, int bank_rx) 3155 int slot_rx, int bank_rx)
3156{ 3156{
3157 if (slot_tx < 0 || slot_rx < 0 || bank_tx < 0 || bank_rx < 0) { 3157 if (slot_tx < 0 || slot_rx < 0 || bank_tx < 0 || bank_rx < 0) {
3158 /* disable PCM */ 3158 /* disable PCM */
@@ -3162,7 +3162,7 @@ hfcmulti_pcm(struct hfc_multi *hc, int ch, int slot_tx, int bank_tx,
3162 3162
3163 /* enable pcm */ 3163 /* enable pcm */
3164 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, slot_tx, bank_tx, 3164 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, slot_tx, bank_tx,
3165 slot_rx, bank_rx); 3165 slot_rx, bank_rx);
3166} 3166}
3167 3167
3168/* 3168/*
@@ -3177,8 +3177,8 @@ hfcmulti_conf(struct hfc_multi *hc, int ch, int num)
3177 else 3177 else
3178 hc->chan[ch].conf = -1; 3178 hc->chan[ch].conf = -1;
3179 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, hc->chan[ch].slot_tx, 3179 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, hc->chan[ch].slot_tx,
3180 hc->chan[ch].bank_tx, hc->chan[ch].slot_rx, 3180 hc->chan[ch].bank_tx, hc->chan[ch].slot_rx,
3181 hc->chan[ch].bank_rx); 3181 hc->chan[ch].bank_rx);
3182} 3182}
3183 3183
3184 3184
@@ -3207,8 +3207,8 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd)
3207 if (hc->ctype == HFC_TYPE_E1) { 3207 if (hc->ctype == HFC_TYPE_E1) {
3208 if (debug & DEBUG_HFCMULTI_MSG) 3208 if (debug & DEBUG_HFCMULTI_MSG)
3209 printk(KERN_DEBUG 3209 printk(KERN_DEBUG
3210 "%s: HW_RESET_REQ no BRI\n", 3210 "%s: HW_RESET_REQ no BRI\n",
3211 __func__); 3211 __func__);
3212 } else { 3212 } else {
3213 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); 3213 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port);
3214 /* undocumented: delay after R_ST_SEL */ 3214 /* undocumented: delay after R_ST_SEL */
@@ -3216,8 +3216,8 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd)
3216 HFC_outb(hc, A_ST_WR_STATE, V_ST_LD_STA | 3); /* F3 */ 3216 HFC_outb(hc, A_ST_WR_STATE, V_ST_LD_STA | 3); /* F3 */
3217 udelay(6); /* wait at least 5,21us */ 3217 udelay(6); /* wait at least 5,21us */
3218 HFC_outb(hc, A_ST_WR_STATE, 3); 3218 HFC_outb(hc, A_ST_WR_STATE, 3);
3219 HFC_outb(hc, A_ST_WR_STATE, 3 | (V_ST_ACT*3)); 3219 HFC_outb(hc, A_ST_WR_STATE, 3 | (V_ST_ACT * 3));
3220 /* activate */ 3220 /* activate */
3221 } 3221 }
3222 spin_unlock_irqrestore(&hc->lock, flags); 3222 spin_unlock_irqrestore(&hc->lock, flags);
3223 l1_event(dch->l1, HW_POWERUP_IND); 3223 l1_event(dch->l1, HW_POWERUP_IND);
@@ -3228,17 +3228,17 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd)
3228 if (hc->ctype == HFC_TYPE_E1) { 3228 if (hc->ctype == HFC_TYPE_E1) {
3229 if (debug & DEBUG_HFCMULTI_MSG) 3229 if (debug & DEBUG_HFCMULTI_MSG)
3230 printk(KERN_DEBUG 3230 printk(KERN_DEBUG
3231 "%s: HW_DEACT_REQ no BRI\n", 3231 "%s: HW_DEACT_REQ no BRI\n",
3232 __func__); 3232 __func__);
3233 } else { 3233 } else {
3234 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); 3234 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port);
3235 /* undocumented: delay after R_ST_SEL */ 3235 /* undocumented: delay after R_ST_SEL */
3236 udelay(1); 3236 udelay(1);
3237 HFC_outb(hc, A_ST_WR_STATE, V_ST_ACT*2); 3237 HFC_outb(hc, A_ST_WR_STATE, V_ST_ACT * 2);
3238 /* deactivate */ 3238 /* deactivate */
3239 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 3239 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
3240 hc->syncronized &= 3240 hc->syncronized &=
3241 ~(1 << hc->chan[dch->slot].port); 3241 ~(1 << hc->chan[dch->slot].port);
3242 plxsd_checksync(hc, 0); 3242 plxsd_checksync(hc, 0);
3243 } 3243 }
3244 } 3244 }
@@ -3262,8 +3262,8 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd)
3262 if (hc->ctype == HFC_TYPE_E1) { 3262 if (hc->ctype == HFC_TYPE_E1) {
3263 if (debug & DEBUG_HFCMULTI_MSG) 3263 if (debug & DEBUG_HFCMULTI_MSG)
3264 printk(KERN_DEBUG 3264 printk(KERN_DEBUG
3265 "%s: HW_POWERUP_REQ no BRI\n", 3265 "%s: HW_POWERUP_REQ no BRI\n",
3266 __func__); 3266 __func__);
3267 } else { 3267 } else {
3268 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); 3268 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port);
3269 /* undocumented: delay after R_ST_SEL */ 3269 /* undocumented: delay after R_ST_SEL */
@@ -3277,17 +3277,17 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd)
3277 case PH_ACTIVATE_IND: 3277 case PH_ACTIVATE_IND:
3278 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 3278 test_and_set_bit(FLG_ACTIVE, &dch->Flags);
3279 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 3279 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
3280 GFP_ATOMIC); 3280 GFP_ATOMIC);
3281 break; 3281 break;
3282 case PH_DEACTIVATE_IND: 3282 case PH_DEACTIVATE_IND:
3283 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 3283 test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
3284 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 3284 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
3285 GFP_ATOMIC); 3285 GFP_ATOMIC);
3286 break; 3286 break;
3287 default: 3287 default:
3288 if (dch->debug & DEBUG_HW) 3288 if (dch->debug & DEBUG_HW)
3289 printk(KERN_DEBUG "%s: unknown command %x\n", 3289 printk(KERN_DEBUG "%s: unknown command %x\n",
3290 __func__, cmd); 3290 __func__, cmd);
3291 return -1; 3291 return -1;
3292 } 3292 }
3293 return 0; 3293 return 0;
@@ -3332,27 +3332,27 @@ handle_dmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3332 ret = 0; 3332 ret = 0;
3333 if (debug & DEBUG_HFCMULTI_MSG) 3333 if (debug & DEBUG_HFCMULTI_MSG)
3334 printk(KERN_DEBUG 3334 printk(KERN_DEBUG
3335 "%s: PH_ACTIVATE port %d (0..%d)\n", 3335 "%s: PH_ACTIVATE port %d (0..%d)\n",
3336 __func__, hc->chan[dch->slot].port, 3336 __func__, hc->chan[dch->slot].port,
3337 hc->ports-1); 3337 hc->ports - 1);
3338 /* start activation */ 3338 /* start activation */
3339 if (hc->ctype == HFC_TYPE_E1) { 3339 if (hc->ctype == HFC_TYPE_E1) {
3340 ph_state_change(dch); 3340 ph_state_change(dch);
3341 if (debug & DEBUG_HFCMULTI_STATE) 3341 if (debug & DEBUG_HFCMULTI_STATE)
3342 printk(KERN_DEBUG 3342 printk(KERN_DEBUG
3343 "%s: E1 report state %x \n", 3343 "%s: E1 report state %x \n",
3344 __func__, dch->state); 3344 __func__, dch->state);
3345 } else { 3345 } else {
3346 HFC_outb(hc, R_ST_SEL, 3346 HFC_outb(hc, R_ST_SEL,
3347 hc->chan[dch->slot].port); 3347 hc->chan[dch->slot].port);
3348 /* undocumented: delay after R_ST_SEL */ 3348 /* undocumented: delay after R_ST_SEL */
3349 udelay(1); 3349 udelay(1);
3350 HFC_outb(hc, A_ST_WR_STATE, V_ST_LD_STA | 1); 3350 HFC_outb(hc, A_ST_WR_STATE, V_ST_LD_STA | 1);
3351 /* G1 */ 3351 /* G1 */
3352 udelay(6); /* wait at least 5,21us */ 3352 udelay(6); /* wait at least 5,21us */
3353 HFC_outb(hc, A_ST_WR_STATE, 1); 3353 HFC_outb(hc, A_ST_WR_STATE, 1);
3354 HFC_outb(hc, A_ST_WR_STATE, 1 | 3354 HFC_outb(hc, A_ST_WR_STATE, 1 |
3355 (V_ST_ACT*3)); /* activate */ 3355 (V_ST_ACT * 3)); /* activate */
3356 dch->state = 1; 3356 dch->state = 1;
3357 } 3357 }
3358 spin_unlock_irqrestore(&hc->lock, flags); 3358 spin_unlock_irqrestore(&hc->lock, flags);
@@ -3365,22 +3365,22 @@ handle_dmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3365 spin_lock_irqsave(&hc->lock, flags); 3365 spin_lock_irqsave(&hc->lock, flags);
3366 if (debug & DEBUG_HFCMULTI_MSG) 3366 if (debug & DEBUG_HFCMULTI_MSG)
3367 printk(KERN_DEBUG 3367 printk(KERN_DEBUG
3368 "%s: PH_DEACTIVATE port %d (0..%d)\n", 3368 "%s: PH_DEACTIVATE port %d (0..%d)\n",
3369 __func__, hc->chan[dch->slot].port, 3369 __func__, hc->chan[dch->slot].port,
3370 hc->ports-1); 3370 hc->ports - 1);
3371 /* start deactivation */ 3371 /* start deactivation */
3372 if (hc->ctype == HFC_TYPE_E1) { 3372 if (hc->ctype == HFC_TYPE_E1) {
3373 if (debug & DEBUG_HFCMULTI_MSG) 3373 if (debug & DEBUG_HFCMULTI_MSG)
3374 printk(KERN_DEBUG 3374 printk(KERN_DEBUG
3375 "%s: PH_DEACTIVATE no BRI\n", 3375 "%s: PH_DEACTIVATE no BRI\n",
3376 __func__); 3376 __func__);
3377 } else { 3377 } else {
3378 HFC_outb(hc, R_ST_SEL, 3378 HFC_outb(hc, R_ST_SEL,
3379 hc->chan[dch->slot].port); 3379 hc->chan[dch->slot].port);
3380 /* undocumented: delay after R_ST_SEL */ 3380 /* undocumented: delay after R_ST_SEL */
3381 udelay(1); 3381 udelay(1);
3382 HFC_outb(hc, A_ST_WR_STATE, V_ST_ACT * 2); 3382 HFC_outb(hc, A_ST_WR_STATE, V_ST_ACT * 2);
3383 /* deactivate */ 3383 /* deactivate */
3384 dch->state = 1; 3384 dch->state = 1;
3385 } 3385 }
3386 skb_queue_purge(&dch->squeue); 3386 skb_queue_purge(&dch->squeue);
@@ -3460,28 +3460,28 @@ handle_bmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3460 case PH_ACTIVATE_REQ: 3460 case PH_ACTIVATE_REQ:
3461 if (debug & DEBUG_HFCMULTI_MSG) 3461 if (debug & DEBUG_HFCMULTI_MSG)
3462 printk(KERN_DEBUG "%s: PH_ACTIVATE ch %d (0..32)\n", 3462 printk(KERN_DEBUG "%s: PH_ACTIVATE ch %d (0..32)\n",
3463 __func__, bch->slot); 3463 __func__, bch->slot);
3464 spin_lock_irqsave(&hc->lock, flags); 3464 spin_lock_irqsave(&hc->lock, flags);
3465 /* activate B-channel if not already activated */ 3465 /* activate B-channel if not already activated */
3466 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) { 3466 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) {
3467 hc->chan[bch->slot].txpending = 0; 3467 hc->chan[bch->slot].txpending = 0;
3468 ret = mode_hfcmulti(hc, bch->slot, 3468 ret = mode_hfcmulti(hc, bch->slot,
3469 ch->protocol, 3469 ch->protocol,
3470 hc->chan[bch->slot].slot_tx, 3470 hc->chan[bch->slot].slot_tx,
3471 hc->chan[bch->slot].bank_tx, 3471 hc->chan[bch->slot].bank_tx,
3472 hc->chan[bch->slot].slot_rx, 3472 hc->chan[bch->slot].slot_rx,
3473 hc->chan[bch->slot].bank_rx); 3473 hc->chan[bch->slot].bank_rx);
3474 if (!ret) { 3474 if (!ret) {
3475 if (ch->protocol == ISDN_P_B_RAW && !hc->dtmf 3475 if (ch->protocol == ISDN_P_B_RAW && !hc->dtmf
3476 && test_bit(HFC_CHIP_DTMF, &hc->chip)) { 3476 && test_bit(HFC_CHIP_DTMF, &hc->chip)) {
3477 /* start decoder */ 3477 /* start decoder */
3478 hc->dtmf = 1; 3478 hc->dtmf = 1;
3479 if (debug & DEBUG_HFCMULTI_DTMF) 3479 if (debug & DEBUG_HFCMULTI_DTMF)
3480 printk(KERN_DEBUG 3480 printk(KERN_DEBUG
3481 "%s: start dtmf decoder\n", 3481 "%s: start dtmf decoder\n",
3482 __func__); 3482 __func__);
3483 HFC_outb(hc, R_DTMF, hc->hw.r_dtmf | 3483 HFC_outb(hc, R_DTMF, hc->hw.r_dtmf |
3484 V_RST_DTMF); 3484 V_RST_DTMF);
3485 } 3485 }
3486 } 3486 }
3487 } else 3487 } else
@@ -3489,7 +3489,7 @@ handle_bmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3489 spin_unlock_irqrestore(&hc->lock, flags); 3489 spin_unlock_irqrestore(&hc->lock, flags);
3490 if (!ret) 3490 if (!ret)
3491 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, NULL, 3491 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, NULL,
3492 GFP_KERNEL); 3492 GFP_KERNEL);
3493 break; 3493 break;
3494 case PH_CONTROL_REQ: 3494 case PH_CONTROL_REQ:
3495 spin_lock_irqsave(&hc->lock, flags); 3495 spin_lock_irqsave(&hc->lock, flags);
@@ -3497,20 +3497,20 @@ handle_bmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3497 case HFC_SPL_LOOP_ON: /* set sample loop */ 3497 case HFC_SPL_LOOP_ON: /* set sample loop */
3498 if (debug & DEBUG_HFCMULTI_MSG) 3498 if (debug & DEBUG_HFCMULTI_MSG)
3499 printk(KERN_DEBUG 3499 printk(KERN_DEBUG
3500 "%s: HFC_SPL_LOOP_ON (len = %d)\n", 3500 "%s: HFC_SPL_LOOP_ON (len = %d)\n",
3501 __func__, skb->len); 3501 __func__, skb->len);
3502 ret = 0; 3502 ret = 0;
3503 break; 3503 break;
3504 case HFC_SPL_LOOP_OFF: /* set silence */ 3504 case HFC_SPL_LOOP_OFF: /* set silence */
3505 if (debug & DEBUG_HFCMULTI_MSG) 3505 if (debug & DEBUG_HFCMULTI_MSG)
3506 printk(KERN_DEBUG "%s: HFC_SPL_LOOP_OFF\n", 3506 printk(KERN_DEBUG "%s: HFC_SPL_LOOP_OFF\n",
3507 __func__); 3507 __func__);
3508 ret = 0; 3508 ret = 0;
3509 break; 3509 break;
3510 default: 3510 default:
3511 printk(KERN_ERR 3511 printk(KERN_ERR
3512 "%s: unknown PH_CONTROL_REQ info %x\n", 3512 "%s: unknown PH_CONTROL_REQ info %x\n",
3513 __func__, hh->id); 3513 __func__, hh->id);
3514 ret = -EINVAL; 3514 ret = -EINVAL;
3515 } 3515 }
3516 spin_unlock_irqrestore(&hc->lock, flags); 3516 spin_unlock_irqrestore(&hc->lock, flags);
@@ -3518,7 +3518,7 @@ handle_bmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3518 case PH_DEACTIVATE_REQ: 3518 case PH_DEACTIVATE_REQ:
3519 deactivate_bchannel(bch); /* locked there */ 3519 deactivate_bchannel(bch); /* locked there */
3520 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, NULL, 3520 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, NULL,
3521 GFP_KERNEL); 3521 GFP_KERNEL);
3522 ret = 0; 3522 ret = 0;
3523 break; 3523 break;
3524 } 3524 }
@@ -3559,18 +3559,18 @@ channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
3559 } 3559 }
3560 if (debug & DEBUG_HFCMULTI_MSG) 3560 if (debug & DEBUG_HFCMULTI_MSG)
3561 printk(KERN_DEBUG "%s: RX_OFF request (nr=%d off=%d)\n", 3561 printk(KERN_DEBUG "%s: RX_OFF request (nr=%d off=%d)\n",
3562 __func__, bch->nr, hc->chan[bch->slot].rx_off); 3562 __func__, bch->nr, hc->chan[bch->slot].rx_off);
3563 break; 3563 break;
3564 case MISDN_CTRL_FILL_EMPTY: /* fill fifo, if empty */ 3564 case MISDN_CTRL_FILL_EMPTY: /* fill fifo, if empty */
3565 test_and_set_bit(FLG_FILLEMPTY, &bch->Flags); 3565 test_and_set_bit(FLG_FILLEMPTY, &bch->Flags);
3566 if (debug & DEBUG_HFCMULTI_MSG) 3566 if (debug & DEBUG_HFCMULTI_MSG)
3567 printk(KERN_DEBUG "%s: FILL_EMPTY request (nr=%d " 3567 printk(KERN_DEBUG "%s: FILL_EMPTY request (nr=%d "
3568 "off=%d)\n", __func__, bch->nr, !!cq->p1); 3568 "off=%d)\n", __func__, bch->nr, !!cq->p1);
3569 break; 3569 break;
3570 case MISDN_CTRL_HW_FEATURES: /* fill features structure */ 3570 case MISDN_CTRL_HW_FEATURES: /* fill features structure */
3571 if (debug & DEBUG_HFCMULTI_MSG) 3571 if (debug & DEBUG_HFCMULTI_MSG)
3572 printk(KERN_DEBUG "%s: HW_FEATURE request\n", 3572 printk(KERN_DEBUG "%s: HW_FEATURE request\n",
3573 __func__); 3573 __func__);
3574 /* create confirm */ 3574 /* create confirm */
3575 features->hfc_id = hc->id; 3575 features->hfc_id = hc->id;
3576 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) 3576 if (test_bit(HFC_CHIP_DTMF, &hc->chip))
@@ -3593,40 +3593,40 @@ channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
3593 bank_rx = cq->p2 >> 8; 3593 bank_rx = cq->p2 >> 8;
3594 if (debug & DEBUG_HFCMULTI_MSG) 3594 if (debug & DEBUG_HFCMULTI_MSG)
3595 printk(KERN_DEBUG 3595 printk(KERN_DEBUG
3596 "%s: HFC_PCM_CONN slot %d bank %d (TX) " 3596 "%s: HFC_PCM_CONN slot %d bank %d (TX) "
3597 "slot %d bank %d (RX)\n", 3597 "slot %d bank %d (RX)\n",
3598 __func__, slot_tx, bank_tx, 3598 __func__, slot_tx, bank_tx,
3599 slot_rx, bank_rx); 3599 slot_rx, bank_rx);
3600 if (slot_tx < hc->slots && bank_tx <= 2 && 3600 if (slot_tx < hc->slots && bank_tx <= 2 &&
3601 slot_rx < hc->slots && bank_rx <= 2) 3601 slot_rx < hc->slots && bank_rx <= 2)
3602 hfcmulti_pcm(hc, bch->slot, 3602 hfcmulti_pcm(hc, bch->slot,
3603 slot_tx, bank_tx, slot_rx, bank_rx); 3603 slot_tx, bank_tx, slot_rx, bank_rx);
3604 else { 3604 else {
3605 printk(KERN_WARNING 3605 printk(KERN_WARNING
3606 "%s: HFC_PCM_CONN slot %d bank %d (TX) " 3606 "%s: HFC_PCM_CONN slot %d bank %d (TX) "
3607 "slot %d bank %d (RX) out of range\n", 3607 "slot %d bank %d (RX) out of range\n",
3608 __func__, slot_tx, bank_tx, 3608 __func__, slot_tx, bank_tx,
3609 slot_rx, bank_rx); 3609 slot_rx, bank_rx);
3610 ret = -EINVAL; 3610 ret = -EINVAL;
3611 } 3611 }
3612 break; 3612 break;
3613 case MISDN_CTRL_HFC_PCM_DISC: /* release interface from pcm timeslot */ 3613 case MISDN_CTRL_HFC_PCM_DISC: /* release interface from pcm timeslot */
3614 if (debug & DEBUG_HFCMULTI_MSG) 3614 if (debug & DEBUG_HFCMULTI_MSG)
3615 printk(KERN_DEBUG "%s: HFC_PCM_DISC\n", 3615 printk(KERN_DEBUG "%s: HFC_PCM_DISC\n",
3616 __func__); 3616 __func__);
3617 hfcmulti_pcm(hc, bch->slot, -1, 0, -1, 0); 3617 hfcmulti_pcm(hc, bch->slot, -1, 0, -1, 0);
3618 break; 3618 break;
3619 case MISDN_CTRL_HFC_CONF_JOIN: /* join conference (0..7) */ 3619 case MISDN_CTRL_HFC_CONF_JOIN: /* join conference (0..7) */
3620 num = cq->p1 & 0xff; 3620 num = cq->p1 & 0xff;
3621 if (debug & DEBUG_HFCMULTI_MSG) 3621 if (debug & DEBUG_HFCMULTI_MSG)
3622 printk(KERN_DEBUG "%s: HFC_CONF_JOIN conf %d\n", 3622 printk(KERN_DEBUG "%s: HFC_CONF_JOIN conf %d\n",
3623 __func__, num); 3623 __func__, num);
3624 if (num <= 7) 3624 if (num <= 7)
3625 hfcmulti_conf(hc, bch->slot, num); 3625 hfcmulti_conf(hc, bch->slot, num);
3626 else { 3626 else {
3627 printk(KERN_WARNING 3627 printk(KERN_WARNING
3628 "%s: HW_CONF_JOIN conf %d out of range\n", 3628 "%s: HW_CONF_JOIN conf %d out of range\n",
3629 __func__, num); 3629 __func__, num);
3630 ret = -EINVAL; 3630 ret = -EINVAL;
3631 } 3631 }
3632 break; 3632 break;
@@ -3647,7 +3647,7 @@ channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
3647 case MISDN_CTRL_HFC_ECHOCAN_OFF: 3647 case MISDN_CTRL_HFC_ECHOCAN_OFF:
3648 if (debug & DEBUG_HFCMULTI_MSG) 3648 if (debug & DEBUG_HFCMULTI_MSG)
3649 printk(KERN_DEBUG "%s: HFC_ECHOCAN_OFF\n", 3649 printk(KERN_DEBUG "%s: HFC_ECHOCAN_OFF\n",
3650 __func__); 3650 __func__);
3651 if (test_bit(HFC_CHIP_B410P, &hc->chip)) 3651 if (test_bit(HFC_CHIP_B410P, &hc->chip))
3652 vpm_echocan_off(hc, bch->slot); 3652 vpm_echocan_off(hc, bch->slot);
3653 else 3653 else
@@ -3655,7 +3655,7 @@ channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
3655 break; 3655 break;
3656 default: 3656 default:
3657 printk(KERN_WARNING "%s: unknown Op %x\n", 3657 printk(KERN_WARNING "%s: unknown Op %x\n",
3658 __func__, cq->op); 3658 __func__, cq->op);
3659 ret = -EINVAL; 3659 ret = -EINVAL;
3660 break; 3660 break;
3661 } 3661 }
@@ -3672,7 +3672,7 @@ hfcm_bctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
3672 3672
3673 if (bch->debug & DEBUG_HW) 3673 if (bch->debug & DEBUG_HW)
3674 printk(KERN_DEBUG "%s: cmd:%x %p\n", 3674 printk(KERN_DEBUG "%s: cmd:%x %p\n",
3675 __func__, cmd, arg); 3675 __func__, cmd, arg);
3676 switch (cmd) { 3676 switch (cmd) {
3677 case CLOSE_CHANNEL: 3677 case CLOSE_CHANNEL:
3678 test_and_clear_bit(FLG_OPEN, &bch->Flags); 3678 test_and_clear_bit(FLG_OPEN, &bch->Flags);
@@ -3690,7 +3690,7 @@ hfcm_bctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
3690 break; 3690 break;
3691 default: 3691 default:
3692 printk(KERN_WARNING "%s: unknown prim(%x)\n", 3692 printk(KERN_WARNING "%s: unknown prim(%x)\n",
3693 __func__, cmd); 3693 __func__, cmd);
3694 } 3694 }
3695 return err; 3695 return err;
3696} 3696}
@@ -3717,13 +3717,13 @@ ph_state_change(struct dchannel *dch)
3717 if (dch->dev.D.protocol == ISDN_P_TE_E1) { 3717 if (dch->dev.D.protocol == ISDN_P_TE_E1) {
3718 if (debug & DEBUG_HFCMULTI_STATE) 3718 if (debug & DEBUG_HFCMULTI_STATE)
3719 printk(KERN_DEBUG 3719 printk(KERN_DEBUG
3720 "%s: E1 TE (id=%d) newstate %x\n", 3720 "%s: E1 TE (id=%d) newstate %x\n",
3721 __func__, hc->id, dch->state); 3721 __func__, hc->id, dch->state);
3722 } else { 3722 } else {
3723 if (debug & DEBUG_HFCMULTI_STATE) 3723 if (debug & DEBUG_HFCMULTI_STATE)
3724 printk(KERN_DEBUG 3724 printk(KERN_DEBUG
3725 "%s: E1 NT (id=%d) newstate %x\n", 3725 "%s: E1 NT (id=%d) newstate %x\n",
3726 __func__, hc->id, dch->state); 3726 __func__, hc->id, dch->state);
3727 } 3727 }
3728 switch (dch->state) { 3728 switch (dch->state) {
3729 case (1): 3729 case (1):
@@ -3731,16 +3731,16 @@ ph_state_change(struct dchannel *dch)
3731 for (i = 1; i <= 31; i++) { 3731 for (i = 1; i <= 31; i++) {
3732 /* reset fifos on e1 activation */ 3732 /* reset fifos on e1 activation */
3733 HFC_outb_nodebug(hc, R_FIFO, 3733 HFC_outb_nodebug(hc, R_FIFO,
3734 (i << 1) | 1); 3734 (i << 1) | 1);
3735 HFC_wait_nodebug(hc); 3735 HFC_wait_nodebug(hc);
3736 HFC_outb_nodebug(hc, R_INC_RES_FIFO, 3736 HFC_outb_nodebug(hc, R_INC_RES_FIFO,
3737 V_RES_F); 3737 V_RES_F);
3738 HFC_wait_nodebug(hc); 3738 HFC_wait_nodebug(hc);
3739 } 3739 }
3740 } 3740 }
3741 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 3741 test_and_set_bit(FLG_ACTIVE, &dch->Flags);
3742 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, 3742 _queue_data(&dch->dev.D, PH_ACTIVATE_IND,
3743 MISDN_ID_ANY, 0, NULL, GFP_ATOMIC); 3743 MISDN_ID_ANY, 0, NULL, GFP_ATOMIC);
3744 break; 3744 break;
3745 3745
3746 default: 3746 default:
@@ -3748,15 +3748,15 @@ ph_state_change(struct dchannel *dch)
3748 return; 3748 return;
3749 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 3749 test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
3750 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, 3750 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND,
3751 MISDN_ID_ANY, 0, NULL, GFP_ATOMIC); 3751 MISDN_ID_ANY, 0, NULL, GFP_ATOMIC);
3752 } 3752 }
3753 hc->e1_state = dch->state; 3753 hc->e1_state = dch->state;
3754 } else { 3754 } else {
3755 if (dch->dev.D.protocol == ISDN_P_TE_S0) { 3755 if (dch->dev.D.protocol == ISDN_P_TE_S0) {
3756 if (debug & DEBUG_HFCMULTI_STATE) 3756 if (debug & DEBUG_HFCMULTI_STATE)
3757 printk(KERN_DEBUG 3757 printk(KERN_DEBUG
3758 "%s: S/T TE newstate %x\n", 3758 "%s: S/T TE newstate %x\n",
3759 __func__, dch->state); 3759 __func__, dch->state);
3760 switch (dch->state) { 3760 switch (dch->state) {
3761 case (0): 3761 case (0):
3762 l1_event(dch->l1, HW_RESET_IND); 3762 l1_event(dch->l1, HW_RESET_IND);
@@ -3778,38 +3778,38 @@ ph_state_change(struct dchannel *dch)
3778 } else { 3778 } else {
3779 if (debug & DEBUG_HFCMULTI_STATE) 3779 if (debug & DEBUG_HFCMULTI_STATE)
3780 printk(KERN_DEBUG "%s: S/T NT newstate %x\n", 3780 printk(KERN_DEBUG "%s: S/T NT newstate %x\n",
3781 __func__, dch->state); 3781 __func__, dch->state);
3782 switch (dch->state) { 3782 switch (dch->state) {
3783 case (2): 3783 case (2):
3784 if (hc->chan[ch].nt_timer == 0) { 3784 if (hc->chan[ch].nt_timer == 0) {
3785 hc->chan[ch].nt_timer = -1; 3785 hc->chan[ch].nt_timer = -1;
3786 HFC_outb(hc, R_ST_SEL, 3786 HFC_outb(hc, R_ST_SEL,
3787 hc->chan[ch].port); 3787 hc->chan[ch].port);
3788 /* undocumented: delay after R_ST_SEL */ 3788 /* undocumented: delay after R_ST_SEL */
3789 udelay(1); 3789 udelay(1);
3790 HFC_outb(hc, A_ST_WR_STATE, 4 | 3790 HFC_outb(hc, A_ST_WR_STATE, 4 |
3791 V_ST_LD_STA); /* G4 */ 3791 V_ST_LD_STA); /* G4 */
3792 udelay(6); /* wait at least 5,21us */ 3792 udelay(6); /* wait at least 5,21us */
3793 HFC_outb(hc, A_ST_WR_STATE, 4); 3793 HFC_outb(hc, A_ST_WR_STATE, 4);
3794 dch->state = 4; 3794 dch->state = 4;
3795 } else { 3795 } else {
3796 /* one extra count for the next event */ 3796 /* one extra count for the next event */
3797 hc->chan[ch].nt_timer = 3797 hc->chan[ch].nt_timer =
3798 nt_t1_count[poll_timer] + 1; 3798 nt_t1_count[poll_timer] + 1;
3799 HFC_outb(hc, R_ST_SEL, 3799 HFC_outb(hc, R_ST_SEL,
3800 hc->chan[ch].port); 3800 hc->chan[ch].port);
3801 /* undocumented: delay after R_ST_SEL */ 3801 /* undocumented: delay after R_ST_SEL */
3802 udelay(1); 3802 udelay(1);
3803 /* allow G2 -> G3 transition */ 3803 /* allow G2 -> G3 transition */
3804 HFC_outb(hc, A_ST_WR_STATE, 2 | 3804 HFC_outb(hc, A_ST_WR_STATE, 2 |
3805 V_SET_G2_G3); 3805 V_SET_G2_G3);
3806 } 3806 }
3807 break; 3807 break;
3808 case (1): 3808 case (1):
3809 hc->chan[ch].nt_timer = -1; 3809 hc->chan[ch].nt_timer = -1;
3810 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 3810 test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
3811 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, 3811 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND,
3812 MISDN_ID_ANY, 0, NULL, GFP_ATOMIC); 3812 MISDN_ID_ANY, 0, NULL, GFP_ATOMIC);
3813 break; 3813 break;
3814 case (4): 3814 case (4):
3815 hc->chan[ch].nt_timer = -1; 3815 hc->chan[ch].nt_timer = -1;
@@ -3818,7 +3818,7 @@ ph_state_change(struct dchannel *dch)
3818 hc->chan[ch].nt_timer = -1; 3818 hc->chan[ch].nt_timer = -1;
3819 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 3819 test_and_set_bit(FLG_ACTIVE, &dch->Flags);
3820 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, 3820 _queue_data(&dch->dev.D, PH_ACTIVATE_IND,
3821 MISDN_ID_ANY, 0, NULL, GFP_ATOMIC); 3821 MISDN_ID_ANY, 0, NULL, GFP_ATOMIC);
3822 break; 3822 break;
3823 } 3823 }
3824 } 3824 }
@@ -3845,7 +3845,7 @@ hfcmulti_initmode(struct dchannel *dch)
3845 hc->chan[hc->dslot].conf = -1; 3845 hc->chan[hc->dslot].conf = -1;
3846 if (hc->dslot) { 3846 if (hc->dslot) {
3847 mode_hfcmulti(hc, hc->dslot, dch->dev.D.protocol, 3847 mode_hfcmulti(hc, hc->dslot, dch->dev.D.protocol,
3848 -1, 0, -1, 0); 3848 -1, 0, -1, 0);
3849 dch->timer.function = (void *) hfcmulti_dbusy_timer; 3849 dch->timer.function = (void *) hfcmulti_dbusy_timer;
3850 dch->timer.data = (long) dch; 3850 dch->timer.data = (long) dch;
3851 init_timer(&dch->timer); 3851 init_timer(&dch->timer);
@@ -3887,13 +3887,13 @@ hfcmulti_initmode(struct dchannel *dch)
3887 if (dch->dev.D.protocol == ISDN_P_NT_E1) { 3887 if (dch->dev.D.protocol == ISDN_P_NT_E1) {
3888 if (debug & DEBUG_HFCMULTI_INIT) 3888 if (debug & DEBUG_HFCMULTI_INIT)
3889 printk(KERN_DEBUG "%s: E1 port is NT-mode\n", 3889 printk(KERN_DEBUG "%s: E1 port is NT-mode\n",
3890 __func__); 3890 __func__);
3891 r_e1_wr_sta = 0; /* G0 */ 3891 r_e1_wr_sta = 0; /* G0 */
3892 hc->e1_getclock = 0; 3892 hc->e1_getclock = 0;
3893 } else { 3893 } else {
3894 if (debug & DEBUG_HFCMULTI_INIT) 3894 if (debug & DEBUG_HFCMULTI_INIT)
3895 printk(KERN_DEBUG "%s: E1 port is TE-mode\n", 3895 printk(KERN_DEBUG "%s: E1 port is TE-mode\n",
3896 __func__); 3896 __func__);
3897 r_e1_wr_sta = 0; /* F0 */ 3897 r_e1_wr_sta = 0; /* F0 */
3898 hc->e1_getclock = 1; 3898 hc->e1_getclock = 1;
3899 } 3899 }
@@ -3909,26 +3909,26 @@ hfcmulti_initmode(struct dchannel *dch)
3909 /* SLAVE (clock master) */ 3909 /* SLAVE (clock master) */
3910 if (debug & DEBUG_HFCMULTI_INIT) 3910 if (debug & DEBUG_HFCMULTI_INIT)
3911 printk(KERN_DEBUG 3911 printk(KERN_DEBUG
3912 "%s: E1 port is clock master " 3912 "%s: E1 port is clock master "
3913 "(clock from PCM)\n", __func__); 3913 "(clock from PCM)\n", __func__);
3914 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC | V_PCM_SYNC); 3914 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC | V_PCM_SYNC);
3915 } else { 3915 } else {
3916 if (hc->e1_getclock) { 3916 if (hc->e1_getclock) {
3917 /* MASTER (clock slave) */ 3917 /* MASTER (clock slave) */
3918 if (debug & DEBUG_HFCMULTI_INIT) 3918 if (debug & DEBUG_HFCMULTI_INIT)
3919 printk(KERN_DEBUG 3919 printk(KERN_DEBUG
3920 "%s: E1 port is clock slave " 3920 "%s: E1 port is clock slave "
3921 "(clock to PCM)\n", __func__); 3921 "(clock to PCM)\n", __func__);
3922 HFC_outb(hc, R_SYNC_CTRL, V_SYNC_OFFS); 3922 HFC_outb(hc, R_SYNC_CTRL, V_SYNC_OFFS);
3923 } else { 3923 } else {
3924 /* MASTER (clock master) */ 3924 /* MASTER (clock master) */
3925 if (debug & DEBUG_HFCMULTI_INIT) 3925 if (debug & DEBUG_HFCMULTI_INIT)
3926 printk(KERN_DEBUG "%s: E1 port is " 3926 printk(KERN_DEBUG "%s: E1 port is "
3927 "clock master " 3927 "clock master "
3928 "(clock from QUARTZ)\n", 3928 "(clock from QUARTZ)\n",
3929 __func__); 3929 __func__);
3930 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC | 3930 HFC_outb(hc, R_SYNC_CTRL, V_EXT_CLK_SYNC |
3931 V_PCM_SYNC | V_JATT_OFF); 3931 V_PCM_SYNC | V_JATT_OFF);
3932 HFC_outb(hc, R_SYNC_OUT, 0); 3932 HFC_outb(hc, R_SYNC_OUT, 0);
3933 } 3933 }
3934 } 3934 }
@@ -3970,8 +3970,8 @@ hfcmulti_initmode(struct dchannel *dch)
3970 if (dch->dev.D.protocol == ISDN_P_NT_S0) { 3970 if (dch->dev.D.protocol == ISDN_P_NT_S0) {
3971 if (debug & DEBUG_HFCMULTI_INIT) 3971 if (debug & DEBUG_HFCMULTI_INIT)
3972 printk(KERN_DEBUG 3972 printk(KERN_DEBUG
3973 "%s: ST port %d is NT-mode\n", 3973 "%s: ST port %d is NT-mode\n",
3974 __func__, pt); 3974 __func__, pt);
3975 /* clock delay */ 3975 /* clock delay */
3976 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_nt); 3976 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_nt);
3977 a_st_wr_state = 1; /* G1 */ 3977 a_st_wr_state = 1; /* G1 */
@@ -3979,8 +3979,8 @@ hfcmulti_initmode(struct dchannel *dch)
3979 } else { 3979 } else {
3980 if (debug & DEBUG_HFCMULTI_INIT) 3980 if (debug & DEBUG_HFCMULTI_INIT)
3981 printk(KERN_DEBUG 3981 printk(KERN_DEBUG
3982 "%s: ST port %d is TE-mode\n", 3982 "%s: ST port %d is TE-mode\n",
3983 __func__, pt); 3983 __func__, pt);
3984 /* clock delay */ 3984 /* clock delay */
3985 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_te); 3985 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_te);
3986 a_st_wr_state = 2; /* F2 */ 3986 a_st_wr_state = 2; /* F2 */
@@ -3991,7 +3991,7 @@ hfcmulti_initmode(struct dchannel *dch)
3991 if (hc->ctype == HFC_TYPE_XHFC) { 3991 if (hc->ctype == HFC_TYPE_XHFC) {
3992 hc->hw.a_st_ctrl0[pt] |= 0x40 /* V_ST_PU_CTRL */; 3992 hc->hw.a_st_ctrl0[pt] |= 0x40 /* V_ST_PU_CTRL */;
3993 HFC_outb(hc, 0x35 /* A_ST_CTRL3 */, 3993 HFC_outb(hc, 0x35 /* A_ST_CTRL3 */,
3994 0x7c << 1 /* V_ST_PULSE */); 3994 0x7c << 1 /* V_ST_PULSE */);
3995 } 3995 }
3996 /* line setup */ 3996 /* line setup */
3997 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]); 3997 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]);
@@ -4013,7 +4013,7 @@ hfcmulti_initmode(struct dchannel *dch)
4013 /* unset sync on port */ 4013 /* unset sync on port */
4014 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 4014 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
4015 hc->syncronized &= 4015 hc->syncronized &=
4016 ~(1 << hc->chan[dch->slot].port); 4016 ~(1 << hc->chan[dch->slot].port);
4017 plxsd_checksync(hc, 0); 4017 plxsd_checksync(hc, 0);
4018 } 4018 }
4019 } 4019 }
@@ -4024,21 +4024,21 @@ hfcmulti_initmode(struct dchannel *dch)
4024 4024
4025static int 4025static int
4026open_dchannel(struct hfc_multi *hc, struct dchannel *dch, 4026open_dchannel(struct hfc_multi *hc, struct dchannel *dch,
4027 struct channel_req *rq) 4027 struct channel_req *rq)
4028{ 4028{
4029 int err = 0; 4029 int err = 0;
4030 u_long flags; 4030 u_long flags;
4031 4031
4032 if (debug & DEBUG_HW_OPEN) 4032 if (debug & DEBUG_HW_OPEN)
4033 printk(KERN_DEBUG "%s: dev(%d) open from %p\n", __func__, 4033 printk(KERN_DEBUG "%s: dev(%d) open from %p\n", __func__,
4034 dch->dev.id, __builtin_return_address(0)); 4034 dch->dev.id, __builtin_return_address(0));
4035 if (rq->protocol == ISDN_P_NONE) 4035 if (rq->protocol == ISDN_P_NONE)
4036 return -EINVAL; 4036 return -EINVAL;
4037 if ((dch->dev.D.protocol != ISDN_P_NONE) && 4037 if ((dch->dev.D.protocol != ISDN_P_NONE) &&
4038 (dch->dev.D.protocol != rq->protocol)) { 4038 (dch->dev.D.protocol != rq->protocol)) {
4039 if (debug & DEBUG_HFCMULTI_MODE) 4039 if (debug & DEBUG_HFCMULTI_MODE)
4040 printk(KERN_DEBUG "%s: change protocol %x to %x\n", 4040 printk(KERN_DEBUG "%s: change protocol %x to %x\n",
4041 __func__, dch->dev.D.protocol, rq->protocol); 4041 __func__, dch->dev.D.protocol, rq->protocol);
4042 } 4042 }
4043 if ((dch->dev.D.protocol == ISDN_P_TE_S0) && 4043 if ((dch->dev.D.protocol == ISDN_P_TE_S0) &&
4044 (rq->protocol != ISDN_P_TE_S0)) 4044 (rq->protocol != ISDN_P_TE_S0))
@@ -4060,7 +4060,7 @@ open_dchannel(struct hfc_multi *hc, struct dchannel *dch,
4060 ((rq->protocol == ISDN_P_NT_E1) && (dch->state == 1)) || 4060 ((rq->protocol == ISDN_P_NT_E1) && (dch->state == 1)) ||
4061 ((rq->protocol == ISDN_P_TE_E1) && (dch->state == 1))) { 4061 ((rq->protocol == ISDN_P_TE_E1) && (dch->state == 1))) {
4062 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, MISDN_ID_ANY, 4062 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, MISDN_ID_ANY,
4063 0, NULL, GFP_KERNEL); 4063 0, NULL, GFP_KERNEL);
4064 } 4064 }
4065 rq->ch = &dch->dev.D; 4065 rq->ch = &dch->dev.D;
4066 if (!try_module_get(THIS_MODULE)) 4066 if (!try_module_get(THIS_MODULE))
@@ -4070,7 +4070,7 @@ open_dchannel(struct hfc_multi *hc, struct dchannel *dch,
4070 4070
4071static int 4071static int
4072open_bchannel(struct hfc_multi *hc, struct dchannel *dch, 4072open_bchannel(struct hfc_multi *hc, struct dchannel *dch,
4073 struct channel_req *rq) 4073 struct channel_req *rq)
4074{ 4074{
4075 struct bchannel *bch; 4075 struct bchannel *bch;
4076 int ch; 4076 int ch;
@@ -4086,7 +4086,7 @@ open_bchannel(struct hfc_multi *hc, struct dchannel *dch,
4086 bch = hc->chan[ch].bch; 4086 bch = hc->chan[ch].bch;
4087 if (!bch) { 4087 if (!bch) {
4088 printk(KERN_ERR "%s:internal error ch %d has no bch\n", 4088 printk(KERN_ERR "%s:internal error ch %d has no bch\n",
4089 __func__, ch); 4089 __func__, ch);
4090 return -EINVAL; 4090 return -EINVAL;
4091 } 4091 }
4092 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 4092 if (test_and_set_bit(FLG_OPEN, &bch->Flags))
@@ -4119,8 +4119,8 @@ channel_dctrl(struct dchannel *dch, struct mISDN_ctrl_req *cq)
4119 wd_mode = !!(cq->p1 >> 4); 4119 wd_mode = !!(cq->p1 >> 4);
4120 if (debug & DEBUG_HFCMULTI_MSG) 4120 if (debug & DEBUG_HFCMULTI_MSG)
4121 printk(KERN_DEBUG "%s: MISDN_CTRL_HFC_WD_INIT mode %s" 4121 printk(KERN_DEBUG "%s: MISDN_CTRL_HFC_WD_INIT mode %s"
4122 ", counter 0x%x\n", __func__, 4122 ", counter 0x%x\n", __func__,
4123 wd_mode ? "AUTO" : "MANUAL", wd_cnt); 4123 wd_mode ? "AUTO" : "MANUAL", wd_cnt);
4124 /* set the watchdog timer */ 4124 /* set the watchdog timer */
4125 HFC_outb(hc, R_TI_WD, poll_timer | (wd_cnt << 4)); 4125 HFC_outb(hc, R_TI_WD, poll_timer | (wd_cnt << 4));
4126 hc->hw.r_bert_wd_md = (wd_mode ? V_AUTO_WD_RES : 0); 4126 hc->hw.r_bert_wd_md = (wd_mode ? V_AUTO_WD_RES : 0);
@@ -4139,12 +4139,12 @@ channel_dctrl(struct dchannel *dch, struct mISDN_ctrl_req *cq)
4139 case MISDN_CTRL_HFC_WD_RESET: /* reset the watchdog counter */ 4139 case MISDN_CTRL_HFC_WD_RESET: /* reset the watchdog counter */
4140 if (debug & DEBUG_HFCMULTI_MSG) 4140 if (debug & DEBUG_HFCMULTI_MSG)
4141 printk(KERN_DEBUG "%s: MISDN_CTRL_HFC_WD_RESET\n", 4141 printk(KERN_DEBUG "%s: MISDN_CTRL_HFC_WD_RESET\n",
4142 __func__); 4142 __func__);
4143 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); 4143 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES);
4144 break; 4144 break;
4145 default: 4145 default:
4146 printk(KERN_WARNING "%s: unknown Op %x\n", 4146 printk(KERN_WARNING "%s: unknown Op %x\n",
4147 __func__, cq->op); 4147 __func__, cq->op);
4148 ret = -EINVAL; 4148 ret = -EINVAL;
4149 break; 4149 break;
4150 } 4150 }
@@ -4163,7 +4163,7 @@ hfcm_dctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
4163 4163
4164 if (dch->debug & DEBUG_HW) 4164 if (dch->debug & DEBUG_HW)
4165 printk(KERN_DEBUG "%s: cmd:%x %p\n", 4165 printk(KERN_DEBUG "%s: cmd:%x %p\n",
4166 __func__, cmd, arg); 4166 __func__, cmd, arg);
4167 switch (cmd) { 4167 switch (cmd) {
4168 case OPEN_CHANNEL: 4168 case OPEN_CHANNEL:
4169 rq = arg; 4169 rq = arg;
@@ -4193,8 +4193,8 @@ hfcm_dctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
4193 case CLOSE_CHANNEL: 4193 case CLOSE_CHANNEL:
4194 if (debug & DEBUG_HW_OPEN) 4194 if (debug & DEBUG_HW_OPEN)
4195 printk(KERN_DEBUG "%s: dev(%d) close from %p\n", 4195 printk(KERN_DEBUG "%s: dev(%d) close from %p\n",
4196 __func__, dch->dev.id, 4196 __func__, dch->dev.id,
4197 __builtin_return_address(0)); 4197 __builtin_return_address(0));
4198 module_put(THIS_MODULE); 4198 module_put(THIS_MODULE);
4199 break; 4199 break;
4200 case CONTROL_CHANNEL: 4200 case CONTROL_CHANNEL:
@@ -4205,7 +4205,7 @@ hfcm_dctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
4205 default: 4205 default:
4206 if (dch->debug & DEBUG_HW) 4206 if (dch->debug & DEBUG_HW)
4207 printk(KERN_DEBUG "%s: unknown command %x\n", 4207 printk(KERN_DEBUG "%s: unknown command %x\n",
4208 __func__, cmd); 4208 __func__, cmd);
4209 err = -EINVAL; 4209 err = -EINVAL;
4210 } 4210 }
4211 return err; 4211 return err;
@@ -4246,9 +4246,9 @@ init_card(struct hfc_multi *hc)
4246 spin_unlock_irqrestore(&hc->lock, flags); 4246 spin_unlock_irqrestore(&hc->lock, flags);
4247 4247
4248 if (request_irq(hc->irq, hfcmulti_interrupt, IRQF_SHARED, 4248 if (request_irq(hc->irq, hfcmulti_interrupt, IRQF_SHARED,
4249 "HFC-multi", hc)) { 4249 "HFC-multi", hc)) {
4250 printk(KERN_WARNING "mISDN: Could not get interrupt %d.\n", 4250 printk(KERN_WARNING "mISDN: Could not get interrupt %d.\n",
4251 hc->irq); 4251 hc->irq);
4252 hc->irq = 0; 4252 hc->irq = 0;
4253 return -EIO; 4253 return -EIO;
4254 } 4254 }
@@ -4257,13 +4257,13 @@ init_card(struct hfc_multi *hc)
4257 spin_lock_irqsave(&plx_lock, plx_flags); 4257 spin_lock_irqsave(&plx_lock, plx_flags);
4258 plx_acc = hc->plx_membase + PLX_INTCSR; 4258 plx_acc = hc->plx_membase + PLX_INTCSR;
4259 writew((PLX_INTCSR_PCIINT_ENABLE | PLX_INTCSR_LINTI1_ENABLE), 4259 writew((PLX_INTCSR_PCIINT_ENABLE | PLX_INTCSR_LINTI1_ENABLE),
4260 plx_acc); /* enable PCI & LINT1 irq */ 4260 plx_acc); /* enable PCI & LINT1 irq */
4261 spin_unlock_irqrestore(&plx_lock, plx_flags); 4261 spin_unlock_irqrestore(&plx_lock, plx_flags);
4262 } 4262 }
4263 4263
4264 if (debug & DEBUG_HFCMULTI_INIT) 4264 if (debug & DEBUG_HFCMULTI_INIT)
4265 printk(KERN_DEBUG "%s: IRQ %d count %d\n", 4265 printk(KERN_DEBUG "%s: IRQ %d count %d\n",
4266 __func__, hc->irq, hc->irqcnt); 4266 __func__, hc->irq, hc->irqcnt);
4267 err = init_chip(hc); 4267 err = init_chip(hc);
4268 if (err) 4268 if (err)
4269 goto error; 4269 goto error;
@@ -4277,14 +4277,14 @@ init_card(struct hfc_multi *hc)
4277 spin_unlock_irqrestore(&hc->lock, flags); 4277 spin_unlock_irqrestore(&hc->lock, flags);
4278 /* printk(KERN_DEBUG "no master irq set!!!\n"); */ 4278 /* printk(KERN_DEBUG "no master irq set!!!\n"); */
4279 set_current_state(TASK_UNINTERRUPTIBLE); 4279 set_current_state(TASK_UNINTERRUPTIBLE);
4280 schedule_timeout((100*HZ)/1000); /* Timeout 100ms */ 4280 schedule_timeout((100 * HZ) / 1000); /* Timeout 100ms */
4281 /* turn IRQ off until chip is completely initialized */ 4281 /* turn IRQ off until chip is completely initialized */
4282 spin_lock_irqsave(&hc->lock, flags); 4282 spin_lock_irqsave(&hc->lock, flags);
4283 disable_hwirq(hc); 4283 disable_hwirq(hc);
4284 spin_unlock_irqrestore(&hc->lock, flags); 4284 spin_unlock_irqrestore(&hc->lock, flags);
4285 if (debug & DEBUG_HFCMULTI_INIT) 4285 if (debug & DEBUG_HFCMULTI_INIT)
4286 printk(KERN_DEBUG "%s: IRQ %d count %d\n", 4286 printk(KERN_DEBUG "%s: IRQ %d count %d\n",
4287 __func__, hc->irq, hc->irqcnt); 4287 __func__, hc->irq, hc->irqcnt);
4288 if (hc->irqcnt) { 4288 if (hc->irqcnt) {
4289 if (debug & DEBUG_HFCMULTI_INIT) 4289 if (debug & DEBUG_HFCMULTI_INIT)
4290 printk(KERN_DEBUG "%s: done\n", __func__); 4290 printk(KERN_DEBUG "%s: done\n", __func__);
@@ -4297,7 +4297,7 @@ init_card(struct hfc_multi *hc)
4297 } 4297 }
4298 4298
4299 printk(KERN_ERR "HFC PCI: IRQ(%d) getting no interrupts during init.\n", 4299 printk(KERN_ERR "HFC PCI: IRQ(%d) getting no interrupts during init.\n",
4300 hc->irq); 4300 hc->irq);
4301 4301
4302 err = -EIO; 4302 err = -EIO;
4303 4303
@@ -4327,13 +4327,13 @@ error:
4327 4327
4328static int 4328static int
4329setup_pci(struct hfc_multi *hc, struct pci_dev *pdev, 4329setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4330 const struct pci_device_id *ent) 4330 const struct pci_device_id *ent)
4331{ 4331{
4332 struct hm_map *m = (struct hm_map *)ent->driver_data; 4332 struct hm_map *m = (struct hm_map *)ent->driver_data;
4333 4333
4334 printk(KERN_INFO 4334 printk(KERN_INFO
4335 "HFC-multi: card manufacturer: '%s' card name: '%s' clock: %s\n", 4335 "HFC-multi: card manufacturer: '%s' card name: '%s' clock: %s\n",
4336 m->vendor_name, m->card_name, m->clock2 ? "double" : "normal"); 4336 m->vendor_name, m->card_name, m->clock2 ? "double" : "normal");
4337 4337
4338 hc->pci_dev = pdev; 4338 hc->pci_dev = pdev;
4339 if (m->clock2) 4339 if (m->clock2)
@@ -4380,7 +4380,7 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4380 4380
4381 if (!hc->plx_origmembase) { 4381 if (!hc->plx_origmembase) {
4382 printk(KERN_WARNING 4382 printk(KERN_WARNING
4383 "HFC-multi: No IO-Memory for PCI PLX bridge found\n"); 4383 "HFC-multi: No IO-Memory for PCI PLX bridge found\n");
4384 pci_disable_device(hc->pci_dev); 4384 pci_disable_device(hc->pci_dev);
4385 return -EIO; 4385 return -EIO;
4386 } 4386 }
@@ -4388,20 +4388,20 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4388 hc->plx_membase = ioremap(hc->plx_origmembase, 0x80); 4388 hc->plx_membase = ioremap(hc->plx_origmembase, 0x80);
4389 if (!hc->plx_membase) { 4389 if (!hc->plx_membase) {
4390 printk(KERN_WARNING 4390 printk(KERN_WARNING
4391 "HFC-multi: failed to remap plx address space. " 4391 "HFC-multi: failed to remap plx address space. "
4392 "(internal error)\n"); 4392 "(internal error)\n");
4393 pci_disable_device(hc->pci_dev); 4393 pci_disable_device(hc->pci_dev);
4394 return -EIO; 4394 return -EIO;
4395 } 4395 }
4396 printk(KERN_INFO 4396 printk(KERN_INFO
4397 "HFC-multi: plx_membase:%#lx plx_origmembase:%#lx\n", 4397 "HFC-multi: plx_membase:%#lx plx_origmembase:%#lx\n",
4398 (u_long)hc->plx_membase, hc->plx_origmembase); 4398 (u_long)hc->plx_membase, hc->plx_origmembase);
4399 4399
4400 hc->pci_origmembase = hc->pci_dev->resource[2].start; 4400 hc->pci_origmembase = hc->pci_dev->resource[2].start;
4401 /* MEMBASE 1 is PLX PCI Bridge */ 4401 /* MEMBASE 1 is PLX PCI Bridge */
4402 if (!hc->pci_origmembase) { 4402 if (!hc->pci_origmembase) {
4403 printk(KERN_WARNING 4403 printk(KERN_WARNING
4404 "HFC-multi: No IO-Memory for PCI card found\n"); 4404 "HFC-multi: No IO-Memory for PCI card found\n");
4405 pci_disable_device(hc->pci_dev); 4405 pci_disable_device(hc->pci_dev);
4406 return -EIO; 4406 return -EIO;
4407 } 4407 }
@@ -4409,16 +4409,16 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4409 hc->pci_membase = ioremap(hc->pci_origmembase, 0x400); 4409 hc->pci_membase = ioremap(hc->pci_origmembase, 0x400);
4410 if (!hc->pci_membase) { 4410 if (!hc->pci_membase) {
4411 printk(KERN_WARNING "HFC-multi: failed to remap io " 4411 printk(KERN_WARNING "HFC-multi: failed to remap io "
4412 "address space. (internal error)\n"); 4412 "address space. (internal error)\n");
4413 pci_disable_device(hc->pci_dev); 4413 pci_disable_device(hc->pci_dev);
4414 return -EIO; 4414 return -EIO;
4415 } 4415 }
4416 4416
4417 printk(KERN_INFO 4417 printk(KERN_INFO
4418 "card %d: defined at MEMBASE %#lx (%#lx) IRQ %d HZ %d " 4418 "card %d: defined at MEMBASE %#lx (%#lx) IRQ %d HZ %d "
4419 "leds-type %d\n", 4419 "leds-type %d\n",
4420 hc->id, (u_long)hc->pci_membase, hc->pci_origmembase, 4420 hc->id, (u_long)hc->pci_membase, hc->pci_origmembase,
4421 hc->pci_dev->irq, HZ, hc->leds); 4421 hc->pci_dev->irq, HZ, hc->leds);
4422 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); 4422 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO);
4423 break; 4423 break;
4424 case HFC_IO_MODE_PCIMEM: 4424 case HFC_IO_MODE_PCIMEM:
@@ -4431,7 +4431,7 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4431 hc->pci_origmembase = hc->pci_dev->resource[1].start; 4431 hc->pci_origmembase = hc->pci_dev->resource[1].start;
4432 if (!hc->pci_origmembase) { 4432 if (!hc->pci_origmembase) {
4433 printk(KERN_WARNING 4433 printk(KERN_WARNING
4434 "HFC-multi: No IO-Memory for PCI card found\n"); 4434 "HFC-multi: No IO-Memory for PCI card found\n");
4435 pci_disable_device(hc->pci_dev); 4435 pci_disable_device(hc->pci_dev);
4436 return -EIO; 4436 return -EIO;
4437 } 4437 }
@@ -4439,14 +4439,14 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4439 hc->pci_membase = ioremap(hc->pci_origmembase, 256); 4439 hc->pci_membase = ioremap(hc->pci_origmembase, 256);
4440 if (!hc->pci_membase) { 4440 if (!hc->pci_membase) {
4441 printk(KERN_WARNING 4441 printk(KERN_WARNING
4442 "HFC-multi: failed to remap io address space. " 4442 "HFC-multi: failed to remap io address space. "
4443 "(internal error)\n"); 4443 "(internal error)\n");
4444 pci_disable_device(hc->pci_dev); 4444 pci_disable_device(hc->pci_dev);
4445 return -EIO; 4445 return -EIO;
4446 } 4446 }
4447 printk(KERN_INFO "card %d: defined at MEMBASE %#lx (%#lx) IRQ " 4447 printk(KERN_INFO "card %d: defined at MEMBASE %#lx (%#lx) IRQ "
4448 "%d HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase, 4448 "%d HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase,
4449 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds); 4449 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds);
4450 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); 4450 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO);
4451 break; 4451 break;
4452 case HFC_IO_MODE_REGIO: 4452 case HFC_IO_MODE_REGIO:
@@ -4459,23 +4459,23 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4459 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start; 4459 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start;
4460 if (!hc->pci_iobase) { 4460 if (!hc->pci_iobase) {
4461 printk(KERN_WARNING 4461 printk(KERN_WARNING
4462 "HFC-multi: No IO for PCI card found\n"); 4462 "HFC-multi: No IO for PCI card found\n");
4463 pci_disable_device(hc->pci_dev); 4463 pci_disable_device(hc->pci_dev);
4464 return -EIO; 4464 return -EIO;
4465 } 4465 }
4466 4466
4467 if (!request_region(hc->pci_iobase, 8, "hfcmulti")) { 4467 if (!request_region(hc->pci_iobase, 8, "hfcmulti")) {
4468 printk(KERN_WARNING "HFC-multi: failed to request " 4468 printk(KERN_WARNING "HFC-multi: failed to request "
4469 "address space at 0x%08lx (internal error)\n", 4469 "address space at 0x%08lx (internal error)\n",
4470 hc->pci_iobase); 4470 hc->pci_iobase);
4471 pci_disable_device(hc->pci_dev); 4471 pci_disable_device(hc->pci_dev);
4472 return -EIO; 4472 return -EIO;
4473 } 4473 }
4474 4474
4475 printk(KERN_INFO 4475 printk(KERN_INFO
4476 "%s %s: defined at IOBASE %#x IRQ %d HZ %d leds-type %d\n", 4476 "%s %s: defined at IOBASE %#x IRQ %d HZ %d leds-type %d\n",
4477 m->vendor_name, m->card_name, (u_int) hc->pci_iobase, 4477 m->vendor_name, m->card_name, (u_int) hc->pci_iobase,
4478 hc->pci_dev->irq, HZ, hc->leds); 4478 hc->pci_dev->irq, HZ, hc->leds);
4479 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_REGIO); 4479 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_REGIO);
4480 break; 4480 break;
4481 default: 4481 default:
@@ -4508,17 +4508,17 @@ release_port(struct hfc_multi *hc, struct dchannel *dch)
4508 4508
4509 if (debug & DEBUG_HFCMULTI_INIT) 4509 if (debug & DEBUG_HFCMULTI_INIT)
4510 printk(KERN_DEBUG "%s: entered for port %d\n", 4510 printk(KERN_DEBUG "%s: entered for port %d\n",
4511 __func__, pt + 1); 4511 __func__, pt + 1);
4512 4512
4513 if (pt >= hc->ports) { 4513 if (pt >= hc->ports) {
4514 printk(KERN_WARNING "%s: ERROR port out of range (%d).\n", 4514 printk(KERN_WARNING "%s: ERROR port out of range (%d).\n",
4515 __func__, pt + 1); 4515 __func__, pt + 1);
4516 return; 4516 return;
4517 } 4517 }
4518 4518
4519 if (debug & DEBUG_HFCMULTI_INIT) 4519 if (debug & DEBUG_HFCMULTI_INIT)
4520 printk(KERN_DEBUG "%s: releasing port=%d\n", 4520 printk(KERN_DEBUG "%s: releasing port=%d\n",
4521 __func__, pt + 1); 4521 __func__, pt + 1);
4522 4522
4523 if (dch->dev.D.protocol == ISDN_P_TE_S0) 4523 if (dch->dev.D.protocol == ISDN_P_TE_S0)
4524 l1_event(dch->l1, CLOSE_CHANNEL); 4524 l1_event(dch->l1, CLOSE_CHANNEL);
@@ -4548,8 +4548,8 @@ release_port(struct hfc_multi *hc, struct dchannel *dch)
4548 if (hc->chan[i].bch) { 4548 if (hc->chan[i].bch) {
4549 if (debug & DEBUG_HFCMULTI_INIT) 4549 if (debug & DEBUG_HFCMULTI_INIT)
4550 printk(KERN_DEBUG 4550 printk(KERN_DEBUG
4551 "%s: free port %d channel %d\n", 4551 "%s: free port %d channel %d\n",
4552 __func__, hc->chan[i].port+1, i); 4552 __func__, hc->chan[i].port + 1, i);
4553 pb = hc->chan[i].bch; 4553 pb = hc->chan[i].bch;
4554 hc->chan[i].bch = NULL; 4554 hc->chan[i].bch = NULL;
4555 spin_unlock_irqrestore(&hc->lock, flags); 4555 spin_unlock_irqrestore(&hc->lock, flags);
@@ -4563,16 +4563,16 @@ release_port(struct hfc_multi *hc, struct dchannel *dch)
4563 /* remove sync */ 4563 /* remove sync */
4564 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 4564 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
4565 hc->syncronized &= 4565 hc->syncronized &=
4566 ~(1 << hc->chan[ci].port); 4566 ~(1 << hc->chan[ci].port);
4567 plxsd_checksync(hc, 1); 4567 plxsd_checksync(hc, 1);
4568 } 4568 }
4569 /* free channels */ 4569 /* free channels */
4570 if (hc->chan[ci - 2].bch) { 4570 if (hc->chan[ci - 2].bch) {
4571 if (debug & DEBUG_HFCMULTI_INIT) 4571 if (debug & DEBUG_HFCMULTI_INIT)
4572 printk(KERN_DEBUG 4572 printk(KERN_DEBUG
4573 "%s: free port %d channel %d\n", 4573 "%s: free port %d channel %d\n",
4574 __func__, hc->chan[ci - 2].port+1, 4574 __func__, hc->chan[ci - 2].port + 1,
4575 ci - 2); 4575 ci - 2);
4576 pb = hc->chan[ci - 2].bch; 4576 pb = hc->chan[ci - 2].bch;
4577 hc->chan[ci - 2].bch = NULL; 4577 hc->chan[ci - 2].bch = NULL;
4578 spin_unlock_irqrestore(&hc->lock, flags); 4578 spin_unlock_irqrestore(&hc->lock, flags);
@@ -4584,9 +4584,9 @@ release_port(struct hfc_multi *hc, struct dchannel *dch)
4584 if (hc->chan[ci - 1].bch) { 4584 if (hc->chan[ci - 1].bch) {
4585 if (debug & DEBUG_HFCMULTI_INIT) 4585 if (debug & DEBUG_HFCMULTI_INIT)
4586 printk(KERN_DEBUG 4586 printk(KERN_DEBUG
4587 "%s: free port %d channel %d\n", 4587 "%s: free port %d channel %d\n",
4588 __func__, hc->chan[ci - 1].port+1, 4588 __func__, hc->chan[ci - 1].port + 1,
4589 ci - 1); 4589 ci - 1);
4590 pb = hc->chan[ci - 1].bch; 4590 pb = hc->chan[ci - 1].bch;
4591 hc->chan[ci - 1].bch = NULL; 4591 hc->chan[ci - 1].bch = NULL;
4592 spin_unlock_irqrestore(&hc->lock, flags); 4592 spin_unlock_irqrestore(&hc->lock, flags);
@@ -4616,7 +4616,7 @@ release_card(struct hfc_multi *hc)
4616 4616
4617 if (debug & DEBUG_HFCMULTI_INIT) 4617 if (debug & DEBUG_HFCMULTI_INIT)
4618 printk(KERN_DEBUG "%s: release card (%d) entered\n", 4618 printk(KERN_DEBUG "%s: release card (%d) entered\n",
4619 __func__, hc->id); 4619 __func__, hc->id);
4620 4620
4621 /* unregister clock source */ 4621 /* unregister clock source */
4622 if (hc->iclock) 4622 if (hc->iclock)
@@ -4635,7 +4635,7 @@ release_card(struct hfc_multi *hc)
4635 /* disable D-channels & B-channels */ 4635 /* disable D-channels & B-channels */
4636 if (debug & DEBUG_HFCMULTI_INIT) 4636 if (debug & DEBUG_HFCMULTI_INIT)
4637 printk(KERN_DEBUG "%s: disable all channels (d and b)\n", 4637 printk(KERN_DEBUG "%s: disable all channels (d and b)\n",
4638 __func__); 4638 __func__);
4639 for (ch = 0; ch <= 31; ch++) { 4639 for (ch = 0; ch <= 31; ch++) {
4640 if (hc->chan[ch].dch) 4640 if (hc->chan[ch].dch)
4641 release_port(hc, hc->chan[ch].dch); 4641 release_port(hc, hc->chan[ch].dch);
@@ -4645,7 +4645,7 @@ release_card(struct hfc_multi *hc)
4645 if (hc->irq) { 4645 if (hc->irq) {
4646 if (debug & DEBUG_HFCMULTI_INIT) 4646 if (debug & DEBUG_HFCMULTI_INIT)
4647 printk(KERN_DEBUG "%s: free irq %d\n", 4647 printk(KERN_DEBUG "%s: free irq %d\n",
4648 __func__, hc->irq); 4648 __func__, hc->irq);
4649 free_irq(hc->irq, hc); 4649 free_irq(hc->irq, hc);
4650 hc->irq = 0; 4650 hc->irq = 0;
4651 4651
@@ -4654,7 +4654,7 @@ release_card(struct hfc_multi *hc)
4654 4654
4655 if (debug & DEBUG_HFCMULTI_INIT) 4655 if (debug & DEBUG_HFCMULTI_INIT)
4656 printk(KERN_DEBUG "%s: remove instance from list\n", 4656 printk(KERN_DEBUG "%s: remove instance from list\n",
4657 __func__); 4657 __func__);
4658 list_del(&hc->list); 4658 list_del(&hc->list);
4659 4659
4660 if (debug & DEBUG_HFCMULTI_INIT) 4660 if (debug & DEBUG_HFCMULTI_INIT)
@@ -4664,7 +4664,7 @@ release_card(struct hfc_multi *hc)
4664 kfree(hc); 4664 kfree(hc);
4665 if (debug & DEBUG_HFCMULTI_INIT) 4665 if (debug & DEBUG_HFCMULTI_INIT)
4666 printk(KERN_DEBUG "%s: card successfully removed\n", 4666 printk(KERN_DEBUG "%s: card successfully removed\n",
4667 __func__); 4667 __func__);
4668} 4668}
4669 4669
4670static int 4670static int
@@ -4683,7 +4683,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)
4683 dch->hw = hc; 4683 dch->hw = hc;
4684 dch->dev.Dprotocols = (1 << ISDN_P_TE_E1) | (1 << ISDN_P_NT_E1); 4684 dch->dev.Dprotocols = (1 << ISDN_P_TE_E1) | (1 << ISDN_P_NT_E1);
4685 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 4685 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
4686 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 4686 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
4687 dch->dev.D.send = handle_dmsg; 4687 dch->dev.D.send = handle_dmsg;
4688 dch->dev.D.ctrl = hfcm_dctrl; 4688 dch->dev.D.ctrl = hfcm_dctrl;
4689 dch->dev.nrbchan = (hc->dslot) ? 30 : 31; 4689 dch->dev.nrbchan = (hc->dslot) ? 30 : 31;
@@ -4697,14 +4697,14 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)
4697 bch = kzalloc(sizeof(struct bchannel), GFP_KERNEL); 4697 bch = kzalloc(sizeof(struct bchannel), GFP_KERNEL);
4698 if (!bch) { 4698 if (!bch) {
4699 printk(KERN_ERR "%s: no memory for bchannel\n", 4699 printk(KERN_ERR "%s: no memory for bchannel\n",
4700 __func__); 4700 __func__);
4701 ret = -ENOMEM; 4701 ret = -ENOMEM;
4702 goto free_chan; 4702 goto free_chan;
4703 } 4703 }
4704 hc->chan[ch].coeff = kzalloc(512, GFP_KERNEL); 4704 hc->chan[ch].coeff = kzalloc(512, GFP_KERNEL);
4705 if (!hc->chan[ch].coeff) { 4705 if (!hc->chan[ch].coeff) {
4706 printk(KERN_ERR "%s: no memory for coeffs\n", 4706 printk(KERN_ERR "%s: no memory for coeffs\n",
4707 __func__); 4707 __func__);
4708 ret = -ENOMEM; 4708 ret = -ENOMEM;
4709 kfree(bch); 4709 kfree(bch);
4710 goto free_chan; 4710 goto free_chan;
@@ -4726,93 +4726,93 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)
4726 if (port[Port_cnt] & 0x001) { 4726 if (port[Port_cnt] & 0x001) {
4727 if (!m->opticalsupport) { 4727 if (!m->opticalsupport) {
4728 printk(KERN_INFO 4728 printk(KERN_INFO
4729 "This board has no optical " 4729 "This board has no optical "
4730 "support\n"); 4730 "support\n");
4731 } else { 4731 } else {
4732 if (debug & DEBUG_HFCMULTI_INIT) 4732 if (debug & DEBUG_HFCMULTI_INIT)
4733 printk(KERN_DEBUG 4733 printk(KERN_DEBUG
4734 "%s: PORT set optical " 4734 "%s: PORT set optical "
4735 "interfacs: card(%d) " 4735 "interfacs: card(%d) "
4736 "port(%d)\n", 4736 "port(%d)\n",
4737 __func__, 4737 __func__,
4738 HFC_cnt + 1, 1); 4738 HFC_cnt + 1, 1);
4739 test_and_set_bit(HFC_CFG_OPTICAL, 4739 test_and_set_bit(HFC_CFG_OPTICAL,
4740 &hc->chan[hc->dslot].cfg); 4740 &hc->chan[hc->dslot].cfg);
4741 } 4741 }
4742 } 4742 }
4743 /* set LOS report */ 4743 /* set LOS report */
4744 if (port[Port_cnt] & 0x004) { 4744 if (port[Port_cnt] & 0x004) {
4745 if (debug & DEBUG_HFCMULTI_INIT) 4745 if (debug & DEBUG_HFCMULTI_INIT)
4746 printk(KERN_DEBUG "%s: PORT set " 4746 printk(KERN_DEBUG "%s: PORT set "
4747 "LOS report: card(%d) port(%d)\n", 4747 "LOS report: card(%d) port(%d)\n",
4748 __func__, HFC_cnt + 1, 1); 4748 __func__, HFC_cnt + 1, 1);
4749 test_and_set_bit(HFC_CFG_REPORT_LOS, 4749 test_and_set_bit(HFC_CFG_REPORT_LOS,
4750 &hc->chan[hc->dslot].cfg); 4750 &hc->chan[hc->dslot].cfg);
4751 } 4751 }
4752 /* set AIS report */ 4752 /* set AIS report */
4753 if (port[Port_cnt] & 0x008) { 4753 if (port[Port_cnt] & 0x008) {
4754 if (debug & DEBUG_HFCMULTI_INIT) 4754 if (debug & DEBUG_HFCMULTI_INIT)
4755 printk(KERN_DEBUG "%s: PORT set " 4755 printk(KERN_DEBUG "%s: PORT set "
4756 "AIS report: card(%d) port(%d)\n", 4756 "AIS report: card(%d) port(%d)\n",
4757 __func__, HFC_cnt + 1, 1); 4757 __func__, HFC_cnt + 1, 1);
4758 test_and_set_bit(HFC_CFG_REPORT_AIS, 4758 test_and_set_bit(HFC_CFG_REPORT_AIS,
4759 &hc->chan[hc->dslot].cfg); 4759 &hc->chan[hc->dslot].cfg);
4760 } 4760 }
4761 /* set SLIP report */ 4761 /* set SLIP report */
4762 if (port[Port_cnt] & 0x010) { 4762 if (port[Port_cnt] & 0x010) {
4763 if (debug & DEBUG_HFCMULTI_INIT) 4763 if (debug & DEBUG_HFCMULTI_INIT)
4764 printk(KERN_DEBUG 4764 printk(KERN_DEBUG
4765 "%s: PORT set SLIP report: " 4765 "%s: PORT set SLIP report: "
4766 "card(%d) port(%d)\n", 4766 "card(%d) port(%d)\n",
4767 __func__, HFC_cnt + 1, 1); 4767 __func__, HFC_cnt + 1, 1);
4768 test_and_set_bit(HFC_CFG_REPORT_SLIP, 4768 test_and_set_bit(HFC_CFG_REPORT_SLIP,
4769 &hc->chan[hc->dslot].cfg); 4769 &hc->chan[hc->dslot].cfg);
4770 } 4770 }
4771 /* set RDI report */ 4771 /* set RDI report */
4772 if (port[Port_cnt] & 0x020) { 4772 if (port[Port_cnt] & 0x020) {
4773 if (debug & DEBUG_HFCMULTI_INIT) 4773 if (debug & DEBUG_HFCMULTI_INIT)
4774 printk(KERN_DEBUG 4774 printk(KERN_DEBUG
4775 "%s: PORT set RDI report: " 4775 "%s: PORT set RDI report: "
4776 "card(%d) port(%d)\n", 4776 "card(%d) port(%d)\n",
4777 __func__, HFC_cnt + 1, 1); 4777 __func__, HFC_cnt + 1, 1);
4778 test_and_set_bit(HFC_CFG_REPORT_RDI, 4778 test_and_set_bit(HFC_CFG_REPORT_RDI,
4779 &hc->chan[hc->dslot].cfg); 4779 &hc->chan[hc->dslot].cfg);
4780 } 4780 }
4781 /* set CRC-4 Mode */ 4781 /* set CRC-4 Mode */
4782 if (!(port[Port_cnt] & 0x100)) { 4782 if (!(port[Port_cnt] & 0x100)) {
4783 if (debug & DEBUG_HFCMULTI_INIT) 4783 if (debug & DEBUG_HFCMULTI_INIT)
4784 printk(KERN_DEBUG "%s: PORT turn on CRC4 report:" 4784 printk(KERN_DEBUG "%s: PORT turn on CRC4 report:"
4785 " card(%d) port(%d)\n", 4785 " card(%d) port(%d)\n",
4786 __func__, HFC_cnt + 1, 1); 4786 __func__, HFC_cnt + 1, 1);
4787 test_and_set_bit(HFC_CFG_CRC4, 4787 test_and_set_bit(HFC_CFG_CRC4,
4788 &hc->chan[hc->dslot].cfg); 4788 &hc->chan[hc->dslot].cfg);
4789 } else { 4789 } else {
4790 if (debug & DEBUG_HFCMULTI_INIT) 4790 if (debug & DEBUG_HFCMULTI_INIT)
4791 printk(KERN_DEBUG "%s: PORT turn off CRC4" 4791 printk(KERN_DEBUG "%s: PORT turn off CRC4"
4792 " report: card(%d) port(%d)\n", 4792 " report: card(%d) port(%d)\n",
4793 __func__, HFC_cnt + 1, 1); 4793 __func__, HFC_cnt + 1, 1);
4794 } 4794 }
4795 /* set forced clock */ 4795 /* set forced clock */
4796 if (port[Port_cnt] & 0x0200) { 4796 if (port[Port_cnt] & 0x0200) {
4797 if (debug & DEBUG_HFCMULTI_INIT) 4797 if (debug & DEBUG_HFCMULTI_INIT)
4798 printk(KERN_DEBUG "%s: PORT force getting clock from " 4798 printk(KERN_DEBUG "%s: PORT force getting clock from "
4799 "E1: card(%d) port(%d)\n", 4799 "E1: card(%d) port(%d)\n",
4800 __func__, HFC_cnt + 1, 1); 4800 __func__, HFC_cnt + 1, 1);
4801 test_and_set_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip); 4801 test_and_set_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip);
4802 } else 4802 } else
4803 if (port[Port_cnt] & 0x0400) { 4803 if (port[Port_cnt] & 0x0400) {
4804 if (debug & DEBUG_HFCMULTI_INIT) 4804 if (debug & DEBUG_HFCMULTI_INIT)
4805 printk(KERN_DEBUG "%s: PORT force putting clock to " 4805 printk(KERN_DEBUG "%s: PORT force putting clock to "
4806 "E1: card(%d) port(%d)\n", 4806 "E1: card(%d) port(%d)\n",
4807 __func__, HFC_cnt + 1, 1); 4807 __func__, HFC_cnt + 1, 1);
4808 test_and_set_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip); 4808 test_and_set_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip);
4809 } 4809 }
4810 /* set JATT PLL */ 4810 /* set JATT PLL */
4811 if (port[Port_cnt] & 0x0800) { 4811 if (port[Port_cnt] & 0x0800) {
4812 if (debug & DEBUG_HFCMULTI_INIT) 4812 if (debug & DEBUG_HFCMULTI_INIT)
4813 printk(KERN_DEBUG "%s: PORT disable JATT PLL on " 4813 printk(KERN_DEBUG "%s: PORT disable JATT PLL on "
4814 "E1: card(%d) port(%d)\n", 4814 "E1: card(%d) port(%d)\n",
4815 __func__, HFC_cnt + 1, 1); 4815 __func__, HFC_cnt + 1, 1);
4816 test_and_set_bit(HFC_CHIP_RX_SYNC, &hc->chip); 4816 test_and_set_bit(HFC_CHIP_RX_SYNC, &hc->chip);
4817 } 4817 }
4818 /* set elastic jitter buffer */ 4818 /* set elastic jitter buffer */
@@ -4820,10 +4820,10 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)
4820 hc->chan[hc->dslot].jitter = (port[Port_cnt]>>12) & 0x3; 4820 hc->chan[hc->dslot].jitter = (port[Port_cnt]>>12) & 0x3;
4821 if (debug & DEBUG_HFCMULTI_INIT) 4821 if (debug & DEBUG_HFCMULTI_INIT)
4822 printk(KERN_DEBUG 4822 printk(KERN_DEBUG
4823 "%s: PORT set elastic " 4823 "%s: PORT set elastic "
4824 "buffer to %d: card(%d) port(%d)\n", 4824 "buffer to %d: card(%d) port(%d)\n",
4825 __func__, hc->chan[hc->dslot].jitter, 4825 __func__, hc->chan[hc->dslot].jitter,
4826 HFC_cnt + 1, 1); 4826 HFC_cnt + 1, 1);
4827 } else 4827 } else
4828 hc->chan[hc->dslot].jitter = 2; /* default */ 4828 hc->chan[hc->dslot].jitter = 2; /* default */
4829 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d", HFC_cnt + 1); 4829 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d", HFC_cnt + 1);
@@ -4853,7 +4853,7 @@ init_multi_port(struct hfc_multi *hc, int pt)
4853 dch->hw = hc; 4853 dch->hw = hc;
4854 dch->dev.Dprotocols = (1 << ISDN_P_TE_S0) | (1 << ISDN_P_NT_S0); 4854 dch->dev.Dprotocols = (1 << ISDN_P_TE_S0) | (1 << ISDN_P_NT_S0);
4855 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 4855 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
4856 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 4856 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
4857 dch->dev.D.send = handle_dmsg; 4857 dch->dev.D.send = handle_dmsg;
4858 dch->dev.D.ctrl = hfcm_dctrl; 4858 dch->dev.D.ctrl = hfcm_dctrl;
4859 dch->dev.nrbchan = 2; 4859 dch->dev.nrbchan = 2;
@@ -4866,14 +4866,14 @@ init_multi_port(struct hfc_multi *hc, int pt)
4866 bch = kzalloc(sizeof(struct bchannel), GFP_KERNEL); 4866 bch = kzalloc(sizeof(struct bchannel), GFP_KERNEL);
4867 if (!bch) { 4867 if (!bch) {
4868 printk(KERN_ERR "%s: no memory for bchannel\n", 4868 printk(KERN_ERR "%s: no memory for bchannel\n",
4869 __func__); 4869 __func__);
4870 ret = -ENOMEM; 4870 ret = -ENOMEM;
4871 goto free_chan; 4871 goto free_chan;
4872 } 4872 }
4873 hc->chan[i + ch].coeff = kzalloc(512, GFP_KERNEL); 4873 hc->chan[i + ch].coeff = kzalloc(512, GFP_KERNEL);
4874 if (!hc->chan[i + ch].coeff) { 4874 if (!hc->chan[i + ch].coeff) {
4875 printk(KERN_ERR "%s: no memory for coeffs\n", 4875 printk(KERN_ERR "%s: no memory for coeffs\n",
4876 __func__); 4876 __func__);
4877 ret = -ENOMEM; 4877 ret = -ENOMEM;
4878 kfree(bch); 4878 kfree(bch);
4879 goto free_chan; 4879 goto free_chan;
@@ -4895,22 +4895,22 @@ init_multi_port(struct hfc_multi *hc, int pt)
4895 if (port[Port_cnt] & 0x001) { 4895 if (port[Port_cnt] & 0x001) {
4896 if (debug & DEBUG_HFCMULTI_INIT) 4896 if (debug & DEBUG_HFCMULTI_INIT)
4897 printk(KERN_DEBUG 4897 printk(KERN_DEBUG
4898 "%s: PROTOCOL set master clock: " 4898 "%s: PROTOCOL set master clock: "
4899 "card(%d) port(%d)\n", 4899 "card(%d) port(%d)\n",
4900 __func__, HFC_cnt + 1, pt + 1); 4900 __func__, HFC_cnt + 1, pt + 1);
4901 if (dch->dev.D.protocol != ISDN_P_TE_S0) { 4901 if (dch->dev.D.protocol != ISDN_P_TE_S0) {
4902 printk(KERN_ERR "Error: Master clock " 4902 printk(KERN_ERR "Error: Master clock "
4903 "for port(%d) of card(%d) is only" 4903 "for port(%d) of card(%d) is only"
4904 " possible with TE-mode\n", 4904 " possible with TE-mode\n",
4905 pt + 1, HFC_cnt + 1); 4905 pt + 1, HFC_cnt + 1);
4906 ret = -EINVAL; 4906 ret = -EINVAL;
4907 goto free_chan; 4907 goto free_chan;
4908 } 4908 }
4909 if (hc->masterclk >= 0) { 4909 if (hc->masterclk >= 0) {
4910 printk(KERN_ERR "Error: Master clock " 4910 printk(KERN_ERR "Error: Master clock "
4911 "for port(%d) of card(%d) already " 4911 "for port(%d) of card(%d) already "
4912 "defined for port(%d)\n", 4912 "defined for port(%d)\n",
4913 pt + 1, HFC_cnt + 1, hc->masterclk+1); 4913 pt + 1, HFC_cnt + 1, hc->masterclk + 1);
4914 ret = -EINVAL; 4914 ret = -EINVAL;
4915 goto free_chan; 4915 goto free_chan;
4916 } 4916 }
@@ -4920,29 +4920,29 @@ init_multi_port(struct hfc_multi *hc, int pt)
4920 if (port[Port_cnt] & 0x002) { 4920 if (port[Port_cnt] & 0x002) {
4921 if (debug & DEBUG_HFCMULTI_INIT) 4921 if (debug & DEBUG_HFCMULTI_INIT)
4922 printk(KERN_DEBUG 4922 printk(KERN_DEBUG
4923 "%s: PROTOCOL set non capacitive " 4923 "%s: PROTOCOL set non capacitive "
4924 "transmitter: card(%d) port(%d)\n", 4924 "transmitter: card(%d) port(%d)\n",
4925 __func__, HFC_cnt + 1, pt + 1); 4925 __func__, HFC_cnt + 1, pt + 1);
4926 test_and_set_bit(HFC_CFG_NONCAP_TX, 4926 test_and_set_bit(HFC_CFG_NONCAP_TX,
4927 &hc->chan[i + 2].cfg); 4927 &hc->chan[i + 2].cfg);
4928 } 4928 }
4929 /* disable E-channel */ 4929 /* disable E-channel */
4930 if (port[Port_cnt] & 0x004) { 4930 if (port[Port_cnt] & 0x004) {
4931 if (debug & DEBUG_HFCMULTI_INIT) 4931 if (debug & DEBUG_HFCMULTI_INIT)
4932 printk(KERN_DEBUG 4932 printk(KERN_DEBUG
4933 "%s: PROTOCOL disable E-channel: " 4933 "%s: PROTOCOL disable E-channel: "
4934 "card(%d) port(%d)\n", 4934 "card(%d) port(%d)\n",
4935 __func__, HFC_cnt + 1, pt + 1); 4935 __func__, HFC_cnt + 1, pt + 1);
4936 test_and_set_bit(HFC_CFG_DIS_ECHANNEL, 4936 test_and_set_bit(HFC_CFG_DIS_ECHANNEL,
4937 &hc->chan[i + 2].cfg); 4937 &hc->chan[i + 2].cfg);
4938 } 4938 }
4939 if (hc->ctype == HFC_TYPE_XHFC) { 4939 if (hc->ctype == HFC_TYPE_XHFC) {
4940 snprintf(name, MISDN_MAX_IDLEN - 1, "xhfc.%d-%d", 4940 snprintf(name, MISDN_MAX_IDLEN - 1, "xhfc.%d-%d",
4941 HFC_cnt + 1, pt + 1); 4941 HFC_cnt + 1, pt + 1);
4942 ret = mISDN_register_device(&dch->dev, NULL, name); 4942 ret = mISDN_register_device(&dch->dev, NULL, name);
4943 } else { 4943 } else {
4944 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-%ds.%d-%d", 4944 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-%ds.%d-%d",
4945 hc->ctype, HFC_cnt + 1, pt + 1); 4945 hc->ctype, HFC_cnt + 1, pt + 1);
4946 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); 4946 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name);
4947 } 4947 }
4948 if (ret) 4948 if (ret)
@@ -4956,7 +4956,7 @@ free_chan:
4956 4956
4957static int 4957static int
4958hfcmulti_init(struct hm_map *m, struct pci_dev *pdev, 4958hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
4959 const struct pci_device_id *ent) 4959 const struct pci_device_id *ent)
4960{ 4960{
4961 int ret_err = 0; 4961 int ret_err = 0;
4962 int pt; 4962 int pt;
@@ -4967,22 +4967,22 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
4967 4967
4968 if (HFC_cnt >= MAX_CARDS) { 4968 if (HFC_cnt >= MAX_CARDS) {
4969 printk(KERN_ERR "too many cards (max=%d).\n", 4969 printk(KERN_ERR "too many cards (max=%d).\n",
4970 MAX_CARDS); 4970 MAX_CARDS);
4971 return -EINVAL; 4971 return -EINVAL;
4972 } 4972 }
4973 if ((type[HFC_cnt] & 0xff) && (type[HFC_cnt] & 0xff) != m->type) { 4973 if ((type[HFC_cnt] & 0xff) && (type[HFC_cnt] & 0xff) != m->type) {
4974 printk(KERN_WARNING "HFC-MULTI: Card '%s:%s' type %d found but " 4974 printk(KERN_WARNING "HFC-MULTI: Card '%s:%s' type %d found but "
4975 "type[%d] %d was supplied as module parameter\n", 4975 "type[%d] %d was supplied as module parameter\n",
4976 m->vendor_name, m->card_name, m->type, HFC_cnt, 4976 m->vendor_name, m->card_name, m->type, HFC_cnt,
4977 type[HFC_cnt] & 0xff); 4977 type[HFC_cnt] & 0xff);
4978 printk(KERN_WARNING "HFC-MULTI: Load module without parameters " 4978 printk(KERN_WARNING "HFC-MULTI: Load module without parameters "
4979 "first, to see cards and their types."); 4979 "first, to see cards and their types.");
4980 return -EINVAL; 4980 return -EINVAL;
4981 } 4981 }
4982 if (debug & DEBUG_HFCMULTI_INIT) 4982 if (debug & DEBUG_HFCMULTI_INIT)
4983 printk(KERN_DEBUG "%s: Registering %s:%s chip type %d (0x%x)\n", 4983 printk(KERN_DEBUG "%s: Registering %s:%s chip type %d (0x%x)\n",
4984 __func__, m->vendor_name, m->card_name, m->type, 4984 __func__, m->vendor_name, m->card_name, m->type,
4985 type[HFC_cnt]); 4985 type[HFC_cnt]);
4986 4986
4987 /* allocate card+fifo structure */ 4987 /* allocate card+fifo structure */
4988 hc = kzalloc(sizeof(struct hfc_multi), GFP_KERNEL); 4988 hc = kzalloc(sizeof(struct hfc_multi), GFP_KERNEL);
@@ -5000,13 +5000,13 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
5000 if (dslot[HFC_cnt] < 0 && hc->ctype == HFC_TYPE_E1) { 5000 if (dslot[HFC_cnt] < 0 && hc->ctype == HFC_TYPE_E1) {
5001 hc->dslot = 0; 5001 hc->dslot = 0;
5002 printk(KERN_INFO "HFC-E1 card has disabled D-channel, but " 5002 printk(KERN_INFO "HFC-E1 card has disabled D-channel, but "
5003 "31 B-channels\n"); 5003 "31 B-channels\n");
5004 } 5004 }
5005 if (dslot[HFC_cnt] > 0 && dslot[HFC_cnt] < 32 5005 if (dslot[HFC_cnt] > 0 && dslot[HFC_cnt] < 32
5006 && hc->ctype == HFC_TYPE_E1) { 5006 && hc->ctype == HFC_TYPE_E1) {
5007 hc->dslot = dslot[HFC_cnt]; 5007 hc->dslot = dslot[HFC_cnt];
5008 printk(KERN_INFO "HFC-E1 card has alternating D-channel on " 5008 printk(KERN_INFO "HFC-E1 card has alternating D-channel on "
5009 "time slot %d\n", dslot[HFC_cnt]); 5009 "time slot %d\n", dslot[HFC_cnt]);
5010 } else 5010 } else
5011 hc->dslot = 16; 5011 hc->dslot = 16;
5012 5012
@@ -5019,7 +5019,7 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
5019 hc->silence = 0x2a; /* alaw silence */ 5019 hc->silence = 0x2a; /* alaw silence */
5020 if ((poll >> 1) > sizeof(hc->silence_data)) { 5020 if ((poll >> 1) > sizeof(hc->silence_data)) {
5021 printk(KERN_ERR "HFCMULTI error: silence_data too small, " 5021 printk(KERN_ERR "HFCMULTI error: silence_data too small, "
5022 "please fix\n"); 5022 "please fix\n");
5023 return -EINVAL; 5023 return -EINVAL;
5024 } 5024 }
5025 for (i = 0; i < (poll >> 1); i++) 5025 for (i = 0; i < (poll >> 1); i++)
@@ -5086,7 +5086,7 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
5086 for (pt = 0; pt < hc->ports; pt++) { 5086 for (pt = 0; pt < hc->ports; pt++) {
5087 if (Port_cnt >= MAX_PORTS) { 5087 if (Port_cnt >= MAX_PORTS) {
5088 printk(KERN_ERR "too many ports (max=%d).\n", 5088 printk(KERN_ERR "too many ports (max=%d).\n",
5089 MAX_PORTS); 5089 MAX_PORTS);
5090 ret_err = -EINVAL; 5090 ret_err = -EINVAL;
5091 goto free_card; 5091 goto free_card;
5092 } 5092 }
@@ -5096,9 +5096,9 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
5096 ret_err = init_multi_port(hc, pt); 5096 ret_err = init_multi_port(hc, pt);
5097 if (debug & DEBUG_HFCMULTI_INIT) 5097 if (debug & DEBUG_HFCMULTI_INIT)
5098 printk(KERN_DEBUG 5098 printk(KERN_DEBUG
5099 "%s: Registering D-channel, card(%d) port(%d)" 5099 "%s: Registering D-channel, card(%d) port(%d)"
5100 "result %d\n", 5100 "result %d\n",
5101 __func__, HFC_cnt + 1, pt, ret_err); 5101 __func__, HFC_cnt + 1, pt, ret_err);
5102 5102
5103 if (ret_err) { 5103 if (ret_err) {
5104 while (pt) { /* release already registered ports */ 5104 while (pt) { /* release already registered ports */
@@ -5129,7 +5129,7 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
5129 pmj = ~pmj & 0xf; 5129 pmj = ~pmj & 0xf;
5130 5130
5131 printk(KERN_INFO "%s: %s DIPs(0x%x) jumpers(0x%x)\n", 5131 printk(KERN_INFO "%s: %s DIPs(0x%x) jumpers(0x%x)\n",
5132 m->vendor_name, m->card_name, dips, pmj); 5132 m->vendor_name, m->card_name, dips, pmj);
5133 break; 5133 break;
5134 case DIP_8S: 5134 case DIP_8S:
5135 /* 5135 /*
@@ -5151,16 +5151,16 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
5151 /* disable PCI auxbridge function */ 5151 /* disable PCI auxbridge function */
5152 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK); 5152 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK);
5153 printk(KERN_INFO "%s: %s DIPs(0x%x)\n", 5153 printk(KERN_INFO "%s: %s DIPs(0x%x)\n",
5154 m->vendor_name, m->card_name, dips); 5154 m->vendor_name, m->card_name, dips);
5155 break; 5155 break;
5156 case DIP_E1: 5156 case DIP_E1:
5157 /* 5157 /*
5158 * get DIP Setting for beroNet E1 cards 5158 * get DIP Setting for beroNet E1 cards
5159 * DIP Setting: collect GPI 4/5/6/7 (R_GPI_IN0) 5159 * DIP Setting: collect GPI 4/5/6/7 (R_GPI_IN0)
5160 */ 5160 */
5161 dips = (~HFC_inb(hc, R_GPI_IN0) & 0xF0)>>4; 5161 dips = (~HFC_inb(hc, R_GPI_IN0) & 0xF0) >> 4;
5162 printk(KERN_INFO "%s: %s DIPs(0x%x)\n", 5162 printk(KERN_INFO "%s: %s DIPs(0x%x)\n",
5163 m->vendor_name, m->card_name, dips); 5163 m->vendor_name, m->card_name, dips);
5164 break; 5164 break;
5165 } 5165 }
5166 5166
@@ -5203,9 +5203,9 @@ static void __devexit hfc_remove_pci(struct pci_dev *pdev)
5203 5203
5204 if (debug) 5204 if (debug)
5205 printk(KERN_INFO "removing hfc_multi card vendor:%x " 5205 printk(KERN_INFO "removing hfc_multi card vendor:%x "
5206 "device:%x subvendor:%x subdevice:%x\n", 5206 "device:%x subvendor:%x subdevice:%x\n",
5207 pdev->vendor, pdev->device, 5207 pdev->vendor, pdev->device,
5208 pdev->subsystem_vendor, pdev->subsystem_device); 5208 pdev->subsystem_vendor, pdev->subsystem_device);
5209 5209
5210 if (card) { 5210 if (card) {
5211 spin_lock_irqsave(&HFClock, flags); 5211 spin_lock_irqsave(&HFClock, flags);
@@ -5214,7 +5214,7 @@ static void __devexit hfc_remove_pci(struct pci_dev *pdev)
5214 } else { 5214 } else {
5215 if (debug) 5215 if (debug)
5216 printk(KERN_DEBUG "%s: drvdata already removed\n", 5216 printk(KERN_DEBUG "%s: drvdata already removed\n",
5217 __func__); 5217 __func__);
5218 } 5218 }
5219} 5219}
5220 5220
@@ -5225,50 +5225,50 @@ static void __devexit hfc_remove_pci(struct pci_dev *pdev)
5225#define VENDOR_PRIM "PrimuX" 5225#define VENDOR_PRIM "PrimuX"
5226 5226
5227static const struct hm_map hfcm_map[] = { 5227static const struct hm_map hfcm_map[] = {
5228/*0*/ {VENDOR_BN, "HFC-1S Card (mini PCI)", 4, 1, 1, 3, 0, DIP_4S, 0, 0}, 5228 /*0*/ {VENDOR_BN, "HFC-1S Card (mini PCI)", 4, 1, 1, 3, 0, DIP_4S, 0, 0},
5229/*1*/ {VENDOR_BN, "HFC-2S Card", 4, 2, 1, 3, 0, DIP_4S, 0, 0}, 5229 /*1*/ {VENDOR_BN, "HFC-2S Card", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5230/*2*/ {VENDOR_BN, "HFC-2S Card (mini PCI)", 4, 2, 1, 3, 0, DIP_4S, 0, 0}, 5230 /*2*/ {VENDOR_BN, "HFC-2S Card (mini PCI)", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5231/*3*/ {VENDOR_BN, "HFC-4S Card", 4, 4, 1, 2, 0, DIP_4S, 0, 0}, 5231 /*3*/ {VENDOR_BN, "HFC-4S Card", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5232/*4*/ {VENDOR_BN, "HFC-4S Card (mini PCI)", 4, 4, 1, 2, 0, 0, 0, 0}, 5232 /*4*/ {VENDOR_BN, "HFC-4S Card (mini PCI)", 4, 4, 1, 2, 0, 0, 0, 0},
5233/*5*/ {VENDOR_CCD, "HFC-4S Eval (old)", 4, 4, 0, 0, 0, 0, 0, 0}, 5233 /*5*/ {VENDOR_CCD, "HFC-4S Eval (old)", 4, 4, 0, 0, 0, 0, 0, 0},
5234/*6*/ {VENDOR_CCD, "HFC-4S IOB4ST", 4, 4, 1, 2, 0, DIP_4S, 0, 0}, 5234 /*6*/ {VENDOR_CCD, "HFC-4S IOB4ST", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5235/*7*/ {VENDOR_CCD, "HFC-4S", 4, 4, 1, 2, 0, 0, 0, 0}, 5235 /*7*/ {VENDOR_CCD, "HFC-4S", 4, 4, 1, 2, 0, 0, 0, 0},
5236/*8*/ {VENDOR_DIG, "HFC-4S Card", 4, 4, 0, 2, 0, 0, HFC_IO_MODE_REGIO, 0}, 5236 /*8*/ {VENDOR_DIG, "HFC-4S Card", 4, 4, 0, 2, 0, 0, HFC_IO_MODE_REGIO, 0},
5237/*9*/ {VENDOR_CCD, "HFC-4S Swyx 4xS0 SX2 QuadBri", 4, 4, 1, 2, 0, 0, 0, 0}, 5237 /*9*/ {VENDOR_CCD, "HFC-4S Swyx 4xS0 SX2 QuadBri", 4, 4, 1, 2, 0, 0, 0, 0},
5238/*10*/ {VENDOR_JH, "HFC-4S (junghanns 2.0)", 4, 4, 1, 2, 0, 0, 0, 0}, 5238 /*10*/ {VENDOR_JH, "HFC-4S (junghanns 2.0)", 4, 4, 1, 2, 0, 0, 0, 0},
5239/*11*/ {VENDOR_PRIM, "HFC-2S Primux Card", 4, 2, 0, 0, 0, 0, 0, 0}, 5239 /*11*/ {VENDOR_PRIM, "HFC-2S Primux Card", 4, 2, 0, 0, 0, 0, 0, 0},
5240 5240
5241/*12*/ {VENDOR_BN, "HFC-8S Card", 8, 8, 1, 0, 0, 0, 0, 0}, 5241 /*12*/ {VENDOR_BN, "HFC-8S Card", 8, 8, 1, 0, 0, 0, 0, 0},
5242/*13*/ {VENDOR_BN, "HFC-8S Card (+)", 8, 8, 1, 8, 0, DIP_8S, 5242 /*13*/ {VENDOR_BN, "HFC-8S Card (+)", 8, 8, 1, 8, 0, DIP_8S,
5243 HFC_IO_MODE_REGIO, 0}, 5243 HFC_IO_MODE_REGIO, 0},
5244/*14*/ {VENDOR_CCD, "HFC-8S Eval (old)", 8, 8, 0, 0, 0, 0, 0, 0}, 5244 /*14*/ {VENDOR_CCD, "HFC-8S Eval (old)", 8, 8, 0, 0, 0, 0, 0, 0},
5245/*15*/ {VENDOR_CCD, "HFC-8S IOB4ST Recording", 8, 8, 1, 0, 0, 0, 0, 0}, 5245 /*15*/ {VENDOR_CCD, "HFC-8S IOB4ST Recording", 8, 8, 1, 0, 0, 0, 0, 0},
5246 5246
5247/*16*/ {VENDOR_CCD, "HFC-8S IOB8ST", 8, 8, 1, 0, 0, 0, 0, 0}, 5247 /*16*/ {VENDOR_CCD, "HFC-8S IOB8ST", 8, 8, 1, 0, 0, 0, 0, 0},
5248/*17*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0}, 5248 /*17*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5249/*18*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0}, 5249 /*18*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5250 5250
5251/*19*/ {VENDOR_BN, "HFC-E1 Card", 1, 1, 0, 1, 0, DIP_E1, 0, 0}, 5251 /*19*/ {VENDOR_BN, "HFC-E1 Card", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5252/*20*/ {VENDOR_BN, "HFC-E1 Card (mini PCI)", 1, 1, 0, 1, 0, 0, 0, 0}, 5252 /*20*/ {VENDOR_BN, "HFC-E1 Card (mini PCI)", 1, 1, 0, 1, 0, 0, 0, 0},
5253/*21*/ {VENDOR_BN, "HFC-E1+ Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0}, 5253 /*21*/ {VENDOR_BN, "HFC-E1+ Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5254/*22*/ {VENDOR_BN, "HFC-E1 Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0}, 5254 /*22*/ {VENDOR_BN, "HFC-E1 Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5255 5255
5256/*23*/ {VENDOR_CCD, "HFC-E1 Eval (old)", 1, 1, 0, 0, 0, 0, 0, 0}, 5256 /*23*/ {VENDOR_CCD, "HFC-E1 Eval (old)", 1, 1, 0, 0, 0, 0, 0, 0},
5257/*24*/ {VENDOR_CCD, "HFC-E1 IOB1E1", 1, 1, 0, 1, 0, 0, 0, 0}, 5257 /*24*/ {VENDOR_CCD, "HFC-E1 IOB1E1", 1, 1, 0, 1, 0, 0, 0, 0},
5258/*25*/ {VENDOR_CCD, "HFC-E1", 1, 1, 0, 1, 0, 0, 0, 0}, 5258 /*25*/ {VENDOR_CCD, "HFC-E1", 1, 1, 0, 1, 0, 0, 0, 0},
5259 5259
5260/*26*/ {VENDOR_CCD, "HFC-4S Speech Design", 4, 4, 0, 0, 0, 0, 5260 /*26*/ {VENDOR_CCD, "HFC-4S Speech Design", 4, 4, 0, 0, 0, 0,
5261 HFC_IO_MODE_PLXSD, 0}, 5261 HFC_IO_MODE_PLXSD, 0},
5262/*27*/ {VENDOR_CCD, "HFC-E1 Speech Design", 1, 1, 0, 0, 0, 0, 5262 /*27*/ {VENDOR_CCD, "HFC-E1 Speech Design", 1, 1, 0, 0, 0, 0,
5263 HFC_IO_MODE_PLXSD, 0}, 5263 HFC_IO_MODE_PLXSD, 0},
5264/*28*/ {VENDOR_CCD, "HFC-4S OpenVox", 4, 4, 1, 0, 0, 0, 0, 0}, 5264 /*28*/ {VENDOR_CCD, "HFC-4S OpenVox", 4, 4, 1, 0, 0, 0, 0, 0},
5265/*29*/ {VENDOR_CCD, "HFC-2S OpenVox", 4, 2, 1, 0, 0, 0, 0, 0}, 5265 /*29*/ {VENDOR_CCD, "HFC-2S OpenVox", 4, 2, 1, 0, 0, 0, 0, 0},
5266/*30*/ {VENDOR_CCD, "HFC-8S OpenVox", 8, 8, 1, 0, 0, 0, 0, 0}, 5266 /*30*/ {VENDOR_CCD, "HFC-8S OpenVox", 8, 8, 1, 0, 0, 0, 0, 0},
5267/*31*/ {VENDOR_CCD, "XHFC-4S Speech Design", 5, 4, 0, 0, 0, 0, 5267 /*31*/ {VENDOR_CCD, "XHFC-4S Speech Design", 5, 4, 0, 0, 0, 0,
5268 HFC_IO_MODE_EMBSD, XHFC_IRQ}, 5268 HFC_IO_MODE_EMBSD, XHFC_IRQ},
5269/*32*/ {VENDOR_JH, "HFC-8S (junghanns)", 8, 8, 1, 0, 0, 0, 0, 0}, 5269 /*32*/ {VENDOR_JH, "HFC-8S (junghanns)", 8, 8, 1, 0, 0, 0, 0, 0},
5270/*33*/ {VENDOR_BN, "HFC-2S Beronet Card PCIe", 4, 2, 1, 3, 0, DIP_4S, 0, 0}, 5270 /*33*/ {VENDOR_BN, "HFC-2S Beronet Card PCIe", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5271/*34*/ {VENDOR_BN, "HFC-4S Beronet Card PCIe", 4, 4, 1, 2, 0, DIP_4S, 0, 0}, 5271 /*34*/ {VENDOR_BN, "HFC-4S Beronet Card PCIe", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5272}; 5272};
5273 5273
5274#undef H 5274#undef H
@@ -5277,83 +5277,83 @@ static struct pci_device_id hfmultipci_ids[] __devinitdata = {
5277 5277
5278 /* Cards with HFC-4S Chip */ 5278 /* Cards with HFC-4S Chip */
5279 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5279 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5280 PCI_SUBDEVICE_ID_CCD_BN1SM, 0, 0, H(0)}, /* BN1S mini PCI */ 5280 PCI_SUBDEVICE_ID_CCD_BN1SM, 0, 0, H(0)}, /* BN1S mini PCI */
5281 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5281 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5282 PCI_SUBDEVICE_ID_CCD_BN2S, 0, 0, H(1)}, /* BN2S */ 5282 PCI_SUBDEVICE_ID_CCD_BN2S, 0, 0, H(1)}, /* BN2S */
5283 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5283 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5284 PCI_SUBDEVICE_ID_CCD_BN2SM, 0, 0, H(2)}, /* BN2S mini PCI */ 5284 PCI_SUBDEVICE_ID_CCD_BN2SM, 0, 0, H(2)}, /* BN2S mini PCI */
5285 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5285 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5286 PCI_SUBDEVICE_ID_CCD_BN4S, 0, 0, H(3)}, /* BN4S */ 5286 PCI_SUBDEVICE_ID_CCD_BN4S, 0, 0, H(3)}, /* BN4S */
5287 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5287 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5288 PCI_SUBDEVICE_ID_CCD_BN4SM, 0, 0, H(4)}, /* BN4S mini PCI */ 5288 PCI_SUBDEVICE_ID_CCD_BN4SM, 0, 0, H(4)}, /* BN4S mini PCI */
5289 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5289 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5290 PCI_DEVICE_ID_CCD_HFC4S, 0, 0, H(5)}, /* Old Eval */ 5290 PCI_DEVICE_ID_CCD_HFC4S, 0, 0, H(5)}, /* Old Eval */
5291 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5291 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5292 PCI_SUBDEVICE_ID_CCD_IOB4ST, 0, 0, H(6)}, /* IOB4ST */ 5292 PCI_SUBDEVICE_ID_CCD_IOB4ST, 0, 0, H(6)}, /* IOB4ST */
5293 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5293 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5294 PCI_SUBDEVICE_ID_CCD_HFC4S, 0, 0, H(7)}, /* 4S */ 5294 PCI_SUBDEVICE_ID_CCD_HFC4S, 0, 0, H(7)}, /* 4S */
5295 { PCI_VENDOR_ID_DIGIUM, PCI_DEVICE_ID_DIGIUM_HFC4S, 5295 { PCI_VENDOR_ID_DIGIUM, PCI_DEVICE_ID_DIGIUM_HFC4S,
5296 PCI_VENDOR_ID_DIGIUM, PCI_DEVICE_ID_DIGIUM_HFC4S, 0, 0, H(8)}, 5296 PCI_VENDOR_ID_DIGIUM, PCI_DEVICE_ID_DIGIUM_HFC4S, 0, 0, H(8)},
5297 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5297 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5298 PCI_SUBDEVICE_ID_CCD_SWYX4S, 0, 0, H(9)}, /* 4S Swyx */ 5298 PCI_SUBDEVICE_ID_CCD_SWYX4S, 0, 0, H(9)}, /* 4S Swyx */
5299 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5299 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5300 PCI_SUBDEVICE_ID_CCD_JH4S20, 0, 0, H(10)}, 5300 PCI_SUBDEVICE_ID_CCD_JH4S20, 0, 0, H(10)},
5301 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5301 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5302 PCI_SUBDEVICE_ID_CCD_PMX2S, 0, 0, H(11)}, /* Primux */ 5302 PCI_SUBDEVICE_ID_CCD_PMX2S, 0, 0, H(11)}, /* Primux */
5303 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5303 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5304 PCI_SUBDEVICE_ID_CCD_OV4S, 0, 0, H(28)}, /* OpenVox 4 */ 5304 PCI_SUBDEVICE_ID_CCD_OV4S, 0, 0, H(28)}, /* OpenVox 4 */
5305 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5305 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5306 PCI_SUBDEVICE_ID_CCD_OV2S, 0, 0, H(29)}, /* OpenVox 2 */ 5306 PCI_SUBDEVICE_ID_CCD_OV2S, 0, 0, H(29)}, /* OpenVox 2 */
5307 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5307 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5308 0xb761, 0, 0, H(33)}, /* BN2S PCIe */ 5308 0xb761, 0, 0, H(33)}, /* BN2S PCIe */
5309 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD, 5309 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
5310 0xb762, 0, 0, H(34)}, /* BN4S PCIe */ 5310 0xb762, 0, 0, H(34)}, /* BN4S PCIe */
5311 5311
5312 /* Cards with HFC-8S Chip */ 5312 /* Cards with HFC-8S Chip */
5313 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5313 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5314 PCI_SUBDEVICE_ID_CCD_BN8S, 0, 0, H(12)}, /* BN8S */ 5314 PCI_SUBDEVICE_ID_CCD_BN8S, 0, 0, H(12)}, /* BN8S */
5315 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5315 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5316 PCI_SUBDEVICE_ID_CCD_BN8SP, 0, 0, H(13)}, /* BN8S+ */ 5316 PCI_SUBDEVICE_ID_CCD_BN8SP, 0, 0, H(13)}, /* BN8S+ */
5317 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5317 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5318 PCI_DEVICE_ID_CCD_HFC8S, 0, 0, H(14)}, /* old Eval */ 5318 PCI_DEVICE_ID_CCD_HFC8S, 0, 0, H(14)}, /* old Eval */
5319 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5319 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5320 PCI_SUBDEVICE_ID_CCD_IOB8STR, 0, 0, H(15)}, /* IOB8ST Recording */ 5320 PCI_SUBDEVICE_ID_CCD_IOB8STR, 0, 0, H(15)}, /* IOB8ST Recording */
5321 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5321 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5322 PCI_SUBDEVICE_ID_CCD_IOB8ST, 0, 0, H(16)}, /* IOB8ST */ 5322 PCI_SUBDEVICE_ID_CCD_IOB8ST, 0, 0, H(16)}, /* IOB8ST */
5323 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5323 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5324 PCI_SUBDEVICE_ID_CCD_IOB8ST_1, 0, 0, H(17)}, /* IOB8ST */ 5324 PCI_SUBDEVICE_ID_CCD_IOB8ST_1, 0, 0, H(17)}, /* IOB8ST */
5325 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5325 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5326 PCI_SUBDEVICE_ID_CCD_HFC8S, 0, 0, H(18)}, /* 8S */ 5326 PCI_SUBDEVICE_ID_CCD_HFC8S, 0, 0, H(18)}, /* 8S */
5327 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5327 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5328 PCI_SUBDEVICE_ID_CCD_OV8S, 0, 0, H(30)}, /* OpenVox 8 */ 5328 PCI_SUBDEVICE_ID_CCD_OV8S, 0, 0, H(30)}, /* OpenVox 8 */
5329 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5329 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5330 PCI_SUBDEVICE_ID_CCD_JH8S, 0, 0, H(32)}, /* Junganns 8S */ 5330 PCI_SUBDEVICE_ID_CCD_JH8S, 0, 0, H(32)}, /* Junganns 8S */
5331 5331
5332 5332
5333 /* Cards with HFC-E1 Chip */ 5333 /* Cards with HFC-E1 Chip */
5334 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5334 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5335 PCI_SUBDEVICE_ID_CCD_BNE1, 0, 0, H(19)}, /* BNE1 */ 5335 PCI_SUBDEVICE_ID_CCD_BNE1, 0, 0, H(19)}, /* BNE1 */
5336 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5336 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5337 PCI_SUBDEVICE_ID_CCD_BNE1M, 0, 0, H(20)}, /* BNE1 mini PCI */ 5337 PCI_SUBDEVICE_ID_CCD_BNE1M, 0, 0, H(20)}, /* BNE1 mini PCI */
5338 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5338 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5339 PCI_SUBDEVICE_ID_CCD_BNE1DP, 0, 0, H(21)}, /* BNE1 + (Dual) */ 5339 PCI_SUBDEVICE_ID_CCD_BNE1DP, 0, 0, H(21)}, /* BNE1 + (Dual) */
5340 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5340 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5341 PCI_SUBDEVICE_ID_CCD_BNE1D, 0, 0, H(22)}, /* BNE1 (Dual) */ 5341 PCI_SUBDEVICE_ID_CCD_BNE1D, 0, 0, H(22)}, /* BNE1 (Dual) */
5342 5342
5343 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5343 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5344 PCI_DEVICE_ID_CCD_HFCE1, 0, 0, H(23)}, /* Old Eval */ 5344 PCI_DEVICE_ID_CCD_HFCE1, 0, 0, H(23)}, /* Old Eval */
5345 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5345 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5346 PCI_SUBDEVICE_ID_CCD_IOB1E1, 0, 0, H(24)}, /* IOB1E1 */ 5346 PCI_SUBDEVICE_ID_CCD_IOB1E1, 0, 0, H(24)}, /* IOB1E1 */
5347 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5347 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5348 PCI_SUBDEVICE_ID_CCD_HFCE1, 0, 0, H(25)}, /* E1 */ 5348 PCI_SUBDEVICE_ID_CCD_HFCE1, 0, 0, H(25)}, /* E1 */
5349 5349
5350 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_CCD, 5350 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_CCD,
5351 PCI_SUBDEVICE_ID_CCD_SPD4S, 0, 0, H(26)}, /* PLX PCI Bridge */ 5351 PCI_SUBDEVICE_ID_CCD_SPD4S, 0, 0, H(26)}, /* PLX PCI Bridge */
5352 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_CCD, 5352 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_CCD,
5353 PCI_SUBDEVICE_ID_CCD_SPDE1, 0, 0, H(27)}, /* PLX PCI Bridge */ 5353 PCI_SUBDEVICE_ID_CCD_SPDE1, 0, 0, H(27)}, /* PLX PCI Bridge */
5354 5354
5355 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5355 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5356 PCI_SUBDEVICE_ID_CCD_JHSE1, 0, 0, H(25)}, /* Junghanns E1 */ 5356 PCI_SUBDEVICE_ID_CCD_JHSE1, 0, 0, H(25)}, /* Junghanns E1 */
5357 5357
5358 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_HFC4S), 0 }, 5358 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_HFC4S), 0 },
5359 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_HFC8S), 0 }, 5359 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_HFC8S), 0 },
@@ -5371,16 +5371,16 @@ hfcmulti_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
5371 int ret; 5371 int ret;
5372 5372
5373 if (m == NULL && ent->vendor == PCI_VENDOR_ID_CCD && ( 5373 if (m == NULL && ent->vendor == PCI_VENDOR_ID_CCD && (
5374 ent->device == PCI_DEVICE_ID_CCD_HFC4S || 5374 ent->device == PCI_DEVICE_ID_CCD_HFC4S ||
5375 ent->device == PCI_DEVICE_ID_CCD_HFC8S || 5375 ent->device == PCI_DEVICE_ID_CCD_HFC8S ||
5376 ent->device == PCI_DEVICE_ID_CCD_HFCE1)) { 5376 ent->device == PCI_DEVICE_ID_CCD_HFCE1)) {
5377 printk(KERN_ERR 5377 printk(KERN_ERR
5378 "Unknown HFC multiport controller (vendor:%04x device:%04x " 5378 "Unknown HFC multiport controller (vendor:%04x device:%04x "
5379 "subvendor:%04x subdevice:%04x)\n", pdev->vendor, 5379 "subvendor:%04x subdevice:%04x)\n", pdev->vendor,
5380 pdev->device, pdev->subsystem_vendor, 5380 pdev->device, pdev->subsystem_vendor,
5381 pdev->subsystem_device); 5381 pdev->subsystem_device);
5382 printk(KERN_ERR 5382 printk(KERN_ERR
5383 "Please contact the driver maintainer for support.\n"); 5383 "Please contact the driver maintainer for support.\n");
5384 return -ENODEV; 5384 return -ENODEV;
5385 } 5385 }
5386 ret = hfcmulti_init(m, pdev, ent); 5386 ret = hfcmulti_init(m, pdev, ent);
@@ -5453,7 +5453,7 @@ HFCmulti_init(void)
5453 break; 5453 break;
5454 default: 5454 default:
5455 printk(KERN_ERR 5455 printk(KERN_ERR
5456 "%s: Wrong poll value (%d).\n", __func__, poll); 5456 "%s: Wrong poll value (%d).\n", __func__, poll);
5457 err = -EINVAL; 5457 err = -EINVAL;
5458 return err; 5458 return err;
5459 5459
@@ -5485,7 +5485,7 @@ HFCmulti_init(void)
5485 err = hfcmulti_init(&m, NULL, NULL); 5485 err = hfcmulti_init(&m, NULL, NULL);
5486 if (err) { 5486 if (err) {
5487 printk(KERN_ERR "error registering embedded driver: " 5487 printk(KERN_ERR "error registering embedded driver: "
5488 "%x\n", err); 5488 "%x\n", err);
5489 return err; 5489 return err;
5490 } 5490 }
5491 HFC_cnt++; 5491 HFC_cnt++;
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-20 09:23:37 -0400