Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq code updates from Thomas Gleixner:
 "The irq department proudly presents:

   - Another tree wide sweep of irq infrastructure abuse.  Clear winner
     of the trainwreck engineering contest was:
         #include "../../../kernel/irq/settings.h"

   - Tree wide update of irq_set_affinity() callbacks which miss a cpu
     online check when picking a single cpu out of the affinity mask.

   - Tree wide consolidation of interrupt statistics.

   - Updates to the threaded interrupt infrastructure to allow explicit
     wakeup of the interrupt thread and a variant of synchronize_irq()
     which synchronizes only the hard interrupt handler.  Both are
     needed to replace the homebrewn thread handling in the mmc/sdhci
     code.

   - New irq chip callbacks to allow proper support for GPIO based irqs.
     The GPIO based interrupts need to request/release GPIO resources
     from request/free_irq.

   - A few new ARM interrupt chips.  No revolutionary new hardware, just
     differently wreckaged variations of the scheme.

   - Small improvments, cleanups and updates all over the place"

I was hoping that that trainwreck engineering contest was a April Fools'
joke.  But no.

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (68 commits)
  irqchip: sun7i/sun6i: Disable NMI before registering the handler
  ARM: sun7i/sun6i: dts: Fix IRQ number for sun6i NMI controller
  ARM: sun7i/sun6i: irqchip: Update the documentation
  ARM: sun7i/sun6i: dts: Add NMI irqchip support
  ARM: sun7i/sun6i: irqchip: Add irqchip driver for NMI controller
  genirq: Export symbol no_action()
  arm: omap: Fix typo in ams-delta-fiq.c
  m68k: atari: Fix the last kernel_stat.h fallout
  irqchip: sun4i: Simplify sun4i_irq_ack
  irqchip: sun4i: Use handle_fasteoi_irq for all interrupts
  genirq: procfs: Make smp_affinity values go+r
  softirq: Add linux/irq.h to make it compile again
  m68k: amiga: Add linux/irq.h to make it compile again
  irqchip: sun4i: Don't ack IRQs > 0, fix acking of IRQ 0
  irqchip: sun4i: Fix a comment about mask register initialization
  irqchip: sun4i: Fix irq 0 not working
  genirq: Add a new IRQCHIP_EOI_THREADED flag
  genirq: Document IRQCHIP_ONESHOT_SAFE flag
  ARM: sunxi: dt: Convert to the new irq controller compatibles
  irqchip: sunxi: Change compatibles
  ...

1 files changed, 70 insertions, 28 deletions

diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 540956465ed2..41be897df8d5 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -18,6 +18,7 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#include <linux/irqchip/chained_irq.h>
 #include <linux/io.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
@@ -42,6 +43,7 @@
 #define ARMADA_370_XP_INT_SOURCE_CTL(irq)       (0x100 + irq*4)
 
 #define ARMADA_370_XP_CPU_INTACK_OFFS           (0x44)
+#define ARMADA_375_PPI_CAUSE                    (0x10)
 
 #define ARMADA_370_XP_SW_TRIG_INT_OFFS           (0x4)
 #define ARMADA_370_XP_IN_DRBEL_MSK_OFFS          (0xc)
@@ -352,7 +354,63 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
         .xlate = irq_domain_xlate_onecell,
 };
 
-static asmlinkage void __exception_irq_entry
+#ifdef CONFIG_PCI_MSI
+static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained)
+{
+        u32 msimask, msinr;
+
+        msimask = readl_relaxed(per_cpu_int_base +
+                                ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS)
+                & PCI_MSI_DOORBELL_MASK;
+
+        writel(~msimask, per_cpu_int_base +
+               ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
+
+        for (msinr = PCI_MSI_DOORBELL_START;
+             msinr < PCI_MSI_DOORBELL_END; msinr++) {
+                int irq;
+
+                if (!(msimask & BIT(msinr)))
+                        continue;
+
+                irq = irq_find_mapping(armada_370_xp_msi_domain,
+                                       msinr - 16);
+
+                if (is_chained)
+                        generic_handle_irq(irq);
+                else
+                        handle_IRQ(irq, regs);
+        }
+}
+#else
+static void armada_370_xp_handle_msi_irq(struct pt_regs *r, bool b) {}
+#endif
+
+static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq,
+                                                  struct irq_desc *desc)
+{
+        struct irq_chip *chip = irq_get_chip(irq);
+        unsigned long irqmap, irqn;
+        unsigned int cascade_irq;
+
+        chained_irq_enter(chip, desc);
+
+        irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE);
+
+        if (irqmap & BIT(0)) {
+                armada_370_xp_handle_msi_irq(NULL, true);
+                irqmap &= ~BIT(0);
+        }
+
+        for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {
+                cascade_irq = irq_find_mapping(armada_370_xp_mpic_domain, irqn);
+                generic_handle_irq(cascade_irq);
+        }
+
+        chained_irq_exit(chip, desc);
+}
+
+static void __exception_irq_entry
 armada_370_xp_handle_irq(struct pt_regs *regs)
 {
         u32 irqstat, irqnr;
@@ -372,31 +430,9 @@ armada_370_xp_handle_irq(struct pt_regs *regs)
                         continue;
                 }
 
-#ifdef CONFIG_PCI_MSI
                 /* MSI handling */
-                if (irqnr == 1) {
-                        u32 msimask, msinr;
-
-                        msimask = readl_relaxed(per_cpu_int_base +
-                                                ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS)
-                                & PCI_MSI_DOORBELL_MASK;
-
-                        writel(~msimask, per_cpu_int_base +
-                               ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
-
-                        for (msinr = PCI_MSI_DOORBELL_START;
-                             msinr < PCI_MSI_DOORBELL_END; msinr++) {
-                                int irq;
-
-                                if (!(msimask & BIT(msinr)))
-                                        continue;
-
-                                irq = irq_find_mapping(armada_370_xp_msi_domain,
-                                                       msinr - 16);
-                                handle_IRQ(irq, regs);
-                        }
-                }
-#endif
+                if (irqnr == 1)
+                        armada_370_xp_handle_msi_irq(regs, false);
 
 #ifdef CONFIG_SMP
                 /* IPI Handling */
@@ -427,6 +463,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
                                              struct device_node *parent)
 {
         struct resource main_int_res, per_cpu_int_res;
+        int parent_irq;
         u32 control;
 
         BUG_ON(of_address_to_resource(node, 0, &main_int_res));
@@ -455,8 +492,6 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
 
         BUG_ON(!armada_370_xp_mpic_domain);
 
-        irq_set_default_host(armada_370_xp_mpic_domain);
-
 #ifdef CONFIG_SMP
         armada_xp_mpic_smp_cpu_init();
 
@@ -472,7 +507,14 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
 
         armada_370_xp_msi_init(node, main_int_res.start);
 
-        set_handle_irq(armada_370_xp_handle_irq);
+        parent_irq = irq_of_parse_and_map(node, 0);
+        if (parent_irq <= 0) {
+                irq_set_default_host(armada_370_xp_mpic_domain);
+                set_handle_irq(armada_370_xp_handle_irq);
+        } else {
+                irq_set_chained_handler(parent_irq,
+                                        armada_370_xp_mpic_handle_cascade_irq);
+        }
 
         return 0;
 }