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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2014-05-15 06:40:45 -0400
committerJoerg Roedel <jroedel@suse.de>2014-05-26 05:22:23 -0400
commitbc28191b165bb07f2817219da1b8c20246d022f6 (patch)
tree307abc0cd0ea048714accee6f7404406c9dbbdcb /drivers/iommu
parent251dac410d29c8ab432034e67472a53b6c3e497e (diff)
iommu/ipmmu-vmsa: Define driver-specific page directory sizes
The PTRS_PER_(PUD|PGD|PMD|PTE) macros evaluate to different values depending on whether LPAE is enabled. The IPMMU driver uses a long descriptor format regardless of LPAE, making those macros mismatch the IPMMU configuration on non-LPAE systems. Replace the macros by driver-specific versions that always evaluate to the right value. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu')
-rw-r--r--drivers/iommu/ipmmu-vmsa.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
index 0fd322dcb4eb..f8f5b194a360 100644
--- a/drivers/iommu/ipmmu-vmsa.c
+++ b/drivers/iommu/ipmmu-vmsa.c
@@ -209,6 +209,11 @@ static LIST_HEAD(ipmmu_devices);
209#define ARM_VMSA_PTE_MEMATTR_NC (((pteval_t)0x5) << 2) 209#define ARM_VMSA_PTE_MEMATTR_NC (((pteval_t)0x5) << 2)
210#define ARM_VMSA_PTE_MEMATTR_DEV (((pteval_t)0x1) << 2) 210#define ARM_VMSA_PTE_MEMATTR_DEV (((pteval_t)0x1) << 2)
211 211
212#define IPMMU_PTRS_PER_PTE 512
213#define IPMMU_PTRS_PER_PMD 512
214#define IPMMU_PTRS_PER_PGD 4
215#define IPMMU_PTRS_PER_PUD 1
216
212/* ----------------------------------------------------------------------------- 217/* -----------------------------------------------------------------------------
213 * Read/Write Access 218 * Read/Write Access
214 */ 219 */
@@ -327,7 +332,7 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
327 332
328 /* TTBR0 */ 333 /* TTBR0 */
329 ipmmu_flush_pgtable(domain->mmu, domain->pgd, 334 ipmmu_flush_pgtable(domain->mmu, domain->pgd,
330 PTRS_PER_PGD * sizeof(*domain->pgd)); 335 IPMMU_PTRS_PER_PGD * sizeof(*domain->pgd));
331 ttbr = __pa(domain->pgd); 336 ttbr = __pa(domain->pgd);
332 ipmmu_ctx_write(domain, IMTTLBR0, ttbr); 337 ipmmu_ctx_write(domain, IMTTLBR0, ttbr);
333 ipmmu_ctx_write(domain, IMTTUBR0, ttbr >> 32); 338 ipmmu_ctx_write(domain, IMTTUBR0, ttbr >> 32);
@@ -469,7 +474,7 @@ static void ipmmu_free_pmds(pud_t *pud)
469 unsigned int i; 474 unsigned int i;
470 475
471 pmd = pmd_base; 476 pmd = pmd_base;
472 for (i = 0; i < PTRS_PER_PMD; ++i) { 477 for (i = 0; i < IPMMU_PTRS_PER_PMD; ++i) {
473 if (pmd_none(*pmd)) 478 if (pmd_none(*pmd))
474 continue; 479 continue;
475 480
@@ -486,7 +491,7 @@ static void ipmmu_free_puds(pgd_t *pgd)
486 unsigned int i; 491 unsigned int i;
487 492
488 pud = pud_base; 493 pud = pud_base;
489 for (i = 0; i < PTRS_PER_PUD; ++i) { 494 for (i = 0; i < IPMMU_PTRS_PER_PUD; ++i) {
490 if (pud_none(*pud)) 495 if (pud_none(*pud))
491 continue; 496 continue;
492 497
@@ -509,7 +514,7 @@ static void ipmmu_free_pgtables(struct ipmmu_vmsa_domain *domain)
509 * tables. 514 * tables.
510 */ 515 */
511 pgd = pgd_base; 516 pgd = pgd_base;
512 for (i = 0; i < PTRS_PER_PGD; ++i) { 517 for (i = 0; i < IPMMU_PTRS_PER_PGD; ++i) {
513 if (pgd_none(*pgd)) 518 if (pgd_none(*pgd))
514 continue; 519 continue;
515 ipmmu_free_puds(pgd); 520 ipmmu_free_puds(pgd);
@@ -694,7 +699,7 @@ static int ipmmu_domain_init(struct iommu_domain *io_domain)
694 699
695 spin_lock_init(&domain->lock); 700 spin_lock_init(&domain->lock);
696 701
697 domain->pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); 702 domain->pgd = kzalloc(IPMMU_PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL);
698 if (!domain->pgd) { 703 if (!domain->pgd) {
699 kfree(domain); 704 kfree(domain);
700 return -ENOMEM; 705 return -ENOMEM;