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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-01-21 13:48:59 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-02-19 18:21:50 -0500
commit210561ffd72d00eccf12c0131b8024d5436bae95 (patch)
treef6c0017fccd734fd80e7c8a5fa9fac10645b33f5 /drivers/iommu/intel-iommu.c
parentda88a5f7f7d434e2cde1b3e19d952e6d84533662 (diff)
intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets
We already have the quirk entry for the mobile platform, but also reports on some desktop versions. So be paranoid and set it everywhere. References: http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg33138.html Cc: stable@vger.kernel.org Cc: David Woodhouse <dwmw2@infradead.org> Cc: "Sankaran, Rajesh" <rajesh.sankaran@intel.com> Reported-and-tested-by: Mihai Moldovan <ionic@ionic.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/iommu/intel-iommu.c')
-rw-r--r--drivers/iommu/intel-iommu.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index eca28014ef3e..f1e7b86a7c37 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -4253,13 +4253,19 @@ static void quirk_iommu_rwbf(struct pci_dev *dev)
4253{ 4253{
4254 /* 4254 /*
4255 * Mobile 4 Series Chipset neglects to set RWBF capability, 4255 * Mobile 4 Series Chipset neglects to set RWBF capability,
4256 * but needs it: 4256 * but needs it. Same seems to hold for the desktop versions.
4257 */ 4257 */
4258 printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n"); 4258 printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");
4259 rwbf_quirk = 1; 4259 rwbf_quirk = 1;
4260} 4260}
4261 4261
4262DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf); 4262DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
4263DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_rwbf);
4264DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf);
4265DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_rwbf);
4266DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_rwbf);
4267DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_rwbf);
4268DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_rwbf);
4263 4269
4264#define GGC 0x52 4270#define GGC 0x52
4265#define GGC_MEMORY_SIZE_MASK (0xf << 8) 4271#define GGC_MEMORY_SIZE_MASK (0xf << 8)