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authorStephen Warren <swarren@nvidia.com>2013-02-15 20:04:12 -0500
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2013-02-15 21:52:58 -0500
commit9eee07d39fa606a191ae65d3c0e12771a80e70ca (patch)
treedbba2906a34808f5b0bba01a5a3b6d978923a645 /drivers/input
parent0b85bf78d4aedfdd4bcb1b848045111a5b840310 (diff)
Input: tegra-kbc - require CONFIG_OF, remove platform data
Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Delete the header that defines it, and rework the driver to parse the device tree directly into struct tegra_kbc. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Diffstat (limited to 'drivers/input')
-rw-r--r--drivers/input/keyboard/Kconfig2
-rw-r--r--drivers/input/keyboard/tegra-kbc.c195
2 files changed, 93 insertions, 104 deletions
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 72377737eec8..992137cf3a64 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -420,7 +420,7 @@ config KEYBOARD_NOMADIK
420 420
421config KEYBOARD_TEGRA 421config KEYBOARD_TEGRA
422 tristate "NVIDIA Tegra internal matrix keyboard controller support" 422 tristate "NVIDIA Tegra internal matrix keyboard controller support"
423 depends on ARCH_TEGRA 423 depends on ARCH_TEGRA && OF
424 select INPUT_MATRIXKMAP 424 select INPUT_MATRIXKMAP
425 help 425 help
426 Say Y here if you want to use a matrix keyboard connected directly 426 Say Y here if you want to use a matrix keyboard connected directly
diff --git a/drivers/input/keyboard/tegra-kbc.c b/drivers/input/keyboard/tegra-kbc.c
index 4526bdd36022..d89e7d392d1e 100644
--- a/drivers/input/keyboard/tegra-kbc.c
+++ b/drivers/input/keyboard/tegra-kbc.c
@@ -29,9 +29,16 @@
29#include <linux/of.h> 29#include <linux/of.h>
30#include <linux/clk.h> 30#include <linux/clk.h>
31#include <linux/slab.h> 31#include <linux/slab.h>
32#include <linux/input/tegra_kbc.h> 32#include <linux/input/matrix_keypad.h>
33#include <mach/clk.h> 33#include <mach/clk.h>
34 34
35#define KBC_MAX_GPIO 24
36#define KBC_MAX_KPENT 8
37
38#define KBC_MAX_ROW 16
39#define KBC_MAX_COL 8
40#define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL)
41
35#define KBC_MAX_DEBOUNCE_CNT 0x3ffu 42#define KBC_MAX_DEBOUNCE_CNT 0x3ffu
36 43
37/* KBC row scan time and delay for beginning the row scan. */ 44/* KBC row scan time and delay for beginning the row scan. */
@@ -67,10 +74,27 @@
67 74
68#define KBC_ROW_SHIFT 3 75#define KBC_ROW_SHIFT 3
69 76
77enum tegra_pin_type {
78 PIN_CFG_IGNORE,
79 PIN_CFG_COL,
80 PIN_CFG_ROW,
81};
82
83struct tegra_kbc_pin_cfg {
84 enum tegra_pin_type type;
85 unsigned char num;
86};
87
70struct tegra_kbc { 88struct tegra_kbc {
89 struct device *dev;
90 unsigned int debounce_cnt;
91 unsigned int repeat_cnt;
92 struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
93 const struct matrix_keymap_data *keymap_data;
94 bool wakeup;
71 void __iomem *mmio; 95 void __iomem *mmio;
72 struct input_dev *idev; 96 struct input_dev *idev;
73 unsigned int irq; 97 int irq;
74 spinlock_t lock; 98 spinlock_t lock;
75 unsigned int repoll_dly; 99 unsigned int repoll_dly;
76 unsigned long cp_dly_jiffies; 100 unsigned long cp_dly_jiffies;
@@ -78,7 +102,6 @@ struct tegra_kbc {
78 bool use_fn_map; 102 bool use_fn_map;
79 bool use_ghost_filter; 103 bool use_ghost_filter;
80 bool keypress_caused_wake; 104 bool keypress_caused_wake;
81 const struct tegra_kbc_platform_data *pdata;
82 unsigned short keycode[KBC_MAX_KEY * 2]; 105 unsigned short keycode[KBC_MAX_KEY * 2];
83 unsigned short current_keys[KBC_MAX_KPENT]; 106 unsigned short current_keys[KBC_MAX_KPENT];
84 unsigned int num_pressed_keys; 107 unsigned int num_pressed_keys;
@@ -286,12 +309,11 @@ static irqreturn_t tegra_kbc_isr(int irq, void *args)
286 309
287static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter) 310static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
288{ 311{
289 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
290 int i; 312 int i;
291 unsigned int rst_val; 313 unsigned int rst_val;
292 314
293 /* Either mask all keys or none. */ 315 /* Either mask all keys or none. */
294 rst_val = (filter && !pdata->wakeup) ? ~0 : 0; 316 rst_val = (filter && !kbc->wakeup) ? ~0 : 0;
295 317
296 for (i = 0; i < KBC_MAX_ROW; i++) 318 for (i = 0; i < KBC_MAX_ROW; i++)
297 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4); 319 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
@@ -299,7 +321,6 @@ static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
299 321
300static void tegra_kbc_config_pins(struct tegra_kbc *kbc) 322static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
301{ 323{
302 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
303 int i; 324 int i;
304 325
305 for (i = 0; i < KBC_MAX_GPIO; i++) { 326 for (i = 0; i < KBC_MAX_GPIO; i++) {
@@ -315,13 +336,13 @@ static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
315 row_cfg &= ~r_mask; 336 row_cfg &= ~r_mask;
316 col_cfg &= ~c_mask; 337 col_cfg &= ~c_mask;
317 338
318 switch (pdata->pin_cfg[i].type) { 339 switch (kbc->pin_cfg[i].type) {
319 case PIN_CFG_ROW: 340 case PIN_CFG_ROW:
320 row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft; 341 row_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << r_shft;
321 break; 342 break;
322 343
323 case PIN_CFG_COL: 344 case PIN_CFG_COL:
324 col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft; 345 col_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << c_shft;
325 break; 346 break;
326 347
327 case PIN_CFG_IGNORE: 348 case PIN_CFG_IGNORE:
@@ -335,7 +356,6 @@ static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
335 356
336static int tegra_kbc_start(struct tegra_kbc *kbc) 357static int tegra_kbc_start(struct tegra_kbc *kbc)
337{ 358{
338 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
339 unsigned int debounce_cnt; 359 unsigned int debounce_cnt;
340 u32 val = 0; 360 u32 val = 0;
341 361
@@ -350,10 +370,10 @@ static int tegra_kbc_start(struct tegra_kbc *kbc)
350 tegra_kbc_config_pins(kbc); 370 tegra_kbc_config_pins(kbc);
351 tegra_kbc_setup_wakekeys(kbc, false); 371 tegra_kbc_setup_wakekeys(kbc, false);
352 372
353 writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0); 373 writel(kbc->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
354 374
355 /* Keyboard debounce count is maximum of 12 bits. */ 375 /* Keyboard debounce count is maximum of 12 bits. */
356 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); 376 debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
357 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt); 377 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
358 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */ 378 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
359 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */ 379 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
@@ -420,21 +440,20 @@ static void tegra_kbc_close(struct input_dev *dev)
420 return tegra_kbc_stop(kbc); 440 return tegra_kbc_stop(kbc);
421} 441}
422 442
423static bool 443static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc,
424tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata, 444 unsigned int *num_rows)
425 struct device *dev, unsigned int *num_rows)
426{ 445{
427 int i; 446 int i;
428 447
429 *num_rows = 0; 448 *num_rows = 0;
430 449
431 for (i = 0; i < KBC_MAX_GPIO; i++) { 450 for (i = 0; i < KBC_MAX_GPIO; i++) {
432 const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i]; 451 const struct tegra_kbc_pin_cfg *pin_cfg = &kbc->pin_cfg[i];
433 452
434 switch (pin_cfg->type) { 453 switch (pin_cfg->type) {
435 case PIN_CFG_ROW: 454 case PIN_CFG_ROW:
436 if (pin_cfg->num >= KBC_MAX_ROW) { 455 if (pin_cfg->num >= KBC_MAX_ROW) {
437 dev_err(dev, 456 dev_err(kbc->dev,
438 "pin_cfg[%d]: invalid row number %d\n", 457 "pin_cfg[%d]: invalid row number %d\n",
439 i, pin_cfg->num); 458 i, pin_cfg->num);
440 return false; 459 return false;
@@ -444,7 +463,7 @@ tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
444 463
445 case PIN_CFG_COL: 464 case PIN_CFG_COL:
446 if (pin_cfg->num >= KBC_MAX_COL) { 465 if (pin_cfg->num >= KBC_MAX_COL) {
447 dev_err(dev, 466 dev_err(kbc->dev,
448 "pin_cfg[%d]: invalid column number %d\n", 467 "pin_cfg[%d]: invalid column number %d\n",
449 i, pin_cfg->num); 468 i, pin_cfg->num);
450 return false; 469 return false;
@@ -455,7 +474,7 @@ tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
455 break; 474 break;
456 475
457 default: 476 default:
458 dev_err(dev, 477 dev_err(kbc->dev,
459 "pin_cfg[%d]: invalid entry type %d\n", 478 "pin_cfg[%d]: invalid entry type %d\n",
460 pin_cfg->type, pin_cfg->num); 479 pin_cfg->type, pin_cfg->num);
461 return false; 480 return false;
@@ -465,12 +484,9 @@ tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
465 return true; 484 return true;
466} 485}
467 486
468#ifdef CONFIG_OF 487static int tegra_kbc_parse_dt(struct tegra_kbc *kbc)
469static struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata(
470 struct platform_device *pdev)
471{ 488{
472 struct tegra_kbc_platform_data *pdata; 489 struct device_node *np = kbc->dev->of_node;
473 struct device_node *np = pdev->dev.of_node;
474 u32 prop; 490 u32 prop;
475 int i; 491 int i;
476 u32 num_rows = 0; 492 u32 num_rows = 0;
@@ -480,109 +496,96 @@ static struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata(
480 int proplen; 496 int proplen;
481 int ret; 497 int ret;
482 498
483 if (!np) {
484 dev_err(&pdev->dev, "device tree data is missing\n");
485 return ERR_PTR(-ENOENT);
486 }
487
488 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
489 if (!pdata)
490 return ERR_PTR(-ENOMEM);
491
492 if (!of_property_read_u32(np, "nvidia,debounce-delay-ms", &prop)) 499 if (!of_property_read_u32(np, "nvidia,debounce-delay-ms", &prop))
493 pdata->debounce_cnt = prop; 500 kbc->debounce_cnt = prop;
494 501
495 if (!of_property_read_u32(np, "nvidia,repeat-delay-ms", &prop)) 502 if (!of_property_read_u32(np, "nvidia,repeat-delay-ms", &prop))
496 pdata->repeat_cnt = prop; 503 kbc->repeat_cnt = prop;
497 504
498 if (of_find_property(np, "nvidia,needs-ghost-filter", NULL)) 505 if (of_find_property(np, "nvidia,needs-ghost-filter", NULL))
499 pdata->use_ghost_filter = true; 506 kbc->use_ghost_filter = true;
500 507
501 if (of_find_property(np, "nvidia,wakeup-source", NULL)) 508 if (of_find_property(np, "nvidia,wakeup-source", NULL))
502 pdata->wakeup = true; 509 kbc->wakeup = true;
503 510
504 if (!of_get_property(np, "nvidia,kbc-row-pins", &proplen)) { 511 if (!of_get_property(np, "nvidia,kbc-row-pins", &proplen)) {
505 dev_err(&pdev->dev, "property nvidia,kbc-row-pins not found\n"); 512 dev_err(kbc->dev, "property nvidia,kbc-row-pins not found\n");
506 return ERR_PTR(-ENOENT); 513 return -ENOENT;
507 } 514 }
508 num_rows = proplen / sizeof(u32); 515 num_rows = proplen / sizeof(u32);
509 516
510 if (!of_get_property(np, "nvidia,kbc-col-pins", &proplen)) { 517 if (!of_get_property(np, "nvidia,kbc-col-pins", &proplen)) {
511 dev_err(&pdev->dev, "property nvidia,kbc-col-pins not found\n"); 518 dev_err(kbc->dev, "property nvidia,kbc-col-pins not found\n");
512 return ERR_PTR(-ENOENT); 519 return -ENOENT;
513 } 520 }
514 num_cols = proplen / sizeof(u32); 521 num_cols = proplen / sizeof(u32);
515 522
516 if (!of_get_property(np, "linux,keymap", &proplen)) { 523 if (!of_get_property(np, "linux,keymap", &proplen)) {
517 dev_err(&pdev->dev, "property linux,keymap not found\n"); 524 dev_err(kbc->dev, "property linux,keymap not found\n");
518 return ERR_PTR(-ENOENT); 525 return -ENOENT;
519 } 526 }
520 527
521 if (!num_rows || !num_cols || ((num_rows + num_cols) > KBC_MAX_GPIO)) { 528 if (!num_rows || !num_cols || ((num_rows + num_cols) > KBC_MAX_GPIO)) {
522 dev_err(&pdev->dev, 529 dev_err(kbc->dev,
523 "keypad rows/columns not porperly specified\n"); 530 "keypad rows/columns not porperly specified\n");
524 return ERR_PTR(-EINVAL); 531 return -EINVAL;
525 } 532 }
526 533
527 /* Set all pins as non-configured */ 534 /* Set all pins as non-configured */
528 for (i = 0; i < KBC_MAX_GPIO; i++) 535 for (i = 0; i < KBC_MAX_GPIO; i++)
529 pdata->pin_cfg[i].type = PIN_CFG_IGNORE; 536 kbc->pin_cfg[i].type = PIN_CFG_IGNORE;
530 537
531 ret = of_property_read_u32_array(np, "nvidia,kbc-row-pins", 538 ret = of_property_read_u32_array(np, "nvidia,kbc-row-pins",
532 rows_cfg, num_rows); 539 rows_cfg, num_rows);
533 if (ret < 0) { 540 if (ret < 0) {
534 dev_err(&pdev->dev, "Rows configurations are not proper\n"); 541 dev_err(kbc->dev, "Rows configurations are not proper\n");
535 return ERR_PTR(-EINVAL); 542 return -EINVAL;
536 } 543 }
537 544
538 ret = of_property_read_u32_array(np, "nvidia,kbc-col-pins", 545 ret = of_property_read_u32_array(np, "nvidia,kbc-col-pins",
539 cols_cfg, num_cols); 546 cols_cfg, num_cols);
540 if (ret < 0) { 547 if (ret < 0) {
541 dev_err(&pdev->dev, "Cols configurations are not proper\n"); 548 dev_err(kbc->dev, "Cols configurations are not proper\n");
542 return ERR_PTR(-EINVAL); 549 return -EINVAL;
543 } 550 }
544 551
545 for (i = 0; i < num_rows; i++) { 552 for (i = 0; i < num_rows; i++) {
546 pdata->pin_cfg[rows_cfg[i]].type = PIN_CFG_ROW; 553 kbc->pin_cfg[rows_cfg[i]].type = PIN_CFG_ROW;
547 pdata->pin_cfg[rows_cfg[i]].num = i; 554 kbc->pin_cfg[rows_cfg[i]].num = i;
548 } 555 }
549 556
550 for (i = 0; i < num_cols; i++) { 557 for (i = 0; i < num_cols; i++) {
551 pdata->pin_cfg[cols_cfg[i]].type = PIN_CFG_COL; 558 kbc->pin_cfg[cols_cfg[i]].type = PIN_CFG_COL;
552 pdata->pin_cfg[cols_cfg[i]].num = i; 559 kbc->pin_cfg[cols_cfg[i]].num = i;
553 } 560 }
554 561
555 return pdata; 562 return 0;
556}
557#else
558static inline struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata(
559 struct platform_device *pdev)
560{
561 dev_err(&pdev->dev, "platform data is missing\n");
562 return ERR_PTR(-EINVAL);
563} 563}
564#endif
565 564
566static int tegra_kbc_probe(struct platform_device *pdev) 565static int tegra_kbc_probe(struct platform_device *pdev)
567{ 566{
568 const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
569 struct tegra_kbc *kbc; 567 struct tegra_kbc *kbc;
570 struct input_dev *input_dev;
571 struct resource *res; 568 struct resource *res;
572 int irq;
573 int err; 569 int err;
574 int num_rows = 0; 570 int num_rows = 0;
575 unsigned int debounce_cnt; 571 unsigned int debounce_cnt;
576 unsigned int scan_time_rows; 572 unsigned int scan_time_rows;
577 unsigned int keymap_rows = KBC_MAX_KEY; 573 unsigned int keymap_rows = KBC_MAX_KEY;
578 574
579 if (!pdata) 575 kbc = devm_kzalloc(&pdev->dev, sizeof(*kbc), GFP_KERNEL);
580 pdata = tegra_kbc_dt_parse_pdata(pdev); 576 if (!kbc) {
577 dev_err(&pdev->dev, "failed to alloc memory for kbc\n");
578 return -ENOMEM;
579 }
580
581 kbc->dev = &pdev->dev;
582 spin_lock_init(&kbc->lock);
581 583
582 if (IS_ERR(pdata)) 584 err = tegra_kbc_parse_dt(kbc);
583 return PTR_ERR(pdata); 585 if (err)
586 return err;
584 587
585 if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows)) 588 if (!tegra_kbc_check_pin_cfg(kbc, &num_rows))
586 return -EINVAL; 589 return -EINVAL;
587 590
588 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 591 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -591,28 +594,18 @@ static int tegra_kbc_probe(struct platform_device *pdev)
591 return -ENXIO; 594 return -ENXIO;
592 } 595 }
593 596
594 irq = platform_get_irq(pdev, 0); 597 kbc->irq = platform_get_irq(pdev, 0);
595 if (irq < 0) { 598 if (kbc->irq < 0) {
596 dev_err(&pdev->dev, "failed to get keyboard IRQ\n"); 599 dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
597 return -ENXIO; 600 return -ENXIO;
598 } 601 }
599 602
600 kbc = devm_kzalloc(&pdev->dev, sizeof(*kbc), GFP_KERNEL); 603 kbc->idev = devm_input_allocate_device(&pdev->dev);
601 if (!kbc) { 604 if (!kbc->idev) {
602 dev_err(&pdev->dev, "failed to alloc memory for kbc\n");
603 return -ENOMEM;
604 }
605
606 input_dev = devm_input_allocate_device(&pdev->dev);
607 if (!input_dev) {
608 dev_err(&pdev->dev, "failed to allocate input device\n"); 605 dev_err(&pdev->dev, "failed to allocate input device\n");
609 return -ENOMEM; 606 return -ENOMEM;
610 } 607 }
611 608
612 kbc->pdata = pdata;
613 kbc->idev = input_dev;
614 kbc->irq = irq;
615 spin_lock_init(&kbc->lock);
616 setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc); 609 setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
617 610
618 kbc->mmio = devm_request_and_ioremap(&pdev->dev, res); 611 kbc->mmio = devm_request_and_ioremap(&pdev->dev, res);
@@ -633,36 +626,32 @@ static int tegra_kbc_probe(struct platform_device *pdev)
633 * the rows. There is an additional delay before the row scanning 626 * the rows. There is an additional delay before the row scanning
634 * starts. The repoll delay is computed in milliseconds. 627 * starts. The repoll delay is computed in milliseconds.
635 */ 628 */
636 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); 629 debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
637 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows; 630 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
638 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt; 631 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + kbc->repeat_cnt;
639 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS); 632 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
640 633
641 kbc->wakeup_key = pdata->wakeup_key; 634 kbc->idev->name = pdev->name;
642 kbc->use_fn_map = pdata->use_fn_map; 635 kbc->idev->id.bustype = BUS_HOST;
643 kbc->use_ghost_filter = pdata->use_ghost_filter; 636 kbc->idev->dev.parent = &pdev->dev;
644 637 kbc->idev->open = tegra_kbc_open;
645 input_dev->name = pdev->name; 638 kbc->idev->close = tegra_kbc_close;
646 input_dev->id.bustype = BUS_HOST;
647 input_dev->dev.parent = &pdev->dev;
648 input_dev->open = tegra_kbc_open;
649 input_dev->close = tegra_kbc_close;
650 639
651 if (pdata->keymap_data && pdata->use_fn_map) 640 if (kbc->keymap_data && kbc->use_fn_map)
652 keymap_rows *= 2; 641 keymap_rows *= 2;
653 642
654 err = matrix_keypad_build_keymap(pdata->keymap_data, NULL, 643 err = matrix_keypad_build_keymap(kbc->keymap_data, NULL,
655 keymap_rows, KBC_MAX_COL, 644 keymap_rows, KBC_MAX_COL,
656 kbc->keycode, input_dev); 645 kbc->keycode, kbc->idev);
657 if (err) { 646 if (err) {
658 dev_err(&pdev->dev, "failed to setup keymap\n"); 647 dev_err(&pdev->dev, "failed to setup keymap\n");
659 return err; 648 return err;
660 } 649 }
661 650
662 __set_bit(EV_REP, input_dev->evbit); 651 __set_bit(EV_REP, kbc->idev->evbit);
663 input_set_capability(input_dev, EV_MSC, MSC_SCAN); 652 input_set_capability(kbc->idev, EV_MSC, MSC_SCAN);
664 653
665 input_set_drvdata(input_dev, kbc); 654 input_set_drvdata(kbc->idev, kbc);
666 655
667 err = devm_request_irq(&pdev->dev, kbc->irq, tegra_kbc_isr, 656 err = devm_request_irq(&pdev->dev, kbc->irq, tegra_kbc_isr,
668 IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc); 657 IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc);
@@ -680,7 +669,7 @@ static int tegra_kbc_probe(struct platform_device *pdev)
680 } 669 }
681 670
682 platform_set_drvdata(pdev, kbc); 671 platform_set_drvdata(pdev, kbc);
683 device_init_wakeup(&pdev->dev, pdata->wakeup); 672 device_init_wakeup(&pdev->dev, kbc->wakeup);
684 673
685 return 0; 674 return 0;
686} 675}