diff options
| author | Steve Wise <swise@opengridcomputing.com> | 2011-01-21 12:00:29 -0500 |
|---|---|---|
| committer | Roland Dreier <roland@purestorage.com> | 2011-01-28 18:34:24 -0500 |
| commit | 6a09a9d6946dd516d243d072bee83fae3c683471 (patch) | |
| tree | 776e0b9bf5ed1e5fd541b0661d9bf124298269cf /drivers/infiniband/hw | |
| parent | a25cecce88194b2edf38b8c3b1665e9318eb2d22 (diff) | |
RDMA/cxgb4: Limit MAXBURST EQ context field to 256B
MAXBURST cannot exceed 256B for on-chip queues. With a 512B MAXBURST,
we can lock up the chip.
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Cc: <stable@kernel.org>
Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/infiniband/hw')
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/qp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 20800900ef3f..4f0be25cab1a 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
| @@ -220,7 +220,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
| 220 | V_FW_RI_RES_WR_DCAEN(0) | | 220 | V_FW_RI_RES_WR_DCAEN(0) | |
| 221 | V_FW_RI_RES_WR_DCACPU(0) | | 221 | V_FW_RI_RES_WR_DCACPU(0) | |
| 222 | V_FW_RI_RES_WR_FBMIN(2) | | 222 | V_FW_RI_RES_WR_FBMIN(2) | |
| 223 | V_FW_RI_RES_WR_FBMAX(3) | | 223 | V_FW_RI_RES_WR_FBMAX(2) | |
| 224 | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | | 224 | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | |
| 225 | V_FW_RI_RES_WR_CIDXFTHRESH(0) | | 225 | V_FW_RI_RES_WR_CIDXFTHRESH(0) | |
| 226 | V_FW_RI_RES_WR_EQSIZE(eqsize)); | 226 | V_FW_RI_RES_WR_EQSIZE(eqsize)); |
| @@ -243,7 +243,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
| 243 | V_FW_RI_RES_WR_DCAEN(0) | | 243 | V_FW_RI_RES_WR_DCAEN(0) | |
| 244 | V_FW_RI_RES_WR_DCACPU(0) | | 244 | V_FW_RI_RES_WR_DCACPU(0) | |
| 245 | V_FW_RI_RES_WR_FBMIN(2) | | 245 | V_FW_RI_RES_WR_FBMIN(2) | |
| 246 | V_FW_RI_RES_WR_FBMAX(3) | | 246 | V_FW_RI_RES_WR_FBMAX(2) | |
| 247 | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | | 247 | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | |
| 248 | V_FW_RI_RES_WR_CIDXFTHRESH(0) | | 248 | V_FW_RI_RES_WR_CIDXFTHRESH(0) | |
| 249 | V_FW_RI_RES_WR_EQSIZE(eqsize)); | 249 | V_FW_RI_RES_WR_EQSIZE(eqsize)); |