diff options
author | Hariprasad S <hariprasad@chelsio.com> | 2015-04-21 16:14:59 -0400 |
---|---|---|
committer | Doug Ledford <dledford@redhat.com> | 2015-05-05 09:18:01 -0400 |
commit | 6198dd8d7a6a7f40dc4599cb0676101d9cb82776 (patch) | |
tree | c87551d355a9affce301b13c346f52807a472270 /drivers/infiniband/hw | |
parent | 0b7410471d59ce2ea30453e68c03bdb941d5951e (diff) |
iw_cxgb4: 32b platform fixes
- get_dma_mr() was using ~0UL which is should be ~0ULL. This causes the
DMA MR to get setup incorrectly in hardware.
- wr_log_show() needed a 64b divide function div64_u64() instead of
doing
division directly.
- fixed warnings about recasting a pointer to a u64
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers/infiniband/hw')
-rw-r--r-- | drivers/infiniband/hw/cxgb4/cm.c | 2 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb4/cq.c | 7 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb4/device.c | 6 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb4/mem.c | 6 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb4/qp.c | 10 |
5 files changed, 15 insertions, 16 deletions
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c index 0493cca3ec15..6fb31bacd5b4 100644 --- a/drivers/infiniband/hw/cxgb4/cm.c +++ b/drivers/infiniband/hw/cxgb4/cm.c | |||
@@ -3571,7 +3571,7 @@ static void send_fw_pass_open_req(struct c4iw_dev *dev, struct sk_buff *skb, | |||
3571 | * TP will ignore any value > 0 for MSS index. | 3571 | * TP will ignore any value > 0 for MSS index. |
3572 | */ | 3572 | */ |
3573 | req->tcb.opt0 = cpu_to_be64(MSS_IDX_V(0xF)); | 3573 | req->tcb.opt0 = cpu_to_be64(MSS_IDX_V(0xF)); |
3574 | req->cookie = (unsigned long)skb; | 3574 | req->cookie = (uintptr_t)skb; |
3575 | 3575 | ||
3576 | set_wr_txq(req_skb, CPL_PRIORITY_CONTROL, port_id); | 3576 | set_wr_txq(req_skb, CPL_PRIORITY_CONTROL, port_id); |
3577 | ret = cxgb4_ofld_send(dev->rdev.lldi.ports[0], req_skb); | 3577 | ret = cxgb4_ofld_send(dev->rdev.lldi.ports[0], req_skb); |
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c index ab7692ac2044..25dbd6986301 100644 --- a/drivers/infiniband/hw/cxgb4/cq.c +++ b/drivers/infiniband/hw/cxgb4/cq.c | |||
@@ -55,7 +55,7 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
55 | FW_RI_RES_WR_NRES_V(1) | | 55 | FW_RI_RES_WR_NRES_V(1) | |
56 | FW_WR_COMPL_F); | 56 | FW_WR_COMPL_F); |
57 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 57 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
58 | res_wr->cookie = (unsigned long) &wr_wait; | 58 | res_wr->cookie = (uintptr_t)&wr_wait; |
59 | res = res_wr->res; | 59 | res = res_wr->res; |
60 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; | 60 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; |
61 | res->u.cq.op = FW_RI_RES_OP_RESET; | 61 | res->u.cq.op = FW_RI_RES_OP_RESET; |
@@ -125,7 +125,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
125 | FW_RI_RES_WR_NRES_V(1) | | 125 | FW_RI_RES_WR_NRES_V(1) | |
126 | FW_WR_COMPL_F); | 126 | FW_WR_COMPL_F); |
127 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 127 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
128 | res_wr->cookie = (unsigned long) &wr_wait; | 128 | res_wr->cookie = (uintptr_t)&wr_wait; |
129 | res = res_wr->res; | 129 | res = res_wr->res; |
130 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; | 130 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; |
131 | res->u.cq.op = FW_RI_RES_OP_WRITE; | 131 | res->u.cq.op = FW_RI_RES_OP_WRITE; |
@@ -970,8 +970,7 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries, | |||
970 | } | 970 | } |
971 | PDBG("%s cqid 0x%0x chp %p size %u memsize %zu, dma_addr 0x%0llx\n", | 971 | PDBG("%s cqid 0x%0x chp %p size %u memsize %zu, dma_addr 0x%0llx\n", |
972 | __func__, chp->cq.cqid, chp, chp->cq.size, | 972 | __func__, chp->cq.cqid, chp, chp->cq.size, |
973 | chp->cq.memsize, | 973 | chp->cq.memsize, (unsigned long long) chp->cq.dma_addr); |
974 | (unsigned long long) chp->cq.dma_addr); | ||
975 | return &chp->ibcq; | 974 | return &chp->ibcq; |
976 | err5: | 975 | err5: |
977 | kfree(mm2); | 976 | kfree(mm2); |
diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c index 8fb295e4a9ab..7ed32537eb59 100644 --- a/drivers/infiniband/hw/cxgb4/device.c +++ b/drivers/infiniband/hw/cxgb4/device.c | |||
@@ -151,7 +151,7 @@ static int wr_log_show(struct seq_file *seq, void *v) | |||
151 | int prev_ts_set = 0; | 151 | int prev_ts_set = 0; |
152 | int idx, end; | 152 | int idx, end; |
153 | 153 | ||
154 | #define ts2ns(ts) div64_ul((ts) * dev->rdev.lldi.cclk_ps, 1000) | 154 | #define ts2ns(ts) div64_u64((ts) * dev->rdev.lldi.cclk_ps, 1000) |
155 | 155 | ||
156 | idx = atomic_read(&dev->rdev.wr_log_idx) & | 156 | idx = atomic_read(&dev->rdev.wr_log_idx) & |
157 | (dev->rdev.wr_log_size - 1); | 157 | (dev->rdev.wr_log_size - 1); |
@@ -784,10 +784,10 @@ static int c4iw_rdev_open(struct c4iw_rdev *rdev) | |||
784 | rdev->lldi.vr->qp.size, | 784 | rdev->lldi.vr->qp.size, |
785 | rdev->lldi.vr->cq.start, | 785 | rdev->lldi.vr->cq.start, |
786 | rdev->lldi.vr->cq.size); | 786 | rdev->lldi.vr->cq.size); |
787 | PDBG("udb len 0x%x udb base %llx db_reg %p gts_reg %p qpshift %lu " | 787 | PDBG("udb len 0x%x udb base %p db_reg %p gts_reg %p qpshift %lu " |
788 | "qpmask 0x%x cqshift %lu cqmask 0x%x\n", | 788 | "qpmask 0x%x cqshift %lu cqmask 0x%x\n", |
789 | (unsigned)pci_resource_len(rdev->lldi.pdev, 2), | 789 | (unsigned)pci_resource_len(rdev->lldi.pdev, 2), |
790 | (u64)pci_resource_start(rdev->lldi.pdev, 2), | 790 | (void *)pci_resource_start(rdev->lldi.pdev, 2), |
791 | rdev->lldi.db_reg, | 791 | rdev->lldi.db_reg, |
792 | rdev->lldi.gts_reg, | 792 | rdev->lldi.gts_reg, |
793 | rdev->qpshift, rdev->qpmask, | 793 | rdev->qpshift, rdev->qpmask, |
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c index 3ef0cf9f5c44..cff815b91707 100644 --- a/drivers/infiniband/hw/cxgb4/mem.c +++ b/drivers/infiniband/hw/cxgb4/mem.c | |||
@@ -144,7 +144,7 @@ static int _c4iw_write_mem_inline(struct c4iw_rdev *rdev, u32 addr, u32 len, | |||
144 | if (i == (num_wqe-1)) { | 144 | if (i == (num_wqe-1)) { |
145 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR) | | 145 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR) | |
146 | FW_WR_COMPL_F); | 146 | FW_WR_COMPL_F); |
147 | req->wr.wr_lo = (__force __be64)(unsigned long) &wr_wait; | 147 | req->wr.wr_lo = (__force __be64)&wr_wait; |
148 | } else | 148 | } else |
149 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR)); | 149 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR)); |
150 | req->wr.wr_mid = cpu_to_be32( | 150 | req->wr.wr_mid = cpu_to_be32( |
@@ -676,12 +676,12 @@ struct ib_mr *c4iw_get_dma_mr(struct ib_pd *pd, int acc) | |||
676 | mhp->attr.zbva = 0; | 676 | mhp->attr.zbva = 0; |
677 | mhp->attr.va_fbo = 0; | 677 | mhp->attr.va_fbo = 0; |
678 | mhp->attr.page_size = 0; | 678 | mhp->attr.page_size = 0; |
679 | mhp->attr.len = ~0UL; | 679 | mhp->attr.len = ~0ULL; |
680 | mhp->attr.pbl_size = 0; | 680 | mhp->attr.pbl_size = 0; |
681 | 681 | ||
682 | ret = write_tpt_entry(&rhp->rdev, 0, &stag, 1, php->pdid, | 682 | ret = write_tpt_entry(&rhp->rdev, 0, &stag, 1, php->pdid, |
683 | FW_RI_STAG_NSMR, mhp->attr.perms, | 683 | FW_RI_STAG_NSMR, mhp->attr.perms, |
684 | mhp->attr.mw_bind_enable, 0, 0, ~0UL, 0, 0, 0); | 684 | mhp->attr.mw_bind_enable, 0, 0, ~0ULL, 0, 0, 0); |
685 | if (ret) | 685 | if (ret) |
686 | goto err1; | 686 | goto err1; |
687 | 687 | ||
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 15cae5a31018..389ced335bc5 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
@@ -275,7 +275,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
275 | FW_RI_RES_WR_NRES_V(2) | | 275 | FW_RI_RES_WR_NRES_V(2) | |
276 | FW_WR_COMPL_F); | 276 | FW_WR_COMPL_F); |
277 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 277 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
278 | res_wr->cookie = (unsigned long) &wr_wait; | 278 | res_wr->cookie = (uintptr_t)&wr_wait; |
279 | res = res_wr->res; | 279 | res = res_wr->res; |
280 | res->u.sqrq.restype = FW_RI_RES_TYPE_SQ; | 280 | res->u.sqrq.restype = FW_RI_RES_TYPE_SQ; |
281 | res->u.sqrq.op = FW_RI_RES_OP_WRITE; | 281 | res->u.sqrq.op = FW_RI_RES_OP_WRITE; |
@@ -1209,7 +1209,7 @@ static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1209 | wqe->flowid_len16 = cpu_to_be32( | 1209 | wqe->flowid_len16 = cpu_to_be32( |
1210 | FW_WR_FLOWID_V(ep->hwtid) | | 1210 | FW_WR_FLOWID_V(ep->hwtid) | |
1211 | FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16))); | 1211 | FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16))); |
1212 | wqe->cookie = (unsigned long) &ep->com.wr_wait; | 1212 | wqe->cookie = (uintptr_t)&ep->com.wr_wait; |
1213 | 1213 | ||
1214 | wqe->u.fini.type = FW_RI_TYPE_FINI; | 1214 | wqe->u.fini.type = FW_RI_TYPE_FINI; |
1215 | ret = c4iw_ofld_send(&rhp->rdev, skb); | 1215 | ret = c4iw_ofld_send(&rhp->rdev, skb); |
@@ -1279,7 +1279,7 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) | |||
1279 | FW_WR_FLOWID_V(qhp->ep->hwtid) | | 1279 | FW_WR_FLOWID_V(qhp->ep->hwtid) | |
1280 | FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16))); | 1280 | FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16))); |
1281 | 1281 | ||
1282 | wqe->cookie = (unsigned long) &qhp->ep->com.wr_wait; | 1282 | wqe->cookie = (uintptr_t)&qhp->ep->com.wr_wait; |
1283 | 1283 | ||
1284 | wqe->u.init.type = FW_RI_TYPE_INIT; | 1284 | wqe->u.init.type = FW_RI_TYPE_INIT; |
1285 | wqe->u.init.mpareqbit_p2ptype = | 1285 | wqe->u.init.mpareqbit_p2ptype = |
@@ -1766,11 +1766,11 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1766 | mm2->len = PAGE_ALIGN(qhp->wq.rq.memsize); | 1766 | mm2->len = PAGE_ALIGN(qhp->wq.rq.memsize); |
1767 | insert_mmap(ucontext, mm2); | 1767 | insert_mmap(ucontext, mm2); |
1768 | mm3->key = uresp.sq_db_gts_key; | 1768 | mm3->key = uresp.sq_db_gts_key; |
1769 | mm3->addr = (__force unsigned long) qhp->wq.sq.udb; | 1769 | mm3->addr = (__force unsigned long)qhp->wq.sq.udb; |
1770 | mm3->len = PAGE_SIZE; | 1770 | mm3->len = PAGE_SIZE; |
1771 | insert_mmap(ucontext, mm3); | 1771 | insert_mmap(ucontext, mm3); |
1772 | mm4->key = uresp.rq_db_gts_key; | 1772 | mm4->key = uresp.rq_db_gts_key; |
1773 | mm4->addr = (__force unsigned long) qhp->wq.rq.udb; | 1773 | mm4->addr = (__force unsigned long)qhp->wq.rq.udb; |
1774 | mm4->len = PAGE_SIZE; | 1774 | mm4->len = PAGE_SIZE; |
1775 | insert_mmap(ucontext, mm4); | 1775 | insert_mmap(ucontext, mm4); |
1776 | if (mm5) { | 1776 | if (mm5) { |