diff options
author | David S. Miller <davem@davemloft.net> | 2008-07-18 05:39:39 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-07-18 05:39:39 -0400 |
commit | 49997d75152b3d23c53b0fa730599f2f74c92c65 (patch) | |
tree | 46e93126170d02cfec9505172e545732c1b69656 /drivers/infiniband/hw | |
parent | a0c80b80e0fb48129e4e9d6a9ede914f9ff1850d (diff) | |
parent | 5b664cb235e97afbf34db9c4d77f08ebd725335e (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
Documentation/powerpc/booting-without-of.txt
drivers/atm/Makefile
drivers/net/fs_enet/fs_enet-main.c
drivers/pci/pci-acpi.c
net/8021q/vlan.c
net/iucv/iucv.c
Diffstat (limited to 'drivers/infiniband/hw')
64 files changed, 706 insertions, 531 deletions
diff --git a/drivers/infiniband/hw/amso1100/c2_rnic.c b/drivers/infiniband/hw/amso1100/c2_rnic.c index b1441aeb60c2..dd05c4835642 100644 --- a/drivers/infiniband/hw/amso1100/c2_rnic.c +++ b/drivers/infiniband/hw/amso1100/c2_rnic.c | |||
@@ -454,7 +454,7 @@ int __devinit c2_rnic_init(struct c2_dev *c2dev) | |||
454 | (IB_DEVICE_RESIZE_MAX_WR | | 454 | (IB_DEVICE_RESIZE_MAX_WR | |
455 | IB_DEVICE_CURR_QP_STATE_MOD | | 455 | IB_DEVICE_CURR_QP_STATE_MOD | |
456 | IB_DEVICE_SYS_IMAGE_GUID | | 456 | IB_DEVICE_SYS_IMAGE_GUID | |
457 | IB_DEVICE_ZERO_STAG | | 457 | IB_DEVICE_LOCAL_DMA_LKEY | |
458 | IB_DEVICE_MEM_WINDOW); | 458 | IB_DEVICE_MEM_WINDOW); |
459 | 459 | ||
460 | /* Allocate the qptr_array */ | 460 | /* Allocate the qptr_array */ |
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.c b/drivers/infiniband/hw/cxgb3/cxio_hal.c index 3f441fc57c17..f6d5747153a5 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_hal.c +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.c | |||
@@ -145,7 +145,9 @@ static int cxio_hal_clear_qp_ctx(struct cxio_rdev *rdev_p, u32 qpid) | |||
145 | } | 145 | } |
146 | wqe = (struct t3_modify_qp_wr *) skb_put(skb, sizeof(*wqe)); | 146 | wqe = (struct t3_modify_qp_wr *) skb_put(skb, sizeof(*wqe)); |
147 | memset(wqe, 0, sizeof(*wqe)); | 147 | memset(wqe, 0, sizeof(*wqe)); |
148 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 3, 0, qpid, 7); | 148 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, |
149 | T3_COMPLETION_FLAG | T3_NOTIFY_FLAG, 0, qpid, 7, | ||
150 | T3_SOPEOP); | ||
149 | wqe->flags = cpu_to_be32(MODQP_WRITE_EC); | 151 | wqe->flags = cpu_to_be32(MODQP_WRITE_EC); |
150 | sge_cmd = qpid << 8 | 3; | 152 | sge_cmd = qpid << 8 | 3; |
151 | wqe->sge_cmd = cpu_to_be64(sge_cmd); | 153 | wqe->sge_cmd = cpu_to_be64(sge_cmd); |
@@ -276,7 +278,7 @@ int cxio_create_qp(struct cxio_rdev *rdev_p, u32 kernel_domain, | |||
276 | if (!wq->qpid) | 278 | if (!wq->qpid) |
277 | return -ENOMEM; | 279 | return -ENOMEM; |
278 | 280 | ||
279 | wq->rq = kzalloc(depth * sizeof(u64), GFP_KERNEL); | 281 | wq->rq = kzalloc(depth * sizeof(struct t3_swrq), GFP_KERNEL); |
280 | if (!wq->rq) | 282 | if (!wq->rq) |
281 | goto err1; | 283 | goto err1; |
282 | 284 | ||
@@ -300,6 +302,7 @@ int cxio_create_qp(struct cxio_rdev *rdev_p, u32 kernel_domain, | |||
300 | if (!kernel_domain) | 302 | if (!kernel_domain) |
301 | wq->udb = (u64)rdev_p->rnic_info.udbell_physbase + | 303 | wq->udb = (u64)rdev_p->rnic_info.udbell_physbase + |
302 | (wq->qpid << rdev_p->qpshift); | 304 | (wq->qpid << rdev_p->qpshift); |
305 | wq->rdev = rdev_p; | ||
303 | PDBG("%s qpid 0x%x doorbell 0x%p udb 0x%llx\n", __func__, | 306 | PDBG("%s qpid 0x%x doorbell 0x%p udb 0x%llx\n", __func__, |
304 | wq->qpid, wq->doorbell, (unsigned long long) wq->udb); | 307 | wq->qpid, wq->doorbell, (unsigned long long) wq->udb); |
305 | return 0; | 308 | return 0; |
@@ -558,7 +561,7 @@ static int cxio_hal_init_ctrl_qp(struct cxio_rdev *rdev_p) | |||
558 | wqe = (struct t3_modify_qp_wr *) skb_put(skb, sizeof(*wqe)); | 561 | wqe = (struct t3_modify_qp_wr *) skb_put(skb, sizeof(*wqe)); |
559 | memset(wqe, 0, sizeof(*wqe)); | 562 | memset(wqe, 0, sizeof(*wqe)); |
560 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 0, 0, | 563 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 0, 0, |
561 | T3_CTL_QP_TID, 7); | 564 | T3_CTL_QP_TID, 7, T3_SOPEOP); |
562 | wqe->flags = cpu_to_be32(MODQP_WRITE_EC); | 565 | wqe->flags = cpu_to_be32(MODQP_WRITE_EC); |
563 | sge_cmd = (3ULL << 56) | FW_RI_SGEEC_START << 8 | 3; | 566 | sge_cmd = (3ULL << 56) | FW_RI_SGEEC_START << 8 | 3; |
564 | wqe->sge_cmd = cpu_to_be64(sge_cmd); | 567 | wqe->sge_cmd = cpu_to_be64(sge_cmd); |
@@ -674,7 +677,7 @@ static int cxio_hal_ctrl_qp_write_mem(struct cxio_rdev *rdev_p, u32 addr, | |||
674 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_BP, flag, | 677 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_BP, flag, |
675 | Q_GENBIT(rdev_p->ctrl_qp.wptr, | 678 | Q_GENBIT(rdev_p->ctrl_qp.wptr, |
676 | T3_CTRL_QP_SIZE_LOG2), T3_CTRL_QP_ID, | 679 | T3_CTRL_QP_SIZE_LOG2), T3_CTRL_QP_ID, |
677 | wr_len); | 680 | wr_len, T3_SOPEOP); |
678 | if (flag == T3_COMPLETION_FLAG) | 681 | if (flag == T3_COMPLETION_FLAG) |
679 | ring_doorbell(rdev_p->ctrl_qp.doorbell, T3_CTRL_QP_ID); | 682 | ring_doorbell(rdev_p->ctrl_qp.doorbell, T3_CTRL_QP_ID); |
680 | len -= 96; | 683 | len -= 96; |
@@ -816,6 +819,13 @@ int cxio_deallocate_window(struct cxio_rdev *rdev_p, u32 stag) | |||
816 | 0, 0); | 819 | 0, 0); |
817 | } | 820 | } |
818 | 821 | ||
822 | int cxio_allocate_stag(struct cxio_rdev *rdev_p, u32 *stag, u32 pdid, u32 pbl_size, u32 pbl_addr) | ||
823 | { | ||
824 | *stag = T3_STAG_UNSET; | ||
825 | return __cxio_tpt_op(rdev_p, 0, stag, 0, pdid, TPT_NON_SHARED_MR, | ||
826 | 0, 0, 0ULL, 0, 0, pbl_size, pbl_addr); | ||
827 | } | ||
828 | |||
819 | int cxio_rdma_init(struct cxio_rdev *rdev_p, struct t3_rdma_init_attr *attr) | 829 | int cxio_rdma_init(struct cxio_rdev *rdev_p, struct t3_rdma_init_attr *attr) |
820 | { | 830 | { |
821 | struct t3_rdma_init_wr *wqe; | 831 | struct t3_rdma_init_wr *wqe; |
@@ -1257,13 +1267,16 @@ proc_cqe: | |||
1257 | wq->sq_rptr = CQE_WRID_SQ_WPTR(*hw_cqe); | 1267 | wq->sq_rptr = CQE_WRID_SQ_WPTR(*hw_cqe); |
1258 | PDBG("%s completing sq idx %ld\n", __func__, | 1268 | PDBG("%s completing sq idx %ld\n", __func__, |
1259 | Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2)); | 1269 | Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2)); |
1260 | *cookie = (wq->sq + | 1270 | *cookie = wq->sq[Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2)].wr_id; |
1261 | Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2))->wr_id; | ||
1262 | wq->sq_rptr++; | 1271 | wq->sq_rptr++; |
1263 | } else { | 1272 | } else { |
1264 | PDBG("%s completing rq idx %ld\n", __func__, | 1273 | PDBG("%s completing rq idx %ld\n", __func__, |
1265 | Q_PTR2IDX(wq->rq_rptr, wq->rq_size_log2)); | 1274 | Q_PTR2IDX(wq->rq_rptr, wq->rq_size_log2)); |
1266 | *cookie = *(wq->rq + Q_PTR2IDX(wq->rq_rptr, wq->rq_size_log2)); | 1275 | *cookie = wq->rq[Q_PTR2IDX(wq->rq_rptr, wq->rq_size_log2)].wr_id; |
1276 | if (wq->rq[Q_PTR2IDX(wq->rq_rptr, wq->rq_size_log2)].pbl_addr) | ||
1277 | cxio_hal_pblpool_free(wq->rdev, | ||
1278 | wq->rq[Q_PTR2IDX(wq->rq_rptr, | ||
1279 | wq->rq_size_log2)].pbl_addr, T3_STAG0_PBL_SIZE); | ||
1267 | wq->rq_rptr++; | 1280 | wq->rq_rptr++; |
1268 | } | 1281 | } |
1269 | 1282 | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.h b/drivers/infiniband/hw/cxgb3/cxio_hal.h index 6e128f6bab05..656fe47bc84f 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_hal.h +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.h | |||
@@ -45,15 +45,17 @@ | |||
45 | #define T3_CTRL_QP_SIZE_LOG2 8 | 45 | #define T3_CTRL_QP_SIZE_LOG2 8 |
46 | #define T3_CTRL_CQ_ID 0 | 46 | #define T3_CTRL_CQ_ID 0 |
47 | 47 | ||
48 | /* TBD */ | ||
49 | #define T3_MAX_NUM_RI (1<<15) | 48 | #define T3_MAX_NUM_RI (1<<15) |
50 | #define T3_MAX_NUM_QP (1<<15) | 49 | #define T3_MAX_NUM_QP (1<<15) |
51 | #define T3_MAX_NUM_CQ (1<<15) | 50 | #define T3_MAX_NUM_CQ (1<<15) |
52 | #define T3_MAX_NUM_PD (1<<15) | 51 | #define T3_MAX_NUM_PD (1<<15) |
53 | #define T3_MAX_PBL_SIZE 256 | 52 | #define T3_MAX_PBL_SIZE 256 |
54 | #define T3_MAX_RQ_SIZE 1024 | 53 | #define T3_MAX_RQ_SIZE 1024 |
54 | #define T3_MAX_QP_DEPTH (T3_MAX_RQ_SIZE-1) | ||
55 | #define T3_MAX_CQ_DEPTH 8192 | ||
55 | #define T3_MAX_NUM_STAG (1<<15) | 56 | #define T3_MAX_NUM_STAG (1<<15) |
56 | #define T3_MAX_MR_SIZE 0x100000000ULL | 57 | #define T3_MAX_MR_SIZE 0x100000000ULL |
58 | #define T3_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */ | ||
57 | 59 | ||
58 | #define T3_STAG_UNSET 0xffffffff | 60 | #define T3_STAG_UNSET 0xffffffff |
59 | 61 | ||
@@ -165,6 +167,7 @@ int cxio_reregister_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid, | |||
165 | int cxio_dereg_mem(struct cxio_rdev *rdev, u32 stag, u32 pbl_size, | 167 | int cxio_dereg_mem(struct cxio_rdev *rdev, u32 stag, u32 pbl_size, |
166 | u32 pbl_addr); | 168 | u32 pbl_addr); |
167 | int cxio_allocate_window(struct cxio_rdev *rdev, u32 * stag, u32 pdid); | 169 | int cxio_allocate_window(struct cxio_rdev *rdev, u32 * stag, u32 pdid); |
170 | int cxio_allocate_stag(struct cxio_rdev *rdev, u32 *stag, u32 pdid, u32 pbl_size, u32 pbl_addr); | ||
168 | int cxio_deallocate_window(struct cxio_rdev *rdev, u32 stag); | 171 | int cxio_deallocate_window(struct cxio_rdev *rdev, u32 stag); |
169 | int cxio_rdma_init(struct cxio_rdev *rdev, struct t3_rdma_init_attr *attr); | 172 | int cxio_rdma_init(struct cxio_rdev *rdev, struct t3_rdma_init_attr *attr); |
170 | void cxio_register_ev_cb(cxio_hal_ev_callback_func_t ev_cb); | 173 | void cxio_register_ev_cb(cxio_hal_ev_callback_func_t ev_cb); |
diff --git a/drivers/infiniband/hw/cxgb3/cxio_wr.h b/drivers/infiniband/hw/cxgb3/cxio_wr.h index f1a25a821a45..04618f7bfbb3 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_wr.h +++ b/drivers/infiniband/hw/cxgb3/cxio_wr.h | |||
@@ -39,6 +39,9 @@ | |||
39 | 39 | ||
40 | #define T3_MAX_SGE 4 | 40 | #define T3_MAX_SGE 4 |
41 | #define T3_MAX_INLINE 64 | 41 | #define T3_MAX_INLINE 64 |
42 | #define T3_STAG0_PBL_SIZE (2 * T3_MAX_SGE << 3) | ||
43 | #define T3_STAG0_MAX_PBE_LEN (128 * 1024 * 1024) | ||
44 | #define T3_STAG0_PAGE_SHIFT 15 | ||
42 | 45 | ||
43 | #define Q_EMPTY(rptr,wptr) ((rptr)==(wptr)) | 46 | #define Q_EMPTY(rptr,wptr) ((rptr)==(wptr)) |
44 | #define Q_FULL(rptr,wptr,size_log2) ( (((wptr)-(rptr))>>(size_log2)) && \ | 47 | #define Q_FULL(rptr,wptr,size_log2) ( (((wptr)-(rptr))>>(size_log2)) && \ |
@@ -72,7 +75,8 @@ enum t3_wr_opcode { | |||
72 | T3_WR_BIND = FW_WROPCODE_RI_BIND_MW, | 75 | T3_WR_BIND = FW_WROPCODE_RI_BIND_MW, |
73 | T3_WR_RCV = FW_WROPCODE_RI_RECEIVE, | 76 | T3_WR_RCV = FW_WROPCODE_RI_RECEIVE, |
74 | T3_WR_INIT = FW_WROPCODE_RI_RDMA_INIT, | 77 | T3_WR_INIT = FW_WROPCODE_RI_RDMA_INIT, |
75 | T3_WR_QP_MOD = FW_WROPCODE_RI_MODIFY_QP | 78 | T3_WR_QP_MOD = FW_WROPCODE_RI_MODIFY_QP, |
79 | T3_WR_FASTREG = FW_WROPCODE_RI_FASTREGISTER_MR | ||
76 | } __attribute__ ((packed)); | 80 | } __attribute__ ((packed)); |
77 | 81 | ||
78 | enum t3_rdma_opcode { | 82 | enum t3_rdma_opcode { |
@@ -89,7 +93,8 @@ enum t3_rdma_opcode { | |||
89 | T3_FAST_REGISTER, | 93 | T3_FAST_REGISTER, |
90 | T3_LOCAL_INV, | 94 | T3_LOCAL_INV, |
91 | T3_QP_MOD, | 95 | T3_QP_MOD, |
92 | T3_BYPASS | 96 | T3_BYPASS, |
97 | T3_RDMA_READ_REQ_WITH_INV, | ||
93 | } __attribute__ ((packed)); | 98 | } __attribute__ ((packed)); |
94 | 99 | ||
95 | static inline enum t3_rdma_opcode wr2opcode(enum t3_wr_opcode wrop) | 100 | static inline enum t3_rdma_opcode wr2opcode(enum t3_wr_opcode wrop) |
@@ -103,6 +108,7 @@ static inline enum t3_rdma_opcode wr2opcode(enum t3_wr_opcode wrop) | |||
103 | case T3_WR_BIND: return T3_BIND_MW; | 108 | case T3_WR_BIND: return T3_BIND_MW; |
104 | case T3_WR_INIT: return T3_RDMA_INIT; | 109 | case T3_WR_INIT: return T3_RDMA_INIT; |
105 | case T3_WR_QP_MOD: return T3_QP_MOD; | 110 | case T3_WR_QP_MOD: return T3_QP_MOD; |
111 | case T3_WR_FASTREG: return T3_FAST_REGISTER; | ||
106 | default: break; | 112 | default: break; |
107 | } | 113 | } |
108 | return -1; | 114 | return -1; |
@@ -170,11 +176,54 @@ struct t3_send_wr { | |||
170 | struct t3_sge sgl[T3_MAX_SGE]; /* 4+ */ | 176 | struct t3_sge sgl[T3_MAX_SGE]; /* 4+ */ |
171 | }; | 177 | }; |
172 | 178 | ||
179 | #define T3_MAX_FASTREG_DEPTH 24 | ||
180 | #define T3_MAX_FASTREG_FRAG 10 | ||
181 | |||
182 | struct t3_fastreg_wr { | ||
183 | struct fw_riwrh wrh; /* 0 */ | ||
184 | union t3_wrid wrid; /* 1 */ | ||
185 | __be32 stag; /* 2 */ | ||
186 | __be32 len; | ||
187 | __be32 va_base_hi; /* 3 */ | ||
188 | __be32 va_base_lo_fbo; | ||
189 | __be32 page_type_perms; /* 4 */ | ||
190 | __be32 reserved1; | ||
191 | __be64 pbl_addrs[0]; /* 5+ */ | ||
192 | }; | ||
193 | |||
194 | /* | ||
195 | * If a fastreg wr spans multiple wqes, then the 2nd fragment look like this. | ||
196 | */ | ||
197 | struct t3_pbl_frag { | ||
198 | struct fw_riwrh wrh; /* 0 */ | ||
199 | __be64 pbl_addrs[14]; /* 1..14 */ | ||
200 | }; | ||
201 | |||
202 | #define S_FR_PAGE_COUNT 24 | ||
203 | #define M_FR_PAGE_COUNT 0xff | ||
204 | #define V_FR_PAGE_COUNT(x) ((x) << S_FR_PAGE_COUNT) | ||
205 | #define G_FR_PAGE_COUNT(x) ((((x) >> S_FR_PAGE_COUNT)) & M_FR_PAGE_COUNT) | ||
206 | |||
207 | #define S_FR_PAGE_SIZE 16 | ||
208 | #define M_FR_PAGE_SIZE 0x1f | ||
209 | #define V_FR_PAGE_SIZE(x) ((x) << S_FR_PAGE_SIZE) | ||
210 | #define G_FR_PAGE_SIZE(x) ((((x) >> S_FR_PAGE_SIZE)) & M_FR_PAGE_SIZE) | ||
211 | |||
212 | #define S_FR_TYPE 8 | ||
213 | #define M_FR_TYPE 0x1 | ||
214 | #define V_FR_TYPE(x) ((x) << S_FR_TYPE) | ||
215 | #define G_FR_TYPE(x) ((((x) >> S_FR_TYPE)) & M_FR_TYPE) | ||
216 | |||
217 | #define S_FR_PERMS 0 | ||
218 | #define M_FR_PERMS 0xff | ||
219 | #define V_FR_PERMS(x) ((x) << S_FR_PERMS) | ||
220 | #define G_FR_PERMS(x) ((((x) >> S_FR_PERMS)) & M_FR_PERMS) | ||
221 | |||
173 | struct t3_local_inv_wr { | 222 | struct t3_local_inv_wr { |
174 | struct fw_riwrh wrh; /* 0 */ | 223 | struct fw_riwrh wrh; /* 0 */ |
175 | union t3_wrid wrid; /* 1 */ | 224 | union t3_wrid wrid; /* 1 */ |
176 | __be32 stag; /* 2 */ | 225 | __be32 stag; /* 2 */ |
177 | __be32 reserved3; | 226 | __be32 reserved; |
178 | }; | 227 | }; |
179 | 228 | ||
180 | struct t3_rdma_write_wr { | 229 | struct t3_rdma_write_wr { |
@@ -193,7 +242,8 @@ struct t3_rdma_read_wr { | |||
193 | struct fw_riwrh wrh; /* 0 */ | 242 | struct fw_riwrh wrh; /* 0 */ |
194 | union t3_wrid wrid; /* 1 */ | 243 | union t3_wrid wrid; /* 1 */ |
195 | u8 rdmaop; /* 2 */ | 244 | u8 rdmaop; /* 2 */ |
196 | u8 reserved[3]; | 245 | u8 local_inv; |
246 | u8 reserved[2]; | ||
197 | __be32 rem_stag; | 247 | __be32 rem_stag; |
198 | __be64 rem_to; /* 3 */ | 248 | __be64 rem_to; /* 3 */ |
199 | __be32 local_stag; /* 4 */ | 249 | __be32 local_stag; /* 4 */ |
@@ -201,18 +251,6 @@ struct t3_rdma_read_wr { | |||
201 | __be64 local_to; /* 5 */ | 251 | __be64 local_to; /* 5 */ |
202 | }; | 252 | }; |
203 | 253 | ||
204 | enum t3_addr_type { | ||
205 | T3_VA_BASED_TO = 0x0, | ||
206 | T3_ZERO_BASED_TO = 0x1 | ||
207 | } __attribute__ ((packed)); | ||
208 | |||
209 | enum t3_mem_perms { | ||
210 | T3_MEM_ACCESS_LOCAL_READ = 0x1, | ||
211 | T3_MEM_ACCESS_LOCAL_WRITE = 0x2, | ||
212 | T3_MEM_ACCESS_REM_READ = 0x4, | ||
213 | T3_MEM_ACCESS_REM_WRITE = 0x8 | ||
214 | } __attribute__ ((packed)); | ||
215 | |||
216 | struct t3_bind_mw_wr { | 254 | struct t3_bind_mw_wr { |
217 | struct fw_riwrh wrh; /* 0 */ | 255 | struct fw_riwrh wrh; /* 0 */ |
218 | union t3_wrid wrid; /* 1 */ | 256 | union t3_wrid wrid; /* 1 */ |
@@ -336,6 +374,11 @@ struct t3_genbit { | |||
336 | __be64 genbit; | 374 | __be64 genbit; |
337 | }; | 375 | }; |
338 | 376 | ||
377 | struct t3_wq_in_err { | ||
378 | u64 flit[13]; | ||
379 | u64 err; | ||
380 | }; | ||
381 | |||
339 | enum rdma_init_wr_flags { | 382 | enum rdma_init_wr_flags { |
340 | MPA_INITIATOR = (1<<0), | 383 | MPA_INITIATOR = (1<<0), |
341 | PRIV_QP = (1<<1), | 384 | PRIV_QP = (1<<1), |
@@ -346,13 +389,16 @@ union t3_wr { | |||
346 | struct t3_rdma_write_wr write; | 389 | struct t3_rdma_write_wr write; |
347 | struct t3_rdma_read_wr read; | 390 | struct t3_rdma_read_wr read; |
348 | struct t3_receive_wr recv; | 391 | struct t3_receive_wr recv; |
392 | struct t3_fastreg_wr fastreg; | ||
393 | struct t3_pbl_frag pbl_frag; | ||
349 | struct t3_local_inv_wr local_inv; | 394 | struct t3_local_inv_wr local_inv; |
350 | struct t3_bind_mw_wr bind; | 395 | struct t3_bind_mw_wr bind; |
351 | struct t3_bypass_wr bypass; | 396 | struct t3_bypass_wr bypass; |
352 | struct t3_rdma_init_wr init; | 397 | struct t3_rdma_init_wr init; |
353 | struct t3_modify_qp_wr qp_mod; | 398 | struct t3_modify_qp_wr qp_mod; |
354 | struct t3_genbit genbit; | 399 | struct t3_genbit genbit; |
355 | u64 flit[16]; | 400 | struct t3_wq_in_err wq_in_err; |
401 | __be64 flit[16]; | ||
356 | }; | 402 | }; |
357 | 403 | ||
358 | #define T3_SQ_CQE_FLIT 13 | 404 | #define T3_SQ_CQE_FLIT 13 |
@@ -366,12 +412,18 @@ static inline enum t3_wr_opcode fw_riwrh_opcode(struct fw_riwrh *wqe) | |||
366 | return G_FW_RIWR_OP(be32_to_cpu(wqe->op_seop_flags)); | 412 | return G_FW_RIWR_OP(be32_to_cpu(wqe->op_seop_flags)); |
367 | } | 413 | } |
368 | 414 | ||
415 | enum t3_wr_hdr_bits { | ||
416 | T3_EOP = 1, | ||
417 | T3_SOP = 2, | ||
418 | T3_SOPEOP = T3_EOP|T3_SOP, | ||
419 | }; | ||
420 | |||
369 | static inline void build_fw_riwrh(struct fw_riwrh *wqe, enum t3_wr_opcode op, | 421 | static inline void build_fw_riwrh(struct fw_riwrh *wqe, enum t3_wr_opcode op, |
370 | enum t3_wr_flags flags, u8 genbit, u32 tid, | 422 | enum t3_wr_flags flags, u8 genbit, u32 tid, |
371 | u8 len) | 423 | u8 len, u8 sopeop) |
372 | { | 424 | { |
373 | wqe->op_seop_flags = cpu_to_be32(V_FW_RIWR_OP(op) | | 425 | wqe->op_seop_flags = cpu_to_be32(V_FW_RIWR_OP(op) | |
374 | V_FW_RIWR_SOPEOP(M_FW_RIWR_SOPEOP) | | 426 | V_FW_RIWR_SOPEOP(sopeop) | |
375 | V_FW_RIWR_FLAGS(flags)); | 427 | V_FW_RIWR_FLAGS(flags)); |
376 | wmb(); | 428 | wmb(); |
377 | wqe->gen_tid_len = cpu_to_be32(V_FW_RIWR_GEN(genbit) | | 429 | wqe->gen_tid_len = cpu_to_be32(V_FW_RIWR_GEN(genbit) | |
@@ -404,6 +456,7 @@ enum tpt_addr_type { | |||
404 | }; | 456 | }; |
405 | 457 | ||
406 | enum tpt_mem_perm { | 458 | enum tpt_mem_perm { |
459 | TPT_MW_BIND = 0x10, | ||
407 | TPT_LOCAL_READ = 0x8, | 460 | TPT_LOCAL_READ = 0x8, |
408 | TPT_LOCAL_WRITE = 0x4, | 461 | TPT_LOCAL_WRITE = 0x4, |
409 | TPT_REMOTE_READ = 0x2, | 462 | TPT_REMOTE_READ = 0x2, |
@@ -615,6 +668,11 @@ struct t3_swsq { | |||
615 | int signaled; | 668 | int signaled; |
616 | }; | 669 | }; |
617 | 670 | ||
671 | struct t3_swrq { | ||
672 | __u64 wr_id; | ||
673 | __u32 pbl_addr; | ||
674 | }; | ||
675 | |||
618 | /* | 676 | /* |
619 | * A T3 WQ implements both the SQ and RQ. | 677 | * A T3 WQ implements both the SQ and RQ. |
620 | */ | 678 | */ |
@@ -631,14 +689,15 @@ struct t3_wq { | |||
631 | u32 sq_wptr; /* sq_wptr - sq_rptr == count of */ | 689 | u32 sq_wptr; /* sq_wptr - sq_rptr == count of */ |
632 | u32 sq_rptr; /* pending wrs */ | 690 | u32 sq_rptr; /* pending wrs */ |
633 | u32 sq_size_log2; /* sq size */ | 691 | u32 sq_size_log2; /* sq size */ |
634 | u64 *rq; /* SW RQ (holds consumer wr_ids */ | 692 | struct t3_swrq *rq; /* SW RQ (holds consumer wr_ids */ |
635 | u32 rq_wptr; /* rq_wptr - rq_rptr == count of */ | 693 | u32 rq_wptr; /* rq_wptr - rq_rptr == count of */ |
636 | u32 rq_rptr; /* pending wrs */ | 694 | u32 rq_rptr; /* pending wrs */ |
637 | u64 *rq_oldest_wr; /* oldest wr on the SW RQ */ | 695 | struct t3_swrq *rq_oldest_wr; /* oldest wr on the SW RQ */ |
638 | u32 rq_size_log2; /* rq size */ | 696 | u32 rq_size_log2; /* rq size */ |
639 | u32 rq_addr; /* rq adapter address */ | 697 | u32 rq_addr; /* rq adapter address */ |
640 | void __iomem *doorbell; /* kernel db */ | 698 | void __iomem *doorbell; /* kernel db */ |
641 | u64 udb; /* user db if any */ | 699 | u64 udb; /* user db if any */ |
700 | struct cxio_rdev *rdev; | ||
642 | }; | 701 | }; |
643 | 702 | ||
644 | struct t3_cq { | 703 | struct t3_cq { |
@@ -659,7 +718,7 @@ struct t3_cq { | |||
659 | 718 | ||
660 | static inline void cxio_set_wq_in_error(struct t3_wq *wq) | 719 | static inline void cxio_set_wq_in_error(struct t3_wq *wq) |
661 | { | 720 | { |
662 | wq->queue->flit[13] = 1; | 721 | wq->queue->wq_in_err.err = 1; |
663 | } | 722 | } |
664 | 723 | ||
665 | static inline struct t3_cqe *cxio_next_hw_cqe(struct t3_cq *cq) | 724 | static inline struct t3_cqe *cxio_next_hw_cqe(struct t3_cq *cq) |
diff --git a/drivers/infiniband/hw/cxgb3/iwch.c b/drivers/infiniband/hw/cxgb3/iwch.c index 71554eacb13c..4489c89d6710 100644 --- a/drivers/infiniband/hw/cxgb3/iwch.c +++ b/drivers/infiniband/hw/cxgb3/iwch.c | |||
@@ -71,18 +71,16 @@ static void rnic_init(struct iwch_dev *rnicp) | |||
71 | idr_init(&rnicp->mmidr); | 71 | idr_init(&rnicp->mmidr); |
72 | spin_lock_init(&rnicp->lock); | 72 | spin_lock_init(&rnicp->lock); |
73 | 73 | ||
74 | rnicp->attr.vendor_id = 0x168; | ||
75 | rnicp->attr.vendor_part_id = 7; | ||
76 | rnicp->attr.max_qps = T3_MAX_NUM_QP - 32; | 74 | rnicp->attr.max_qps = T3_MAX_NUM_QP - 32; |
77 | rnicp->attr.max_wrs = (1UL << 24) - 1; | 75 | rnicp->attr.max_wrs = T3_MAX_QP_DEPTH; |
78 | rnicp->attr.max_sge_per_wr = T3_MAX_SGE; | 76 | rnicp->attr.max_sge_per_wr = T3_MAX_SGE; |
79 | rnicp->attr.max_sge_per_rdma_write_wr = T3_MAX_SGE; | 77 | rnicp->attr.max_sge_per_rdma_write_wr = T3_MAX_SGE; |
80 | rnicp->attr.max_cqs = T3_MAX_NUM_CQ - 1; | 78 | rnicp->attr.max_cqs = T3_MAX_NUM_CQ - 1; |
81 | rnicp->attr.max_cqes_per_cq = (1UL << 24) - 1; | 79 | rnicp->attr.max_cqes_per_cq = T3_MAX_CQ_DEPTH; |
82 | rnicp->attr.max_mem_regs = cxio_num_stags(&rnicp->rdev); | 80 | rnicp->attr.max_mem_regs = cxio_num_stags(&rnicp->rdev); |
83 | rnicp->attr.max_phys_buf_entries = T3_MAX_PBL_SIZE; | 81 | rnicp->attr.max_phys_buf_entries = T3_MAX_PBL_SIZE; |
84 | rnicp->attr.max_pds = T3_MAX_NUM_PD - 1; | 82 | rnicp->attr.max_pds = T3_MAX_NUM_PD - 1; |
85 | rnicp->attr.mem_pgsizes_bitmask = 0x7FFF; /* 4KB-128MB */ | 83 | rnicp->attr.mem_pgsizes_bitmask = T3_PAGESIZE_MASK; |
86 | rnicp->attr.max_mr_size = T3_MAX_MR_SIZE; | 84 | rnicp->attr.max_mr_size = T3_MAX_MR_SIZE; |
87 | rnicp->attr.can_resize_wq = 0; | 85 | rnicp->attr.can_resize_wq = 0; |
88 | rnicp->attr.max_rdma_reads_per_qp = 8; | 86 | rnicp->attr.max_rdma_reads_per_qp = 8; |
diff --git a/drivers/infiniband/hw/cxgb3/iwch.h b/drivers/infiniband/hw/cxgb3/iwch.h index d2409a505e8d..3773453b2cf0 100644 --- a/drivers/infiniband/hw/cxgb3/iwch.h +++ b/drivers/infiniband/hw/cxgb3/iwch.h | |||
@@ -48,8 +48,6 @@ struct iwch_qp; | |||
48 | struct iwch_mr; | 48 | struct iwch_mr; |
49 | 49 | ||
50 | struct iwch_rnic_attributes { | 50 | struct iwch_rnic_attributes { |
51 | u32 vendor_id; | ||
52 | u32 vendor_part_id; | ||
53 | u32 max_qps; | 51 | u32 max_qps; |
54 | u32 max_wrs; /* Max for any SQ/RQ */ | 52 | u32 max_wrs; /* Max for any SQ/RQ */ |
55 | u32 max_sge_per_wr; | 53 | u32 max_sge_per_wr; |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cq.c b/drivers/infiniband/hw/cxgb3/iwch_cq.c index 4ee8ccd0a9e5..cf5474ae68ff 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_cq.c +++ b/drivers/infiniband/hw/cxgb3/iwch_cq.c | |||
@@ -81,6 +81,7 @@ static int iwch_poll_cq_one(struct iwch_dev *rhp, struct iwch_cq *chp, | |||
81 | wc->wr_id = cookie; | 81 | wc->wr_id = cookie; |
82 | wc->qp = &qhp->ibqp; | 82 | wc->qp = &qhp->ibqp; |
83 | wc->vendor_err = CQE_STATUS(cqe); | 83 | wc->vendor_err = CQE_STATUS(cqe); |
84 | wc->wc_flags = 0; | ||
84 | 85 | ||
85 | PDBG("%s qpid 0x%x type %d opcode %d status 0x%x wrid hi 0x%x " | 86 | PDBG("%s qpid 0x%x type %d opcode %d status 0x%x wrid hi 0x%x " |
86 | "lo 0x%x cookie 0x%llx\n", __func__, | 87 | "lo 0x%x cookie 0x%llx\n", __func__, |
@@ -94,6 +95,11 @@ static int iwch_poll_cq_one(struct iwch_dev *rhp, struct iwch_cq *chp, | |||
94 | else | 95 | else |
95 | wc->byte_len = 0; | 96 | wc->byte_len = 0; |
96 | wc->opcode = IB_WC_RECV; | 97 | wc->opcode = IB_WC_RECV; |
98 | if (CQE_OPCODE(cqe) == T3_SEND_WITH_INV || | ||
99 | CQE_OPCODE(cqe) == T3_SEND_WITH_SE_INV) { | ||
100 | wc->ex.invalidate_rkey = CQE_WRID_STAG(cqe); | ||
101 | wc->wc_flags |= IB_WC_WITH_INVALIDATE; | ||
102 | } | ||
97 | } else { | 103 | } else { |
98 | switch (CQE_OPCODE(cqe)) { | 104 | switch (CQE_OPCODE(cqe)) { |
99 | case T3_RDMA_WRITE: | 105 | case T3_RDMA_WRITE: |
@@ -105,17 +111,20 @@ static int iwch_poll_cq_one(struct iwch_dev *rhp, struct iwch_cq *chp, | |||
105 | break; | 111 | break; |
106 | case T3_SEND: | 112 | case T3_SEND: |
107 | case T3_SEND_WITH_SE: | 113 | case T3_SEND_WITH_SE: |
114 | case T3_SEND_WITH_INV: | ||
115 | case T3_SEND_WITH_SE_INV: | ||
108 | wc->opcode = IB_WC_SEND; | 116 | wc->opcode = IB_WC_SEND; |
109 | break; | 117 | break; |
110 | case T3_BIND_MW: | 118 | case T3_BIND_MW: |
111 | wc->opcode = IB_WC_BIND_MW; | 119 | wc->opcode = IB_WC_BIND_MW; |
112 | break; | 120 | break; |
113 | 121 | ||
114 | /* these aren't supported yet */ | ||
115 | case T3_SEND_WITH_INV: | ||
116 | case T3_SEND_WITH_SE_INV: | ||
117 | case T3_LOCAL_INV: | 122 | case T3_LOCAL_INV: |
123 | wc->opcode = IB_WC_LOCAL_INV; | ||
124 | break; | ||
118 | case T3_FAST_REGISTER: | 125 | case T3_FAST_REGISTER: |
126 | wc->opcode = IB_WC_FAST_REG_MR; | ||
127 | break; | ||
119 | default: | 128 | default: |
120 | printk(KERN_ERR MOD "Unexpected opcode %d " | 129 | printk(KERN_ERR MOD "Unexpected opcode %d " |
121 | "in the CQE received for QPID=0x%0x\n", | 130 | "in the CQE received for QPID=0x%0x\n", |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.c b/drivers/infiniband/hw/cxgb3/iwch_provider.c index 8934178a23ee..b89640aa6e10 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_provider.c +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.c | |||
@@ -56,6 +56,7 @@ | |||
56 | #include "iwch_provider.h" | 56 | #include "iwch_provider.h" |
57 | #include "iwch_cm.h" | 57 | #include "iwch_cm.h" |
58 | #include "iwch_user.h" | 58 | #include "iwch_user.h" |
59 | #include "common.h" | ||
59 | 60 | ||
60 | static int iwch_modify_port(struct ib_device *ibdev, | 61 | static int iwch_modify_port(struct ib_device *ibdev, |
61 | u8 port, int port_modify_mask, | 62 | u8 port, int port_modify_mask, |
@@ -747,6 +748,7 @@ static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd) | |||
747 | mhp->attr.type = TPT_MW; | 748 | mhp->attr.type = TPT_MW; |
748 | mhp->attr.stag = stag; | 749 | mhp->attr.stag = stag; |
749 | mmid = (stag) >> 8; | 750 | mmid = (stag) >> 8; |
751 | mhp->ibmw.rkey = stag; | ||
750 | insert_handle(rhp, &rhp->mmidr, mhp, mmid); | 752 | insert_handle(rhp, &rhp->mmidr, mhp, mmid); |
751 | PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __func__, mmid, mhp, stag); | 753 | PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __func__, mmid, mhp, stag); |
752 | return &(mhp->ibmw); | 754 | return &(mhp->ibmw); |
@@ -768,6 +770,68 @@ static int iwch_dealloc_mw(struct ib_mw *mw) | |||
768 | return 0; | 770 | return 0; |
769 | } | 771 | } |
770 | 772 | ||
773 | static struct ib_mr *iwch_alloc_fast_reg_mr(struct ib_pd *pd, int pbl_depth) | ||
774 | { | ||
775 | struct iwch_dev *rhp; | ||
776 | struct iwch_pd *php; | ||
777 | struct iwch_mr *mhp; | ||
778 | u32 mmid; | ||
779 | u32 stag = 0; | ||
780 | int ret; | ||
781 | |||
782 | php = to_iwch_pd(pd); | ||
783 | rhp = php->rhp; | ||
784 | mhp = kzalloc(sizeof(*mhp), GFP_KERNEL); | ||
785 | if (!mhp) | ||
786 | return ERR_PTR(-ENOMEM); | ||
787 | |||
788 | mhp->rhp = rhp; | ||
789 | ret = iwch_alloc_pbl(mhp, pbl_depth); | ||
790 | if (ret) { | ||
791 | kfree(mhp); | ||
792 | return ERR_PTR(ret); | ||
793 | } | ||
794 | mhp->attr.pbl_size = pbl_depth; | ||
795 | ret = cxio_allocate_stag(&rhp->rdev, &stag, php->pdid, | ||
796 | mhp->attr.pbl_size, mhp->attr.pbl_addr); | ||
797 | if (ret) { | ||
798 | iwch_free_pbl(mhp); | ||
799 | kfree(mhp); | ||
800 | return ERR_PTR(ret); | ||
801 | } | ||
802 | mhp->attr.pdid = php->pdid; | ||
803 | mhp->attr.type = TPT_NON_SHARED_MR; | ||
804 | mhp->attr.stag = stag; | ||
805 | mhp->attr.state = 1; | ||
806 | mmid = (stag) >> 8; | ||
807 | mhp->ibmr.rkey = mhp->ibmr.lkey = stag; | ||
808 | insert_handle(rhp, &rhp->mmidr, mhp, mmid); | ||
809 | PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __func__, mmid, mhp, stag); | ||
810 | return &(mhp->ibmr); | ||
811 | } | ||
812 | |||
813 | static struct ib_fast_reg_page_list *iwch_alloc_fastreg_pbl( | ||
814 | struct ib_device *device, | ||
815 | int page_list_len) | ||
816 | { | ||
817 | struct ib_fast_reg_page_list *page_list; | ||
818 | |||
819 | page_list = kmalloc(sizeof *page_list + page_list_len * sizeof(u64), | ||
820 | GFP_KERNEL); | ||
821 | if (!page_list) | ||
822 | return ERR_PTR(-ENOMEM); | ||
823 | |||
824 | page_list->page_list = (u64 *)(page_list + 1); | ||
825 | page_list->max_page_list_len = page_list_len; | ||
826 | |||
827 | return page_list; | ||
828 | } | ||
829 | |||
830 | static void iwch_free_fastreg_pbl(struct ib_fast_reg_page_list *page_list) | ||
831 | { | ||
832 | kfree(page_list); | ||
833 | } | ||
834 | |||
771 | static int iwch_destroy_qp(struct ib_qp *ib_qp) | 835 | static int iwch_destroy_qp(struct ib_qp *ib_qp) |
772 | { | 836 | { |
773 | struct iwch_dev *rhp; | 837 | struct iwch_dev *rhp; |
@@ -843,6 +907,15 @@ static struct ib_qp *iwch_create_qp(struct ib_pd *pd, | |||
843 | */ | 907 | */ |
844 | sqsize = roundup_pow_of_two(attrs->cap.max_send_wr); | 908 | sqsize = roundup_pow_of_two(attrs->cap.max_send_wr); |
845 | wqsize = roundup_pow_of_two(rqsize + sqsize); | 909 | wqsize = roundup_pow_of_two(rqsize + sqsize); |
910 | |||
911 | /* | ||
912 | * Kernel users need more wq space for fastreg WRs which can take | ||
913 | * 2 WR fragments. | ||
914 | */ | ||
915 | ucontext = pd->uobject ? to_iwch_ucontext(pd->uobject->context) : NULL; | ||
916 | if (!ucontext && wqsize < (rqsize + (2 * sqsize))) | ||
917 | wqsize = roundup_pow_of_two(rqsize + | ||
918 | roundup_pow_of_two(attrs->cap.max_send_wr * 2)); | ||
846 | PDBG("%s wqsize %d sqsize %d rqsize %d\n", __func__, | 919 | PDBG("%s wqsize %d sqsize %d rqsize %d\n", __func__, |
847 | wqsize, sqsize, rqsize); | 920 | wqsize, sqsize, rqsize); |
848 | qhp = kzalloc(sizeof(*qhp), GFP_KERNEL); | 921 | qhp = kzalloc(sizeof(*qhp), GFP_KERNEL); |
@@ -851,7 +924,6 @@ static struct ib_qp *iwch_create_qp(struct ib_pd *pd, | |||
851 | qhp->wq.size_log2 = ilog2(wqsize); | 924 | qhp->wq.size_log2 = ilog2(wqsize); |
852 | qhp->wq.rq_size_log2 = ilog2(rqsize); | 925 | qhp->wq.rq_size_log2 = ilog2(rqsize); |
853 | qhp->wq.sq_size_log2 = ilog2(sqsize); | 926 | qhp->wq.sq_size_log2 = ilog2(sqsize); |
854 | ucontext = pd->uobject ? to_iwch_ucontext(pd->uobject->context) : NULL; | ||
855 | if (cxio_create_qp(&rhp->rdev, !udata, &qhp->wq, | 927 | if (cxio_create_qp(&rhp->rdev, !udata, &qhp->wq, |
856 | ucontext ? &ucontext->uctx : &rhp->rdev.uctx)) { | 928 | ucontext ? &ucontext->uctx : &rhp->rdev.uctx)) { |
857 | kfree(qhp); | 929 | kfree(qhp); |
@@ -935,10 +1007,10 @@ static struct ib_qp *iwch_create_qp(struct ib_pd *pd, | |||
935 | qhp->ibqp.qp_num = qhp->wq.qpid; | 1007 | qhp->ibqp.qp_num = qhp->wq.qpid; |
936 | init_timer(&(qhp->timer)); | 1008 | init_timer(&(qhp->timer)); |
937 | PDBG("%s sq_num_entries %d, rq_num_entries %d " | 1009 | PDBG("%s sq_num_entries %d, rq_num_entries %d " |
938 | "qpid 0x%0x qhp %p dma_addr 0x%llx size %d\n", | 1010 | "qpid 0x%0x qhp %p dma_addr 0x%llx size %d rq_addr 0x%x\n", |
939 | __func__, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, | 1011 | __func__, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, |
940 | qhp->wq.qpid, qhp, (unsigned long long) qhp->wq.dma_addr, | 1012 | qhp->wq.qpid, qhp, (unsigned long long) qhp->wq.dma_addr, |
941 | 1 << qhp->wq.size_log2); | 1013 | 1 << qhp->wq.size_log2, qhp->wq.rq_addr); |
942 | return &qhp->ibqp; | 1014 | return &qhp->ibqp; |
943 | } | 1015 | } |
944 | 1016 | ||
@@ -1023,6 +1095,29 @@ static int iwch_query_gid(struct ib_device *ibdev, u8 port, | |||
1023 | return 0; | 1095 | return 0; |
1024 | } | 1096 | } |
1025 | 1097 | ||
1098 | static u64 fw_vers_string_to_u64(struct iwch_dev *iwch_dev) | ||
1099 | { | ||
1100 | struct ethtool_drvinfo info; | ||
1101 | struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; | ||
1102 | char *cp, *next; | ||
1103 | unsigned fw_maj, fw_min, fw_mic; | ||
1104 | |||
1105 | rtnl_lock(); | ||
1106 | lldev->ethtool_ops->get_drvinfo(lldev, &info); | ||
1107 | rtnl_unlock(); | ||
1108 | |||
1109 | next = info.fw_version + 1; | ||
1110 | cp = strsep(&next, "."); | ||
1111 | sscanf(cp, "%i", &fw_maj); | ||
1112 | cp = strsep(&next, "."); | ||
1113 | sscanf(cp, "%i", &fw_min); | ||
1114 | cp = strsep(&next, "."); | ||
1115 | sscanf(cp, "%i", &fw_mic); | ||
1116 | |||
1117 | return (((u64)fw_maj & 0xffff) << 32) | ((fw_min & 0xffff) << 16) | | ||
1118 | (fw_mic & 0xffff); | ||
1119 | } | ||
1120 | |||
1026 | static int iwch_query_device(struct ib_device *ibdev, | 1121 | static int iwch_query_device(struct ib_device *ibdev, |
1027 | struct ib_device_attr *props) | 1122 | struct ib_device_attr *props) |
1028 | { | 1123 | { |
@@ -1033,7 +1128,10 @@ static int iwch_query_device(struct ib_device *ibdev, | |||
1033 | dev = to_iwch_dev(ibdev); | 1128 | dev = to_iwch_dev(ibdev); |
1034 | memset(props, 0, sizeof *props); | 1129 | memset(props, 0, sizeof *props); |
1035 | memcpy(&props->sys_image_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6); | 1130 | memcpy(&props->sys_image_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6); |
1131 | props->hw_ver = dev->rdev.t3cdev_p->type; | ||
1132 | props->fw_ver = fw_vers_string_to_u64(dev); | ||
1036 | props->device_cap_flags = dev->device_cap_flags; | 1133 | props->device_cap_flags = dev->device_cap_flags; |
1134 | props->page_size_cap = dev->attr.mem_pgsizes_bitmask; | ||
1037 | props->vendor_id = (u32)dev->rdev.rnic_info.pdev->vendor; | 1135 | props->vendor_id = (u32)dev->rdev.rnic_info.pdev->vendor; |
1038 | props->vendor_part_id = (u32)dev->rdev.rnic_info.pdev->device; | 1136 | props->vendor_part_id = (u32)dev->rdev.rnic_info.pdev->device; |
1039 | props->max_mr_size = dev->attr.max_mr_size; | 1137 | props->max_mr_size = dev->attr.max_mr_size; |
@@ -1048,6 +1146,7 @@ static int iwch_query_device(struct ib_device *ibdev, | |||
1048 | props->max_mr = dev->attr.max_mem_regs; | 1146 | props->max_mr = dev->attr.max_mem_regs; |
1049 | props->max_pd = dev->attr.max_pds; | 1147 | props->max_pd = dev->attr.max_pds; |
1050 | props->local_ca_ack_delay = 0; | 1148 | props->local_ca_ack_delay = 0; |
1149 | props->max_fast_reg_page_list_len = T3_MAX_FASTREG_DEPTH; | ||
1051 | 1150 | ||
1052 | return 0; | 1151 | return 0; |
1053 | } | 1152 | } |
@@ -1088,6 +1187,28 @@ static ssize_t show_rev(struct device *dev, struct device_attribute *attr, | |||
1088 | return sprintf(buf, "%d\n", iwch_dev->rdev.t3cdev_p->type); | 1187 | return sprintf(buf, "%d\n", iwch_dev->rdev.t3cdev_p->type); |
1089 | } | 1188 | } |
1090 | 1189 | ||
1190 | static int fw_supports_fastreg(struct iwch_dev *iwch_dev) | ||
1191 | { | ||
1192 | struct ethtool_drvinfo info; | ||
1193 | struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; | ||
1194 | char *cp, *next; | ||
1195 | unsigned fw_maj, fw_min; | ||
1196 | |||
1197 | rtnl_lock(); | ||
1198 | lldev->ethtool_ops->get_drvinfo(lldev, &info); | ||
1199 | rtnl_unlock(); | ||
1200 | |||
1201 | next = info.fw_version+1; | ||
1202 | cp = strsep(&next, "."); | ||
1203 | sscanf(cp, "%i", &fw_maj); | ||
1204 | cp = strsep(&next, "."); | ||
1205 | sscanf(cp, "%i", &fw_min); | ||
1206 | |||
1207 | PDBG("%s maj %u min %u\n", __func__, fw_maj, fw_min); | ||
1208 | |||
1209 | return fw_maj > 6 || (fw_maj == 6 && fw_min > 0); | ||
1210 | } | ||
1211 | |||
1091 | static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr, char *buf) | 1212 | static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr, char *buf) |
1092 | { | 1213 | { |
1093 | struct iwch_dev *iwch_dev = container_of(dev, struct iwch_dev, | 1214 | struct iwch_dev *iwch_dev = container_of(dev, struct iwch_dev, |
@@ -1096,7 +1217,9 @@ static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr, ch | |||
1096 | struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; | 1217 | struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; |
1097 | 1218 | ||
1098 | PDBG("%s dev 0x%p\n", __func__, dev); | 1219 | PDBG("%s dev 0x%p\n", __func__, dev); |
1220 | rtnl_lock(); | ||
1099 | lldev->ethtool_ops->get_drvinfo(lldev, &info); | 1221 | lldev->ethtool_ops->get_drvinfo(lldev, &info); |
1222 | rtnl_unlock(); | ||
1100 | return sprintf(buf, "%s\n", info.fw_version); | 1223 | return sprintf(buf, "%s\n", info.fw_version); |
1101 | } | 1224 | } |
1102 | 1225 | ||
@@ -1109,7 +1232,9 @@ static ssize_t show_hca(struct device *dev, struct device_attribute *attr, | |||
1109 | struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; | 1232 | struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; |
1110 | 1233 | ||
1111 | PDBG("%s dev 0x%p\n", __func__, dev); | 1234 | PDBG("%s dev 0x%p\n", __func__, dev); |
1235 | rtnl_lock(); | ||
1112 | lldev->ethtool_ops->get_drvinfo(lldev, &info); | 1236 | lldev->ethtool_ops->get_drvinfo(lldev, &info); |
1237 | rtnl_unlock(); | ||
1113 | return sprintf(buf, "%s\n", info.driver); | 1238 | return sprintf(buf, "%s\n", info.driver); |
1114 | } | 1239 | } |
1115 | 1240 | ||
@@ -1123,6 +1248,61 @@ static ssize_t show_board(struct device *dev, struct device_attribute *attr, | |||
1123 | iwch_dev->rdev.rnic_info.pdev->device); | 1248 | iwch_dev->rdev.rnic_info.pdev->device); |
1124 | } | 1249 | } |
1125 | 1250 | ||
1251 | static int iwch_get_mib(struct ib_device *ibdev, | ||
1252 | union rdma_protocol_stats *stats) | ||
1253 | { | ||
1254 | struct iwch_dev *dev; | ||
1255 | struct tp_mib_stats m; | ||
1256 | int ret; | ||
1257 | |||
1258 | PDBG("%s ibdev %p\n", __func__, ibdev); | ||
1259 | dev = to_iwch_dev(ibdev); | ||
1260 | ret = dev->rdev.t3cdev_p->ctl(dev->rdev.t3cdev_p, RDMA_GET_MIB, &m); | ||
1261 | if (ret) | ||
1262 | return -ENOSYS; | ||
1263 | |||
1264 | memset(stats, 0, sizeof *stats); | ||
1265 | stats->iw.ipInReceives = ((u64) m.ipInReceive_hi << 32) + | ||
1266 | m.ipInReceive_lo; | ||
1267 | stats->iw.ipInHdrErrors = ((u64) m.ipInHdrErrors_hi << 32) + | ||
1268 | m.ipInHdrErrors_lo; | ||
1269 | stats->iw.ipInAddrErrors = ((u64) m.ipInAddrErrors_hi << 32) + | ||
1270 | m.ipInAddrErrors_lo; | ||
1271 | stats->iw.ipInUnknownProtos = ((u64) m.ipInUnknownProtos_hi << 32) + | ||
1272 | m.ipInUnknownProtos_lo; | ||
1273 | stats->iw.ipInDiscards = ((u64) m.ipInDiscards_hi << 32) + | ||
1274 | m.ipInDiscards_lo; | ||
1275 | stats->iw.ipInDelivers = ((u64) m.ipInDelivers_hi << 32) + | ||
1276 | m.ipInDelivers_lo; | ||
1277 | stats->iw.ipOutRequests = ((u64) m.ipOutRequests_hi << 32) + | ||
1278 | m.ipOutRequests_lo; | ||
1279 | stats->iw.ipOutDiscards = ((u64) m.ipOutDiscards_hi << 32) + | ||
1280 | m.ipOutDiscards_lo; | ||
1281 | stats->iw.ipOutNoRoutes = ((u64) m.ipOutNoRoutes_hi << 32) + | ||
1282 | m.ipOutNoRoutes_lo; | ||
1283 | stats->iw.ipReasmTimeout = (u64) m.ipReasmTimeout; | ||
1284 | stats->iw.ipReasmReqds = (u64) m.ipReasmReqds; | ||
1285 | stats->iw.ipReasmOKs = (u64) m.ipReasmOKs; | ||
1286 | stats->iw.ipReasmFails = (u64) m.ipReasmFails; | ||
1287 | stats->iw.tcpActiveOpens = (u64) m.tcpActiveOpens; | ||
1288 | stats->iw.tcpPassiveOpens = (u64) m.tcpPassiveOpens; | ||
1289 | stats->iw.tcpAttemptFails = (u64) m.tcpAttemptFails; | ||
1290 | stats->iw.tcpEstabResets = (u64) m.tcpEstabResets; | ||
1291 | stats->iw.tcpOutRsts = (u64) m.tcpOutRsts; | ||
1292 | stats->iw.tcpCurrEstab = (u64) m.tcpCurrEstab; | ||
1293 | stats->iw.tcpInSegs = ((u64) m.tcpInSegs_hi << 32) + | ||
1294 | m.tcpInSegs_lo; | ||
1295 | stats->iw.tcpOutSegs = ((u64) m.tcpOutSegs_hi << 32) + | ||
1296 | m.tcpOutSegs_lo; | ||
1297 | stats->iw.tcpRetransSegs = ((u64) m.tcpRetransSeg_hi << 32) + | ||
1298 | m.tcpRetransSeg_lo; | ||
1299 | stats->iw.tcpInErrs = ((u64) m.tcpInErrs_hi << 32) + | ||
1300 | m.tcpInErrs_lo; | ||
1301 | stats->iw.tcpRtoMin = (u64) m.tcpRtoMin; | ||
1302 | stats->iw.tcpRtoMax = (u64) m.tcpRtoMax; | ||
1303 | return 0; | ||
1304 | } | ||
1305 | |||
1126 | static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); | 1306 | static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); |
1127 | static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); | 1307 | static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); |
1128 | static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); | 1308 | static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); |
@@ -1132,7 +1312,7 @@ static struct device_attribute *iwch_class_attributes[] = { | |||
1132 | &dev_attr_hw_rev, | 1312 | &dev_attr_hw_rev, |
1133 | &dev_attr_fw_ver, | 1313 | &dev_attr_fw_ver, |
1134 | &dev_attr_hca_type, | 1314 | &dev_attr_hca_type, |
1135 | &dev_attr_board_id | 1315 | &dev_attr_board_id, |
1136 | }; | 1316 | }; |
1137 | 1317 | ||
1138 | int iwch_register_device(struct iwch_dev *dev) | 1318 | int iwch_register_device(struct iwch_dev *dev) |
@@ -1145,8 +1325,12 @@ int iwch_register_device(struct iwch_dev *dev) | |||
1145 | memset(&dev->ibdev.node_guid, 0, sizeof(dev->ibdev.node_guid)); | 1325 | memset(&dev->ibdev.node_guid, 0, sizeof(dev->ibdev.node_guid)); |
1146 | memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6); | 1326 | memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6); |
1147 | dev->ibdev.owner = THIS_MODULE; | 1327 | dev->ibdev.owner = THIS_MODULE; |
1148 | dev->device_cap_flags = | 1328 | dev->device_cap_flags = IB_DEVICE_LOCAL_DMA_LKEY | IB_DEVICE_MEM_WINDOW; |
1149 | (IB_DEVICE_ZERO_STAG | IB_DEVICE_MEM_WINDOW); | 1329 | |
1330 | /* cxgb3 supports STag 0. */ | ||
1331 | dev->ibdev.local_dma_lkey = 0; | ||
1332 | if (fw_supports_fastreg(dev)) | ||
1333 | dev->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; | ||
1150 | 1334 | ||
1151 | dev->ibdev.uverbs_cmd_mask = | 1335 | dev->ibdev.uverbs_cmd_mask = |
1152 | (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | | 1336 | (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | |
@@ -1198,15 +1382,16 @@ int iwch_register_device(struct iwch_dev *dev) | |||
1198 | dev->ibdev.alloc_mw = iwch_alloc_mw; | 1382 | dev->ibdev.alloc_mw = iwch_alloc_mw; |
1199 | dev->ibdev.bind_mw = iwch_bind_mw; | 1383 | dev->ibdev.bind_mw = iwch_bind_mw; |
1200 | dev->ibdev.dealloc_mw = iwch_dealloc_mw; | 1384 | dev->ibdev.dealloc_mw = iwch_dealloc_mw; |
1201 | 1385 | dev->ibdev.alloc_fast_reg_mr = iwch_alloc_fast_reg_mr; | |
1386 | dev->ibdev.alloc_fast_reg_page_list = iwch_alloc_fastreg_pbl; | ||
1387 | dev->ibdev.free_fast_reg_page_list = iwch_free_fastreg_pbl; | ||
1202 | dev->ibdev.attach_mcast = iwch_multicast_attach; | 1388 | dev->ibdev.attach_mcast = iwch_multicast_attach; |
1203 | dev->ibdev.detach_mcast = iwch_multicast_detach; | 1389 | dev->ibdev.detach_mcast = iwch_multicast_detach; |
1204 | dev->ibdev.process_mad = iwch_process_mad; | 1390 | dev->ibdev.process_mad = iwch_process_mad; |
1205 | |||
1206 | dev->ibdev.req_notify_cq = iwch_arm_cq; | 1391 | dev->ibdev.req_notify_cq = iwch_arm_cq; |
1207 | dev->ibdev.post_send = iwch_post_send; | 1392 | dev->ibdev.post_send = iwch_post_send; |
1208 | dev->ibdev.post_recv = iwch_post_receive; | 1393 | dev->ibdev.post_recv = iwch_post_receive; |
1209 | 1394 | dev->ibdev.get_protocol_stats = iwch_get_mib; | |
1210 | 1395 | ||
1211 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); | 1396 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); |
1212 | if (!dev->ibdev.iwcm) | 1397 | if (!dev->ibdev.iwcm) |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.h b/drivers/infiniband/hw/cxgb3/iwch_provider.h index 836163fc5429..f5ceca05c435 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_provider.h +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.h | |||
@@ -296,14 +296,6 @@ static inline u32 iwch_ib_to_tpt_access(int acc) | |||
296 | TPT_LOCAL_READ; | 296 | TPT_LOCAL_READ; |
297 | } | 297 | } |
298 | 298 | ||
299 | static inline u32 iwch_ib_to_mwbind_access(int acc) | ||
300 | { | ||
301 | return (acc & IB_ACCESS_REMOTE_WRITE ? T3_MEM_ACCESS_REM_WRITE : 0) | | ||
302 | (acc & IB_ACCESS_REMOTE_READ ? T3_MEM_ACCESS_REM_READ : 0) | | ||
303 | (acc & IB_ACCESS_LOCAL_WRITE ? T3_MEM_ACCESS_LOCAL_WRITE : 0) | | ||
304 | T3_MEM_ACCESS_LOCAL_READ; | ||
305 | } | ||
306 | |||
307 | enum iwch_mmid_state { | 299 | enum iwch_mmid_state { |
308 | IWCH_STAG_STATE_VALID, | 300 | IWCH_STAG_STATE_VALID, |
309 | IWCH_STAG_STATE_INVALID | 301 | IWCH_STAG_STATE_INVALID |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c index 992613799228..9a3be3a9d5dc 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_qp.c +++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c | |||
@@ -33,10 +33,11 @@ | |||
33 | #include "iwch.h" | 33 | #include "iwch.h" |
34 | #include "iwch_cm.h" | 34 | #include "iwch_cm.h" |
35 | #include "cxio_hal.h" | 35 | #include "cxio_hal.h" |
36 | #include "cxio_resource.h" | ||
36 | 37 | ||
37 | #define NO_SUPPORT -1 | 38 | #define NO_SUPPORT -1 |
38 | 39 | ||
39 | static int iwch_build_rdma_send(union t3_wr *wqe, struct ib_send_wr *wr, | 40 | static int build_rdma_send(union t3_wr *wqe, struct ib_send_wr *wr, |
40 | u8 * flit_cnt) | 41 | u8 * flit_cnt) |
41 | { | 42 | { |
42 | int i; | 43 | int i; |
@@ -44,59 +45,44 @@ static int iwch_build_rdma_send(union t3_wr *wqe, struct ib_send_wr *wr, | |||
44 | 45 | ||
45 | switch (wr->opcode) { | 46 | switch (wr->opcode) { |
46 | case IB_WR_SEND: | 47 | case IB_WR_SEND: |
47 | case IB_WR_SEND_WITH_IMM: | ||
48 | if (wr->send_flags & IB_SEND_SOLICITED) | 48 | if (wr->send_flags & IB_SEND_SOLICITED) |
49 | wqe->send.rdmaop = T3_SEND_WITH_SE; | 49 | wqe->send.rdmaop = T3_SEND_WITH_SE; |
50 | else | 50 | else |
51 | wqe->send.rdmaop = T3_SEND; | 51 | wqe->send.rdmaop = T3_SEND; |
52 | wqe->send.rem_stag = 0; | 52 | wqe->send.rem_stag = 0; |
53 | break; | 53 | break; |
54 | #if 0 /* Not currently supported */ | 54 | case IB_WR_SEND_WITH_INV: |
55 | case TYPE_SEND_INVALIDATE: | 55 | if (wr->send_flags & IB_SEND_SOLICITED) |
56 | case TYPE_SEND_INVALIDATE_IMMEDIATE: | 56 | wqe->send.rdmaop = T3_SEND_WITH_SE_INV; |
57 | wqe->send.rdmaop = T3_SEND_WITH_INV; | 57 | else |
58 | wqe->send.rem_stag = cpu_to_be32(wr->wr.rdma.rkey); | 58 | wqe->send.rdmaop = T3_SEND_WITH_INV; |
59 | break; | 59 | wqe->send.rem_stag = cpu_to_be32(wr->ex.invalidate_rkey); |
60 | case TYPE_SEND_SE_INVALIDATE: | ||
61 | wqe->send.rdmaop = T3_SEND_WITH_SE_INV; | ||
62 | wqe->send.rem_stag = cpu_to_be32(wr->wr.rdma.rkey); | ||
63 | break; | 60 | break; |
64 | #endif | ||
65 | default: | 61 | default: |
66 | break; | 62 | return -EINVAL; |
67 | } | 63 | } |
68 | if (wr->num_sge > T3_MAX_SGE) | 64 | if (wr->num_sge > T3_MAX_SGE) |
69 | return -EINVAL; | 65 | return -EINVAL; |
70 | wqe->send.reserved[0] = 0; | 66 | wqe->send.reserved[0] = 0; |
71 | wqe->send.reserved[1] = 0; | 67 | wqe->send.reserved[1] = 0; |
72 | wqe->send.reserved[2] = 0; | 68 | wqe->send.reserved[2] = 0; |
73 | if (wr->opcode == IB_WR_SEND_WITH_IMM) { | 69 | plen = 0; |
74 | plen = 4; | 70 | for (i = 0; i < wr->num_sge; i++) { |
75 | wqe->send.sgl[0].stag = wr->ex.imm_data; | 71 | if ((plen + wr->sg_list[i].length) < plen) |
76 | wqe->send.sgl[0].len = __constant_cpu_to_be32(0); | 72 | return -EMSGSIZE; |
77 | wqe->send.num_sgle = __constant_cpu_to_be32(0); | 73 | |
78 | *flit_cnt = 5; | 74 | plen += wr->sg_list[i].length; |
79 | } else { | 75 | wqe->send.sgl[i].stag = cpu_to_be32(wr->sg_list[i].lkey); |
80 | plen = 0; | 76 | wqe->send.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); |
81 | for (i = 0; i < wr->num_sge; i++) { | 77 | wqe->send.sgl[i].to = cpu_to_be64(wr->sg_list[i].addr); |
82 | if ((plen + wr->sg_list[i].length) < plen) { | ||
83 | return -EMSGSIZE; | ||
84 | } | ||
85 | plen += wr->sg_list[i].length; | ||
86 | wqe->send.sgl[i].stag = | ||
87 | cpu_to_be32(wr->sg_list[i].lkey); | ||
88 | wqe->send.sgl[i].len = | ||
89 | cpu_to_be32(wr->sg_list[i].length); | ||
90 | wqe->send.sgl[i].to = cpu_to_be64(wr->sg_list[i].addr); | ||
91 | } | ||
92 | wqe->send.num_sgle = cpu_to_be32(wr->num_sge); | ||
93 | *flit_cnt = 4 + ((wr->num_sge) << 1); | ||
94 | } | 78 | } |
79 | wqe->send.num_sgle = cpu_to_be32(wr->num_sge); | ||
80 | *flit_cnt = 4 + ((wr->num_sge) << 1); | ||
95 | wqe->send.plen = cpu_to_be32(plen); | 81 | wqe->send.plen = cpu_to_be32(plen); |
96 | return 0; | 82 | return 0; |
97 | } | 83 | } |
98 | 84 | ||
99 | static int iwch_build_rdma_write(union t3_wr *wqe, struct ib_send_wr *wr, | 85 | static int build_rdma_write(union t3_wr *wqe, struct ib_send_wr *wr, |
100 | u8 *flit_cnt) | 86 | u8 *flit_cnt) |
101 | { | 87 | { |
102 | int i; | 88 | int i; |
@@ -137,15 +123,18 @@ static int iwch_build_rdma_write(union t3_wr *wqe, struct ib_send_wr *wr, | |||
137 | return 0; | 123 | return 0; |
138 | } | 124 | } |
139 | 125 | ||
140 | static int iwch_build_rdma_read(union t3_wr *wqe, struct ib_send_wr *wr, | 126 | static int build_rdma_read(union t3_wr *wqe, struct ib_send_wr *wr, |
141 | u8 *flit_cnt) | 127 | u8 *flit_cnt) |
142 | { | 128 | { |
143 | if (wr->num_sge > 1) | 129 | if (wr->num_sge > 1) |
144 | return -EINVAL; | 130 | return -EINVAL; |
145 | wqe->read.rdmaop = T3_READ_REQ; | 131 | wqe->read.rdmaop = T3_READ_REQ; |
132 | if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) | ||
133 | wqe->read.local_inv = 1; | ||
134 | else | ||
135 | wqe->read.local_inv = 0; | ||
146 | wqe->read.reserved[0] = 0; | 136 | wqe->read.reserved[0] = 0; |
147 | wqe->read.reserved[1] = 0; | 137 | wqe->read.reserved[1] = 0; |
148 | wqe->read.reserved[2] = 0; | ||
149 | wqe->read.rem_stag = cpu_to_be32(wr->wr.rdma.rkey); | 138 | wqe->read.rem_stag = cpu_to_be32(wr->wr.rdma.rkey); |
150 | wqe->read.rem_to = cpu_to_be64(wr->wr.rdma.remote_addr); | 139 | wqe->read.rem_to = cpu_to_be64(wr->wr.rdma.remote_addr); |
151 | wqe->read.local_stag = cpu_to_be32(wr->sg_list[0].lkey); | 140 | wqe->read.local_stag = cpu_to_be32(wr->sg_list[0].lkey); |
@@ -155,6 +144,57 @@ static int iwch_build_rdma_read(union t3_wr *wqe, struct ib_send_wr *wr, | |||
155 | return 0; | 144 | return 0; |
156 | } | 145 | } |
157 | 146 | ||
147 | static int build_fastreg(union t3_wr *wqe, struct ib_send_wr *wr, | ||
148 | u8 *flit_cnt, int *wr_cnt, struct t3_wq *wq) | ||
149 | { | ||
150 | int i; | ||
151 | __be64 *p; | ||
152 | |||
153 | if (wr->wr.fast_reg.page_list_len > T3_MAX_FASTREG_DEPTH) | ||
154 | return -EINVAL; | ||
155 | *wr_cnt = 1; | ||
156 | wqe->fastreg.stag = cpu_to_be32(wr->wr.fast_reg.rkey); | ||
157 | wqe->fastreg.len = cpu_to_be32(wr->wr.fast_reg.length); | ||
158 | wqe->fastreg.va_base_hi = cpu_to_be32(wr->wr.fast_reg.iova_start >> 32); | ||
159 | wqe->fastreg.va_base_lo_fbo = | ||
160 | cpu_to_be32(wr->wr.fast_reg.iova_start & 0xffffffff); | ||
161 | wqe->fastreg.page_type_perms = cpu_to_be32( | ||
162 | V_FR_PAGE_COUNT(wr->wr.fast_reg.page_list_len) | | ||
163 | V_FR_PAGE_SIZE(wr->wr.fast_reg.page_shift-12) | | ||
164 | V_FR_TYPE(TPT_VATO) | | ||
165 | V_FR_PERMS(iwch_ib_to_tpt_access(wr->wr.fast_reg.access_flags))); | ||
166 | p = &wqe->fastreg.pbl_addrs[0]; | ||
167 | for (i = 0; i < wr->wr.fast_reg.page_list_len; i++, p++) { | ||
168 | |||
169 | /* If we need a 2nd WR, then set it up */ | ||
170 | if (i == T3_MAX_FASTREG_FRAG) { | ||
171 | *wr_cnt = 2; | ||
172 | wqe = (union t3_wr *)(wq->queue + | ||
173 | Q_PTR2IDX((wq->wptr+1), wq->size_log2)); | ||
174 | build_fw_riwrh((void *)wqe, T3_WR_FASTREG, 0, | ||
175 | Q_GENBIT(wq->wptr + 1, wq->size_log2), | ||
176 | 0, 1 + wr->wr.fast_reg.page_list_len - T3_MAX_FASTREG_FRAG, | ||
177 | T3_EOP); | ||
178 | |||
179 | p = &wqe->pbl_frag.pbl_addrs[0]; | ||
180 | } | ||
181 | *p = cpu_to_be64((u64)wr->wr.fast_reg.page_list->page_list[i]); | ||
182 | } | ||
183 | *flit_cnt = 5 + wr->wr.fast_reg.page_list_len; | ||
184 | if (*flit_cnt > 15) | ||
185 | *flit_cnt = 15; | ||
186 | return 0; | ||
187 | } | ||
188 | |||
189 | static int build_inv_stag(union t3_wr *wqe, struct ib_send_wr *wr, | ||
190 | u8 *flit_cnt) | ||
191 | { | ||
192 | wqe->local_inv.stag = cpu_to_be32(wr->ex.invalidate_rkey); | ||
193 | wqe->local_inv.reserved = 0; | ||
194 | *flit_cnt = sizeof(struct t3_local_inv_wr) >> 3; | ||
195 | return 0; | ||
196 | } | ||
197 | |||
158 | /* | 198 | /* |
159 | * TBD: this is going to be moved to firmware. Missing pdid/qpid check for now. | 199 | * TBD: this is going to be moved to firmware. Missing pdid/qpid check for now. |
160 | */ | 200 | */ |
@@ -205,23 +245,106 @@ static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list, | |||
205 | return 0; | 245 | return 0; |
206 | } | 246 | } |
207 | 247 | ||
208 | static int iwch_build_rdma_recv(struct iwch_dev *rhp, union t3_wr *wqe, | 248 | static int build_rdma_recv(struct iwch_qp *qhp, union t3_wr *wqe, |
209 | struct ib_recv_wr *wr) | 249 | struct ib_recv_wr *wr) |
210 | { | 250 | { |
211 | int i; | 251 | int i, err = 0; |
212 | if (wr->num_sge > T3_MAX_SGE) | 252 | u32 pbl_addr[T3_MAX_SGE]; |
213 | return -EINVAL; | 253 | u8 page_size[T3_MAX_SGE]; |
254 | |||
255 | err = iwch_sgl2pbl_map(qhp->rhp, wr->sg_list, wr->num_sge, pbl_addr, | ||
256 | page_size); | ||
257 | if (err) | ||
258 | return err; | ||
259 | wqe->recv.pagesz[0] = page_size[0]; | ||
260 | wqe->recv.pagesz[1] = page_size[1]; | ||
261 | wqe->recv.pagesz[2] = page_size[2]; | ||
262 | wqe->recv.pagesz[3] = page_size[3]; | ||
214 | wqe->recv.num_sgle = cpu_to_be32(wr->num_sge); | 263 | wqe->recv.num_sgle = cpu_to_be32(wr->num_sge); |
215 | for (i = 0; i < wr->num_sge; i++) { | 264 | for (i = 0; i < wr->num_sge; i++) { |
216 | wqe->recv.sgl[i].stag = cpu_to_be32(wr->sg_list[i].lkey); | 265 | wqe->recv.sgl[i].stag = cpu_to_be32(wr->sg_list[i].lkey); |
217 | wqe->recv.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); | 266 | wqe->recv.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); |
267 | |||
268 | /* to in the WQE == the offset into the page */ | ||
269 | wqe->recv.sgl[i].to = cpu_to_be64(((u32) wr->sg_list[i].addr) % | ||
270 | (1UL << (12 + page_size[i]))); | ||
271 | |||
272 | /* pbl_addr is the adapters address in the PBL */ | ||
273 | wqe->recv.pbl_addr[i] = cpu_to_be32(pbl_addr[i]); | ||
274 | } | ||
275 | for (; i < T3_MAX_SGE; i++) { | ||
276 | wqe->recv.sgl[i].stag = 0; | ||
277 | wqe->recv.sgl[i].len = 0; | ||
278 | wqe->recv.sgl[i].to = 0; | ||
279 | wqe->recv.pbl_addr[i] = 0; | ||
280 | } | ||
281 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, | ||
282 | qhp->wq.rq_size_log2)].wr_id = wr->wr_id; | ||
283 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, | ||
284 | qhp->wq.rq_size_log2)].pbl_addr = 0; | ||
285 | return 0; | ||
286 | } | ||
287 | |||
288 | static int build_zero_stag_recv(struct iwch_qp *qhp, union t3_wr *wqe, | ||
289 | struct ib_recv_wr *wr) | ||
290 | { | ||
291 | int i; | ||
292 | u32 pbl_addr; | ||
293 | u32 pbl_offset; | ||
294 | |||
295 | |||
296 | /* | ||
297 | * The T3 HW requires the PBL in the HW recv descriptor to reference | ||
298 | * a PBL entry. So we allocate the max needed PBL memory here and pass | ||
299 | * it to the uP in the recv WR. The uP will build the PBL and setup | ||
300 | * the HW recv descriptor. | ||
301 | */ | ||
302 | pbl_addr = cxio_hal_pblpool_alloc(&qhp->rhp->rdev, T3_STAG0_PBL_SIZE); | ||
303 | if (!pbl_addr) | ||
304 | return -ENOMEM; | ||
305 | |||
306 | /* | ||
307 | * Compute the 8B aligned offset. | ||
308 | */ | ||
309 | pbl_offset = (pbl_addr - qhp->rhp->rdev.rnic_info.pbl_base) >> 3; | ||
310 | |||
311 | wqe->recv.num_sgle = cpu_to_be32(wr->num_sge); | ||
312 | |||
313 | for (i = 0; i < wr->num_sge; i++) { | ||
314 | |||
315 | /* | ||
316 | * Use a 128MB page size. This and an imposed 128MB | ||
317 | * sge length limit allows us to require only a 2-entry HW | ||
318 | * PBL for each SGE. This restriction is acceptable since | ||
319 | * since it is not possible to allocate 128MB of contiguous | ||
320 | * DMA coherent memory! | ||
321 | */ | ||
322 | if (wr->sg_list[i].length > T3_STAG0_MAX_PBE_LEN) | ||
323 | return -EINVAL; | ||
324 | wqe->recv.pagesz[i] = T3_STAG0_PAGE_SHIFT; | ||
325 | |||
326 | /* | ||
327 | * T3 restricts a recv to all zero-stag or all non-zero-stag. | ||
328 | */ | ||
329 | if (wr->sg_list[i].lkey != 0) | ||
330 | return -EINVAL; | ||
331 | wqe->recv.sgl[i].stag = 0; | ||
332 | wqe->recv.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); | ||
218 | wqe->recv.sgl[i].to = cpu_to_be64(wr->sg_list[i].addr); | 333 | wqe->recv.sgl[i].to = cpu_to_be64(wr->sg_list[i].addr); |
334 | wqe->recv.pbl_addr[i] = cpu_to_be32(pbl_offset); | ||
335 | pbl_offset += 2; | ||
219 | } | 336 | } |
220 | for (; i < T3_MAX_SGE; i++) { | 337 | for (; i < T3_MAX_SGE; i++) { |
338 | wqe->recv.pagesz[i] = 0; | ||
221 | wqe->recv.sgl[i].stag = 0; | 339 | wqe->recv.sgl[i].stag = 0; |
222 | wqe->recv.sgl[i].len = 0; | 340 | wqe->recv.sgl[i].len = 0; |
223 | wqe->recv.sgl[i].to = 0; | 341 | wqe->recv.sgl[i].to = 0; |
342 | wqe->recv.pbl_addr[i] = 0; | ||
224 | } | 343 | } |
344 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, | ||
345 | qhp->wq.rq_size_log2)].wr_id = wr->wr_id; | ||
346 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, | ||
347 | qhp->wq.rq_size_log2)].pbl_addr = pbl_addr; | ||
225 | return 0; | 348 | return 0; |
226 | } | 349 | } |
227 | 350 | ||
@@ -238,6 +361,7 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
238 | u32 num_wrs; | 361 | u32 num_wrs; |
239 | unsigned long flag; | 362 | unsigned long flag; |
240 | struct t3_swsq *sqp; | 363 | struct t3_swsq *sqp; |
364 | int wr_cnt = 1; | ||
241 | 365 | ||
242 | qhp = to_iwch_qp(ibqp); | 366 | qhp = to_iwch_qp(ibqp); |
243 | spin_lock_irqsave(&qhp->lock, flag); | 367 | spin_lock_irqsave(&qhp->lock, flag); |
@@ -262,33 +386,45 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
262 | t3_wr_flags = 0; | 386 | t3_wr_flags = 0; |
263 | if (wr->send_flags & IB_SEND_SOLICITED) | 387 | if (wr->send_flags & IB_SEND_SOLICITED) |
264 | t3_wr_flags |= T3_SOLICITED_EVENT_FLAG; | 388 | t3_wr_flags |= T3_SOLICITED_EVENT_FLAG; |
265 | if (wr->send_flags & IB_SEND_FENCE) | ||
266 | t3_wr_flags |= T3_READ_FENCE_FLAG; | ||
267 | if (wr->send_flags & IB_SEND_SIGNALED) | 389 | if (wr->send_flags & IB_SEND_SIGNALED) |
268 | t3_wr_flags |= T3_COMPLETION_FLAG; | 390 | t3_wr_flags |= T3_COMPLETION_FLAG; |
269 | sqp = qhp->wq.sq + | 391 | sqp = qhp->wq.sq + |
270 | Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2); | 392 | Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2); |
271 | switch (wr->opcode) { | 393 | switch (wr->opcode) { |
272 | case IB_WR_SEND: | 394 | case IB_WR_SEND: |
273 | case IB_WR_SEND_WITH_IMM: | 395 | case IB_WR_SEND_WITH_INV: |
396 | if (wr->send_flags & IB_SEND_FENCE) | ||
397 | t3_wr_flags |= T3_READ_FENCE_FLAG; | ||
274 | t3_wr_opcode = T3_WR_SEND; | 398 | t3_wr_opcode = T3_WR_SEND; |
275 | err = iwch_build_rdma_send(wqe, wr, &t3_wr_flit_cnt); | 399 | err = build_rdma_send(wqe, wr, &t3_wr_flit_cnt); |
276 | break; | 400 | break; |
277 | case IB_WR_RDMA_WRITE: | 401 | case IB_WR_RDMA_WRITE: |
278 | case IB_WR_RDMA_WRITE_WITH_IMM: | 402 | case IB_WR_RDMA_WRITE_WITH_IMM: |
279 | t3_wr_opcode = T3_WR_WRITE; | 403 | t3_wr_opcode = T3_WR_WRITE; |
280 | err = iwch_build_rdma_write(wqe, wr, &t3_wr_flit_cnt); | 404 | err = build_rdma_write(wqe, wr, &t3_wr_flit_cnt); |
281 | break; | 405 | break; |
282 | case IB_WR_RDMA_READ: | 406 | case IB_WR_RDMA_READ: |
407 | case IB_WR_RDMA_READ_WITH_INV: | ||
283 | t3_wr_opcode = T3_WR_READ; | 408 | t3_wr_opcode = T3_WR_READ; |
284 | t3_wr_flags = 0; /* T3 reads are always signaled */ | 409 | t3_wr_flags = 0; /* T3 reads are always signaled */ |
285 | err = iwch_build_rdma_read(wqe, wr, &t3_wr_flit_cnt); | 410 | err = build_rdma_read(wqe, wr, &t3_wr_flit_cnt); |
286 | if (err) | 411 | if (err) |
287 | break; | 412 | break; |
288 | sqp->read_len = wqe->read.local_len; | 413 | sqp->read_len = wqe->read.local_len; |
289 | if (!qhp->wq.oldest_read) | 414 | if (!qhp->wq.oldest_read) |
290 | qhp->wq.oldest_read = sqp; | 415 | qhp->wq.oldest_read = sqp; |
291 | break; | 416 | break; |
417 | case IB_WR_FAST_REG_MR: | ||
418 | t3_wr_opcode = T3_WR_FASTREG; | ||
419 | err = build_fastreg(wqe, wr, &t3_wr_flit_cnt, | ||
420 | &wr_cnt, &qhp->wq); | ||
421 | break; | ||
422 | case IB_WR_LOCAL_INV: | ||
423 | if (wr->send_flags & IB_SEND_FENCE) | ||
424 | t3_wr_flags |= T3_LOCAL_FENCE_FLAG; | ||
425 | t3_wr_opcode = T3_WR_INV_STAG; | ||
426 | err = build_inv_stag(wqe, wr, &t3_wr_flit_cnt); | ||
427 | break; | ||
292 | default: | 428 | default: |
293 | PDBG("%s post of type=%d TBD!\n", __func__, | 429 | PDBG("%s post of type=%d TBD!\n", __func__, |
294 | wr->opcode); | 430 | wr->opcode); |
@@ -307,14 +443,15 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
307 | 443 | ||
308 | build_fw_riwrh((void *) wqe, t3_wr_opcode, t3_wr_flags, | 444 | build_fw_riwrh((void *) wqe, t3_wr_opcode, t3_wr_flags, |
309 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), | 445 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), |
310 | 0, t3_wr_flit_cnt); | 446 | 0, t3_wr_flit_cnt, |
447 | (wr_cnt == 1) ? T3_SOPEOP : T3_SOP); | ||
311 | PDBG("%s cookie 0x%llx wq idx 0x%x swsq idx %ld opcode %d\n", | 448 | PDBG("%s cookie 0x%llx wq idx 0x%x swsq idx %ld opcode %d\n", |
312 | __func__, (unsigned long long) wr->wr_id, idx, | 449 | __func__, (unsigned long long) wr->wr_id, idx, |
313 | Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2), | 450 | Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2), |
314 | sqp->opcode); | 451 | sqp->opcode); |
315 | wr = wr->next; | 452 | wr = wr->next; |
316 | num_wrs--; | 453 | num_wrs--; |
317 | ++(qhp->wq.wptr); | 454 | qhp->wq.wptr += wr_cnt; |
318 | ++(qhp->wq.sq_wptr); | 455 | ++(qhp->wq.sq_wptr); |
319 | } | 456 | } |
320 | spin_unlock_irqrestore(&qhp->lock, flag); | 457 | spin_unlock_irqrestore(&qhp->lock, flag); |
@@ -345,21 +482,27 @@ int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, | |||
345 | return -EINVAL; | 482 | return -EINVAL; |
346 | } | 483 | } |
347 | while (wr) { | 484 | while (wr) { |
485 | if (wr->num_sge > T3_MAX_SGE) { | ||
486 | err = -EINVAL; | ||
487 | *bad_wr = wr; | ||
488 | break; | ||
489 | } | ||
348 | idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); | 490 | idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); |
349 | wqe = (union t3_wr *) (qhp->wq.queue + idx); | 491 | wqe = (union t3_wr *) (qhp->wq.queue + idx); |
350 | if (num_wrs) | 492 | if (num_wrs) |
351 | err = iwch_build_rdma_recv(qhp->rhp, wqe, wr); | 493 | if (wr->sg_list[0].lkey) |
494 | err = build_rdma_recv(qhp, wqe, wr); | ||
495 | else | ||
496 | err = build_zero_stag_recv(qhp, wqe, wr); | ||
352 | else | 497 | else |
353 | err = -ENOMEM; | 498 | err = -ENOMEM; |
354 | if (err) { | 499 | if (err) { |
355 | *bad_wr = wr; | 500 | *bad_wr = wr; |
356 | break; | 501 | break; |
357 | } | 502 | } |
358 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, qhp->wq.rq_size_log2)] = | ||
359 | wr->wr_id; | ||
360 | build_fw_riwrh((void *) wqe, T3_WR_RCV, T3_COMPLETION_FLAG, | 503 | build_fw_riwrh((void *) wqe, T3_WR_RCV, T3_COMPLETION_FLAG, |
361 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), | 504 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), |
362 | 0, sizeof(struct t3_receive_wr) >> 3); | 505 | 0, sizeof(struct t3_receive_wr) >> 3, T3_SOPEOP); |
363 | PDBG("%s cookie 0x%llx idx 0x%x rq_wptr 0x%x rw_rptr 0x%x " | 506 | PDBG("%s cookie 0x%llx idx 0x%x rq_wptr 0x%x rw_rptr 0x%x " |
364 | "wqe %p \n", __func__, (unsigned long long) wr->wr_id, | 507 | "wqe %p \n", __func__, (unsigned long long) wr->wr_id, |
365 | idx, qhp->wq.rq_wptr, qhp->wq.rq_rptr, wqe); | 508 | idx, qhp->wq.rq_wptr, qhp->wq.rq_rptr, wqe); |
@@ -419,10 +562,10 @@ int iwch_bind_mw(struct ib_qp *qp, | |||
419 | sgl.lkey = mw_bind->mr->lkey; | 562 | sgl.lkey = mw_bind->mr->lkey; |
420 | sgl.length = mw_bind->length; | 563 | sgl.length = mw_bind->length; |
421 | wqe->bind.reserved = 0; | 564 | wqe->bind.reserved = 0; |
422 | wqe->bind.type = T3_VA_BASED_TO; | 565 | wqe->bind.type = TPT_VATO; |
423 | 566 | ||
424 | /* TBD: check perms */ | 567 | /* TBD: check perms */ |
425 | wqe->bind.perms = iwch_ib_to_mwbind_access(mw_bind->mw_access_flags); | 568 | wqe->bind.perms = iwch_ib_to_tpt_access(mw_bind->mw_access_flags); |
426 | wqe->bind.mr_stag = cpu_to_be32(mw_bind->mr->lkey); | 569 | wqe->bind.mr_stag = cpu_to_be32(mw_bind->mr->lkey); |
427 | wqe->bind.mw_stag = cpu_to_be32(mw->rkey); | 570 | wqe->bind.mw_stag = cpu_to_be32(mw->rkey); |
428 | wqe->bind.mw_len = cpu_to_be32(mw_bind->length); | 571 | wqe->bind.mw_len = cpu_to_be32(mw_bind->length); |
@@ -430,7 +573,7 @@ int iwch_bind_mw(struct ib_qp *qp, | |||
430 | err = iwch_sgl2pbl_map(rhp, &sgl, 1, &pbl_addr, &page_size); | 573 | err = iwch_sgl2pbl_map(rhp, &sgl, 1, &pbl_addr, &page_size); |
431 | if (err) { | 574 | if (err) { |
432 | spin_unlock_irqrestore(&qhp->lock, flag); | 575 | spin_unlock_irqrestore(&qhp->lock, flag); |
433 | return err; | 576 | return err; |
434 | } | 577 | } |
435 | wqe->send.wrid.id0.hi = qhp->wq.sq_wptr; | 578 | wqe->send.wrid.id0.hi = qhp->wq.sq_wptr; |
436 | sqp = qhp->wq.sq + Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2); | 579 | sqp = qhp->wq.sq + Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2); |
@@ -441,10 +584,9 @@ int iwch_bind_mw(struct ib_qp *qp, | |||
441 | sqp->signaled = (mw_bind->send_flags & IB_SEND_SIGNALED); | 584 | sqp->signaled = (mw_bind->send_flags & IB_SEND_SIGNALED); |
442 | wqe->bind.mr_pbl_addr = cpu_to_be32(pbl_addr); | 585 | wqe->bind.mr_pbl_addr = cpu_to_be32(pbl_addr); |
443 | wqe->bind.mr_pagesz = page_size; | 586 | wqe->bind.mr_pagesz = page_size; |
444 | wqe->flit[T3_SQ_COOKIE_FLIT] = mw_bind->wr_id; | ||
445 | build_fw_riwrh((void *)wqe, T3_WR_BIND, t3_wr_flags, | 587 | build_fw_riwrh((void *)wqe, T3_WR_BIND, t3_wr_flags, |
446 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), 0, | 588 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), 0, |
447 | sizeof(struct t3_bind_mw_wr) >> 3); | 589 | sizeof(struct t3_bind_mw_wr) >> 3, T3_SOPEOP); |
448 | ++(qhp->wq.wptr); | 590 | ++(qhp->wq.wptr); |
449 | ++(qhp->wq.sq_wptr); | 591 | ++(qhp->wq.sq_wptr); |
450 | spin_unlock_irqrestore(&qhp->lock, flag); | 592 | spin_unlock_irqrestore(&qhp->lock, flag); |
@@ -758,7 +900,8 @@ static int rdma_init(struct iwch_dev *rhp, struct iwch_qp *qhp, | |||
758 | init_attr.qp_dma_size = (1UL << qhp->wq.size_log2); | 900 | init_attr.qp_dma_size = (1UL << qhp->wq.size_log2); |
759 | init_attr.rqe_count = iwch_rqes_posted(qhp); | 901 | init_attr.rqe_count = iwch_rqes_posted(qhp); |
760 | init_attr.flags = qhp->attr.mpa_attr.initiator ? MPA_INITIATOR : 0; | 902 | init_attr.flags = qhp->attr.mpa_attr.initiator ? MPA_INITIATOR : 0; |
761 | init_attr.flags |= capable(CAP_NET_BIND_SERVICE) ? PRIV_QP : 0; | 903 | if (!qhp->ibqp.uobject) |
904 | init_attr.flags |= PRIV_QP; | ||
762 | if (peer2peer) { | 905 | if (peer2peer) { |
763 | init_attr.rtr_type = RTR_READ; | 906 | init_attr.rtr_type = RTR_READ; |
764 | if (init_attr.ord == 0 && qhp->attr.mpa_attr.initiator) | 907 | if (init_attr.ord == 0 && qhp->attr.mpa_attr.initiator) |
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.c b/drivers/infiniband/hw/ehca/ehca_irq.c index ce1ab0571be3..0792d930c481 100644 --- a/drivers/infiniband/hw/ehca/ehca_irq.c +++ b/drivers/infiniband/hw/ehca/ehca_irq.c | |||
@@ -531,7 +531,7 @@ void ehca_process_eq(struct ehca_shca *shca, int is_irq) | |||
531 | { | 531 | { |
532 | struct ehca_eq *eq = &shca->eq; | 532 | struct ehca_eq *eq = &shca->eq; |
533 | struct ehca_eqe_cache_entry *eqe_cache = eq->eqe_cache; | 533 | struct ehca_eqe_cache_entry *eqe_cache = eq->eqe_cache; |
534 | u64 eqe_value; | 534 | u64 eqe_value, ret; |
535 | unsigned long flags; | 535 | unsigned long flags; |
536 | int eqe_cnt, i; | 536 | int eqe_cnt, i; |
537 | int eq_empty = 0; | 537 | int eq_empty = 0; |
@@ -583,8 +583,13 @@ void ehca_process_eq(struct ehca_shca *shca, int is_irq) | |||
583 | ehca_dbg(&shca->ib_device, | 583 | ehca_dbg(&shca->ib_device, |
584 | "No eqe found for irq event"); | 584 | "No eqe found for irq event"); |
585 | goto unlock_irq_spinlock; | 585 | goto unlock_irq_spinlock; |
586 | } else if (!is_irq) | 586 | } else if (!is_irq) { |
587 | ret = hipz_h_eoi(eq->ist); | ||
588 | if (ret != H_SUCCESS) | ||
589 | ehca_err(&shca->ib_device, | ||
590 | "bad return code EOI -rc = %ld\n", ret); | ||
587 | ehca_dbg(&shca->ib_device, "deadman found %x eqe", eqe_cnt); | 591 | ehca_dbg(&shca->ib_device, "deadman found %x eqe", eqe_cnt); |
592 | } | ||
588 | if (unlikely(eqe_cnt == EHCA_EQE_CACHE_SIZE)) | 593 | if (unlikely(eqe_cnt == EHCA_EQE_CACHE_SIZE)) |
589 | ehca_dbg(&shca->ib_device, "too many eqes for one irq event"); | 594 | ehca_dbg(&shca->ib_device, "too many eqes for one irq event"); |
590 | /* enable irq for new packets */ | 595 | /* enable irq for new packets */ |
diff --git a/drivers/infiniband/hw/ehca/ehca_main.c b/drivers/infiniband/hw/ehca/ehca_main.c index 482103eb6eac..598844d2edc9 100644 --- a/drivers/infiniband/hw/ehca/ehca_main.c +++ b/drivers/infiniband/hw/ehca/ehca_main.c | |||
@@ -923,6 +923,7 @@ static struct of_device_id ehca_device_table[] = | |||
923 | }, | 923 | }, |
924 | {}, | 924 | {}, |
925 | }; | 925 | }; |
926 | MODULE_DEVICE_TABLE(of, ehca_device_table); | ||
926 | 927 | ||
927 | static struct of_platform_driver ehca_driver = { | 928 | static struct of_platform_driver ehca_driver = { |
928 | .name = "ehca", | 929 | .name = "ehca", |
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/infiniband/hw/ehca/ehca_reqs.c index f093b0033daf..dd9bc68f1c7b 100644 --- a/drivers/infiniband/hw/ehca/ehca_reqs.c +++ b/drivers/infiniband/hw/ehca/ehca_reqs.c | |||
@@ -544,8 +544,16 @@ int ehca_post_recv(struct ib_qp *qp, | |||
544 | struct ib_recv_wr *recv_wr, | 544 | struct ib_recv_wr *recv_wr, |
545 | struct ib_recv_wr **bad_recv_wr) | 545 | struct ib_recv_wr **bad_recv_wr) |
546 | { | 546 | { |
547 | return internal_post_recv(container_of(qp, struct ehca_qp, ib_qp), | 547 | struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp); |
548 | qp->device, recv_wr, bad_recv_wr); | 548 | |
549 | /* Reject WR if QP is in RESET state */ | ||
550 | if (unlikely(my_qp->state == IB_QPS_RESET)) { | ||
551 | ehca_err(qp->device, "Invalid QP state qp_state=%d qpn=%x", | ||
552 | my_qp->state, qp->qp_num); | ||
553 | return -EINVAL; | ||
554 | } | ||
555 | |||
556 | return internal_post_recv(my_qp, qp->device, recv_wr, bad_recv_wr); | ||
549 | } | 557 | } |
550 | 558 | ||
551 | int ehca_post_srq_recv(struct ib_srq *srq, | 559 | int ehca_post_srq_recv(struct ib_srq *srq, |
@@ -681,7 +689,7 @@ poll_cq_one_read_cqe: | |||
681 | wc->dlid_path_bits = cqe->dlid; | 689 | wc->dlid_path_bits = cqe->dlid; |
682 | wc->src_qp = cqe->remote_qp_number; | 690 | wc->src_qp = cqe->remote_qp_number; |
683 | wc->wc_flags = cqe->w_completion_flags; | 691 | wc->wc_flags = cqe->w_completion_flags; |
684 | wc->imm_data = cpu_to_be32(cqe->immediate_data); | 692 | wc->ex.imm_data = cpu_to_be32(cqe->immediate_data); |
685 | wc->sl = cqe->service_level; | 693 | wc->sl = cqe->service_level; |
686 | 694 | ||
687 | poll_cq_one_exit0: | 695 | poll_cq_one_exit0: |
diff --git a/drivers/infiniband/hw/ehca/hcp_if.c b/drivers/infiniband/hw/ehca/hcp_if.c index 5245e13c3a30..415d3a465de6 100644 --- a/drivers/infiniband/hw/ehca/hcp_if.c +++ b/drivers/infiniband/hw/ehca/hcp_if.c | |||
@@ -933,3 +933,13 @@ u64 hipz_h_error_data(const struct ipz_adapter_handle adapter_handle, | |||
933 | r_cb, | 933 | r_cb, |
934 | 0, 0, 0, 0); | 934 | 0, 0, 0, 0); |
935 | } | 935 | } |
936 | |||
937 | u64 hipz_h_eoi(int irq) | ||
938 | { | ||
939 | unsigned long xirr; | ||
940 | |||
941 | iosync(); | ||
942 | xirr = (0xffULL << 24) | irq; | ||
943 | |||
944 | return plpar_hcall_norets(H_EOI, xirr); | ||
945 | } | ||
diff --git a/drivers/infiniband/hw/ehca/hcp_if.h b/drivers/infiniband/hw/ehca/hcp_if.h index 60ce02b70663..2c3c6e0ea5c2 100644 --- a/drivers/infiniband/hw/ehca/hcp_if.h +++ b/drivers/infiniband/hw/ehca/hcp_if.h | |||
@@ -260,5 +260,6 @@ u64 hipz_h_error_data(const struct ipz_adapter_handle adapter_handle, | |||
260 | const u64 ressource_handle, | 260 | const u64 ressource_handle, |
261 | void *rblock, | 261 | void *rblock, |
262 | unsigned long *byte_count); | 262 | unsigned long *byte_count); |
263 | u64 hipz_h_eoi(int irq); | ||
263 | 264 | ||
264 | #endif /* __HCP_IF_H__ */ | 265 | #endif /* __HCP_IF_H__ */ |
diff --git a/drivers/infiniband/hw/ipath/ipath_cq.c b/drivers/infiniband/hw/ipath/ipath_cq.c index a03bd28d9b48..d385e4168c97 100644 --- a/drivers/infiniband/hw/ipath/ipath_cq.c +++ b/drivers/infiniband/hw/ipath/ipath_cq.c | |||
@@ -82,7 +82,7 @@ void ipath_cq_enter(struct ipath_cq *cq, struct ib_wc *entry, int solicited) | |||
82 | wc->uqueue[head].opcode = entry->opcode; | 82 | wc->uqueue[head].opcode = entry->opcode; |
83 | wc->uqueue[head].vendor_err = entry->vendor_err; | 83 | wc->uqueue[head].vendor_err = entry->vendor_err; |
84 | wc->uqueue[head].byte_len = entry->byte_len; | 84 | wc->uqueue[head].byte_len = entry->byte_len; |
85 | wc->uqueue[head].imm_data = (__u32 __force)entry->imm_data; | 85 | wc->uqueue[head].ex.imm_data = (__u32 __force) entry->ex.imm_data; |
86 | wc->uqueue[head].qp_num = entry->qp->qp_num; | 86 | wc->uqueue[head].qp_num = entry->qp->qp_num; |
87 | wc->uqueue[head].src_qp = entry->src_qp; | 87 | wc->uqueue[head].src_qp = entry->src_qp; |
88 | wc->uqueue[head].wc_flags = entry->wc_flags; | 88 | wc->uqueue[head].wc_flags = entry->wc_flags; |
diff --git a/drivers/infiniband/hw/ipath/ipath_file_ops.c b/drivers/infiniband/hw/ipath/ipath_file_ops.c index b472b15637f0..35f301c88b57 100644 --- a/drivers/infiniband/hw/ipath/ipath_file_ops.c +++ b/drivers/infiniband/hw/ipath/ipath_file_ops.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <linux/highmem.h> | 39 | #include <linux/highmem.h> |
40 | #include <linux/io.h> | 40 | #include <linux/io.h> |
41 | #include <linux/jiffies.h> | 41 | #include <linux/jiffies.h> |
42 | #include <linux/smp_lock.h> | ||
42 | #include <asm/pgtable.h> | 43 | #include <asm/pgtable.h> |
43 | 44 | ||
44 | #include "ipath_kernel.h" | 45 | #include "ipath_kernel.h" |
@@ -1815,6 +1816,7 @@ done: | |||
1815 | static int ipath_open(struct inode *in, struct file *fp) | 1816 | static int ipath_open(struct inode *in, struct file *fp) |
1816 | { | 1817 | { |
1817 | /* The real work is performed later in ipath_assign_port() */ | 1818 | /* The real work is performed later in ipath_assign_port() */ |
1819 | cycle_kernel_lock(); | ||
1818 | fp->private_data = kzalloc(sizeof(struct ipath_filedata), GFP_KERNEL); | 1820 | fp->private_data = kzalloc(sizeof(struct ipath_filedata), GFP_KERNEL); |
1819 | return fp->private_data ? 0 : -ENOMEM; | 1821 | return fp->private_data ? 0 : -ENOMEM; |
1820 | } | 1822 | } |
diff --git a/drivers/infiniband/hw/ipath/ipath_iba7220.c b/drivers/infiniband/hw/ipath/ipath_iba7220.c index 8eee7830f042..fb70712ac85c 100644 --- a/drivers/infiniband/hw/ipath/ipath_iba7220.c +++ b/drivers/infiniband/hw/ipath/ipath_iba7220.c | |||
@@ -2228,8 +2228,8 @@ static void ipath_autoneg_send(struct ipath_devdata *dd, int which) | |||
2228 | 0xffffffff, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, | 2228 | 0xffffffff, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, |
2229 | 0x40000001, 0x1388, 0x15e, /* rest 0's */ | 2229 | 0x40000001, 0x1388, 0x15e, /* rest 0's */ |
2230 | }; | 2230 | }; |
2231 | dcnt = sizeof(madpayload_start)/sizeof(madpayload_start[0]); | 2231 | dcnt = ARRAY_SIZE(madpayload_start); |
2232 | hcnt = sizeof(hdr)/sizeof(hdr[0]); | 2232 | hcnt = ARRAY_SIZE(hdr); |
2233 | if (!swapped) { | 2233 | if (!swapped) { |
2234 | /* for maintainability, do it at runtime */ | 2234 | /* for maintainability, do it at runtime */ |
2235 | for (i = 0; i < hcnt; i++) { | 2235 | for (i = 0; i < hcnt; i++) { |
diff --git a/drivers/infiniband/hw/ipath/ipath_mad.c b/drivers/infiniband/hw/ipath/ipath_mad.c index 5f9315d77a43..be4fc9ada8e7 100644 --- a/drivers/infiniband/hw/ipath/ipath_mad.c +++ b/drivers/infiniband/hw/ipath/ipath_mad.c | |||
@@ -111,9 +111,9 @@ static int recv_subn_get_nodeinfo(struct ib_smp *smp, | |||
111 | nip->revision = cpu_to_be32((majrev << 16) | minrev); | 111 | nip->revision = cpu_to_be32((majrev << 16) | minrev); |
112 | nip->local_port_num = port; | 112 | nip->local_port_num = port; |
113 | vendor = dd->ipath_vendorid; | 113 | vendor = dd->ipath_vendorid; |
114 | nip->vendor_id[0] = 0; | 114 | nip->vendor_id[0] = IPATH_SRC_OUI_1; |
115 | nip->vendor_id[1] = vendor >> 8; | 115 | nip->vendor_id[1] = IPATH_SRC_OUI_2; |
116 | nip->vendor_id[2] = vendor; | 116 | nip->vendor_id[2] = IPATH_SRC_OUI_3; |
117 | 117 | ||
118 | return reply(smp); | 118 | return reply(smp); |
119 | } | 119 | } |
diff --git a/drivers/infiniband/hw/ipath/ipath_rc.c b/drivers/infiniband/hw/ipath/ipath_rc.c index 108df667d2ee..97710522624d 100644 --- a/drivers/infiniband/hw/ipath/ipath_rc.c +++ b/drivers/infiniband/hw/ipath/ipath_rc.c | |||
@@ -1703,11 +1703,11 @@ void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr, | |||
1703 | case OP(SEND_LAST_WITH_IMMEDIATE): | 1703 | case OP(SEND_LAST_WITH_IMMEDIATE): |
1704 | send_last_imm: | 1704 | send_last_imm: |
1705 | if (header_in_data) { | 1705 | if (header_in_data) { |
1706 | wc.imm_data = *(__be32 *) data; | 1706 | wc.ex.imm_data = *(__be32 *) data; |
1707 | data += sizeof(__be32); | 1707 | data += sizeof(__be32); |
1708 | } else { | 1708 | } else { |
1709 | /* Immediate data comes after BTH */ | 1709 | /* Immediate data comes after BTH */ |
1710 | wc.imm_data = ohdr->u.imm_data; | 1710 | wc.ex.imm_data = ohdr->u.imm_data; |
1711 | } | 1711 | } |
1712 | hdrsize += 4; | 1712 | hdrsize += 4; |
1713 | wc.wc_flags = IB_WC_WITH_IMM; | 1713 | wc.wc_flags = IB_WC_WITH_IMM; |
diff --git a/drivers/infiniband/hw/ipath/ipath_ruc.c b/drivers/infiniband/hw/ipath/ipath_ruc.c index a4b5521567fe..af051f757663 100644 --- a/drivers/infiniband/hw/ipath/ipath_ruc.c +++ b/drivers/infiniband/hw/ipath/ipath_ruc.c | |||
@@ -331,7 +331,7 @@ again: | |||
331 | switch (wqe->wr.opcode) { | 331 | switch (wqe->wr.opcode) { |
332 | case IB_WR_SEND_WITH_IMM: | 332 | case IB_WR_SEND_WITH_IMM: |
333 | wc.wc_flags = IB_WC_WITH_IMM; | 333 | wc.wc_flags = IB_WC_WITH_IMM; |
334 | wc.imm_data = wqe->wr.ex.imm_data; | 334 | wc.ex.imm_data = wqe->wr.ex.imm_data; |
335 | /* FALLTHROUGH */ | 335 | /* FALLTHROUGH */ |
336 | case IB_WR_SEND: | 336 | case IB_WR_SEND: |
337 | if (!ipath_get_rwqe(qp, 0)) | 337 | if (!ipath_get_rwqe(qp, 0)) |
@@ -342,7 +342,7 @@ again: | |||
342 | if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE))) | 342 | if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE))) |
343 | goto inv_err; | 343 | goto inv_err; |
344 | wc.wc_flags = IB_WC_WITH_IMM; | 344 | wc.wc_flags = IB_WC_WITH_IMM; |
345 | wc.imm_data = wqe->wr.ex.imm_data; | 345 | wc.ex.imm_data = wqe->wr.ex.imm_data; |
346 | if (!ipath_get_rwqe(qp, 1)) | 346 | if (!ipath_get_rwqe(qp, 1)) |
347 | goto rnr_nak; | 347 | goto rnr_nak; |
348 | /* FALLTHROUGH */ | 348 | /* FALLTHROUGH */ |
diff --git a/drivers/infiniband/hw/ipath/ipath_uc.c b/drivers/infiniband/hw/ipath/ipath_uc.c index 0596ec16fcbd..82cc588b8bf2 100644 --- a/drivers/infiniband/hw/ipath/ipath_uc.c +++ b/drivers/infiniband/hw/ipath/ipath_uc.c | |||
@@ -379,11 +379,11 @@ void ipath_uc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr, | |||
379 | case OP(SEND_LAST_WITH_IMMEDIATE): | 379 | case OP(SEND_LAST_WITH_IMMEDIATE): |
380 | send_last_imm: | 380 | send_last_imm: |
381 | if (header_in_data) { | 381 | if (header_in_data) { |
382 | wc.imm_data = *(__be32 *) data; | 382 | wc.ex.imm_data = *(__be32 *) data; |
383 | data += sizeof(__be32); | 383 | data += sizeof(__be32); |
384 | } else { | 384 | } else { |
385 | /* Immediate data comes after BTH */ | 385 | /* Immediate data comes after BTH */ |
386 | wc.imm_data = ohdr->u.imm_data; | 386 | wc.ex.imm_data = ohdr->u.imm_data; |
387 | } | 387 | } |
388 | hdrsize += 4; | 388 | hdrsize += 4; |
389 | wc.wc_flags = IB_WC_WITH_IMM; | 389 | wc.wc_flags = IB_WC_WITH_IMM; |
@@ -483,11 +483,11 @@ void ipath_uc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr, | |||
483 | case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): | 483 | case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): |
484 | rdma_last_imm: | 484 | rdma_last_imm: |
485 | if (header_in_data) { | 485 | if (header_in_data) { |
486 | wc.imm_data = *(__be32 *) data; | 486 | wc.ex.imm_data = *(__be32 *) data; |
487 | data += sizeof(__be32); | 487 | data += sizeof(__be32); |
488 | } else { | 488 | } else { |
489 | /* Immediate data comes after BTH */ | 489 | /* Immediate data comes after BTH */ |
490 | wc.imm_data = ohdr->u.imm_data; | 490 | wc.ex.imm_data = ohdr->u.imm_data; |
491 | } | 491 | } |
492 | hdrsize += 4; | 492 | hdrsize += 4; |
493 | wc.wc_flags = IB_WC_WITH_IMM; | 493 | wc.wc_flags = IB_WC_WITH_IMM; |
diff --git a/drivers/infiniband/hw/ipath/ipath_ud.c b/drivers/infiniband/hw/ipath/ipath_ud.c index 77ca8ca74e78..36aa242c487c 100644 --- a/drivers/infiniband/hw/ipath/ipath_ud.c +++ b/drivers/infiniband/hw/ipath/ipath_ud.c | |||
@@ -96,7 +96,7 @@ static void ipath_ud_loopback(struct ipath_qp *sqp, struct ipath_swqe *swqe) | |||
96 | 96 | ||
97 | if (swqe->wr.opcode == IB_WR_SEND_WITH_IMM) { | 97 | if (swqe->wr.opcode == IB_WR_SEND_WITH_IMM) { |
98 | wc.wc_flags = IB_WC_WITH_IMM; | 98 | wc.wc_flags = IB_WC_WITH_IMM; |
99 | wc.imm_data = swqe->wr.ex.imm_data; | 99 | wc.ex.imm_data = swqe->wr.ex.imm_data; |
100 | } | 100 | } |
101 | 101 | ||
102 | /* | 102 | /* |
@@ -492,14 +492,14 @@ void ipath_ud_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr, | |||
492 | if (qp->ibqp.qp_num > 1 && | 492 | if (qp->ibqp.qp_num > 1 && |
493 | opcode == IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE) { | 493 | opcode == IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE) { |
494 | if (header_in_data) { | 494 | if (header_in_data) { |
495 | wc.imm_data = *(__be32 *) data; | 495 | wc.ex.imm_data = *(__be32 *) data; |
496 | data += sizeof(__be32); | 496 | data += sizeof(__be32); |
497 | } else | 497 | } else |
498 | wc.imm_data = ohdr->u.ud.imm_data; | 498 | wc.ex.imm_data = ohdr->u.ud.imm_data; |
499 | wc.wc_flags = IB_WC_WITH_IMM; | 499 | wc.wc_flags = IB_WC_WITH_IMM; |
500 | hdrsize += sizeof(u32); | 500 | hdrsize += sizeof(u32); |
501 | } else if (opcode == IB_OPCODE_UD_SEND_ONLY) { | 501 | } else if (opcode == IB_OPCODE_UD_SEND_ONLY) { |
502 | wc.imm_data = 0; | 502 | wc.ex.imm_data = 0; |
503 | wc.wc_flags = 0; | 503 | wc.wc_flags = 0; |
504 | } else { | 504 | } else { |
505 | dev->n_pkt_drops++; | 505 | dev->n_pkt_drops++; |
diff --git a/drivers/infiniband/hw/ipath/ipath_verbs.c b/drivers/infiniband/hw/ipath/ipath_verbs.c index 7779165b2c2c..55c718828826 100644 --- a/drivers/infiniband/hw/ipath/ipath_verbs.c +++ b/drivers/infiniband/hw/ipath/ipath_verbs.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <rdma/ib_user_verbs.h> | 35 | #include <rdma/ib_user_verbs.h> |
36 | #include <linux/io.h> | 36 | #include <linux/io.h> |
37 | #include <linux/utsname.h> | 37 | #include <linux/utsname.h> |
38 | #include <linux/rculist.h> | ||
38 | 39 | ||
39 | #include "ipath_kernel.h" | 40 | #include "ipath_kernel.h" |
40 | #include "ipath_verbs.h" | 41 | #include "ipath_verbs.h" |
@@ -1497,7 +1498,8 @@ static int ipath_query_device(struct ib_device *ibdev, | |||
1497 | IB_DEVICE_SYS_IMAGE_GUID | IB_DEVICE_RC_RNR_NAK_GEN | | 1498 | IB_DEVICE_SYS_IMAGE_GUID | IB_DEVICE_RC_RNR_NAK_GEN | |
1498 | IB_DEVICE_PORT_ACTIVE_EVENT | IB_DEVICE_SRQ_RESIZE; | 1499 | IB_DEVICE_PORT_ACTIVE_EVENT | IB_DEVICE_SRQ_RESIZE; |
1499 | props->page_size_cap = PAGE_SIZE; | 1500 | props->page_size_cap = PAGE_SIZE; |
1500 | props->vendor_id = dev->dd->ipath_vendorid; | 1501 | props->vendor_id = |
1502 | IPATH_SRC_OUI_1 << 16 | IPATH_SRC_OUI_2 << 8 | IPATH_SRC_OUI_3; | ||
1501 | props->vendor_part_id = dev->dd->ipath_deviceid; | 1503 | props->vendor_part_id = dev->dd->ipath_deviceid; |
1502 | props->hw_ver = dev->dd->ipath_pcirev; | 1504 | props->hw_ver = dev->dd->ipath_pcirev; |
1503 | 1505 | ||
diff --git a/drivers/infiniband/hw/ipath/ipath_verbs_mcast.c b/drivers/infiniband/hw/ipath/ipath_verbs_mcast.c index 9e5abf9c309d..d73e32232879 100644 --- a/drivers/infiniband/hw/ipath/ipath_verbs_mcast.c +++ b/drivers/infiniband/hw/ipath/ipath_verbs_mcast.c | |||
@@ -31,8 +31,7 @@ | |||
31 | * SOFTWARE. | 31 | * SOFTWARE. |
32 | */ | 32 | */ |
33 | 33 | ||
34 | #include <linux/list.h> | 34 | #include <linux/rculist.h> |
35 | #include <linux/rcupdate.h> | ||
36 | 35 | ||
37 | #include "ipath_verbs.h" | 36 | #include "ipath_verbs.h" |
38 | 37 | ||
diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c index 4521319b1406..299f20832ab6 100644 --- a/drivers/infiniband/hw/mlx4/cq.c +++ b/drivers/infiniband/hw/mlx4/cq.c | |||
@@ -663,18 +663,18 @@ repoll: | |||
663 | 663 | ||
664 | switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) { | 664 | switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) { |
665 | case MLX4_RECV_OPCODE_RDMA_WRITE_IMM: | 665 | case MLX4_RECV_OPCODE_RDMA_WRITE_IMM: |
666 | wc->opcode = IB_WC_RECV_RDMA_WITH_IMM; | 666 | wc->opcode = IB_WC_RECV_RDMA_WITH_IMM; |
667 | wc->wc_flags = IB_WC_WITH_IMM; | 667 | wc->wc_flags = IB_WC_WITH_IMM; |
668 | wc->imm_data = cqe->immed_rss_invalid; | 668 | wc->ex.imm_data = cqe->immed_rss_invalid; |
669 | break; | 669 | break; |
670 | case MLX4_RECV_OPCODE_SEND: | 670 | case MLX4_RECV_OPCODE_SEND: |
671 | wc->opcode = IB_WC_RECV; | 671 | wc->opcode = IB_WC_RECV; |
672 | wc->wc_flags = 0; | 672 | wc->wc_flags = 0; |
673 | break; | 673 | break; |
674 | case MLX4_RECV_OPCODE_SEND_IMM: | 674 | case MLX4_RECV_OPCODE_SEND_IMM: |
675 | wc->opcode = IB_WC_RECV; | 675 | wc->opcode = IB_WC_RECV; |
676 | wc->wc_flags = IB_WC_WITH_IMM; | 676 | wc->wc_flags = IB_WC_WITH_IMM; |
677 | wc->imm_data = cqe->immed_rss_invalid; | 677 | wc->ex.imm_data = cqe->immed_rss_invalid; |
678 | break; | 678 | break; |
679 | } | 679 | } |
680 | 680 | ||
diff --git a/drivers/infiniband/hw/mlx4/mad.c b/drivers/infiniband/hw/mlx4/mad.c index 4c1e72fc8f57..cdca3a511e1c 100644 --- a/drivers/infiniband/hw/mlx4/mad.c +++ b/drivers/infiniband/hw/mlx4/mad.c | |||
@@ -255,7 +255,8 @@ int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num, | |||
255 | return IB_MAD_RESULT_SUCCESS; | 255 | return IB_MAD_RESULT_SUCCESS; |
256 | } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT || | 256 | } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT || |
257 | in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 || | 257 | in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 || |
258 | in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2) { | 258 | in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2 || |
259 | in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) { | ||
259 | if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET && | 260 | if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET && |
260 | in_mad->mad_hdr.method != IB_MGMT_METHOD_SET) | 261 | in_mad->mad_hdr.method != IB_MGMT_METHOD_SET) |
261 | return IB_MAD_RESULT_SUCCESS; | 262 | return IB_MAD_RESULT_SUCCESS; |
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c index 4d61e32866c6..bcf50648fa18 100644 --- a/drivers/infiniband/hw/mlx4/main.c +++ b/drivers/infiniband/hw/mlx4/main.c | |||
@@ -90,7 +90,8 @@ static int mlx4_ib_query_device(struct ib_device *ibdev, | |||
90 | props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | | 90 | props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | |
91 | IB_DEVICE_PORT_ACTIVE_EVENT | | 91 | IB_DEVICE_PORT_ACTIVE_EVENT | |
92 | IB_DEVICE_SYS_IMAGE_GUID | | 92 | IB_DEVICE_SYS_IMAGE_GUID | |
93 | IB_DEVICE_RC_RNR_NAK_GEN; | 93 | IB_DEVICE_RC_RNR_NAK_GEN | |
94 | IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; | ||
94 | if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) | 95 | if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) |
95 | props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; | 96 | props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; |
96 | if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) | 97 | if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) |
@@ -437,7 +438,9 @@ static int mlx4_ib_dealloc_pd(struct ib_pd *pd) | |||
437 | static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | 438 | static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) |
438 | { | 439 | { |
439 | return mlx4_multicast_attach(to_mdev(ibqp->device)->dev, | 440 | return mlx4_multicast_attach(to_mdev(ibqp->device)->dev, |
440 | &to_mqp(ibqp)->mqp, gid->raw); | 441 | &to_mqp(ibqp)->mqp, gid->raw, |
442 | !!(to_mqp(ibqp)->flags & | ||
443 | MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK)); | ||
441 | } | 444 | } |
442 | 445 | ||
443 | static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | 446 | static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) |
diff --git a/drivers/infiniband/hw/mlx4/mlx4_ib.h b/drivers/infiniband/hw/mlx4/mlx4_ib.h index 5cf994794d25..c4cf5b69eefa 100644 --- a/drivers/infiniband/hw/mlx4/mlx4_ib.h +++ b/drivers/infiniband/hw/mlx4/mlx4_ib.h | |||
@@ -101,7 +101,8 @@ struct mlx4_ib_wq { | |||
101 | }; | 101 | }; |
102 | 102 | ||
103 | enum mlx4_ib_qp_flags { | 103 | enum mlx4_ib_qp_flags { |
104 | MLX4_IB_QP_LSO = 1 << 0 | 104 | MLX4_IB_QP_LSO = 1 << 0, |
105 | MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = 1 << 1, | ||
105 | }; | 106 | }; |
106 | 107 | ||
107 | struct mlx4_ib_qp { | 108 | struct mlx4_ib_qp { |
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c index a80df22deae8..89eb6cbe592e 100644 --- a/drivers/infiniband/hw/mlx4/qp.c +++ b/drivers/infiniband/hw/mlx4/qp.c | |||
@@ -129,9 +129,10 @@ static void stamp_send_wqe(struct mlx4_ib_qp *qp, int n, int size) | |||
129 | int ind; | 129 | int ind; |
130 | void *buf; | 130 | void *buf; |
131 | __be32 stamp; | 131 | __be32 stamp; |
132 | struct mlx4_wqe_ctrl_seg *ctrl; | ||
132 | 133 | ||
133 | s = roundup(size, 1U << qp->sq.wqe_shift); | ||
134 | if (qp->sq_max_wqes_per_wr > 1) { | 134 | if (qp->sq_max_wqes_per_wr > 1) { |
135 | s = roundup(size, 1U << qp->sq.wqe_shift); | ||
135 | for (i = 0; i < s; i += 64) { | 136 | for (i = 0; i < s; i += 64) { |
136 | ind = (i >> qp->sq.wqe_shift) + n; | 137 | ind = (i >> qp->sq.wqe_shift) + n; |
137 | stamp = ind & qp->sq.wqe_cnt ? cpu_to_be32(0x7fffffff) : | 138 | stamp = ind & qp->sq.wqe_cnt ? cpu_to_be32(0x7fffffff) : |
@@ -141,7 +142,8 @@ static void stamp_send_wqe(struct mlx4_ib_qp *qp, int n, int size) | |||
141 | *wqe = stamp; | 142 | *wqe = stamp; |
142 | } | 143 | } |
143 | } else { | 144 | } else { |
144 | buf = get_send_wqe(qp, n & (qp->sq.wqe_cnt - 1)); | 145 | ctrl = buf = get_send_wqe(qp, n & (qp->sq.wqe_cnt - 1)); |
146 | s = (ctrl->fence_size & 0x3f) << 4; | ||
145 | for (i = 64; i < s; i += 64) { | 147 | for (i = 64; i < s; i += 64) { |
146 | wqe = buf + i; | 148 | wqe = buf + i; |
147 | *wqe = cpu_to_be32(0xffffffff); | 149 | *wqe = cpu_to_be32(0xffffffff); |
@@ -452,19 +454,8 @@ static int create_qp_common(struct mlx4_ib_dev *dev, struct ib_pd *pd, | |||
452 | spin_lock_init(&qp->rq.lock); | 454 | spin_lock_init(&qp->rq.lock); |
453 | 455 | ||
454 | qp->state = IB_QPS_RESET; | 456 | qp->state = IB_QPS_RESET; |
455 | qp->atomic_rd_en = 0; | ||
456 | qp->resp_depth = 0; | ||
457 | |||
458 | qp->rq.head = 0; | ||
459 | qp->rq.tail = 0; | ||
460 | qp->sq.head = 0; | ||
461 | qp->sq.tail = 0; | ||
462 | qp->sq_next_wqe = 0; | ||
463 | |||
464 | if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) | 457 | if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) |
465 | qp->sq_signal_bits = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE); | 458 | qp->sq_signal_bits = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE); |
466 | else | ||
467 | qp->sq_signal_bits = 0; | ||
468 | 459 | ||
469 | err = set_rq_size(dev, &init_attr->cap, !!pd->uobject, !!init_attr->srq, qp); | 460 | err = set_rq_size(dev, &init_attr->cap, !!pd->uobject, !!init_attr->srq, qp); |
470 | if (err) | 461 | if (err) |
@@ -509,6 +500,9 @@ static int create_qp_common(struct mlx4_ib_dev *dev, struct ib_pd *pd, | |||
509 | } else { | 500 | } else { |
510 | qp->sq_no_prefetch = 0; | 501 | qp->sq_no_prefetch = 0; |
511 | 502 | ||
503 | if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) | ||
504 | qp->flags |= MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK; | ||
505 | |||
512 | if (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) | 506 | if (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) |
513 | qp->flags |= MLX4_IB_QP_LSO; | 507 | qp->flags |= MLX4_IB_QP_LSO; |
514 | 508 | ||
@@ -682,10 +676,15 @@ struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd, | |||
682 | struct mlx4_ib_qp *qp; | 676 | struct mlx4_ib_qp *qp; |
683 | int err; | 677 | int err; |
684 | 678 | ||
685 | /* We only support LSO, and only for kernel UD QPs. */ | 679 | /* |
686 | if (init_attr->create_flags & ~IB_QP_CREATE_IPOIB_UD_LSO) | 680 | * We only support LSO and multicast loopback blocking, and |
681 | * only for kernel UD QPs. | ||
682 | */ | ||
683 | if (init_attr->create_flags & ~(IB_QP_CREATE_IPOIB_UD_LSO | | ||
684 | IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK)) | ||
687 | return ERR_PTR(-EINVAL); | 685 | return ERR_PTR(-EINVAL); |
688 | if (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO && | 686 | |
687 | if (init_attr->create_flags && | ||
689 | (pd->uobject || init_attr->qp_type != IB_QPT_UD)) | 688 | (pd->uobject || init_attr->qp_type != IB_QPT_UD)) |
690 | return ERR_PTR(-EINVAL); | 689 | return ERR_PTR(-EINVAL); |
691 | 690 | ||
@@ -694,7 +693,7 @@ struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd, | |||
694 | case IB_QPT_UC: | 693 | case IB_QPT_UC: |
695 | case IB_QPT_UD: | 694 | case IB_QPT_UD: |
696 | { | 695 | { |
697 | qp = kmalloc(sizeof *qp, GFP_KERNEL); | 696 | qp = kzalloc(sizeof *qp, GFP_KERNEL); |
698 | if (!qp) | 697 | if (!qp) |
699 | return ERR_PTR(-ENOMEM); | 698 | return ERR_PTR(-ENOMEM); |
700 | 699 | ||
@@ -715,7 +714,7 @@ struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd, | |||
715 | if (pd->uobject) | 714 | if (pd->uobject) |
716 | return ERR_PTR(-EINVAL); | 715 | return ERR_PTR(-EINVAL); |
717 | 716 | ||
718 | sqp = kmalloc(sizeof *sqp, GFP_KERNEL); | 717 | sqp = kzalloc(sizeof *sqp, GFP_KERNEL); |
719 | if (!sqp) | 718 | if (!sqp) |
720 | return ERR_PTR(-ENOMEM); | 719 | return ERR_PTR(-ENOMEM); |
721 | 720 | ||
@@ -906,7 +905,8 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, | |||
906 | attr->path_mtu); | 905 | attr->path_mtu); |
907 | goto out; | 906 | goto out; |
908 | } | 907 | } |
909 | context->mtu_msgmax = (attr->path_mtu << 5) | 31; | 908 | context->mtu_msgmax = (attr->path_mtu << 5) | |
909 | ilog2(dev->dev->caps.max_msg_sz); | ||
910 | } | 910 | } |
911 | 911 | ||
912 | if (qp->rq.wqe_cnt) | 912 | if (qp->rq.wqe_cnt) |
@@ -1063,6 +1063,8 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, | |||
1063 | for (i = 0; i < qp->sq.wqe_cnt; ++i) { | 1063 | for (i = 0; i < qp->sq.wqe_cnt; ++i) { |
1064 | ctrl = get_send_wqe(qp, i); | 1064 | ctrl = get_send_wqe(qp, i); |
1065 | ctrl->owner_opcode = cpu_to_be32(1 << 31); | 1065 | ctrl->owner_opcode = cpu_to_be32(1 << 31); |
1066 | if (qp->sq_max_wqes_per_wr == 1) | ||
1067 | ctrl->fence_size = 1 << (qp->sq.wqe_shift - 4); | ||
1066 | 1068 | ||
1067 | stamp_send_wqe(qp, i, 1 << qp->sq.wqe_shift); | 1069 | stamp_send_wqe(qp, i, 1 << qp->sq.wqe_shift); |
1068 | } | 1070 | } |
@@ -1127,23 +1129,6 @@ out: | |||
1127 | return err; | 1129 | return err; |
1128 | } | 1130 | } |
1129 | 1131 | ||
1130 | static const struct ib_qp_attr mlx4_ib_qp_attr = { .port_num = 1 }; | ||
1131 | static const int mlx4_ib_qp_attr_mask_table[IB_QPT_UD + 1] = { | ||
1132 | [IB_QPT_UD] = (IB_QP_PKEY_INDEX | | ||
1133 | IB_QP_PORT | | ||
1134 | IB_QP_QKEY), | ||
1135 | [IB_QPT_UC] = (IB_QP_PKEY_INDEX | | ||
1136 | IB_QP_PORT | | ||
1137 | IB_QP_ACCESS_FLAGS), | ||
1138 | [IB_QPT_RC] = (IB_QP_PKEY_INDEX | | ||
1139 | IB_QP_PORT | | ||
1140 | IB_QP_ACCESS_FLAGS), | ||
1141 | [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | | ||
1142 | IB_QP_QKEY), | ||
1143 | [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | | ||
1144 | IB_QP_QKEY), | ||
1145 | }; | ||
1146 | |||
1147 | int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | 1132 | int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, |
1148 | int attr_mask, struct ib_udata *udata) | 1133 | int attr_mask, struct ib_udata *udata) |
1149 | { | 1134 | { |
@@ -1186,15 +1171,6 @@ int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | |||
1186 | goto out; | 1171 | goto out; |
1187 | } | 1172 | } |
1188 | 1173 | ||
1189 | if (cur_state == IB_QPS_RESET && new_state == IB_QPS_ERR) { | ||
1190 | err = __mlx4_ib_modify_qp(ibqp, &mlx4_ib_qp_attr, | ||
1191 | mlx4_ib_qp_attr_mask_table[ibqp->qp_type], | ||
1192 | IB_QPS_RESET, IB_QPS_INIT); | ||
1193 | if (err) | ||
1194 | goto out; | ||
1195 | cur_state = IB_QPS_INIT; | ||
1196 | } | ||
1197 | |||
1198 | err = __mlx4_ib_modify_qp(ibqp, attr, attr_mask, cur_state, new_state); | 1174 | err = __mlx4_ib_modify_qp(ibqp, attr, attr_mask, cur_state, new_state); |
1199 | 1175 | ||
1200 | out: | 1176 | out: |
@@ -1865,6 +1841,13 @@ done: | |||
1865 | 1841 | ||
1866 | qp_init_attr->cap = qp_attr->cap; | 1842 | qp_init_attr->cap = qp_attr->cap; |
1867 | 1843 | ||
1844 | qp_init_attr->create_flags = 0; | ||
1845 | if (qp->flags & MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK) | ||
1846 | qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; | ||
1847 | |||
1848 | if (qp->flags & MLX4_IB_QP_LSO) | ||
1849 | qp_init_attr->create_flags |= IB_QP_CREATE_IPOIB_UD_LSO; | ||
1850 | |||
1868 | out: | 1851 | out: |
1869 | mutex_unlock(&qp->mutex); | 1852 | mutex_unlock(&qp->mutex); |
1870 | return err; | 1853 | return err; |
diff --git a/drivers/infiniband/hw/mthca/mthca_allocator.c b/drivers/infiniband/hw/mthca/mthca_allocator.c index a76306709618..c5ccc2daab60 100644 --- a/drivers/infiniband/hw/mthca/mthca_allocator.c +++ b/drivers/infiniband/hw/mthca/mthca_allocator.c | |||
@@ -28,8 +28,6 @@ | |||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
30 | * SOFTWARE. | 30 | * SOFTWARE. |
31 | * | ||
32 | * $Id: mthca_allocator.c 1349 2004-12-16 21:09:43Z roland $ | ||
33 | */ | 31 | */ |
34 | 32 | ||
35 | #include <linux/errno.h> | 33 | #include <linux/errno.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_av.c b/drivers/infiniband/hw/mthca/mthca_av.c index 4b111a852ff6..32f6c6315454 100644 --- a/drivers/infiniband/hw/mthca/mthca_av.c +++ b/drivers/infiniband/hw/mthca/mthca_av.c | |||
@@ -29,8 +29,6 @@ | |||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
31 | * SOFTWARE. | 31 | * SOFTWARE. |
32 | * | ||
33 | * $Id: mthca_av.c 1349 2004-12-16 21:09:43Z roland $ | ||
34 | */ | 32 | */ |
35 | 33 | ||
36 | #include <linux/string.h> | 34 | #include <linux/string.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_catas.c b/drivers/infiniband/hw/mthca/mthca_catas.c index e948158a28d9..cc440f90000b 100644 --- a/drivers/infiniband/hw/mthca/mthca_catas.c +++ b/drivers/infiniband/hw/mthca/mthca_catas.c | |||
@@ -28,8 +28,6 @@ | |||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
30 | * SOFTWARE. | 30 | * SOFTWARE. |
31 | * | ||
32 | * $Id$ | ||
33 | */ | 31 | */ |
34 | 32 | ||
35 | #include <linux/jiffies.h> | 33 | #include <linux/jiffies.h> |
@@ -128,7 +126,6 @@ static void handle_catas(struct mthca_dev *dev) | |||
128 | static void poll_catas(unsigned long dev_ptr) | 126 | static void poll_catas(unsigned long dev_ptr) |
129 | { | 127 | { |
130 | struct mthca_dev *dev = (struct mthca_dev *) dev_ptr; | 128 | struct mthca_dev *dev = (struct mthca_dev *) dev_ptr; |
131 | unsigned long flags; | ||
132 | int i; | 129 | int i; |
133 | 130 | ||
134 | for (i = 0; i < dev->catas_err.size; ++i) | 131 | for (i = 0; i < dev->catas_err.size; ++i) |
@@ -137,13 +134,8 @@ static void poll_catas(unsigned long dev_ptr) | |||
137 | return; | 134 | return; |
138 | } | 135 | } |
139 | 136 | ||
140 | spin_lock_irqsave(&catas_lock, flags); | 137 | mod_timer(&dev->catas_err.timer, |
141 | if (!dev->catas_err.stop) | 138 | round_jiffies(jiffies + MTHCA_CATAS_POLL_INTERVAL)); |
142 | mod_timer(&dev->catas_err.timer, | ||
143 | jiffies + MTHCA_CATAS_POLL_INTERVAL); | ||
144 | spin_unlock_irqrestore(&catas_lock, flags); | ||
145 | |||
146 | return; | ||
147 | } | 139 | } |
148 | 140 | ||
149 | void mthca_start_catas_poll(struct mthca_dev *dev) | 141 | void mthca_start_catas_poll(struct mthca_dev *dev) |
@@ -151,7 +143,6 @@ void mthca_start_catas_poll(struct mthca_dev *dev) | |||
151 | unsigned long addr; | 143 | unsigned long addr; |
152 | 144 | ||
153 | init_timer(&dev->catas_err.timer); | 145 | init_timer(&dev->catas_err.timer); |
154 | dev->catas_err.stop = 0; | ||
155 | dev->catas_err.map = NULL; | 146 | dev->catas_err.map = NULL; |
156 | 147 | ||
157 | addr = pci_resource_start(dev->pdev, 0) + | 148 | addr = pci_resource_start(dev->pdev, 0) + |
@@ -182,10 +173,6 @@ void mthca_start_catas_poll(struct mthca_dev *dev) | |||
182 | 173 | ||
183 | void mthca_stop_catas_poll(struct mthca_dev *dev) | 174 | void mthca_stop_catas_poll(struct mthca_dev *dev) |
184 | { | 175 | { |
185 | spin_lock_irq(&catas_lock); | ||
186 | dev->catas_err.stop = 1; | ||
187 | spin_unlock_irq(&catas_lock); | ||
188 | |||
189 | del_timer_sync(&dev->catas_err.timer); | 176 | del_timer_sync(&dev->catas_err.timer); |
190 | 177 | ||
191 | if (dev->catas_err.map) { | 178 | if (dev->catas_err.map) { |
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c index 54d230ee7d63..c33e1c53c799 100644 --- a/drivers/infiniband/hw/mthca/mthca_cmd.c +++ b/drivers/infiniband/hw/mthca/mthca_cmd.c | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id: mthca_cmd.c 1349 2004-12-16 21:09:43Z roland $ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #include <linux/completion.h> | 35 | #include <linux/completion.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.h b/drivers/infiniband/hw/mthca/mthca_cmd.h index 8928ca4a9325..6efd3265f248 100644 --- a/drivers/infiniband/hw/mthca/mthca_cmd.h +++ b/drivers/infiniband/hw/mthca/mthca_cmd.h | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id: mthca_cmd.h 1349 2004-12-16 21:09:43Z roland $ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #ifndef MTHCA_CMD_H | 35 | #ifndef MTHCA_CMD_H |
diff --git a/drivers/infiniband/hw/mthca/mthca_config_reg.h b/drivers/infiniband/hw/mthca/mthca_config_reg.h index afa56bfaab2e..75671f75cac4 100644 --- a/drivers/infiniband/hw/mthca/mthca_config_reg.h +++ b/drivers/infiniband/hw/mthca/mthca_config_reg.h | |||
@@ -29,8 +29,6 @@ | |||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
31 | * SOFTWARE. | 31 | * SOFTWARE. |
32 | * | ||
33 | * $Id: mthca_config_reg.h 1349 2004-12-16 21:09:43Z roland $ | ||
34 | */ | 32 | */ |
35 | 33 | ||
36 | #ifndef MTHCA_CONFIG_REG_H | 34 | #ifndef MTHCA_CONFIG_REG_H |
diff --git a/drivers/infiniband/hw/mthca/mthca_cq.c b/drivers/infiniband/hw/mthca/mthca_cq.c index 20401d2ba6b2..d9f4735c2b37 100644 --- a/drivers/infiniband/hw/mthca/mthca_cq.c +++ b/drivers/infiniband/hw/mthca/mthca_cq.c | |||
@@ -32,8 +32,6 @@ | |||
32 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 32 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
33 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 33 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
34 | * SOFTWARE. | 34 | * SOFTWARE. |
35 | * | ||
36 | * $Id: mthca_cq.c 1369 2004-12-20 16:17:07Z roland $ | ||
37 | */ | 35 | */ |
38 | 36 | ||
39 | #include <linux/hardirq.h> | 37 | #include <linux/hardirq.h> |
@@ -622,13 +620,13 @@ static inline int mthca_poll_one(struct mthca_dev *dev, | |||
622 | case IB_OPCODE_SEND_LAST_WITH_IMMEDIATE: | 620 | case IB_OPCODE_SEND_LAST_WITH_IMMEDIATE: |
623 | case IB_OPCODE_SEND_ONLY_WITH_IMMEDIATE: | 621 | case IB_OPCODE_SEND_ONLY_WITH_IMMEDIATE: |
624 | entry->wc_flags = IB_WC_WITH_IMM; | 622 | entry->wc_flags = IB_WC_WITH_IMM; |
625 | entry->imm_data = cqe->imm_etype_pkey_eec; | 623 | entry->ex.imm_data = cqe->imm_etype_pkey_eec; |
626 | entry->opcode = IB_WC_RECV; | 624 | entry->opcode = IB_WC_RECV; |
627 | break; | 625 | break; |
628 | case IB_OPCODE_RDMA_WRITE_LAST_WITH_IMMEDIATE: | 626 | case IB_OPCODE_RDMA_WRITE_LAST_WITH_IMMEDIATE: |
629 | case IB_OPCODE_RDMA_WRITE_ONLY_WITH_IMMEDIATE: | 627 | case IB_OPCODE_RDMA_WRITE_ONLY_WITH_IMMEDIATE: |
630 | entry->wc_flags = IB_WC_WITH_IMM; | 628 | entry->wc_flags = IB_WC_WITH_IMM; |
631 | entry->imm_data = cqe->imm_etype_pkey_eec; | 629 | entry->ex.imm_data = cqe->imm_etype_pkey_eec; |
632 | entry->opcode = IB_WC_RECV_RDMA_WITH_IMM; | 630 | entry->opcode = IB_WC_RECV_RDMA_WITH_IMM; |
633 | break; | 631 | break; |
634 | default: | 632 | default: |
diff --git a/drivers/infiniband/hw/mthca/mthca_dev.h b/drivers/infiniband/hw/mthca/mthca_dev.h index 7bc32f8e377e..ee4d073c889f 100644 --- a/drivers/infiniband/hw/mthca/mthca_dev.h +++ b/drivers/infiniband/hw/mthca/mthca_dev.h | |||
@@ -32,8 +32,6 @@ | |||
32 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 32 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
33 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 33 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
34 | * SOFTWARE. | 34 | * SOFTWARE. |
35 | * | ||
36 | * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $ | ||
37 | */ | 35 | */ |
38 | 36 | ||
39 | #ifndef MTHCA_DEV_H | 37 | #ifndef MTHCA_DEV_H |
@@ -279,7 +277,6 @@ struct mthca_mcg_table { | |||
279 | struct mthca_catas_err { | 277 | struct mthca_catas_err { |
280 | u64 addr; | 278 | u64 addr; |
281 | u32 __iomem *map; | 279 | u32 __iomem *map; |
282 | unsigned long stop; | ||
283 | u32 size; | 280 | u32 size; |
284 | struct timer_list timer; | 281 | struct timer_list timer; |
285 | struct list_head list; | 282 | struct list_head list; |
diff --git a/drivers/infiniband/hw/mthca/mthca_doorbell.h b/drivers/infiniband/hw/mthca/mthca_doorbell.h index b374dc395be1..14f51ef97d7e 100644 --- a/drivers/infiniband/hw/mthca/mthca_doorbell.h +++ b/drivers/infiniband/hw/mthca/mthca_doorbell.h | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id: mthca_doorbell.h 1349 2004-12-16 21:09:43Z roland $ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #include <linux/types.h> | 35 | #include <linux/types.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c index 8bde7f98e58a..4e36aa7cb3d2 100644 --- a/drivers/infiniband/hw/mthca/mthca_eq.c +++ b/drivers/infiniband/hw/mthca/mthca_eq.c | |||
@@ -29,8 +29,6 @@ | |||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
31 | * SOFTWARE. | 31 | * SOFTWARE. |
32 | * | ||
33 | * $Id: mthca_eq.c 1382 2004-12-24 02:21:02Z roland $ | ||
34 | */ | 32 | */ |
35 | 33 | ||
36 | #include <linux/errno.h> | 34 | #include <linux/errno.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_mad.c b/drivers/infiniband/hw/mthca/mthca_mad.c index 8b7e83e6e88f..640449582aba 100644 --- a/drivers/infiniband/hw/mthca/mthca_mad.c +++ b/drivers/infiniband/hw/mthca/mthca_mad.c | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id: mthca_mad.c 1349 2004-12-16 21:09:43Z roland $ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #include <linux/string.h> | 35 | #include <linux/string.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c index 200cf13fc9bb..fb9f91b60f30 100644 --- a/drivers/infiniband/hw/mthca/mthca_main.c +++ b/drivers/infiniband/hw/mthca/mthca_main.c | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #include <linux/module.h> | 35 | #include <linux/module.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_mcg.c b/drivers/infiniband/hw/mthca/mthca_mcg.c index a8ad072be074..3f5f94879208 100644 --- a/drivers/infiniband/hw/mthca/mthca_mcg.c +++ b/drivers/infiniband/hw/mthca/mthca_mcg.c | |||
@@ -28,8 +28,6 @@ | |||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
30 | * SOFTWARE. | 30 | * SOFTWARE. |
31 | * | ||
32 | * $Id: mthca_mcg.c 1349 2004-12-16 21:09:43Z roland $ | ||
33 | */ | 31 | */ |
34 | 32 | ||
35 | #include <linux/string.h> | 33 | #include <linux/string.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.c b/drivers/infiniband/hw/mthca/mthca_memfree.c index d5862e5d99a0..1f7d1a29d2a8 100644 --- a/drivers/infiniband/hw/mthca/mthca_memfree.c +++ b/drivers/infiniband/hw/mthca/mthca_memfree.c | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id$ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #include <linux/mm.h> | 35 | #include <linux/mm.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.h b/drivers/infiniband/hw/mthca/mthca_memfree.h index a1ab06847b75..da9b8f9b884f 100644 --- a/drivers/infiniband/hw/mthca/mthca_memfree.h +++ b/drivers/infiniband/hw/mthca/mthca_memfree.h | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id$ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #ifndef MTHCA_MEMFREE_H | 35 | #ifndef MTHCA_MEMFREE_H |
diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c index 820205dec560..8489b1e81c0f 100644 --- a/drivers/infiniband/hw/mthca/mthca_mr.c +++ b/drivers/infiniband/hw/mthca/mthca_mr.c | |||
@@ -29,8 +29,6 @@ | |||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
31 | * SOFTWARE. | 31 | * SOFTWARE. |
32 | * | ||
33 | * $Id: mthca_mr.c 1349 2004-12-16 21:09:43Z roland $ | ||
34 | */ | 32 | */ |
35 | 33 | ||
36 | #include <linux/slab.h> | 34 | #include <linux/slab.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_pd.c b/drivers/infiniband/hw/mthca/mthca_pd.c index c1e950764bd8..266f14e47406 100644 --- a/drivers/infiniband/hw/mthca/mthca_pd.c +++ b/drivers/infiniband/hw/mthca/mthca_pd.c | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id: mthca_pd.c 1349 2004-12-16 21:09:43Z roland $ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #include <linux/errno.h> | 35 | #include <linux/errno.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_profile.c b/drivers/infiniband/hw/mthca/mthca_profile.c index 605a8d57fac6..d168c2540611 100644 --- a/drivers/infiniband/hw/mthca/mthca_profile.c +++ b/drivers/infiniband/hw/mthca/mthca_profile.c | |||
@@ -29,8 +29,6 @@ | |||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
31 | * SOFTWARE. | 31 | * SOFTWARE. |
32 | * | ||
33 | * $Id: mthca_profile.c 1349 2004-12-16 21:09:43Z roland $ | ||
34 | */ | 32 | */ |
35 | 33 | ||
36 | #include <linux/module.h> | 34 | #include <linux/module.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_profile.h b/drivers/infiniband/hw/mthca/mthca_profile.h index e76cb62d8e32..62b009cc8730 100644 --- a/drivers/infiniband/hw/mthca/mthca_profile.h +++ b/drivers/infiniband/hw/mthca/mthca_profile.h | |||
@@ -29,8 +29,6 @@ | |||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
31 | * SOFTWARE. | 31 | * SOFTWARE. |
32 | * | ||
33 | * $Id: mthca_profile.h 1349 2004-12-16 21:09:43Z roland $ | ||
34 | */ | 32 | */ |
35 | 33 | ||
36 | #ifndef MTHCA_PROFILE_H | 34 | #ifndef MTHCA_PROFILE_H |
diff --git a/drivers/infiniband/hw/mthca/mthca_provider.c b/drivers/infiniband/hw/mthca/mthca_provider.c index be34f99ca625..87ad889e367b 100644 --- a/drivers/infiniband/hw/mthca/mthca_provider.c +++ b/drivers/infiniband/hw/mthca/mthca_provider.c | |||
@@ -32,8 +32,6 @@ | |||
32 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 32 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
33 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 33 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
34 | * SOFTWARE. | 34 | * SOFTWARE. |
35 | * | ||
36 | * $Id: mthca_provider.c 4859 2006-01-09 21:55:10Z roland $ | ||
37 | */ | 35 | */ |
38 | 36 | ||
39 | #include <rdma/ib_smi.h> | 37 | #include <rdma/ib_smi.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_provider.h b/drivers/infiniband/hw/mthca/mthca_provider.h index 934bf9544037..c621f8794b88 100644 --- a/drivers/infiniband/hw/mthca/mthca_provider.h +++ b/drivers/infiniband/hw/mthca/mthca_provider.h | |||
@@ -30,8 +30,6 @@ | |||
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
32 | * SOFTWARE. | 32 | * SOFTWARE. |
33 | * | ||
34 | * $Id: mthca_provider.h 1349 2004-12-16 21:09:43Z roland $ | ||
35 | */ | 33 | */ |
36 | 34 | ||
37 | #ifndef MTHCA_PROVIDER_H | 35 | #ifndef MTHCA_PROVIDER_H |
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c index 09dc3614cf2c..f5081bfde6db 100644 --- a/drivers/infiniband/hw/mthca/mthca_qp.c +++ b/drivers/infiniband/hw/mthca/mthca_qp.c | |||
@@ -31,8 +31,6 @@ | |||
31 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 31 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
32 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 32 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
33 | * SOFTWARE. | 33 | * SOFTWARE. |
34 | * | ||
35 | * $Id: mthca_qp.c 1355 2004-12-17 15:23:43Z roland $ | ||
36 | */ | 34 | */ |
37 | 35 | ||
38 | #include <linux/string.h> | 36 | #include <linux/string.h> |
@@ -850,23 +848,6 @@ out: | |||
850 | return err; | 848 | return err; |
851 | } | 849 | } |
852 | 850 | ||
853 | static const struct ib_qp_attr dummy_init_attr = { .port_num = 1 }; | ||
854 | static const int dummy_init_attr_mask[] = { | ||
855 | [IB_QPT_UD] = (IB_QP_PKEY_INDEX | | ||
856 | IB_QP_PORT | | ||
857 | IB_QP_QKEY), | ||
858 | [IB_QPT_UC] = (IB_QP_PKEY_INDEX | | ||
859 | IB_QP_PORT | | ||
860 | IB_QP_ACCESS_FLAGS), | ||
861 | [IB_QPT_RC] = (IB_QP_PKEY_INDEX | | ||
862 | IB_QP_PORT | | ||
863 | IB_QP_ACCESS_FLAGS), | ||
864 | [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | | ||
865 | IB_QP_QKEY), | ||
866 | [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | | ||
867 | IB_QP_QKEY), | ||
868 | }; | ||
869 | |||
870 | int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, | 851 | int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, |
871 | struct ib_udata *udata) | 852 | struct ib_udata *udata) |
872 | { | 853 | { |
@@ -928,15 +909,6 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, | |||
928 | goto out; | 909 | goto out; |
929 | } | 910 | } |
930 | 911 | ||
931 | if (cur_state == IB_QPS_RESET && new_state == IB_QPS_ERR) { | ||
932 | err = __mthca_modify_qp(ibqp, &dummy_init_attr, | ||
933 | dummy_init_attr_mask[ibqp->qp_type], | ||
934 | IB_QPS_RESET, IB_QPS_INIT); | ||
935 | if (err) | ||
936 | goto out; | ||
937 | cur_state = IB_QPS_INIT; | ||
938 | } | ||
939 | |||
940 | err = __mthca_modify_qp(ibqp, attr, attr_mask, cur_state, new_state); | 912 | err = __mthca_modify_qp(ibqp, attr, attr_mask, cur_state, new_state); |
941 | 913 | ||
942 | out: | 914 | out: |
@@ -1277,10 +1249,10 @@ static int mthca_set_qp_size(struct mthca_dev *dev, struct ib_qp_cap *cap, | |||
1277 | return -EINVAL; | 1249 | return -EINVAL; |
1278 | 1250 | ||
1279 | /* | 1251 | /* |
1280 | * For MLX transport we need 2 extra S/G entries: | 1252 | * For MLX transport we need 2 extra send gather entries: |
1281 | * one for the header and one for the checksum at the end | 1253 | * one for the header and one for the checksum at the end |
1282 | */ | 1254 | */ |
1283 | if (qp->transport == MLX && cap->max_recv_sge + 2 > dev->limits.max_sg) | 1255 | if (qp->transport == MLX && cap->max_send_sge + 2 > dev->limits.max_sg) |
1284 | return -EINVAL; | 1256 | return -EINVAL; |
1285 | 1257 | ||
1286 | if (mthca_is_memfree(dev)) { | 1258 | if (mthca_is_memfree(dev)) { |
diff --git a/drivers/infiniband/hw/mthca/mthca_reset.c b/drivers/infiniband/hw/mthca/mthca_reset.c index 91934f2d9dba..acb6817f6060 100644 --- a/drivers/infiniband/hw/mthca/mthca_reset.c +++ b/drivers/infiniband/hw/mthca/mthca_reset.c | |||
@@ -28,8 +28,6 @@ | |||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
30 | * SOFTWARE. | 30 | * SOFTWARE. |
31 | * | ||
32 | * $Id: mthca_reset.c 1349 2004-12-16 21:09:43Z roland $ | ||
33 | */ | 31 | */ |
34 | 32 | ||
35 | #include <linux/init.h> | 33 | #include <linux/init.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_srq.c b/drivers/infiniband/hw/mthca/mthca_srq.c index a5ffff6e1026..4fabe62aab8a 100644 --- a/drivers/infiniband/hw/mthca/mthca_srq.c +++ b/drivers/infiniband/hw/mthca/mthca_srq.c | |||
@@ -28,8 +28,6 @@ | |||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
30 | * SOFTWARE. | 30 | * SOFTWARE. |
31 | * | ||
32 | * $Id: mthca_srq.c 3047 2005-08-10 03:59:35Z roland $ | ||
33 | */ | 31 | */ |
34 | 32 | ||
35 | #include <linux/slab.h> | 33 | #include <linux/slab.h> |
diff --git a/drivers/infiniband/hw/mthca/mthca_uar.c b/drivers/infiniband/hw/mthca/mthca_uar.c index 8b728486410d..ca5900c96fcf 100644 --- a/drivers/infiniband/hw/mthca/mthca_uar.c +++ b/drivers/infiniband/hw/mthca/mthca_uar.c | |||
@@ -28,8 +28,6 @@ | |||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
30 | * SOFTWARE. | 30 | * SOFTWARE. |
31 | * | ||
32 | * $Id$ | ||
33 | */ | 31 | */ |
34 | 32 | ||
35 | #include <asm/page.h> /* PAGE_SHIFT */ | 33 | #include <asm/page.h> /* PAGE_SHIFT */ |
diff --git a/drivers/infiniband/hw/mthca/mthca_user.h b/drivers/infiniband/hw/mthca/mthca_user.h index e1262c942db8..5fe56e810739 100644 --- a/drivers/infiniband/hw/mthca/mthca_user.h +++ b/drivers/infiniband/hw/mthca/mthca_user.h | |||
@@ -29,7 +29,6 @@ | |||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
31 | * SOFTWARE. | 31 | * SOFTWARE. |
32 | * | ||
33 | */ | 32 | */ |
34 | 33 | ||
35 | #ifndef MTHCA_USER_H | 34 | #ifndef MTHCA_USER_H |
diff --git a/drivers/infiniband/hw/mthca/mthca_wqe.h b/drivers/infiniband/hw/mthca/mthca_wqe.h index b3551a8dea1d..341a5ae881c1 100644 --- a/drivers/infiniband/hw/mthca/mthca_wqe.h +++ b/drivers/infiniband/hw/mthca/mthca_wqe.h | |||
@@ -28,8 +28,6 @@ | |||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
30 | * SOFTWARE. | 30 | * SOFTWARE. |
31 | * | ||
32 | * $Id: mthca_wqe.h 3047 2005-08-10 03:59:35Z roland $ | ||
33 | */ | 31 | */ |
34 | 32 | ||
35 | #ifndef MTHCA_WQE_H | 33 | #ifndef MTHCA_WQE_H |
diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c index a4e9269a29bd..d2884e778098 100644 --- a/drivers/infiniband/hw/nes/nes.c +++ b/drivers/infiniband/hw/nes/nes.c | |||
@@ -328,7 +328,7 @@ void nes_rem_ref(struct ib_qp *ibqp) | |||
328 | set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id); | 328 | set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id); |
329 | u64temp = (u64)nesqp->nesqp_context_pbase; | 329 | u64temp = (u64)nesqp->nesqp_context_pbase; |
330 | set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp); | 330 | set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp); |
331 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 331 | nes_post_cqp_request(nesdev, cqp_request); |
332 | } | 332 | } |
333 | } | 333 | } |
334 | 334 | ||
diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h index 61b46e9c7d2d..39bd897b40c6 100644 --- a/drivers/infiniband/hw/nes/nes.h +++ b/drivers/infiniband/hw/nes/nes.h | |||
@@ -94,9 +94,6 @@ | |||
94 | 94 | ||
95 | #define MAX_DPC_ITERATIONS 128 | 95 | #define MAX_DPC_ITERATIONS 128 |
96 | 96 | ||
97 | #define NES_CQP_REQUEST_NO_DOORBELL_RING 0 | ||
98 | #define NES_CQP_REQUEST_RING_DOORBELL 1 | ||
99 | |||
100 | #define NES_DRV_OPT_ENABLE_MPA_VER_0 0x00000001 | 97 | #define NES_DRV_OPT_ENABLE_MPA_VER_0 0x00000001 |
101 | #define NES_DRV_OPT_DISABLE_MPA_CRC 0x00000002 | 98 | #define NES_DRV_OPT_DISABLE_MPA_CRC 0x00000002 |
102 | #define NES_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004 | 99 | #define NES_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004 |
@@ -538,7 +535,11 @@ void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *); | |||
538 | void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16, u16); | 535 | void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16, u16); |
539 | void nes_read_10G_phy_reg(struct nes_device *, u8, u8, u16); | 536 | void nes_read_10G_phy_reg(struct nes_device *, u8, u8, u16); |
540 | struct nes_cqp_request *nes_get_cqp_request(struct nes_device *); | 537 | struct nes_cqp_request *nes_get_cqp_request(struct nes_device *); |
541 | void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *, int); | 538 | void nes_free_cqp_request(struct nes_device *nesdev, |
539 | struct nes_cqp_request *cqp_request); | ||
540 | void nes_put_cqp_request(struct nes_device *nesdev, | ||
541 | struct nes_cqp_request *cqp_request); | ||
542 | void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *); | ||
542 | int nes_arp_table(struct nes_device *, u32, u8 *, u32); | 543 | int nes_arp_table(struct nes_device *, u32, u8 *, u32); |
543 | void nes_mh_fix(unsigned long); | 544 | void nes_mh_fix(unsigned long); |
544 | void nes_clc(unsigned long); | 545 | void nes_clc(unsigned long); |
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c index 9a4b40fae40d..6aa531d5276d 100644 --- a/drivers/infiniband/hw/nes/nes_cm.c +++ b/drivers/infiniband/hw/nes/nes_cm.c | |||
@@ -1603,7 +1603,6 @@ static struct nes_cm_listener *mini_cm_listen(struct nes_cm_core *cm_core, | |||
1603 | return NULL; | 1603 | return NULL; |
1604 | } | 1604 | } |
1605 | 1605 | ||
1606 | memset(listener, 0, sizeof(struct nes_cm_listener)); | ||
1607 | listener->loc_addr = htonl(cm_info->loc_addr); | 1606 | listener->loc_addr = htonl(cm_info->loc_addr); |
1608 | listener->loc_port = htons(cm_info->loc_port); | 1607 | listener->loc_port = htons(cm_info->loc_port); |
1609 | listener->reused_node = 0; | 1608 | listener->reused_node = 0; |
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c index d3278f111ca7..85f26d19a32b 100644 --- a/drivers/infiniband/hw/nes/nes_hw.c +++ b/drivers/infiniband/hw/nes/nes_hw.c | |||
@@ -398,7 +398,7 @@ struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) { | |||
398 | nesadapter->base_pd = 1; | 398 | nesadapter->base_pd = 1; |
399 | 399 | ||
400 | nesadapter->device_cap_flags = | 400 | nesadapter->device_cap_flags = |
401 | IB_DEVICE_ZERO_STAG | IB_DEVICE_MEM_WINDOW; | 401 | IB_DEVICE_LOCAL_DMA_LKEY | IB_DEVICE_MEM_WINDOW; |
402 | 402 | ||
403 | nesadapter->allocated_qps = (unsigned long *)&(((unsigned char *)nesadapter) | 403 | nesadapter->allocated_qps = (unsigned long *)&(((unsigned char *)nesadapter) |
404 | [(sizeof(struct nes_adapter)+(sizeof(unsigned long)-1))&(~(sizeof(unsigned long)-1))]); | 404 | [(sizeof(struct nes_adapter)+(sizeof(unsigned long)-1))&(~(sizeof(unsigned long)-1))]); |
@@ -2710,39 +2710,11 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq) | |||
2710 | barrier(); | 2710 | barrier(); |
2711 | cqp_request->request_done = 1; | 2711 | cqp_request->request_done = 1; |
2712 | wake_up(&cqp_request->waitq); | 2712 | wake_up(&cqp_request->waitq); |
2713 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 2713 | nes_put_cqp_request(nesdev, cqp_request); |
2714 | nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n", | ||
2715 | cqp_request, | ||
2716 | le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f); | ||
2717 | if (cqp_request->dynamic) { | ||
2718 | kfree(cqp_request); | ||
2719 | } else { | ||
2720 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
2721 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
2722 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
2723 | } | ||
2724 | } | ||
2725 | } else if (cqp_request->callback) { | ||
2726 | /* Envoke the callback routine */ | ||
2727 | cqp_request->cqp_callback(nesdev, cqp_request); | ||
2728 | if (cqp_request->dynamic) { | ||
2729 | kfree(cqp_request); | ||
2730 | } else { | ||
2731 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
2732 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
2733 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
2734 | } | ||
2735 | } else { | 2714 | } else { |
2736 | nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n", | 2715 | if (cqp_request->callback) |
2737 | cqp_request, | 2716 | cqp_request->cqp_callback(nesdev, cqp_request); |
2738 | le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f); | 2717 | nes_free_cqp_request(nesdev, cqp_request); |
2739 | if (cqp_request->dynamic) { | ||
2740 | kfree(cqp_request); | ||
2741 | } else { | ||
2742 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
2743 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
2744 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
2745 | } | ||
2746 | } | 2718 | } |
2747 | } else { | 2719 | } else { |
2748 | wake_up(&nesdev->cqp.waitq); | 2720 | wake_up(&nesdev->cqp.waitq); |
@@ -3149,7 +3121,6 @@ int nes_manage_apbvt(struct nes_vnic *nesvnic, u32 accel_local_port, | |||
3149 | { | 3121 | { |
3150 | struct nes_device *nesdev = nesvnic->nesdev; | 3122 | struct nes_device *nesdev = nesvnic->nesdev; |
3151 | struct nes_hw_cqp_wqe *cqp_wqe; | 3123 | struct nes_hw_cqp_wqe *cqp_wqe; |
3152 | unsigned long flags; | ||
3153 | struct nes_cqp_request *cqp_request; | 3124 | struct nes_cqp_request *cqp_request; |
3154 | int ret = 0; | 3125 | int ret = 0; |
3155 | u16 major_code; | 3126 | u16 major_code; |
@@ -3176,7 +3147,7 @@ int nes_manage_apbvt(struct nes_vnic *nesvnic, u32 accel_local_port, | |||
3176 | nes_debug(NES_DBG_QP, "Waiting for CQP completion for APBVT.\n"); | 3147 | nes_debug(NES_DBG_QP, "Waiting for CQP completion for APBVT.\n"); |
3177 | 3148 | ||
3178 | atomic_set(&cqp_request->refcount, 2); | 3149 | atomic_set(&cqp_request->refcount, 2); |
3179 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 3150 | nes_post_cqp_request(nesdev, cqp_request); |
3180 | 3151 | ||
3181 | if (add_port == NES_MANAGE_APBVT_ADD) | 3152 | if (add_port == NES_MANAGE_APBVT_ADD) |
3182 | ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0), | 3153 | ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0), |
@@ -3184,15 +3155,9 @@ int nes_manage_apbvt(struct nes_vnic *nesvnic, u32 accel_local_port, | |||
3184 | nes_debug(NES_DBG_QP, "Completed, ret=%u, CQP Major:Minor codes = 0x%04X:0x%04X\n", | 3155 | nes_debug(NES_DBG_QP, "Completed, ret=%u, CQP Major:Minor codes = 0x%04X:0x%04X\n", |
3185 | ret, cqp_request->major_code, cqp_request->minor_code); | 3156 | ret, cqp_request->major_code, cqp_request->minor_code); |
3186 | major_code = cqp_request->major_code; | 3157 | major_code = cqp_request->major_code; |
3187 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 3158 | |
3188 | if (cqp_request->dynamic) { | 3159 | nes_put_cqp_request(nesdev, cqp_request); |
3189 | kfree(cqp_request); | 3160 | |
3190 | } else { | ||
3191 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
3192 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
3193 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
3194 | } | ||
3195 | } | ||
3196 | if (!ret) | 3161 | if (!ret) |
3197 | return -ETIME; | 3162 | return -ETIME; |
3198 | else if (major_code) | 3163 | else if (major_code) |
@@ -3252,7 +3217,7 @@ void nes_manage_arp_cache(struct net_device *netdev, unsigned char *mac_addr, | |||
3252 | nesdev->cqp.sq_head, nesdev->cqp.sq_tail); | 3217 | nesdev->cqp.sq_head, nesdev->cqp.sq_tail); |
3253 | 3218 | ||
3254 | atomic_set(&cqp_request->refcount, 1); | 3219 | atomic_set(&cqp_request->refcount, 1); |
3255 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 3220 | nes_post_cqp_request(nesdev, cqp_request); |
3256 | } | 3221 | } |
3257 | 3222 | ||
3258 | 3223 | ||
@@ -3262,7 +3227,6 @@ void nes_manage_arp_cache(struct net_device *netdev, unsigned char *mac_addr, | |||
3262 | void flush_wqes(struct nes_device *nesdev, struct nes_qp *nesqp, | 3227 | void flush_wqes(struct nes_device *nesdev, struct nes_qp *nesqp, |
3263 | u32 which_wq, u32 wait_completion) | 3228 | u32 which_wq, u32 wait_completion) |
3264 | { | 3229 | { |
3265 | unsigned long flags; | ||
3266 | struct nes_cqp_request *cqp_request; | 3230 | struct nes_cqp_request *cqp_request; |
3267 | struct nes_hw_cqp_wqe *cqp_wqe; | 3231 | struct nes_hw_cqp_wqe *cqp_wqe; |
3268 | int ret; | 3232 | int ret; |
@@ -3285,7 +3249,7 @@ void flush_wqes(struct nes_device *nesdev, struct nes_qp *nesqp, | |||
3285 | cpu_to_le32(NES_CQP_FLUSH_WQES | which_wq); | 3249 | cpu_to_le32(NES_CQP_FLUSH_WQES | which_wq); |
3286 | cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(nesqp->hwqp.qp_id); | 3250 | cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(nesqp->hwqp.qp_id); |
3287 | 3251 | ||
3288 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 3252 | nes_post_cqp_request(nesdev, cqp_request); |
3289 | 3253 | ||
3290 | if (wait_completion) { | 3254 | if (wait_completion) { |
3291 | /* Wait for CQP */ | 3255 | /* Wait for CQP */ |
@@ -3294,14 +3258,6 @@ void flush_wqes(struct nes_device *nesdev, struct nes_qp *nesqp, | |||
3294 | nes_debug(NES_DBG_QP, "Flush SQ QP WQEs completed, ret=%u," | 3258 | nes_debug(NES_DBG_QP, "Flush SQ QP WQEs completed, ret=%u," |
3295 | " CQP Major:Minor codes = 0x%04X:0x%04X\n", | 3259 | " CQP Major:Minor codes = 0x%04X:0x%04X\n", |
3296 | ret, cqp_request->major_code, cqp_request->minor_code); | 3260 | ret, cqp_request->major_code, cqp_request->minor_code); |
3297 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 3261 | nes_put_cqp_request(nesdev, cqp_request); |
3298 | if (cqp_request->dynamic) { | ||
3299 | kfree(cqp_request); | ||
3300 | } else { | ||
3301 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
3302 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
3303 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
3304 | } | ||
3305 | } | ||
3306 | } | 3262 | } |
3307 | } | 3263 | } |
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h index 745bf94f3f07..7b81e0ae0076 100644 --- a/drivers/infiniband/hw/nes/nes_hw.h +++ b/drivers/infiniband/hw/nes/nes_hw.h | |||
@@ -1172,7 +1172,7 @@ struct nes_vnic { | |||
1172 | u32 mcrq_qp_id; | 1172 | u32 mcrq_qp_id; |
1173 | struct nes_ucontext *mcrq_ucontext; | 1173 | struct nes_ucontext *mcrq_ucontext; |
1174 | struct nes_cqp_request* (*get_cqp_request)(struct nes_device *nesdev); | 1174 | struct nes_cqp_request* (*get_cqp_request)(struct nes_device *nesdev); |
1175 | void (*post_cqp_request)(struct nes_device*, struct nes_cqp_request *, int); | 1175 | void (*post_cqp_request)(struct nes_device*, struct nes_cqp_request *); |
1176 | int (*mcrq_mcast_filter)( struct nes_vnic* nesvnic, __u8* dmi_addr ); | 1176 | int (*mcrq_mcast_filter)( struct nes_vnic* nesvnic, __u8* dmi_addr ); |
1177 | struct net_device_stats netstats; | 1177 | struct net_device_stats netstats; |
1178 | /* used to put the netdev on the adapters logical port list */ | 1178 | /* used to put the netdev on the adapters logical port list */ |
diff --git a/drivers/infiniband/hw/nes/nes_utils.c b/drivers/infiniband/hw/nes/nes_utils.c index fe83d1b2b177..fb8cbd71a2ef 100644 --- a/drivers/infiniband/hw/nes/nes_utils.c +++ b/drivers/infiniband/hw/nes/nes_utils.c | |||
@@ -567,12 +567,36 @@ struct nes_cqp_request *nes_get_cqp_request(struct nes_device *nesdev) | |||
567 | return cqp_request; | 567 | return cqp_request; |
568 | } | 568 | } |
569 | 569 | ||
570 | void nes_free_cqp_request(struct nes_device *nesdev, | ||
571 | struct nes_cqp_request *cqp_request) | ||
572 | { | ||
573 | unsigned long flags; | ||
574 | |||
575 | nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n", | ||
576 | cqp_request, | ||
577 | le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f); | ||
578 | |||
579 | if (cqp_request->dynamic) { | ||
580 | kfree(cqp_request); | ||
581 | } else { | ||
582 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
583 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
584 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
585 | } | ||
586 | } | ||
587 | |||
588 | void nes_put_cqp_request(struct nes_device *nesdev, | ||
589 | struct nes_cqp_request *cqp_request) | ||
590 | { | ||
591 | if (atomic_dec_and_test(&cqp_request->refcount)) | ||
592 | nes_free_cqp_request(nesdev, cqp_request); | ||
593 | } | ||
570 | 594 | ||
571 | /** | 595 | /** |
572 | * nes_post_cqp_request | 596 | * nes_post_cqp_request |
573 | */ | 597 | */ |
574 | void nes_post_cqp_request(struct nes_device *nesdev, | 598 | void nes_post_cqp_request(struct nes_device *nesdev, |
575 | struct nes_cqp_request *cqp_request, int ring_doorbell) | 599 | struct nes_cqp_request *cqp_request) |
576 | { | 600 | { |
577 | struct nes_hw_cqp_wqe *cqp_wqe; | 601 | struct nes_hw_cqp_wqe *cqp_wqe; |
578 | unsigned long flags; | 602 | unsigned long flags; |
@@ -600,10 +624,9 @@ void nes_post_cqp_request(struct nes_device *nesdev, | |||
600 | nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size, | 624 | nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size, |
601 | cqp_request->waiting, atomic_read(&cqp_request->refcount)); | 625 | cqp_request->waiting, atomic_read(&cqp_request->refcount)); |
602 | barrier(); | 626 | barrier(); |
603 | if (ring_doorbell) { | 627 | |
604 | /* Ring doorbell (1 WQEs) */ | 628 | /* Ring doorbell (1 WQEs) */ |
605 | nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id); | 629 | nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id); |
606 | } | ||
607 | 630 | ||
608 | barrier(); | 631 | barrier(); |
609 | } else { | 632 | } else { |
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c index d617da9bd351..e3939d13484e 100644 --- a/drivers/infiniband/hw/nes/nes_verbs.c +++ b/drivers/infiniband/hw/nes/nes_verbs.c | |||
@@ -55,7 +55,6 @@ static void nes_unregister_ofa_device(struct nes_ib_device *nesibdev); | |||
55 | * nes_alloc_mw | 55 | * nes_alloc_mw |
56 | */ | 56 | */ |
57 | static struct ib_mw *nes_alloc_mw(struct ib_pd *ibpd) { | 57 | static struct ib_mw *nes_alloc_mw(struct ib_pd *ibpd) { |
58 | unsigned long flags; | ||
59 | struct nes_pd *nespd = to_nespd(ibpd); | 58 | struct nes_pd *nespd = to_nespd(ibpd); |
60 | struct nes_vnic *nesvnic = to_nesvnic(ibpd->device); | 59 | struct nes_vnic *nesvnic = to_nesvnic(ibpd->device); |
61 | struct nes_device *nesdev = nesvnic->nesdev; | 60 | struct nes_device *nesdev = nesvnic->nesdev; |
@@ -119,7 +118,7 @@ static struct ib_mw *nes_alloc_mw(struct ib_pd *ibpd) { | |||
119 | set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag); | 118 | set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag); |
120 | 119 | ||
121 | atomic_set(&cqp_request->refcount, 2); | 120 | atomic_set(&cqp_request->refcount, 2); |
122 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 121 | nes_post_cqp_request(nesdev, cqp_request); |
123 | 122 | ||
124 | /* Wait for CQP */ | 123 | /* Wait for CQP */ |
125 | ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0), | 124 | ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0), |
@@ -128,15 +127,7 @@ static struct ib_mw *nes_alloc_mw(struct ib_pd *ibpd) { | |||
128 | " CQP Major:Minor codes = 0x%04X:0x%04X.\n", | 127 | " CQP Major:Minor codes = 0x%04X:0x%04X.\n", |
129 | stag, ret, cqp_request->major_code, cqp_request->minor_code); | 128 | stag, ret, cqp_request->major_code, cqp_request->minor_code); |
130 | if ((!ret) || (cqp_request->major_code)) { | 129 | if ((!ret) || (cqp_request->major_code)) { |
131 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 130 | nes_put_cqp_request(nesdev, cqp_request); |
132 | if (cqp_request->dynamic) { | ||
133 | kfree(cqp_request); | ||
134 | } else { | ||
135 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
136 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
137 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
138 | } | ||
139 | } | ||
140 | kfree(nesmr); | 131 | kfree(nesmr); |
141 | nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index); | 132 | nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index); |
142 | if (!ret) { | 133 | if (!ret) { |
@@ -144,17 +135,8 @@ static struct ib_mw *nes_alloc_mw(struct ib_pd *ibpd) { | |||
144 | } else { | 135 | } else { |
145 | return ERR_PTR(-ENOMEM); | 136 | return ERR_PTR(-ENOMEM); |
146 | } | 137 | } |
147 | } else { | ||
148 | if (atomic_dec_and_test(&cqp_request->refcount)) { | ||
149 | if (cqp_request->dynamic) { | ||
150 | kfree(cqp_request); | ||
151 | } else { | ||
152 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
153 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
154 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
155 | } | ||
156 | } | ||
157 | } | 138 | } |
139 | nes_put_cqp_request(nesdev, cqp_request); | ||
158 | 140 | ||
159 | nesmr->ibmw.rkey = stag; | 141 | nesmr->ibmw.rkey = stag; |
160 | nesmr->mode = IWNES_MEMREG_TYPE_MW; | 142 | nesmr->mode = IWNES_MEMREG_TYPE_MW; |
@@ -178,7 +160,6 @@ static int nes_dealloc_mw(struct ib_mw *ibmw) | |||
178 | struct nes_hw_cqp_wqe *cqp_wqe; | 160 | struct nes_hw_cqp_wqe *cqp_wqe; |
179 | struct nes_cqp_request *cqp_request; | 161 | struct nes_cqp_request *cqp_request; |
180 | int err = 0; | 162 | int err = 0; |
181 | unsigned long flags; | ||
182 | int ret; | 163 | int ret; |
183 | 164 | ||
184 | /* Deallocate the window with the adapter */ | 165 | /* Deallocate the window with the adapter */ |
@@ -194,7 +175,7 @@ static int nes_dealloc_mw(struct ib_mw *ibmw) | |||
194 | set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ibmw->rkey); | 175 | set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ibmw->rkey); |
195 | 176 | ||
196 | atomic_set(&cqp_request->refcount, 2); | 177 | atomic_set(&cqp_request->refcount, 2); |
197 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 178 | nes_post_cqp_request(nesdev, cqp_request); |
198 | 179 | ||
199 | /* Wait for CQP */ | 180 | /* Wait for CQP */ |
200 | nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X to complete.\n", | 181 | nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X to complete.\n", |
@@ -204,32 +185,12 @@ static int nes_dealloc_mw(struct ib_mw *ibmw) | |||
204 | nes_debug(NES_DBG_MR, "Deallocate STag completed, wait_event_timeout ret = %u," | 185 | nes_debug(NES_DBG_MR, "Deallocate STag completed, wait_event_timeout ret = %u," |
205 | " CQP Major:Minor codes = 0x%04X:0x%04X.\n", | 186 | " CQP Major:Minor codes = 0x%04X:0x%04X.\n", |
206 | ret, cqp_request->major_code, cqp_request->minor_code); | 187 | ret, cqp_request->major_code, cqp_request->minor_code); |
207 | if ((!ret) || (cqp_request->major_code)) { | 188 | if (!ret) |
208 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 189 | err = -ETIME; |
209 | if (cqp_request->dynamic) { | 190 | else if (cqp_request->major_code) |
210 | kfree(cqp_request); | 191 | err = -EIO; |
211 | } else { | 192 | |
212 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | 193 | nes_put_cqp_request(nesdev, cqp_request); |
213 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
214 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
215 | } | ||
216 | } | ||
217 | if (!ret) { | ||
218 | err = -ETIME; | ||
219 | } else { | ||
220 | err = -EIO; | ||
221 | } | ||
222 | } else { | ||
223 | if (atomic_dec_and_test(&cqp_request->refcount)) { | ||
224 | if (cqp_request->dynamic) { | ||
225 | kfree(cqp_request); | ||
226 | } else { | ||
227 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
228 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
229 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
230 | } | ||
231 | } | ||
232 | } | ||
233 | 194 | ||
234 | nes_free_resource(nesadapter, nesadapter->allocated_mrs, | 195 | nes_free_resource(nesadapter, nesadapter->allocated_mrs, |
235 | (ibmw->rkey & 0x0fffff00) >> 8); | 196 | (ibmw->rkey & 0x0fffff00) >> 8); |
@@ -516,7 +477,7 @@ static struct ib_fmr *nes_alloc_fmr(struct ib_pd *ibpd, | |||
516 | (nesfmr->nesmr.pbls_used-1) : nesfmr->nesmr.pbls_used); | 477 | (nesfmr->nesmr.pbls_used-1) : nesfmr->nesmr.pbls_used); |
517 | 478 | ||
518 | atomic_set(&cqp_request->refcount, 2); | 479 | atomic_set(&cqp_request->refcount, 2); |
519 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 480 | nes_post_cqp_request(nesdev, cqp_request); |
520 | 481 | ||
521 | /* Wait for CQP */ | 482 | /* Wait for CQP */ |
522 | ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0), | 483 | ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0), |
@@ -526,29 +487,11 @@ static struct ib_fmr *nes_alloc_fmr(struct ib_pd *ibpd, | |||
526 | stag, ret, cqp_request->major_code, cqp_request->minor_code); | 487 | stag, ret, cqp_request->major_code, cqp_request->minor_code); |
527 | 488 | ||
528 | if ((!ret) || (cqp_request->major_code)) { | 489 | if ((!ret) || (cqp_request->major_code)) { |
529 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 490 | nes_put_cqp_request(nesdev, cqp_request); |
530 | if (cqp_request->dynamic) { | ||
531 | kfree(cqp_request); | ||
532 | } else { | ||
533 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
534 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
535 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
536 | } | ||
537 | } | ||
538 | ret = (!ret) ? -ETIME : -EIO; | 491 | ret = (!ret) ? -ETIME : -EIO; |
539 | goto failed_leaf_vpbl_pages_alloc; | 492 | goto failed_leaf_vpbl_pages_alloc; |
540 | } else { | ||
541 | if (atomic_dec_and_test(&cqp_request->refcount)) { | ||
542 | if (cqp_request->dynamic) { | ||
543 | kfree(cqp_request); | ||
544 | } else { | ||
545 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
546 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
547 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
548 | } | ||
549 | } | ||
550 | } | 493 | } |
551 | 494 | nes_put_cqp_request(nesdev, cqp_request); | |
552 | nesfmr->nesmr.ibfmr.lkey = stag; | 495 | nesfmr->nesmr.ibfmr.lkey = stag; |
553 | nesfmr->nesmr.ibfmr.rkey = stag; | 496 | nesfmr->nesmr.ibfmr.rkey = stag; |
554 | nesfmr->attr = *ibfmr_attr; | 497 | nesfmr->attr = *ibfmr_attr; |
@@ -1474,7 +1417,7 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd, | |||
1474 | set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp); | 1417 | set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp); |
1475 | 1418 | ||
1476 | atomic_set(&cqp_request->refcount, 2); | 1419 | atomic_set(&cqp_request->refcount, 2); |
1477 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 1420 | nes_post_cqp_request(nesdev, cqp_request); |
1478 | 1421 | ||
1479 | /* Wait for CQP */ | 1422 | /* Wait for CQP */ |
1480 | nes_debug(NES_DBG_QP, "Waiting for create iWARP QP%u to complete.\n", | 1423 | nes_debug(NES_DBG_QP, "Waiting for create iWARP QP%u to complete.\n", |
@@ -1487,15 +1430,7 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd, | |||
1487 | nesqp->hwqp.qp_id, ret, nesdev->cqp.sq_head, nesdev->cqp.sq_tail, | 1430 | nesqp->hwqp.qp_id, ret, nesdev->cqp.sq_head, nesdev->cqp.sq_tail, |
1488 | cqp_request->major_code, cqp_request->minor_code); | 1431 | cqp_request->major_code, cqp_request->minor_code); |
1489 | if ((!ret) || (cqp_request->major_code)) { | 1432 | if ((!ret) || (cqp_request->major_code)) { |
1490 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 1433 | nes_put_cqp_request(nesdev, cqp_request); |
1491 | if (cqp_request->dynamic) { | ||
1492 | kfree(cqp_request); | ||
1493 | } else { | ||
1494 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
1495 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
1496 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
1497 | } | ||
1498 | } | ||
1499 | nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num); | 1434 | nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num); |
1500 | nes_free_qp_mem(nesdev, nesqp,virt_wqs); | 1435 | nes_free_qp_mem(nesdev, nesqp,virt_wqs); |
1501 | kfree(nesqp->allocated_buffer); | 1436 | kfree(nesqp->allocated_buffer); |
@@ -1504,18 +1439,10 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd, | |||
1504 | } else { | 1439 | } else { |
1505 | return ERR_PTR(-EIO); | 1440 | return ERR_PTR(-EIO); |
1506 | } | 1441 | } |
1507 | } else { | ||
1508 | if (atomic_dec_and_test(&cqp_request->refcount)) { | ||
1509 | if (cqp_request->dynamic) { | ||
1510 | kfree(cqp_request); | ||
1511 | } else { | ||
1512 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
1513 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
1514 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
1515 | } | ||
1516 | } | ||
1517 | } | 1442 | } |
1518 | 1443 | ||
1444 | nes_put_cqp_request(nesdev, cqp_request); | ||
1445 | |||
1519 | if (ibpd->uobject) { | 1446 | if (ibpd->uobject) { |
1520 | uresp.mmap_sq_db_index = nesqp->mmap_sq_db_index; | 1447 | uresp.mmap_sq_db_index = nesqp->mmap_sq_db_index; |
1521 | uresp.actual_sq_size = sq_size; | 1448 | uresp.actual_sq_size = sq_size; |
@@ -1817,7 +1744,7 @@ static struct ib_cq *nes_create_cq(struct ib_device *ibdev, int entries, | |||
1817 | cpu_to_le32(((u32)((u64temp) >> 33)) & 0x7FFFFFFF); | 1744 | cpu_to_le32(((u32)((u64temp) >> 33)) & 0x7FFFFFFF); |
1818 | 1745 | ||
1819 | atomic_set(&cqp_request->refcount, 2); | 1746 | atomic_set(&cqp_request->refcount, 2); |
1820 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 1747 | nes_post_cqp_request(nesdev, cqp_request); |
1821 | 1748 | ||
1822 | /* Wait for CQP */ | 1749 | /* Wait for CQP */ |
1823 | nes_debug(NES_DBG_CQ, "Waiting for create iWARP CQ%u to complete.\n", | 1750 | nes_debug(NES_DBG_CQ, "Waiting for create iWARP CQ%u to complete.\n", |
@@ -1827,32 +1754,15 @@ static struct ib_cq *nes_create_cq(struct ib_device *ibdev, int entries, | |||
1827 | nes_debug(NES_DBG_CQ, "Create iWARP CQ%u completed, wait_event_timeout ret = %d.\n", | 1754 | nes_debug(NES_DBG_CQ, "Create iWARP CQ%u completed, wait_event_timeout ret = %d.\n", |
1828 | nescq->hw_cq.cq_number, ret); | 1755 | nescq->hw_cq.cq_number, ret); |
1829 | if ((!ret) || (cqp_request->major_code)) { | 1756 | if ((!ret) || (cqp_request->major_code)) { |
1830 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 1757 | nes_put_cqp_request(nesdev, cqp_request); |
1831 | if (cqp_request->dynamic) { | ||
1832 | kfree(cqp_request); | ||
1833 | } else { | ||
1834 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
1835 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
1836 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
1837 | } | ||
1838 | } | ||
1839 | if (!context) | 1758 | if (!context) |
1840 | pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem, | 1759 | pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem, |
1841 | nescq->hw_cq.cq_pbase); | 1760 | nescq->hw_cq.cq_pbase); |
1842 | nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num); | 1761 | nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num); |
1843 | kfree(nescq); | 1762 | kfree(nescq); |
1844 | return ERR_PTR(-EIO); | 1763 | return ERR_PTR(-EIO); |
1845 | } else { | ||
1846 | if (atomic_dec_and_test(&cqp_request->refcount)) { | ||
1847 | if (cqp_request->dynamic) { | ||
1848 | kfree(cqp_request); | ||
1849 | } else { | ||
1850 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
1851 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
1852 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
1853 | } | ||
1854 | } | ||
1855 | } | 1764 | } |
1765 | nes_put_cqp_request(nesdev, cqp_request); | ||
1856 | 1766 | ||
1857 | if (context) { | 1767 | if (context) { |
1858 | /* free the nespbl */ | 1768 | /* free the nespbl */ |
@@ -1931,7 +1841,7 @@ static int nes_destroy_cq(struct ib_cq *ib_cq) | |||
1931 | (nescq->hw_cq.cq_number | ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 16))); | 1841 | (nescq->hw_cq.cq_number | ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 16))); |
1932 | nes_free_resource(nesadapter, nesadapter->allocated_cqs, nescq->hw_cq.cq_number); | 1842 | nes_free_resource(nesadapter, nesadapter->allocated_cqs, nescq->hw_cq.cq_number); |
1933 | atomic_set(&cqp_request->refcount, 2); | 1843 | atomic_set(&cqp_request->refcount, 2); |
1934 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 1844 | nes_post_cqp_request(nesdev, cqp_request); |
1935 | 1845 | ||
1936 | /* Wait for CQP */ | 1846 | /* Wait for CQP */ |
1937 | nes_debug(NES_DBG_CQ, "Waiting for destroy iWARP CQ%u to complete.\n", | 1847 | nes_debug(NES_DBG_CQ, "Waiting for destroy iWARP CQ%u to complete.\n", |
@@ -1942,37 +1852,18 @@ static int nes_destroy_cq(struct ib_cq *ib_cq) | |||
1942 | " CQP Major:Minor codes = 0x%04X:0x%04X.\n", | 1852 | " CQP Major:Minor codes = 0x%04X:0x%04X.\n", |
1943 | nescq->hw_cq.cq_number, ret, cqp_request->major_code, | 1853 | nescq->hw_cq.cq_number, ret, cqp_request->major_code, |
1944 | cqp_request->minor_code); | 1854 | cqp_request->minor_code); |
1945 | if ((!ret) || (cqp_request->major_code)) { | 1855 | if (!ret) { |
1946 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 1856 | nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy timeout expired\n", |
1947 | if (cqp_request->dynamic) { | ||
1948 | kfree(cqp_request); | ||
1949 | } else { | ||
1950 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
1951 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
1952 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
1953 | } | ||
1954 | } | ||
1955 | if (!ret) { | ||
1956 | nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy timeout expired\n", | ||
1957 | nescq->hw_cq.cq_number); | 1857 | nescq->hw_cq.cq_number); |
1958 | ret = -ETIME; | 1858 | ret = -ETIME; |
1959 | } else { | 1859 | } else if (cqp_request->major_code) { |
1960 | nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy failed\n", | 1860 | nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy failed\n", |
1961 | nescq->hw_cq.cq_number); | 1861 | nescq->hw_cq.cq_number); |
1962 | ret = -EIO; | 1862 | ret = -EIO; |
1963 | } | ||
1964 | } else { | 1863 | } else { |
1965 | ret = 0; | 1864 | ret = 0; |
1966 | if (atomic_dec_and_test(&cqp_request->refcount)) { | ||
1967 | if (cqp_request->dynamic) { | ||
1968 | kfree(cqp_request); | ||
1969 | } else { | ||
1970 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
1971 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
1972 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
1973 | } | ||
1974 | } | ||
1975 | } | 1865 | } |
1866 | nes_put_cqp_request(nesdev, cqp_request); | ||
1976 | 1867 | ||
1977 | if (nescq->cq_mem_size) | 1868 | if (nescq->cq_mem_size) |
1978 | pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, | 1869 | pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, |
@@ -2096,7 +1987,7 @@ static int nes_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd, | |||
2096 | barrier(); | 1987 | barrier(); |
2097 | 1988 | ||
2098 | atomic_set(&cqp_request->refcount, 2); | 1989 | atomic_set(&cqp_request->refcount, 2); |
2099 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 1990 | nes_post_cqp_request(nesdev, cqp_request); |
2100 | 1991 | ||
2101 | /* Wait for CQP */ | 1992 | /* Wait for CQP */ |
2102 | ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done), | 1993 | ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done), |
@@ -2105,15 +1996,8 @@ static int nes_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd, | |||
2105 | " CQP Major:Minor codes = 0x%04X:0x%04X.\n", | 1996 | " CQP Major:Minor codes = 0x%04X:0x%04X.\n", |
2106 | stag, ret, cqp_request->major_code, cqp_request->minor_code); | 1997 | stag, ret, cqp_request->major_code, cqp_request->minor_code); |
2107 | major_code = cqp_request->major_code; | 1998 | major_code = cqp_request->major_code; |
2108 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 1999 | nes_put_cqp_request(nesdev, cqp_request); |
2109 | if (cqp_request->dynamic) { | 2000 | |
2110 | kfree(cqp_request); | ||
2111 | } else { | ||
2112 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
2113 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
2114 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
2115 | } | ||
2116 | } | ||
2117 | if (!ret) | 2001 | if (!ret) |
2118 | return -ETIME; | 2002 | return -ETIME; |
2119 | else if (major_code) | 2003 | else if (major_code) |
@@ -2754,7 +2638,7 @@ static int nes_dereg_mr(struct ib_mr *ib_mr) | |||
2754 | set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ib_mr->rkey); | 2638 | set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ib_mr->rkey); |
2755 | 2639 | ||
2756 | atomic_set(&cqp_request->refcount, 2); | 2640 | atomic_set(&cqp_request->refcount, 2); |
2757 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 2641 | nes_post_cqp_request(nesdev, cqp_request); |
2758 | 2642 | ||
2759 | /* Wait for CQP */ | 2643 | /* Wait for CQP */ |
2760 | nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X completed\n", ib_mr->rkey); | 2644 | nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X completed\n", ib_mr->rkey); |
@@ -2771,15 +2655,9 @@ static int nes_dereg_mr(struct ib_mr *ib_mr) | |||
2771 | 2655 | ||
2772 | major_code = cqp_request->major_code; | 2656 | major_code = cqp_request->major_code; |
2773 | minor_code = cqp_request->minor_code; | 2657 | minor_code = cqp_request->minor_code; |
2774 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 2658 | |
2775 | if (cqp_request->dynamic) { | 2659 | nes_put_cqp_request(nesdev, cqp_request); |
2776 | kfree(cqp_request); | 2660 | |
2777 | } else { | ||
2778 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
2779 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
2780 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
2781 | } | ||
2782 | } | ||
2783 | if (!ret) { | 2661 | if (!ret) { |
2784 | nes_debug(NES_DBG_MR, "Timeout waiting to destroy STag," | 2662 | nes_debug(NES_DBG_MR, "Timeout waiting to destroy STag," |
2785 | " ib_mr=%p, rkey = 0x%08X\n", | 2663 | " ib_mr=%p, rkey = 0x%08X\n", |
@@ -2904,7 +2782,6 @@ int nes_hw_modify_qp(struct nes_device *nesdev, struct nes_qp *nesqp, | |||
2904 | /* struct iw_cm_id *cm_id = nesqp->cm_id; */ | 2782 | /* struct iw_cm_id *cm_id = nesqp->cm_id; */ |
2905 | /* struct iw_cm_event cm_event; */ | 2783 | /* struct iw_cm_event cm_event; */ |
2906 | struct nes_cqp_request *cqp_request; | 2784 | struct nes_cqp_request *cqp_request; |
2907 | unsigned long flags; | ||
2908 | int ret; | 2785 | int ret; |
2909 | u16 major_code; | 2786 | u16 major_code; |
2910 | 2787 | ||
@@ -2932,7 +2809,7 @@ int nes_hw_modify_qp(struct nes_device *nesdev, struct nes_qp *nesqp, | |||
2932 | set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, (u64)nesqp->nesqp_context_pbase); | 2809 | set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, (u64)nesqp->nesqp_context_pbase); |
2933 | 2810 | ||
2934 | atomic_set(&cqp_request->refcount, 2); | 2811 | atomic_set(&cqp_request->refcount, 2); |
2935 | nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL); | 2812 | nes_post_cqp_request(nesdev, cqp_request); |
2936 | 2813 | ||
2937 | /* Wait for CQP */ | 2814 | /* Wait for CQP */ |
2938 | if (wait_completion) { | 2815 | if (wait_completion) { |
@@ -2950,15 +2827,9 @@ int nes_hw_modify_qp(struct nes_device *nesdev, struct nes_qp *nesqp, | |||
2950 | nesqp->hwqp.qp_id, cqp_request->major_code, | 2827 | nesqp->hwqp.qp_id, cqp_request->major_code, |
2951 | cqp_request->minor_code, next_iwarp_state); | 2828 | cqp_request->minor_code, next_iwarp_state); |
2952 | } | 2829 | } |
2953 | if (atomic_dec_and_test(&cqp_request->refcount)) { | 2830 | |
2954 | if (cqp_request->dynamic) { | 2831 | nes_put_cqp_request(nesdev, cqp_request); |
2955 | kfree(cqp_request); | 2832 | |
2956 | } else { | ||
2957 | spin_lock_irqsave(&nesdev->cqp.lock, flags); | ||
2958 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); | ||
2959 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); | ||
2960 | } | ||
2961 | } | ||
2962 | if (!ret) | 2833 | if (!ret) |
2963 | return -ETIME; | 2834 | return -ETIME; |
2964 | else if (major_code) | 2835 | else if (major_code) |