aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/infiniband/hw/nes
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2008-04-29 17:02:48 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-29 17:02:48 -0400
commitf12c03722045882a50c270f6332cf2c7b16a83d2 (patch)
tree91744cede0a86272abd34fd5946a06e486abc2bc /drivers/infiniband/hw/nes
parenteeb85d0b0e312ab9a6c3476f18308409913ab369 (diff)
parent7495ab6837ea4660f5e14ad49e5bfc558d6862e7 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: RDMA/nes: Formatting cleanup RDMA/nes: Add support for SFP+ PHY RDMA/nes: Use LRO IPoIB: Copy child MTU from parent IB/mthca: Avoid changing userspace ABI to handle DMA write barrier attribute IB/mthca: Avoid recycling old FMR R_Keys too soon mlx4_core: Avoid recycling old FMR R_Keys too soon IB/ehca: Allocate event queue size depending on max number of CQs and QPs IPoIB: Use separate CQ for UD send completions IB/iser: Count FMR alignment violations per session IB/iser: Move high-volume debug output to higher debug level IB/ehca: handle negative return value from ibmebus_request_irq() properly RDMA/cxgb3: Support peer-2-peer connection setup RDMA/cxgb3: Set the max_mr_size device attribute correctly RDMA/cxgb3: Correctly serialize peer abort path mlx4_core: Add a way to set the "collapsed" CQ flag
Diffstat (limited to 'drivers/infiniband/hw/nes')
-rw-r--r--drivers/infiniband/hw/nes/Kconfig1
-rw-r--r--drivers/infiniband/hw/nes/nes.c4
-rw-r--r--drivers/infiniband/hw/nes/nes.h5
-rw-r--r--drivers/infiniband/hw/nes/nes_cm.c8
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.c371
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.h19
-rw-r--r--drivers/infiniband/hw/nes/nes_nic.c180
-rw-r--r--drivers/infiniband/hw/nes/nes_utils.c10
-rw-r--r--drivers/infiniband/hw/nes/nes_verbs.c2
9 files changed, 430 insertions, 170 deletions
diff --git a/drivers/infiniband/hw/nes/Kconfig b/drivers/infiniband/hw/nes/Kconfig
index 2aeb7ac972a9..d449eb6ec78e 100644
--- a/drivers/infiniband/hw/nes/Kconfig
+++ b/drivers/infiniband/hw/nes/Kconfig
@@ -2,6 +2,7 @@ config INFINIBAND_NES
2 tristate "NetEffect RNIC Driver" 2 tristate "NetEffect RNIC Driver"
3 depends on PCI && INET && INFINIBAND 3 depends on PCI && INET && INFINIBAND
4 select LIBCRC32C 4 select LIBCRC32C
5 select INET_LRO
5 ---help--- 6 ---help---
6 This is a low-level driver for NetEffect RDMA enabled 7 This is a low-level driver for NetEffect RDMA enabled
7 Network Interface Cards (RNIC). 8 Network Interface Cards (RNIC).
diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c
index a4e9269a29bd..9f7364a9096d 100644
--- a/drivers/infiniband/hw/nes/nes.c
+++ b/drivers/infiniband/hw/nes/nes.c
@@ -91,6 +91,10 @@ unsigned int nes_debug_level = 0;
91module_param_named(debug_level, nes_debug_level, uint, 0644); 91module_param_named(debug_level, nes_debug_level, uint, 0644);
92MODULE_PARM_DESC(debug_level, "Enable debug output level"); 92MODULE_PARM_DESC(debug_level, "Enable debug output level");
93 93
94unsigned int nes_lro_max_aggr = NES_LRO_MAX_AGGR;
95module_param(nes_lro_max_aggr, int, NES_LRO_MAX_AGGR);
96MODULE_PARM_DESC(nes_mro_max_aggr, " nic LRO MAX packet aggregation");
97
94LIST_HEAD(nes_adapter_list); 98LIST_HEAD(nes_adapter_list);
95static LIST_HEAD(nes_dev_list); 99static LIST_HEAD(nes_dev_list);
96 100
diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h
index cdf2e9ad62f7..1f9f7bf73862 100644
--- a/drivers/infiniband/hw/nes/nes.h
+++ b/drivers/infiniband/hw/nes/nes.h
@@ -173,6 +173,7 @@ extern int disable_mpa_crc;
173extern unsigned int send_first; 173extern unsigned int send_first;
174extern unsigned int nes_drv_opt; 174extern unsigned int nes_drv_opt;
175extern unsigned int nes_debug_level; 175extern unsigned int nes_debug_level;
176extern unsigned int nes_lro_max_aggr;
176 177
177extern struct list_head nes_adapter_list; 178extern struct list_head nes_adapter_list;
178 179
@@ -535,8 +536,8 @@ int nes_register_ofa_device(struct nes_ib_device *);
535int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *); 536int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *);
536void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16); 537void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16);
537void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *); 538void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *);
538void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16); 539void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16, u16);
539void nes_read_10G_phy_reg(struct nes_device *, u16, u8); 540void nes_read_10G_phy_reg(struct nes_device *, u8, u8, u16);
540struct nes_cqp_request *nes_get_cqp_request(struct nes_device *); 541struct nes_cqp_request *nes_get_cqp_request(struct nes_device *);
541void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *, int); 542void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *, int);
542int nes_arp_table(struct nes_device *, u32, u8 *, u32); 543int nes_arp_table(struct nes_device *, u32, u8 *, u32);
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c
index d940fc27129a..9a4b40fae40d 100644
--- a/drivers/infiniband/hw/nes/nes_cm.c
+++ b/drivers/infiniband/hw/nes/nes_cm.c
@@ -594,7 +594,7 @@ static void nes_cm_timer_tick(unsigned long pass)
594 continue; 594 continue;
595 } 595 }
596 /* this seems like the correct place, but leave send entry unprotected */ 596 /* this seems like the correct place, but leave send entry unprotected */
597 // spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags); 597 /* spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags); */
598 atomic_inc(&send_entry->skb->users); 598 atomic_inc(&send_entry->skb->users);
599 cm_packets_retrans++; 599 cm_packets_retrans++;
600 nes_debug(NES_DBG_CM, "Retransmitting send_entry %p for node %p," 600 nes_debug(NES_DBG_CM, "Retransmitting send_entry %p for node %p,"
@@ -1335,7 +1335,7 @@ static int process_packet(struct nes_cm_node *cm_node, struct sk_buff *skb,
1335 cm_node->loc_addr, cm_node->loc_port, 1335 cm_node->loc_addr, cm_node->loc_port,
1336 cm_node->rem_addr, cm_node->rem_port, 1336 cm_node->rem_addr, cm_node->rem_port,
1337 cm_node->state, atomic_read(&cm_node->ref_count)); 1337 cm_node->state, atomic_read(&cm_node->ref_count));
1338 // create event 1338 /* create event */
1339 cm_node->state = NES_CM_STATE_CLOSED; 1339 cm_node->state = NES_CM_STATE_CLOSED;
1340 1340
1341 create_event(cm_node, NES_CM_EVENT_ABORTED); 1341 create_event(cm_node, NES_CM_EVENT_ABORTED);
@@ -1669,7 +1669,7 @@ static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
1669 if (!cm_node) 1669 if (!cm_node)
1670 return NULL; 1670 return NULL;
1671 1671
1672 // set our node side to client (active) side 1672 /* set our node side to client (active) side */
1673 cm_node->tcp_cntxt.client = 1; 1673 cm_node->tcp_cntxt.client = 1;
1674 cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE; 1674 cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE;
1675 1675
@@ -1694,7 +1694,7 @@ static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
1694 loopbackremotenode->mpa_frame_size = mpa_frame_size - 1694 loopbackremotenode->mpa_frame_size = mpa_frame_size -
1695 sizeof(struct ietf_mpa_frame); 1695 sizeof(struct ietf_mpa_frame);
1696 1696
1697 // we are done handling this state, set node to a TSA state 1697 /* we are done handling this state, set node to a TSA state */
1698 cm_node->state = NES_CM_STATE_TSA; 1698 cm_node->state = NES_CM_STATE_TSA;
1699 cm_node->tcp_cntxt.rcv_nxt = loopbackremotenode->tcp_cntxt.loc_seq_num; 1699 cm_node->tcp_cntxt.rcv_nxt = loopbackremotenode->tcp_cntxt.loc_seq_num;
1700 loopbackremotenode->tcp_cntxt.rcv_nxt = cm_node->tcp_cntxt.loc_seq_num; 1700 loopbackremotenode->tcp_cntxt.rcv_nxt = cm_node->tcp_cntxt.loc_seq_num;
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c
index 08964cc7e98a..8dc70f9bad2f 100644
--- a/drivers/infiniband/hw/nes/nes_hw.c
+++ b/drivers/infiniband/hw/nes/nes_hw.c
@@ -38,6 +38,7 @@
38#include <linux/ip.h> 38#include <linux/ip.h>
39#include <linux/tcp.h> 39#include <linux/tcp.h>
40#include <linux/if_vlan.h> 40#include <linux/if_vlan.h>
41#include <linux/inet_lro.h>
41 42
42#include "nes.h" 43#include "nes.h"
43 44
@@ -832,7 +833,7 @@ static void nes_init_csr_ne020(struct nes_device *nesdev, u8 hw_rev, u8 port_cou
832 nes_write_indexed(nesdev, 0x00000900, 0x20000001); 833 nes_write_indexed(nesdev, 0x00000900, 0x20000001);
833 nes_write_indexed(nesdev, 0x000060C0, 0x0000028e); 834 nes_write_indexed(nesdev, 0x000060C0, 0x0000028e);
834 nes_write_indexed(nesdev, 0x000060C8, 0x00000020); 835 nes_write_indexed(nesdev, 0x000060C8, 0x00000020);
835 // 836
836 nes_write_indexed(nesdev, 0x000001EC, 0x7b2625a0); 837 nes_write_indexed(nesdev, 0x000001EC, 0x7b2625a0);
837 /* nes_write_indexed(nesdev, 0x000001EC, 0x5f2625a0); */ 838 /* nes_write_indexed(nesdev, 0x000001EC, 0x5f2625a0); */
838 839
@@ -1207,11 +1208,16 @@ int nes_init_phy(struct nes_device *nesdev)
1207{ 1208{
1208 struct nes_adapter *nesadapter = nesdev->nesadapter; 1209 struct nes_adapter *nesadapter = nesdev->nesadapter;
1209 u32 counter = 0; 1210 u32 counter = 0;
1211 u32 sds_common_control0;
1210 u32 mac_index = nesdev->mac_index; 1212 u32 mac_index = nesdev->mac_index;
1211 u32 tx_config; 1213 u32 tx_config = 0;
1212 u16 phy_data; 1214 u16 phy_data;
1215 u32 temp_phy_data = 0;
1216 u32 temp_phy_data2 = 0;
1217 u32 i = 0;
1213 1218
1214 if (nesadapter->OneG_Mode) { 1219 if ((nesadapter->OneG_Mode) &&
1220 (nesadapter->phy_type[mac_index] != NES_PHY_TYPE_PUMA_1G)) {
1215 nes_debug(NES_DBG_PHY, "1G PHY, mac_index = %d.\n", mac_index); 1221 nes_debug(NES_DBG_PHY, "1G PHY, mac_index = %d.\n", mac_index);
1216 if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_1G) { 1222 if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_1G) {
1217 printk(PFX "%s: Programming mdc config for 1G\n", __func__); 1223 printk(PFX "%s: Programming mdc config for 1G\n", __func__);
@@ -1223,7 +1229,7 @@ int nes_init_phy(struct nes_device *nesdev)
1223 nes_read_1G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index], &phy_data); 1229 nes_read_1G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index], &phy_data);
1224 nes_debug(NES_DBG_PHY, "Phy data from register 1 phy address %u = 0x%X.\n", 1230 nes_debug(NES_DBG_PHY, "Phy data from register 1 phy address %u = 0x%X.\n",
1225 nesadapter->phy_index[mac_index], phy_data); 1231 nesadapter->phy_index[mac_index], phy_data);
1226 nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index], 0xb000); 1232 nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index], 0xb000);
1227 1233
1228 /* Reset the PHY */ 1234 /* Reset the PHY */
1229 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], 0x8000); 1235 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], 0x8000);
@@ -1277,12 +1283,126 @@ int nes_init_phy(struct nes_device *nesdev)
1277 nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], &phy_data); 1283 nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], &phy_data);
1278 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], phy_data | 0x0300); 1284 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], phy_data | 0x0300);
1279 } else { 1285 } else {
1280 if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_IRIS) { 1286 if ((nesadapter->phy_type[mac_index] == NES_PHY_TYPE_IRIS) ||
1287 (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_ARGUS)) {
1281 /* setup 10G MDIO operation */ 1288 /* setup 10G MDIO operation */
1282 tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG); 1289 tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG);
1283 tx_config |= 0x14; 1290 tx_config |= 0x14;
1284 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config); 1291 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
1285 } 1292 }
1293 if ((nesadapter->phy_type[mac_index] == NES_PHY_TYPE_ARGUS)) {
1294 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x3, 0xd7ee);
1295
1296 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1297 mdelay(10);
1298 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x3, 0xd7ee);
1299 temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1300
1301 /*
1302 * if firmware is already running (like from a
1303 * driver un-load/load, don't do anything.
1304 */
1305 if (temp_phy_data == temp_phy_data2) {
1306 /* configure QT2505 AMCC PHY */
1307 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0x0000, 0x8000);
1308 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xc300, 0x0000);
1309 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xc302, 0x0044);
1310 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xc318, 0x0052);
1311 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xc319, 0x0008);
1312 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xc31a, 0x0098);
1313 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x3, 0x0026, 0x0E00);
1314 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x3, 0x0027, 0x0000);
1315 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x3, 0x0028, 0xA528);
1316
1317 /*
1318 * remove micro from reset; chip boots from ROM,
1319 * uploads EEPROM f/w image, uC executes f/w
1320 */
1321 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xc300, 0x0002);
1322
1323 /*
1324 * wait for heart beat to start to
1325 * know loading is done
1326 */
1327 counter = 0;
1328 do {
1329 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x3, 0xd7ee);
1330 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1331 if (counter++ > 1000) {
1332 nes_debug(NES_DBG_PHY, "AMCC PHY- breaking from heartbeat check <this is bad!!!> \n");
1333 break;
1334 }
1335 mdelay(100);
1336 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x3, 0xd7ee);
1337 temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1338 } while ((temp_phy_data2 == temp_phy_data));
1339
1340 /*
1341 * wait for tracking to start to know
1342 * f/w is good to go
1343 */
1344 counter = 0;
1345 do {
1346 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x3, 0xd7fd);
1347 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1348 if (counter++ > 1000) {
1349 nes_debug(NES_DBG_PHY, "AMCC PHY- breaking from status check <this is bad!!!> \n");
1350 break;
1351 }
1352 mdelay(1000);
1353 /*
1354 * nes_debug(NES_DBG_PHY, "AMCC PHY- phy_status not ready yet = 0x%02X\n",
1355 * temp_phy_data);
1356 */
1357 } while (((temp_phy_data & 0xff) != 0x50) && ((temp_phy_data & 0xff) != 0x70));
1358
1359 /* set LOS Control invert RXLOSB_I_PADINV */
1360 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xd003, 0x0000);
1361 /* set LOS Control to mask of RXLOSB_I */
1362 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xc314, 0x0042);
1363 /* set LED1 to input mode (LED1 and LED2 share same LED) */
1364 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xd006, 0x0007);
1365 /* set LED2 to RX link_status and activity */
1366 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xd007, 0x000A);
1367 /* set LED3 to RX link_status */
1368 nes_write_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 0x1, 0xd008, 0x0009);
1369
1370 /*
1371 * reset the res-calibration on t2
1372 * serdes; ensures it is stable after
1373 * the amcc phy is stable
1374 */
1375
1376 sds_common_control0 = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0);
1377 sds_common_control0 |= 0x1;
1378 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0);
1379
1380 /* release the res-calibration reset */
1381 sds_common_control0 &= 0xfffffffe;
1382 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0);
1383
1384 i = 0;
1385 while (((nes_read32(nesdev->regs + NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040)
1386 && (i++ < 5000)) {
1387 /* mdelay(1); */
1388 }
1389
1390 /*
1391 * wait for link train done before moving on,
1392 * or will get an interupt storm
1393 */
1394 counter = 0;
1395 do {
1396 temp_phy_data = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1397 (0x200 * (nesdev->mac_index & 1)));
1398 if (counter++ > 1000) {
1399 nes_debug(NES_DBG_PHY, "AMCC PHY- breaking from link train wait <this is bad, link didnt train!!!>\n");
1400 break;
1401 }
1402 mdelay(1);
1403 } while (((temp_phy_data & 0x0f1f0000) != 0x0f0f0000));
1404 }
1405 }
1286 } 1406 }
1287 return 0; 1407 return 0;
1288} 1408}
@@ -1375,6 +1495,25 @@ static void nes_rq_wqes_timeout(unsigned long parm)
1375} 1495}
1376 1496
1377 1497
1498static int nes_lro_get_skb_hdr(struct sk_buff *skb, void **iphdr,
1499 void **tcph, u64 *hdr_flags, void *priv)
1500{
1501 unsigned int ip_len;
1502 struct iphdr *iph;
1503 skb_reset_network_header(skb);
1504 iph = ip_hdr(skb);
1505 if (iph->protocol != IPPROTO_TCP)
1506 return -1;
1507 ip_len = ip_hdrlen(skb);
1508 skb_set_transport_header(skb, ip_len);
1509 *tcph = tcp_hdr(skb);
1510
1511 *hdr_flags = LRO_IPV4 | LRO_TCP;
1512 *iphdr = iph;
1513 return 0;
1514}
1515
1516
1378/** 1517/**
1379 * nes_init_nic_qp 1518 * nes_init_nic_qp
1380 */ 1519 */
@@ -1520,10 +1659,10 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
1520 } 1659 }
1521 1660
1522 u64temp = (u64)nesvnic->nic.sq_pbase; 1661 u64temp = (u64)nesvnic->nic.sq_pbase;
1523 nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 1662 nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
1524 nic_context->context_words[NES_NIC_CTX_SQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32)); 1663 nic_context->context_words[NES_NIC_CTX_SQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32));
1525 u64temp = (u64)nesvnic->nic.rq_pbase; 1664 u64temp = (u64)nesvnic->nic.rq_pbase;
1526 nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 1665 nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
1527 nic_context->context_words[NES_NIC_CTX_RQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32)); 1666 nic_context->context_words[NES_NIC_CTX_RQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32));
1528 1667
1529 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_CREATE_QP | 1668 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_CREATE_QP |
@@ -1575,7 +1714,7 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
1575 nic_rqe = &nesvnic->nic.rq_vbase[counter]; 1714 nic_rqe = &nesvnic->nic.rq_vbase[counter];
1576 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32(nesvnic->max_frame_size); 1715 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32(nesvnic->max_frame_size);
1577 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0; 1716 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0;
1578 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem); 1717 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem);
1579 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = cpu_to_le32((u32)((u64)pmem >> 32)); 1718 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = cpu_to_le32((u32)((u64)pmem >> 32));
1580 nesvnic->nic.rx_skb[counter] = skb; 1719 nesvnic->nic.rx_skb[counter] = skb;
1581 } 1720 }
@@ -1592,15 +1731,21 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
1592 nesvnic->rq_wqes_timer.function = nes_rq_wqes_timeout; 1731 nesvnic->rq_wqes_timer.function = nes_rq_wqes_timeout;
1593 nesvnic->rq_wqes_timer.data = (unsigned long)nesvnic; 1732 nesvnic->rq_wqes_timer.data = (unsigned long)nesvnic;
1594 nes_debug(NES_DBG_INIT, "NAPI support Enabled\n"); 1733 nes_debug(NES_DBG_INIT, "NAPI support Enabled\n");
1595
1596 if (nesdev->nesadapter->et_use_adaptive_rx_coalesce) 1734 if (nesdev->nesadapter->et_use_adaptive_rx_coalesce)
1597 { 1735 {
1598 nes_nic_init_timer(nesdev); 1736 nes_nic_init_timer(nesdev);
1599 if (netdev->mtu > 1500) 1737 if (netdev->mtu > 1500)
1600 jumbomode = 1; 1738 jumbomode = 1;
1601 nes_nic_init_timer_defaults(nesdev, jumbomode); 1739 nes_nic_init_timer_defaults(nesdev, jumbomode);
1602 } 1740 }
1603 1741 nesvnic->lro_mgr.max_aggr = NES_LRO_MAX_AGGR;
1742 nesvnic->lro_mgr.max_desc = NES_MAX_LRO_DESCRIPTORS;
1743 nesvnic->lro_mgr.lro_arr = nesvnic->lro_desc;
1744 nesvnic->lro_mgr.get_skb_header = nes_lro_get_skb_hdr;
1745 nesvnic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1746 nesvnic->lro_mgr.dev = netdev;
1747 nesvnic->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1748 nesvnic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1604 return 0; 1749 return 0;
1605} 1750}
1606 1751
@@ -1620,8 +1765,8 @@ void nes_destroy_nic_qp(struct nes_vnic *nesvnic)
1620 1765
1621 /* Free remaining NIC receive buffers */ 1766 /* Free remaining NIC receive buffers */
1622 while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) { 1767 while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) {
1623 nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail]; 1768 nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail];
1624 wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]); 1769 wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]);
1625 wqe_frag |= ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32; 1770 wqe_frag |= ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32;
1626 pci_unmap_single(nesdev->pcidev, (dma_addr_t)wqe_frag, 1771 pci_unmap_single(nesdev->pcidev, (dma_addr_t)wqe_frag,
1627 nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); 1772 nesvnic->max_frame_size, PCI_DMA_FROMDEVICE);
@@ -1704,17 +1849,17 @@ int nes_napi_isr(struct nes_device *nesdev)
1704 /* iff NIC, process here, else wait for DPC */ 1849 /* iff NIC, process here, else wait for DPC */
1705 if ((int_stat) && ((int_stat & 0x0000ff00) == int_stat)) { 1850 if ((int_stat) && ((int_stat & 0x0000ff00) == int_stat)) {
1706 nesdev->napi_isr_ran = 0; 1851 nesdev->napi_isr_ran = 0;
1707 nes_write32(nesdev->regs+NES_INT_STAT, 1852 nes_write32(nesdev->regs + NES_INT_STAT,
1708 (int_stat & 1853 (int_stat &
1709 ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3))); 1854 ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0 | NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3)));
1710 1855
1711 /* Process the CEQs */ 1856 /* Process the CEQs */
1712 nes_process_ceq(nesdev, &nesdev->nesadapter->ceq[nesdev->nic_ceq_index]); 1857 nes_process_ceq(nesdev, &nesdev->nesadapter->ceq[nesdev->nic_ceq_index]);
1713 1858
1714 if (unlikely((((nesadapter->et_rx_coalesce_usecs_irq) && 1859 if (unlikely((((nesadapter->et_rx_coalesce_usecs_irq) &&
1715 (!nesadapter->et_use_adaptive_rx_coalesce)) || 1860 (!nesadapter->et_use_adaptive_rx_coalesce)) ||
1716 ((nesadapter->et_use_adaptive_rx_coalesce) && 1861 ((nesadapter->et_use_adaptive_rx_coalesce) &&
1717 (nesdev->deepcq_count > nesadapter->et_pkt_rate_low)))) ) { 1862 (nesdev->deepcq_count > nesadapter->et_pkt_rate_low))))) {
1718 if ((nesdev->int_req & NES_INT_TIMER) == 0) { 1863 if ((nesdev->int_req & NES_INT_TIMER) == 0) {
1719 /* Enable Periodic timer interrupts */ 1864 /* Enable Periodic timer interrupts */
1720 nesdev->int_req |= NES_INT_TIMER; 1865 nesdev->int_req |= NES_INT_TIMER;
@@ -1792,12 +1937,12 @@ void nes_dpc(unsigned long param)
1792 } 1937 }
1793 1938
1794 if (int_stat) { 1939 if (int_stat) {
1795 if (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 1940 if (int_stat & ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0|
1796 NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)) { 1941 NES_INT_MAC1|NES_INT_MAC2 | NES_INT_MAC3)) {
1797 /* Ack the interrupts */ 1942 /* Ack the interrupts */
1798 nes_write32(nesdev->regs+NES_INT_STAT, 1943 nes_write32(nesdev->regs+NES_INT_STAT,
1799 (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 1944 (int_stat & ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0|
1800 NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3))); 1945 NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3)));
1801 } 1946 }
1802 1947
1803 temp_int_stat = int_stat; 1948 temp_int_stat = int_stat;
@@ -1862,8 +2007,8 @@ void nes_dpc(unsigned long param)
1862 } 2007 }
1863 } 2008 }
1864 /* Don't use the interface interrupt bit stay in loop */ 2009 /* Don't use the interface interrupt bit stay in loop */
1865 int_stat &= ~NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 2010 int_stat &= ~NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0 |
1866 NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3; 2011 NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3;
1867 } while ((int_stat != 0) && (loop_counter++ < MAX_DPC_ITERATIONS)); 2012 } while ((int_stat != 0) && (loop_counter++ < MAX_DPC_ITERATIONS));
1868 2013
1869 if (timer_ints == 1) { 2014 if (timer_ints == 1) {
@@ -1874,9 +2019,9 @@ void nes_dpc(unsigned long param)
1874 nesdev->timer_only_int_count = 0; 2019 nesdev->timer_only_int_count = 0;
1875 nesdev->int_req &= ~NES_INT_TIMER; 2020 nesdev->int_req &= ~NES_INT_TIMER;
1876 nes_write32(nesdev->regs + NES_INTF_INT_MASK, ~(nesdev->intf_int_req)); 2021 nes_write32(nesdev->regs + NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
1877 nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req); 2022 nes_write32(nesdev->regs + NES_INT_MASK, ~nesdev->int_req);
1878 } else { 2023 } else {
1879 nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req)); 2024 nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req));
1880 } 2025 }
1881 } else { 2026 } else {
1882 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce)) 2027 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
@@ -1884,7 +2029,7 @@ void nes_dpc(unsigned long param)
1884 nes_nic_init_timer(nesdev); 2029 nes_nic_init_timer(nesdev);
1885 } 2030 }
1886 nesdev->timer_only_int_count = 0; 2031 nesdev->timer_only_int_count = 0;
1887 nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req)); 2032 nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req));
1888 } 2033 }
1889 } else { 2034 } else {
1890 nesdev->timer_only_int_count = 0; 2035 nesdev->timer_only_int_count = 0;
@@ -1933,7 +2078,7 @@ static void nes_process_ceq(struct nes_device *nesdev, struct nes_hw_ceq *ceq)
1933 do { 2078 do {
1934 if (le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]) & 2079 if (le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]) &
1935 NES_CEQE_VALID) { 2080 NES_CEQE_VALID) {
1936 u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX])))<<32) | 2081 u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]))) << 32) |
1937 ((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_LOW_IDX]))); 2082 ((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_LOW_IDX])));
1938 u64temp <<= 1; 2083 u64temp <<= 1;
1939 cq = *((struct nes_hw_cq **)&u64temp); 2084 cq = *((struct nes_hw_cq **)&u64temp);
@@ -1961,7 +2106,7 @@ static void nes_process_ceq(struct nes_device *nesdev, struct nes_hw_ceq *ceq)
1961 */ 2106 */
1962static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq) 2107static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq)
1963{ 2108{
1964// u64 u64temp; 2109 /* u64 u64temp; */
1965 u32 head; 2110 u32 head;
1966 u32 aeq_size; 2111 u32 aeq_size;
1967 u32 aeqe_misc; 2112 u32 aeqe_misc;
@@ -1980,8 +2125,10 @@ static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq)
1980 if (aeqe_misc & (NES_AEQE_QP|NES_AEQE_CQ)) { 2125 if (aeqe_misc & (NES_AEQE_QP|NES_AEQE_CQ)) {
1981 if (aeqe_cq_id >= NES_FIRST_QPN) { 2126 if (aeqe_cq_id >= NES_FIRST_QPN) {
1982 /* dealing with an accelerated QP related AE */ 2127 /* dealing with an accelerated QP related AE */
1983// u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])))<<32) | 2128 /*
1984// ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]))); 2129 * u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX]))) << 32) |
2130 * ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX])));
2131 */
1985 nes_process_iwarp_aeqe(nesdev, (struct nes_hw_aeqe *)aeqe); 2132 nes_process_iwarp_aeqe(nesdev, (struct nes_hw_aeqe *)aeqe);
1986 } else { 2133 } else {
1987 /* TODO: dealing with a CQP related AE */ 2134 /* TODO: dealing with a CQP related AE */
@@ -2081,6 +2228,8 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
2081 u32 u32temp; 2228 u32 u32temp;
2082 u16 phy_data; 2229 u16 phy_data;
2083 u16 temp_phy_data; 2230 u16 temp_phy_data;
2231 u32 pcs_val = 0x0f0f0000;
2232 u32 pcs_mask = 0x0f1f0000;
2084 2233
2085 spin_lock_irqsave(&nesadapter->phy_lock, flags); 2234 spin_lock_irqsave(&nesadapter->phy_lock, flags);
2086 if (nesadapter->mac_sw_state[mac_number] != NES_MAC_SW_IDLE) { 2235 if (nesadapter->mac_sw_state[mac_number] != NES_MAC_SW_IDLE) {
@@ -2144,13 +2293,30 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
2144 nes_debug(NES_DBG_PHY, "Eth SERDES Common Status: 0=0x%08X, 1=0x%08X\n", 2293 nes_debug(NES_DBG_PHY, "Eth SERDES Common Status: 0=0x%08X, 1=0x%08X\n",
2145 nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0), 2294 nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0),
2146 nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0+0x200)); 2295 nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0+0x200));
2147 pcs_control_status = nes_read_indexed(nesdev, 2296
2148 NES_IDX_PHY_PCS_CONTROL_STATUS0 + ((mac_index&1)*0x200)); 2297 if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_PUMA_1G) {
2149 pcs_control_status = nes_read_indexed(nesdev, 2298 switch (mac_index) {
2150 NES_IDX_PHY_PCS_CONTROL_STATUS0 + ((mac_index&1)*0x200)); 2299 case 1:
2300 case 3:
2301 pcs_control_status = nes_read_indexed(nesdev,
2302 NES_IDX_PHY_PCS_CONTROL_STATUS0 + 0x200);
2303 break;
2304 default:
2305 pcs_control_status = nes_read_indexed(nesdev,
2306 NES_IDX_PHY_PCS_CONTROL_STATUS0);
2307 break;
2308 }
2309 } else {
2310 pcs_control_status = nes_read_indexed(nesdev,
2311 NES_IDX_PHY_PCS_CONTROL_STATUS0 + ((mac_index & 1) * 0x200));
2312 pcs_control_status = nes_read_indexed(nesdev,
2313 NES_IDX_PHY_PCS_CONTROL_STATUS0 + ((mac_index & 1) * 0x200));
2314 }
2315
2151 nes_debug(NES_DBG_PHY, "PCS PHY Control/Status%u: 0x%08X\n", 2316 nes_debug(NES_DBG_PHY, "PCS PHY Control/Status%u: 0x%08X\n",
2152 mac_index, pcs_control_status); 2317 mac_index, pcs_control_status);
2153 if (nesadapter->OneG_Mode) { 2318 if ((nesadapter->OneG_Mode) &&
2319 (nesadapter->phy_type[mac_index] != NES_PHY_TYPE_PUMA_1G)) {
2154 u32temp = 0x01010000; 2320 u32temp = 0x01010000;
2155 if (nesadapter->port_count > 2) { 2321 if (nesadapter->port_count > 2) {
2156 u32temp |= 0x02020000; 2322 u32temp |= 0x02020000;
@@ -2159,24 +2325,59 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
2159 phy_data = 0; 2325 phy_data = 0;
2160 nes_debug(NES_DBG_PHY, "PCS says the link is down\n"); 2326 nes_debug(NES_DBG_PHY, "PCS says the link is down\n");
2161 } 2327 }
2162 } else if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_IRIS) {
2163 nes_read_10G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index]);
2164 temp_phy_data = (u16)nes_read_indexed(nesdev,
2165 NES_IDX_MAC_MDIO_CONTROL);
2166 u32temp = 20;
2167 do {
2168 nes_read_10G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index]);
2169 phy_data = (u16)nes_read_indexed(nesdev,
2170 NES_IDX_MAC_MDIO_CONTROL);
2171 if ((phy_data == temp_phy_data) || (!(--u32temp)))
2172 break;
2173 temp_phy_data = phy_data;
2174 } while (1);
2175 nes_debug(NES_DBG_PHY, "%s: Phy data = 0x%04X, link was %s.\n",
2176 __func__, phy_data, nesadapter->mac_link_down ? "DOWN" : "UP");
2177
2178 } else { 2328 } else {
2179 phy_data = (0x0f0f0000 == (pcs_control_status & 0x0f1f0000)) ? 4 : 0; 2329 switch (nesadapter->phy_type[mac_index]) {
2330 case NES_PHY_TYPE_IRIS:
2331 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 1);
2332 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
2333 u32temp = 20;
2334 do {
2335 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 1);
2336 phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
2337 if ((phy_data == temp_phy_data) || (!(--u32temp)))
2338 break;
2339 temp_phy_data = phy_data;
2340 } while (1);
2341 nes_debug(NES_DBG_PHY, "%s: Phy data = 0x%04X, link was %s.\n",
2342 __func__, phy_data, nesadapter->mac_link_down[mac_index] ? "DOWN" : "UP");
2343 break;
2344
2345 case NES_PHY_TYPE_ARGUS:
2346 /* clear the alarms */
2347 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 4, 0x0008);
2348 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 4, 0xc001);
2349 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 4, 0xc002);
2350 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 4, 0xc005);
2351 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 4, 0xc006);
2352 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 0x9003);
2353 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 0x9004);
2354 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 0x9005);
2355 /* check link status */
2356 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 1);
2357 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
2358 u32temp = 100;
2359 do {
2360 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 1);
2361
2362 phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
2363 if ((phy_data == temp_phy_data) || (!(--u32temp)))
2364 break;
2365 temp_phy_data = phy_data;
2366 } while (1);
2367 nes_debug(NES_DBG_PHY, "%s: Phy data = 0x%04X, link was %s.\n",
2368 __func__, phy_data, nesadapter->mac_link_down ? "DOWN" : "UP");
2369 break;
2370
2371 case NES_PHY_TYPE_PUMA_1G:
2372 if (mac_index < 2)
2373 pcs_val = pcs_mask = 0x01010000;
2374 else
2375 pcs_val = pcs_mask = 0x02020000;
2376 /* fall through */
2377 default:
2378 phy_data = (pcs_val == (pcs_control_status & pcs_mask)) ? 0x4 : 0x0;
2379 break;
2380 }
2180 } 2381 }
2181 2382
2182 if (phy_data & 0x0004) { 2383 if (phy_data & 0x0004) {
@@ -2185,8 +2386,8 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
2185 nes_debug(NES_DBG_PHY, "The Link is UP!!. linkup was %d\n", 2386 nes_debug(NES_DBG_PHY, "The Link is UP!!. linkup was %d\n",
2186 nesvnic->linkup); 2387 nesvnic->linkup);
2187 if (nesvnic->linkup == 0) { 2388 if (nesvnic->linkup == 0) {
2188 printk(PFX "The Link is now up for port %u, netdev %p.\n", 2389 printk(PFX "The Link is now up for port %s, netdev %p.\n",
2189 mac_index, nesvnic->netdev); 2390 nesvnic->netdev->name, nesvnic->netdev);
2190 if (netif_queue_stopped(nesvnic->netdev)) 2391 if (netif_queue_stopped(nesvnic->netdev))
2191 netif_start_queue(nesvnic->netdev); 2392 netif_start_queue(nesvnic->netdev);
2192 nesvnic->linkup = 1; 2393 nesvnic->linkup = 1;
@@ -2199,8 +2400,8 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
2199 nes_debug(NES_DBG_PHY, "The Link is Down!!. linkup was %d\n", 2400 nes_debug(NES_DBG_PHY, "The Link is Down!!. linkup was %d\n",
2200 nesvnic->linkup); 2401 nesvnic->linkup);
2201 if (nesvnic->linkup == 1) { 2402 if (nesvnic->linkup == 1) {
2202 printk(PFX "The Link is now down for port %u, netdev %p.\n", 2403 printk(PFX "The Link is now down for port %s, netdev %p.\n",
2203 mac_index, nesvnic->netdev); 2404 nesvnic->netdev->name, nesvnic->netdev);
2204 if (!(netif_queue_stopped(nesvnic->netdev))) 2405 if (!(netif_queue_stopped(nesvnic->netdev)))
2205 netif_stop_queue(nesvnic->netdev); 2406 netif_stop_queue(nesvnic->netdev);
2206 nesvnic->linkup = 0; 2407 nesvnic->linkup = 0;
@@ -2254,10 +2455,13 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2254 u16 pkt_type; 2455 u16 pkt_type;
2255 u16 rqes_processed = 0; 2456 u16 rqes_processed = 0;
2256 u8 sq_cqes = 0; 2457 u8 sq_cqes = 0;
2458 u8 nes_use_lro = 0;
2257 2459
2258 head = cq->cq_head; 2460 head = cq->cq_head;
2259 cq_size = cq->cq_size; 2461 cq_size = cq->cq_size;
2260 cq->cqes_pending = 1; 2462 cq->cqes_pending = 1;
2463 if (nesvnic->netdev->features & NETIF_F_LRO)
2464 nes_use_lro = 1;
2261 do { 2465 do {
2262 if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_NIC_CQE_MISC_IDX]) & 2466 if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_NIC_CQE_MISC_IDX]) &
2263 NES_NIC_CQE_VALID) { 2467 NES_NIC_CQE_VALID) {
@@ -2272,8 +2476,10 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2272 /* bump past the vlan tag */ 2476 /* bump past the vlan tag */
2273 wqe_fragment_length++; 2477 wqe_fragment_length++;
2274 if (le16_to_cpu(wqe_fragment_length[wqe_fragment_index]) != 0) { 2478 if (le16_to_cpu(wqe_fragment_length[wqe_fragment_index]) != 0) {
2275 u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]); 2479 u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX +
2276 u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32; 2480 wqe_fragment_index * 2]);
2481 u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX +
2482 wqe_fragment_index * 2])) << 32;
2277 bus_address = (dma_addr_t)u64temp; 2483 bus_address = (dma_addr_t)u64temp;
2278 if (test_and_clear_bit(nesnic->sq_tail, nesnic->first_frag_overflow)) { 2484 if (test_and_clear_bit(nesnic->sq_tail, nesnic->first_frag_overflow)) {
2279 pci_unmap_single(nesdev->pcidev, 2485 pci_unmap_single(nesdev->pcidev,
@@ -2283,8 +2489,10 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2283 } 2489 }
2284 for (; wqe_fragment_index < 5; wqe_fragment_index++) { 2490 for (; wqe_fragment_index < 5; wqe_fragment_index++) {
2285 if (wqe_fragment_length[wqe_fragment_index]) { 2491 if (wqe_fragment_length[wqe_fragment_index]) {
2286 u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]); 2492 u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX +
2287 u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32; 2493 wqe_fragment_index * 2]);
2494 u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX
2495 + wqe_fragment_index * 2])) <<32;
2288 bus_address = (dma_addr_t)u64temp; 2496 bus_address = (dma_addr_t)u64temp;
2289 pci_unmap_page(nesdev->pcidev, 2497 pci_unmap_page(nesdev->pcidev,
2290 bus_address, 2498 bus_address,
@@ -2331,7 +2539,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2331 if (atomic_read(&nesvnic->rx_skbs_needed) > (nesvnic->nic.rq_size>>1)) { 2539 if (atomic_read(&nesvnic->rx_skbs_needed) > (nesvnic->nic.rq_size>>1)) {
2332 nes_write32(nesdev->regs+NES_CQE_ALLOC, 2540 nes_write32(nesdev->regs+NES_CQE_ALLOC,
2333 cq->cq_number | (cqe_count << 16)); 2541 cq->cq_number | (cqe_count << 16));
2334// nesadapter->tune_timer.cq_count += cqe_count; 2542 /* nesadapter->tune_timer.cq_count += cqe_count; */
2335 nesdev->currcq_count += cqe_count; 2543 nesdev->currcq_count += cqe_count;
2336 cqe_count = 0; 2544 cqe_count = 0;
2337 nes_replenish_nic_rq(nesvnic); 2545 nes_replenish_nic_rq(nesvnic);
@@ -2379,9 +2587,16 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2379 >> 16); 2587 >> 16);
2380 nes_debug(NES_DBG_CQ, "%s: Reporting stripped VLAN packet. Tag = 0x%04X\n", 2588 nes_debug(NES_DBG_CQ, "%s: Reporting stripped VLAN packet. Tag = 0x%04X\n",
2381 nesvnic->netdev->name, vlan_tag); 2589 nesvnic->netdev->name, vlan_tag);
2382 nes_vlan_rx(rx_skb, nesvnic->vlan_grp, vlan_tag); 2590 if (nes_use_lro)
2591 lro_vlan_hwaccel_receive_skb(&nesvnic->lro_mgr, rx_skb,
2592 nesvnic->vlan_grp, vlan_tag, NULL);
2593 else
2594 nes_vlan_rx(rx_skb, nesvnic->vlan_grp, vlan_tag);
2383 } else { 2595 } else {
2384 nes_netif_rx(rx_skb); 2596 if (nes_use_lro)
2597 lro_receive_skb(&nesvnic->lro_mgr, rx_skb, NULL);
2598 else
2599 nes_netif_rx(rx_skb);
2385 } 2600 }
2386 } 2601 }
2387 2602
@@ -2399,7 +2614,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2399 /* Replenish Nic CQ */ 2614 /* Replenish Nic CQ */
2400 nes_write32(nesdev->regs+NES_CQE_ALLOC, 2615 nes_write32(nesdev->regs+NES_CQE_ALLOC,
2401 cq->cq_number | (cqe_count << 16)); 2616 cq->cq_number | (cqe_count << 16));
2402// nesdev->nesadapter->tune_timer.cq_count += cqe_count; 2617 /* nesdev->nesadapter->tune_timer.cq_count += cqe_count; */
2403 nesdev->currcq_count += cqe_count; 2618 nesdev->currcq_count += cqe_count;
2404 cqe_count = 0; 2619 cqe_count = 0;
2405 } 2620 }
@@ -2413,26 +2628,27 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
2413 2628
2414 } while (1); 2629 } while (1);
2415 2630
2631 if (nes_use_lro)
2632 lro_flush_all(&nesvnic->lro_mgr);
2416 if (sq_cqes) { 2633 if (sq_cqes) {
2417 barrier(); 2634 barrier();
2418 /* restart the queue if it had been stopped */ 2635 /* restart the queue if it had been stopped */
2419 if (netif_queue_stopped(nesvnic->netdev)) 2636 if (netif_queue_stopped(nesvnic->netdev))
2420 netif_wake_queue(nesvnic->netdev); 2637 netif_wake_queue(nesvnic->netdev);
2421 } 2638 }
2422
2423 cq->cq_head = head; 2639 cq->cq_head = head;
2424 /* nes_debug(NES_DBG_CQ, "CQ%u Processed = %u cqes, new head = %u.\n", 2640 /* nes_debug(NES_DBG_CQ, "CQ%u Processed = %u cqes, new head = %u.\n",
2425 cq->cq_number, cqe_count, cq->cq_head); */ 2641 cq->cq_number, cqe_count, cq->cq_head); */
2426 cq->cqe_allocs_pending = cqe_count; 2642 cq->cqe_allocs_pending = cqe_count;
2427 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce)) 2643 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
2428 { 2644 {
2429// nesdev->nesadapter->tune_timer.cq_count += cqe_count; 2645 /* nesdev->nesadapter->tune_timer.cq_count += cqe_count; */
2430 nesdev->currcq_count += cqe_count; 2646 nesdev->currcq_count += cqe_count;
2431 nes_nic_tune_timer(nesdev); 2647 nes_nic_tune_timer(nesdev);
2432 } 2648 }
2433 if (atomic_read(&nesvnic->rx_skbs_needed)) 2649 if (atomic_read(&nesvnic->rx_skbs_needed))
2434 nes_replenish_nic_rq(nesvnic); 2650 nes_replenish_nic_rq(nesvnic);
2435 } 2651}
2436 2652
2437 2653
2438/** 2654/**
@@ -2461,7 +2677,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
2461 2677
2462 if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) { 2678 if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) {
2463 u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head]. 2679 u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head].
2464 cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX])))<<32) | 2680 cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX]))) << 32) |
2465 ((u64)(le32_to_cpu(cq->cq_vbase[head]. 2681 ((u64)(le32_to_cpu(cq->cq_vbase[head].
2466 cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]))); 2682 cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX])));
2467 cqp = *((struct nes_hw_cqp **)&u64temp); 2683 cqp = *((struct nes_hw_cqp **)&u64temp);
@@ -2478,7 +2694,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
2478 } 2694 }
2479 2695
2480 u64temp = (((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail]. 2696 u64temp = (((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail].
2481 wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX])))<<32) | 2697 wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]))) << 32) |
2482 ((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail]. 2698 ((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail].
2483 wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]))); 2699 wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX])));
2484 cqp_request = *((struct nes_cqp_request **)&u64temp); 2700 cqp_request = *((struct nes_cqp_request **)&u64temp);
@@ -2515,7 +2731,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
2515 } else { 2731 } else {
2516 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n", 2732 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
2517 cqp_request, 2733 cqp_request,
2518 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f); 2734 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f);
2519 if (cqp_request->dynamic) { 2735 if (cqp_request->dynamic) {
2520 kfree(cqp_request); 2736 kfree(cqp_request);
2521 } else { 2737 } else {
@@ -2529,7 +2745,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
2529 } 2745 }
2530 2746
2531 cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0; 2747 cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0;
2532 nes_write32(nesdev->regs+NES_CQE_ALLOC, cq->cq_number | (1 << 16)); 2748 nes_write32(nesdev->regs + NES_CQE_ALLOC, cq->cq_number | (1 << 16));
2533 if (++cqp->sq_tail >= cqp->sq_size) 2749 if (++cqp->sq_tail >= cqp->sq_size)
2534 cqp->sq_tail = 0; 2750 cqp->sq_tail = 0;
2535 2751
@@ -2598,13 +2814,13 @@ static void nes_process_iwarp_aeqe(struct nes_device *nesdev,
2598 nes_debug(NES_DBG_AEQ, "\n"); 2814 nes_debug(NES_DBG_AEQ, "\n");
2599 aeq_info = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]); 2815 aeq_info = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]);
2600 if ((NES_AEQE_INBOUND_RDMA&aeq_info) || (!(NES_AEQE_QP&aeq_info))) { 2816 if ((NES_AEQE_INBOUND_RDMA&aeq_info) || (!(NES_AEQE_QP&aeq_info))) {
2601 context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]); 2817 context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
2602 context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32; 2818 context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32;
2603 } else { 2819 } else {
2604 aeqe_context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]); 2820 aeqe_context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
2605 aeqe_context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32; 2821 aeqe_context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32;
2606 context = (unsigned long)nesadapter->qp_table[le32_to_cpu( 2822 context = (unsigned long)nesadapter->qp_table[le32_to_cpu(
2607 aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX])-NES_FIRST_QPN]; 2823 aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]) - NES_FIRST_QPN];
2608 BUG_ON(!context); 2824 BUG_ON(!context);
2609 } 2825 }
2610 2826
@@ -2617,7 +2833,6 @@ static void nes_process_iwarp_aeqe(struct nes_device *nesdev,
2617 le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe, 2833 le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe,
2618 nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]); 2834 nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]);
2619 2835
2620
2621 switch (async_event_id) { 2836 switch (async_event_id) {
2622 case NES_AEQE_AEID_LLP_FIN_RECEIVED: 2837 case NES_AEQE_AEID_LLP_FIN_RECEIVED:
2623 nesqp = *((struct nes_qp **)&context); 2838 nesqp = *((struct nes_qp **)&context);
@@ -3021,7 +3236,7 @@ void nes_manage_arp_cache(struct net_device *netdev, unsigned char *mac_addr,
3021 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_ARP_VALID); 3236 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_ARP_VALID);
3022 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX] = cpu_to_le32( 3237 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX] = cpu_to_le32(
3023 (((u32)mac_addr[2]) << 24) | (((u32)mac_addr[3]) << 16) | 3238 (((u32)mac_addr[2]) << 24) | (((u32)mac_addr[3]) << 16) |
3024 (((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]); 3239 (((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]);
3025 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_HIGH_IDX] = cpu_to_le32( 3240 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_HIGH_IDX] = cpu_to_le32(
3026 (((u32)mac_addr[0]) << 16) | (u32)mac_addr[1]); 3241 (((u32)mac_addr[0]) << 16) | (u32)mac_addr[1]);
3027 } else { 3242 } else {
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h
index 8f36e231bdf5..745bf94f3f07 100644
--- a/drivers/infiniband/hw/nes/nes_hw.h
+++ b/drivers/infiniband/hw/nes/nes_hw.h
@@ -33,8 +33,12 @@
33#ifndef __NES_HW_H 33#ifndef __NES_HW_H
34#define __NES_HW_H 34#define __NES_HW_H
35 35
36#define NES_PHY_TYPE_1G 2 36#include <linux/inet_lro.h>
37#define NES_PHY_TYPE_IRIS 3 37
38#define NES_PHY_TYPE_1G 2
39#define NES_PHY_TYPE_IRIS 3
40#define NES_PHY_TYPE_ARGUS 4
41#define NES_PHY_TYPE_PUMA_1G 5
38#define NES_PHY_TYPE_PUMA_10G 6 42#define NES_PHY_TYPE_PUMA_10G 6
39 43
40#define NES_MULTICAST_PF_MAX 8 44#define NES_MULTICAST_PF_MAX 8
@@ -965,7 +969,7 @@ struct nes_arp_entry {
965#define NES_NIC_CQ_DOWNWARD_TREND 16 969#define NES_NIC_CQ_DOWNWARD_TREND 16
966 970
967struct nes_hw_tune_timer { 971struct nes_hw_tune_timer {
968 //u16 cq_count; 972 /* u16 cq_count; */
969 u16 threshold_low; 973 u16 threshold_low;
970 u16 threshold_target; 974 u16 threshold_target;
971 u16 threshold_high; 975 u16 threshold_high;
@@ -982,8 +986,10 @@ struct nes_hw_tune_timer {
982#define NES_TIMER_INT_LIMIT 2 986#define NES_TIMER_INT_LIMIT 2
983#define NES_TIMER_INT_LIMIT_DYNAMIC 10 987#define NES_TIMER_INT_LIMIT_DYNAMIC 10
984#define NES_TIMER_ENABLE_LIMIT 4 988#define NES_TIMER_ENABLE_LIMIT 4
985#define NES_MAX_LINK_INTERRUPTS 128 989#define NES_MAX_LINK_INTERRUPTS 128
986#define NES_MAX_LINK_CHECK 200 990#define NES_MAX_LINK_CHECK 200
991#define NES_MAX_LRO_DESCRIPTORS 32
992#define NES_LRO_MAX_AGGR 64
987 993
988struct nes_adapter { 994struct nes_adapter {
989 u64 fw_ver; 995 u64 fw_ver;
@@ -1183,6 +1189,9 @@ struct nes_vnic {
1183 u8 of_device_registered; 1189 u8 of_device_registered;
1184 u8 rdma_enabled; 1190 u8 rdma_enabled;
1185 u8 rx_checksum_disabled; 1191 u8 rx_checksum_disabled;
1192 u32 lro_max_aggr;
1193 struct net_lro_mgr lro_mgr;
1194 struct net_lro_desc lro_desc[NES_MAX_LRO_DESCRIPTORS];
1186}; 1195};
1187 1196
1188struct nes_ib_device { 1197struct nes_ib_device {
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
index e5366b013c1a..1b0938c87774 100644
--- a/drivers/infiniband/hw/nes/nes_nic.c
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -185,12 +185,13 @@ static int nes_netdev_open(struct net_device *netdev)
185 nic_active |= nic_active_bit; 185 nic_active |= nic_active_bit;
186 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active); 186 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active);
187 187
188 macaddr_high = ((u16)netdev->dev_addr[0]) << 8; 188 macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
189 macaddr_high += (u16)netdev->dev_addr[1]; 189 macaddr_high += (u16)netdev->dev_addr[1];
190 macaddr_low = ((u32)netdev->dev_addr[2]) << 24; 190
191 macaddr_low += ((u32)netdev->dev_addr[3]) << 16; 191 macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
192 macaddr_low += ((u32)netdev->dev_addr[4]) << 8; 192 macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
193 macaddr_low += (u32)netdev->dev_addr[5]; 193 macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
194 macaddr_low += (u32)netdev->dev_addr[5];
194 195
195 /* Program the various MAC regs */ 196 /* Program the various MAC regs */
196 for (i = 0; i < NES_MAX_PORT_COUNT; i++) { 197 for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
@@ -451,7 +452,7 @@ static int nes_netdev_start_xmit(struct sk_buff *skb, struct net_device *netdev)
451 __le16 *wqe_fragment_length; 452 __le16 *wqe_fragment_length;
452 u32 nr_frags; 453 u32 nr_frags;
453 u32 original_first_length; 454 u32 original_first_length;
454// u64 *wqe_fragment_address; 455 /* u64 *wqe_fragment_address; */
455 /* first fragment (0) is used by copy buffer */ 456 /* first fragment (0) is used by copy buffer */
456 u16 wqe_fragment_index=1; 457 u16 wqe_fragment_index=1;
457 u16 hoffset; 458 u16 hoffset;
@@ -461,11 +462,12 @@ static int nes_netdev_start_xmit(struct sk_buff *skb, struct net_device *netdev)
461 u32 old_head; 462 u32 old_head;
462 u32 wqe_misc; 463 u32 wqe_misc;
463 464
464 /* nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u," 465 /*
465 " (%u frags), tso_size=%u\n", 466 * nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u,"
466 netdev->name, skb->len, skb_headlen(skb), 467 * " (%u frags), tso_size=%u\n",
467 skb_shinfo(skb)->nr_frags, skb_is_gso(skb)); 468 * netdev->name, skb->len, skb_headlen(skb),
468 */ 469 * skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
470 */
469 471
470 if (!netif_carrier_ok(netdev)) 472 if (!netif_carrier_ok(netdev))
471 return NETDEV_TX_OK; 473 return NETDEV_TX_OK;
@@ -795,12 +797,12 @@ static int nes_netdev_set_mac_address(struct net_device *netdev, void *p)
795 memcpy(netdev->dev_addr, mac_addr->sa_data, netdev->addr_len); 797 memcpy(netdev->dev_addr, mac_addr->sa_data, netdev->addr_len);
796 printk(PFX "%s: Address length = %d, Address = %s\n", 798 printk(PFX "%s: Address length = %d, Address = %s\n",
797 __func__, netdev->addr_len, print_mac(mac, mac_addr->sa_data)); 799 __func__, netdev->addr_len, print_mac(mac, mac_addr->sa_data));
798 macaddr_high = ((u16)netdev->dev_addr[0]) << 8; 800 macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
799 macaddr_high += (u16)netdev->dev_addr[1]; 801 macaddr_high += (u16)netdev->dev_addr[1];
800 macaddr_low = ((u32)netdev->dev_addr[2]) << 24; 802 macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
801 macaddr_low += ((u32)netdev->dev_addr[3]) << 16; 803 macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
802 macaddr_low += ((u32)netdev->dev_addr[4]) << 8; 804 macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
803 macaddr_low += (u32)netdev->dev_addr[5]; 805 macaddr_low += (u32)netdev->dev_addr[5];
804 806
805 for (i = 0; i < NES_MAX_PORT_COUNT; i++) { 807 for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
806 if (nesvnic->qp_nic_index[i] == 0xf) { 808 if (nesvnic->qp_nic_index[i] == 0xf) {
@@ -881,12 +883,12 @@ static void nes_netdev_set_multicast_list(struct net_device *netdev)
881 print_mac(mac, multicast_addr->dmi_addr), 883 print_mac(mac, multicast_addr->dmi_addr),
882 perfect_filter_register_address+(mc_index * 8), 884 perfect_filter_register_address+(mc_index * 8),
883 mc_nic_index); 885 mc_nic_index);
884 macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8; 886 macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8;
885 macaddr_high += (u16)multicast_addr->dmi_addr[1]; 887 macaddr_high += (u16)multicast_addr->dmi_addr[1];
886 macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24; 888 macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24;
887 macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16; 889 macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16;
888 macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8; 890 macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8;
889 macaddr_low += (u32)multicast_addr->dmi_addr[5]; 891 macaddr_low += (u32)multicast_addr->dmi_addr[5];
890 nes_write_indexed(nesdev, 892 nes_write_indexed(nesdev,
891 perfect_filter_register_address+(mc_index * 8), 893 perfect_filter_register_address+(mc_index * 8),
892 macaddr_low); 894 macaddr_low);
@@ -910,23 +912,23 @@ static void nes_netdev_set_multicast_list(struct net_device *netdev)
910/** 912/**
911 * nes_netdev_change_mtu 913 * nes_netdev_change_mtu
912 */ 914 */
913static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu) 915static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu)
914{ 916{
915 struct nes_vnic *nesvnic = netdev_priv(netdev); 917 struct nes_vnic *nesvnic = netdev_priv(netdev);
916 struct nes_device *nesdev = nesvnic->nesdev; 918 struct nes_device *nesdev = nesvnic->nesdev;
917 int ret = 0; 919 int ret = 0;
918 u8 jumbomode=0; 920 u8 jumbomode = 0;
919 921
920 if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu)) 922 if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu))
921 return -EINVAL; 923 return -EINVAL;
922 924
923 netdev->mtu = new_mtu; 925 netdev->mtu = new_mtu;
924 nesvnic->max_frame_size = new_mtu + VLAN_ETH_HLEN; 926 nesvnic->max_frame_size = new_mtu + VLAN_ETH_HLEN;
925 927
926 if (netdev->mtu > 1500) { 928 if (netdev->mtu > 1500) {
927 jumbomode=1; 929 jumbomode=1;
928 } 930 }
929 nes_nic_init_timer_defaults(nesdev, jumbomode); 931 nes_nic_init_timer_defaults(nesdev, jumbomode);
930 932
931 if (netif_running(netdev)) { 933 if (netif_running(netdev)) {
932 nes_netdev_stop(netdev); 934 nes_netdev_stop(netdev);
@@ -936,8 +938,7 @@ static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu)
936 return ret; 938 return ret;
937} 939}
938 940
939#define NES_ETHTOOL_STAT_COUNT 55 941static const char nes_ethtool_stringset[][ETH_GSTRING_LEN] = {
940static const char nes_ethtool_stringset[NES_ETHTOOL_STAT_COUNT][ETH_GSTRING_LEN] = {
941 "Link Change Interrupts", 942 "Link Change Interrupts",
942 "Linearized SKBs", 943 "Linearized SKBs",
943 "T/GSO Requests", 944 "T/GSO Requests",
@@ -993,8 +994,12 @@ static const char nes_ethtool_stringset[NES_ETHTOOL_STAT_COUNT][ETH_GSTRING_LEN]
993 "CQ Depth 32", 994 "CQ Depth 32",
994 "CQ Depth 128", 995 "CQ Depth 128",
995 "CQ Depth 256", 996 "CQ Depth 256",
997 "LRO aggregated",
998 "LRO flushed",
999 "LRO no_desc",
996}; 1000};
997 1001
1002#define NES_ETHTOOL_STAT_COUNT ARRAY_SIZE(nes_ethtool_stringset)
998 1003
999/** 1004/**
1000 * nes_netdev_get_rx_csum 1005 * nes_netdev_get_rx_csum
@@ -1189,6 +1194,9 @@ static void nes_netdev_get_ethtool_stats(struct net_device *netdev,
1189 target_stat_values[52] = int_mod_cq_depth_32; 1194 target_stat_values[52] = int_mod_cq_depth_32;
1190 target_stat_values[53] = int_mod_cq_depth_128; 1195 target_stat_values[53] = int_mod_cq_depth_128;
1191 target_stat_values[54] = int_mod_cq_depth_256; 1196 target_stat_values[54] = int_mod_cq_depth_256;
1197 target_stat_values[55] = nesvnic->lro_mgr.stats.aggregated;
1198 target_stat_values[56] = nesvnic->lro_mgr.stats.flushed;
1199 target_stat_values[57] = nesvnic->lro_mgr.stats.no_desc;
1192 1200
1193} 1201}
1194 1202
@@ -1219,14 +1227,14 @@ static int nes_netdev_set_coalesce(struct net_device *netdev,
1219 struct ethtool_coalesce *et_coalesce) 1227 struct ethtool_coalesce *et_coalesce)
1220{ 1228{
1221 struct nes_vnic *nesvnic = netdev_priv(netdev); 1229 struct nes_vnic *nesvnic = netdev_priv(netdev);
1222 struct nes_device *nesdev = nesvnic->nesdev; 1230 struct nes_device *nesdev = nesvnic->nesdev;
1223 struct nes_adapter *nesadapter = nesdev->nesadapter; 1231 struct nes_adapter *nesadapter = nesdev->nesadapter;
1224 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer; 1232 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
1225 unsigned long flags; 1233 unsigned long flags;
1226 1234
1227 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags); 1235 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
1228 if (et_coalesce->rx_max_coalesced_frames_low) { 1236 if (et_coalesce->rx_max_coalesced_frames_low) {
1229 shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low; 1237 shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low;
1230 } 1238 }
1231 if (et_coalesce->rx_max_coalesced_frames_irq) { 1239 if (et_coalesce->rx_max_coalesced_frames_irq) {
1232 shared_timer->threshold_target = et_coalesce->rx_max_coalesced_frames_irq; 1240 shared_timer->threshold_target = et_coalesce->rx_max_coalesced_frames_irq;
@@ -1246,14 +1254,14 @@ static int nes_netdev_set_coalesce(struct net_device *netdev,
1246 nesadapter->et_rx_coalesce_usecs_irq = et_coalesce->rx_coalesce_usecs_irq; 1254 nesadapter->et_rx_coalesce_usecs_irq = et_coalesce->rx_coalesce_usecs_irq;
1247 if (et_coalesce->use_adaptive_rx_coalesce) { 1255 if (et_coalesce->use_adaptive_rx_coalesce) {
1248 nesadapter->et_use_adaptive_rx_coalesce = 1; 1256 nesadapter->et_use_adaptive_rx_coalesce = 1;
1249 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC; 1257 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC;
1250 nesadapter->et_rx_coalesce_usecs_irq = 0; 1258 nesadapter->et_rx_coalesce_usecs_irq = 0;
1251 if (et_coalesce->pkt_rate_low) { 1259 if (et_coalesce->pkt_rate_low) {
1252 nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low; 1260 nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low;
1253 } 1261 }
1254 } else { 1262 } else {
1255 nesadapter->et_use_adaptive_rx_coalesce = 0; 1263 nesadapter->et_use_adaptive_rx_coalesce = 0;
1256 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT; 1264 nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT;
1257 if (nesadapter->et_rx_coalesce_usecs_irq) { 1265 if (nesadapter->et_rx_coalesce_usecs_irq) {
1258 nes_write32(nesdev->regs+NES_PERIODIC_CONTROL, 1266 nes_write32(nesdev->regs+NES_PERIODIC_CONTROL,
1259 0x80000000 | ((u32)(nesadapter->et_rx_coalesce_usecs_irq*8))); 1267 0x80000000 | ((u32)(nesadapter->et_rx_coalesce_usecs_irq*8)));
@@ -1270,28 +1278,28 @@ static int nes_netdev_get_coalesce(struct net_device *netdev,
1270 struct ethtool_coalesce *et_coalesce) 1278 struct ethtool_coalesce *et_coalesce)
1271{ 1279{
1272 struct nes_vnic *nesvnic = netdev_priv(netdev); 1280 struct nes_vnic *nesvnic = netdev_priv(netdev);
1273 struct nes_device *nesdev = nesvnic->nesdev; 1281 struct nes_device *nesdev = nesvnic->nesdev;
1274 struct nes_adapter *nesadapter = nesdev->nesadapter; 1282 struct nes_adapter *nesadapter = nesdev->nesadapter;
1275 struct ethtool_coalesce temp_et_coalesce; 1283 struct ethtool_coalesce temp_et_coalesce;
1276 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer; 1284 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
1277 unsigned long flags; 1285 unsigned long flags;
1278 1286
1279 memset(&temp_et_coalesce, 0, sizeof(temp_et_coalesce)); 1287 memset(&temp_et_coalesce, 0, sizeof(temp_et_coalesce));
1280 temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq; 1288 temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq;
1281 temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce; 1289 temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce;
1282 temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval; 1290 temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval;
1283 temp_et_coalesce.pkt_rate_low = nesadapter->et_pkt_rate_low; 1291 temp_et_coalesce.pkt_rate_low = nesadapter->et_pkt_rate_low;
1284 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags); 1292 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
1285 temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low; 1293 temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low;
1286 temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target; 1294 temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target;
1287 temp_et_coalesce.rx_max_coalesced_frames_high = shared_timer->threshold_high; 1295 temp_et_coalesce.rx_max_coalesced_frames_high = shared_timer->threshold_high;
1288 temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min; 1296 temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min;
1289 temp_et_coalesce.rx_coalesce_usecs_high = shared_timer->timer_in_use_max; 1297 temp_et_coalesce.rx_coalesce_usecs_high = shared_timer->timer_in_use_max;
1290 if (nesadapter->et_use_adaptive_rx_coalesce) { 1298 if (nesadapter->et_use_adaptive_rx_coalesce) {
1291 temp_et_coalesce.rx_coalesce_usecs_irq = shared_timer->timer_in_use; 1299 temp_et_coalesce.rx_coalesce_usecs_irq = shared_timer->timer_in_use;
1292 } 1300 }
1293 spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags); 1301 spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
1294 memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce)); 1302 memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce));
1295 return 0; 1303 return 0;
1296} 1304}
1297 1305
@@ -1370,30 +1378,38 @@ static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd
1370 u16 phy_data; 1378 u16 phy_data;
1371 1379
1372 et_cmd->duplex = DUPLEX_FULL; 1380 et_cmd->duplex = DUPLEX_FULL;
1373 et_cmd->port = PORT_MII; 1381 et_cmd->port = PORT_MII;
1382
1374 if (nesadapter->OneG_Mode) { 1383 if (nesadapter->OneG_Mode) {
1375 et_cmd->supported = SUPPORTED_1000baseT_Full|SUPPORTED_Autoneg;
1376 et_cmd->advertising = ADVERTISED_1000baseT_Full|ADVERTISED_Autoneg;
1377 et_cmd->speed = SPEED_1000; 1384 et_cmd->speed = SPEED_1000;
1378 nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index], 1385 if (nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_PUMA_1G) {
1379 &phy_data); 1386 et_cmd->supported = SUPPORTED_1000baseT_Full;
1380 if (phy_data&0x1000) { 1387 et_cmd->advertising = ADVERTISED_1000baseT_Full;
1381 et_cmd->autoneg = AUTONEG_ENABLE; 1388 et_cmd->autoneg = AUTONEG_DISABLE;
1389 et_cmd->transceiver = XCVR_INTERNAL;
1390 et_cmd->phy_address = nesdev->mac_index;
1382 } else { 1391 } else {
1383 et_cmd->autoneg = AUTONEG_DISABLE; 1392 et_cmd->supported = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg;
1393 et_cmd->advertising = ADVERTISED_1000baseT_Full | ADVERTISED_Autoneg;
1394 nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index], &phy_data);
1395 if (phy_data & 0x1000)
1396 et_cmd->autoneg = AUTONEG_ENABLE;
1397 else
1398 et_cmd->autoneg = AUTONEG_DISABLE;
1399 et_cmd->transceiver = XCVR_EXTERNAL;
1400 et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index];
1384 } 1401 }
1385 et_cmd->transceiver = XCVR_EXTERNAL;
1386 et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index];
1387 } else { 1402 } else {
1388 if (nesadapter->phy_type[nesvnic->logical_port] == NES_PHY_TYPE_IRIS) { 1403 if ((nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_IRIS) ||
1404 (nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_ARGUS)) {
1389 et_cmd->transceiver = XCVR_EXTERNAL; 1405 et_cmd->transceiver = XCVR_EXTERNAL;
1390 et_cmd->port = PORT_FIBRE; 1406 et_cmd->port = PORT_FIBRE;
1391 et_cmd->supported = SUPPORTED_FIBRE; 1407 et_cmd->supported = SUPPORTED_FIBRE;
1392 et_cmd->advertising = ADVERTISED_FIBRE; 1408 et_cmd->advertising = ADVERTISED_FIBRE;
1393 et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index]; 1409 et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index];
1394 } else { 1410 } else {
1395 et_cmd->transceiver = XCVR_INTERNAL; 1411 et_cmd->transceiver = XCVR_INTERNAL;
1396 et_cmd->supported = SUPPORTED_10000baseT_Full; 1412 et_cmd->supported = SUPPORTED_10000baseT_Full;
1397 et_cmd->advertising = ADVERTISED_10000baseT_Full; 1413 et_cmd->advertising = ADVERTISED_10000baseT_Full;
1398 et_cmd->phy_address = nesdev->mac_index; 1414 et_cmd->phy_address = nesdev->mac_index;
1399 } 1415 }
@@ -1416,14 +1432,15 @@ static int nes_netdev_set_settings(struct net_device *netdev, struct ethtool_cmd
1416 struct nes_adapter *nesadapter = nesdev->nesadapter; 1432 struct nes_adapter *nesadapter = nesdev->nesadapter;
1417 u16 phy_data; 1433 u16 phy_data;
1418 1434
1419 if (nesadapter->OneG_Mode) { 1435 if ((nesadapter->OneG_Mode) &&
1436 (nesadapter->phy_type[nesdev->mac_index] != NES_PHY_TYPE_PUMA_1G)) {
1420 nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index], 1437 nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index],
1421 &phy_data); 1438 &phy_data);
1422 if (et_cmd->autoneg) { 1439 if (et_cmd->autoneg) {
1423 /* Turn on Full duplex, Autoneg, and restart autonegotiation */ 1440 /* Turn on Full duplex, Autoneg, and restart autonegotiation */
1424 phy_data |= 0x1300; 1441 phy_data |= 0x1300;
1425 } else { 1442 } else {
1426 // Turn off autoneg 1443 /* Turn off autoneg */
1427 phy_data &= ~0x1000; 1444 phy_data &= ~0x1000;
1428 } 1445 }
1429 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index], 1446 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index],
@@ -1454,6 +1471,8 @@ static struct ethtool_ops nes_ethtool_ops = {
1454 .set_sg = ethtool_op_set_sg, 1471 .set_sg = ethtool_op_set_sg,
1455 .get_tso = ethtool_op_get_tso, 1472 .get_tso = ethtool_op_get_tso,
1456 .set_tso = ethtool_op_set_tso, 1473 .set_tso = ethtool_op_set_tso,
1474 .get_flags = ethtool_op_get_flags,
1475 .set_flags = ethtool_op_set_flags,
1457}; 1476};
1458 1477
1459 1478
@@ -1607,27 +1626,34 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1607 list_add_tail(&nesvnic->list, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]); 1626 list_add_tail(&nesvnic->list, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]);
1608 1627
1609 if ((nesdev->netdev_count == 0) && 1628 if ((nesdev->netdev_count == 0) &&
1610 (PCI_FUNC(nesdev->pcidev->devfn) == nesdev->mac_index)) { 1629 ((PCI_FUNC(nesdev->pcidev->devfn) == nesdev->mac_index) ||
1611 nes_debug(NES_DBG_INIT, "Setting up PHY interrupt mask. Using register index 0x%04X\n", 1630 ((nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_PUMA_1G) &&
1612 NES_IDX_PHY_PCS_CONTROL_STATUS0+(0x200*(nesvnic->logical_port&1))); 1631 (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) ||
1632 ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) {
1633 /*
1634 * nes_debug(NES_DBG_INIT, "Setting up PHY interrupt mask. Using register index 0x%04X\n",
1635 * NES_IDX_PHY_PCS_CONTROL_STATUS0 + (0x200 * (nesvnic->logical_port & 1)));
1636 */
1613 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1637 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1614 (0x200*(nesvnic->logical_port&1))); 1638 (0x200 * (nesdev->mac_index & 1)));
1615 u32temp |= 0x00200000; 1639 if (nesdev->nesadapter->phy_type[nesdev->mac_index] != NES_PHY_TYPE_PUMA_1G) {
1616 nes_write_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1640 u32temp |= 0x00200000;
1617 (0x200*(nesvnic->logical_port&1)), u32temp); 1641 nes_write_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1642 (0x200 * (nesdev->mac_index & 1)), u32temp);
1643 }
1644
1618 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1645 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1619 (0x200*(nesvnic->logical_port&1)) ); 1646 (0x200 * (nesdev->mac_index & 1)));
1647
1620 if ((u32temp&0x0f1f0000) == 0x0f0f0000) { 1648 if ((u32temp&0x0f1f0000) == 0x0f0f0000) {
1621 if (nesdev->nesadapter->phy_type[nesvnic->logical_port] == NES_PHY_TYPE_IRIS) { 1649 if (nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_IRIS) {
1622 nes_init_phy(nesdev); 1650 nes_init_phy(nesdev);
1623 nes_read_10G_phy_reg(nesdev, 1, 1651 nes_read_10G_phy_reg(nesdev, nesdev->nesadapter->phy_index[nesdev->mac_index], 1, 1);
1624 nesdev->nesadapter->phy_index[nesvnic->logical_port]);
1625 temp_phy_data = (u16)nes_read_indexed(nesdev, 1652 temp_phy_data = (u16)nes_read_indexed(nesdev,
1626 NES_IDX_MAC_MDIO_CONTROL); 1653 NES_IDX_MAC_MDIO_CONTROL);
1627 u32temp = 20; 1654 u32temp = 20;
1628 do { 1655 do {
1629 nes_read_10G_phy_reg(nesdev, 1, 1656 nes_read_10G_phy_reg(nesdev, nesdev->nesadapter->phy_index[nesdev->mac_index], 1, 1);
1630 nesdev->nesadapter->phy_index[nesvnic->logical_port]);
1631 phy_data = (u16)nes_read_indexed(nesdev, 1657 phy_data = (u16)nes_read_indexed(nesdev,
1632 NES_IDX_MAC_MDIO_CONTROL); 1658 NES_IDX_MAC_MDIO_CONTROL);
1633 if ((phy_data == temp_phy_data) || (!(--u32temp))) 1659 if ((phy_data == temp_phy_data) || (!(--u32temp)))
@@ -1644,6 +1670,14 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1644 nes_debug(NES_DBG_INIT, "The Link is UP!!.\n"); 1670 nes_debug(NES_DBG_INIT, "The Link is UP!!.\n");
1645 nesvnic->linkup = 1; 1671 nesvnic->linkup = 1;
1646 } 1672 }
1673 } else if (nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_PUMA_1G) {
1674 nes_debug(NES_DBG_INIT, "mac_index=%d, logical_port=%d, u32temp=0x%04X, PCI_FUNC=%d\n",
1675 nesdev->mac_index, nesvnic->logical_port, u32temp, PCI_FUNC(nesdev->pcidev->devfn));
1676 if (((nesdev->mac_index < 2) && ((u32temp&0x01010000) == 0x01010000)) ||
1677 ((nesdev->mac_index > 1) && ((u32temp&0x02020000) == 0x02020000))) {
1678 nes_debug(NES_DBG_INIT, "The Link is UP!!.\n");
1679 nesvnic->linkup = 1;
1680 }
1647 } 1681 }
1648 /* clear the MAC interrupt status, assumes direct logical to physical mapping */ 1682 /* clear the MAC interrupt status, assumes direct logical to physical mapping */
1649 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index)); 1683 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index));
diff --git a/drivers/infiniband/hw/nes/nes_utils.c b/drivers/infiniband/hw/nes/nes_utils.c
index c6d5631a6995..fe83d1b2b177 100644
--- a/drivers/infiniband/hw/nes/nes_utils.c
+++ b/drivers/infiniband/hw/nes/nes_utils.c
@@ -444,15 +444,13 @@ void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16
444/** 444/**
445 * nes_write_10G_phy_reg 445 * nes_write_10G_phy_reg
446 */ 446 */
447void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_reg, 447void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg,
448 u8 phy_addr, u16 data) 448 u16 data)
449{ 449{
450 u32 dev_addr;
451 u32 port_addr; 450 u32 port_addr;
452 u32 u32temp; 451 u32 u32temp;
453 u32 counter; 452 u32 counter;
454 453
455 dev_addr = 1;
456 port_addr = phy_addr; 454 port_addr = phy_addr;
457 455
458 /* set address */ 456 /* set address */
@@ -492,14 +490,12 @@ void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_reg,
492 * This routine only issues the read, the data must be read 490 * This routine only issues the read, the data must be read
493 * separately. 491 * separately.
494 */ 492 */
495void nes_read_10G_phy_reg(struct nes_device *nesdev, u16 phy_reg, u8 phy_addr) 493void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg)
496{ 494{
497 u32 dev_addr;
498 u32 port_addr; 495 u32 port_addr;
499 u32 u32temp; 496 u32 u32temp;
500 u32 counter; 497 u32 counter;
501 498
502 dev_addr = 1;
503 port_addr = phy_addr; 499 port_addr = phy_addr;
504 500
505 /* set address */ 501 /* set address */
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c
index 9ae397a0ff7e..99b3c4ae86eb 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.c
+++ b/drivers/infiniband/hw/nes/nes_verbs.c
@@ -1266,7 +1266,7 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
1266 sq_size = init_attr->cap.max_send_wr; 1266 sq_size = init_attr->cap.max_send_wr;
1267 rq_size = init_attr->cap.max_recv_wr; 1267 rq_size = init_attr->cap.max_recv_wr;
1268 1268
1269 // check if the encoded sizes are OK or not... 1269 /* check if the encoded sizes are OK or not... */
1270 sq_encoded_size = nes_get_encoded_size(&sq_size); 1270 sq_encoded_size = nes_get_encoded_size(&sq_size);
1271 rq_encoded_size = nes_get_encoded_size(&rq_size); 1271 rq_encoded_size = nes_get_encoded_size(&rq_size);
1272 1272
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-27 17:12:29 -0400