diff options
author | Goldwyn Rodrigues <rgoldwyn@suse.de> | 2011-07-07 13:20:40 -0400 |
---|---|---|
committer | Roland Dreier <roland@purestorage.com> | 2011-07-15 16:33:20 -0400 |
commit | cdb73db0b6bf7a1bcf5c788f0c8f803facb6e517 (patch) | |
tree | 3ed4a3b8eb06b63d29643920db97054b0db43051 /drivers/infiniband/hw/mthca | |
parent | 620917de59eeb934b9f8cf35cc2d95c1ac8ed0fc (diff) |
IB/mthca: Stop returning separate error and status from FW commands
Instead of having firmware command functions return an error and also
a status, leading to code like:
err = mthca_FW_COMMAND(..., &status);
if (err)
goto out;
if (status) {
err = -E...;
goto out;
}
all over the place, just handle the FW status inside the FW command
handling code (the way mlx4 does it), so we can simply write:
err = mthca_FW_COMMAND(...);
if (err)
goto out;
In addition to simplifying the source code, this also saves a healthy
chunk of text:
add/remove: 0/0 grow/shrink: 10/88 up/down: 510/-3357 (-2847)
function old new delta
static.trans_table 324 584 +260
mthca_cmd_poll 352 477 +125
mthca_cmd_wait 511 567 +56
mthca_table_put 213 240 +27
mthca_cleanup_db_tab 372 387 +15
__mthca_remove_one 314 323 +9
mthca_cleanup_user_db_tab 275 283 +8
__mthca_init_one 1738 1746 +8
mthca_cleanup 20 21 +1
mthca_MAD_IFC 1081 1082 +1
mthca_MGID_HASH 43 40 -3
mthca_MAP_ICM_AUX 23 20 -3
mthca_MAP_ICM 19 16 -3
mthca_MAP_FA 23 20 -3
mthca_READ_MGM 43 38 -5
mthca_QUERY_SRQ 43 38 -5
mthca_QUERY_QP 59 54 -5
mthca_HW2SW_SRQ 43 38 -5
mthca_HW2SW_MPT 60 55 -5
mthca_HW2SW_EQ 43 38 -5
mthca_HW2SW_CQ 43 38 -5
mthca_free_icm_table 120 114 -6
mthca_query_srq 214 206 -8
mthca_free_qp 662 654 -8
mthca_cmd 38 28 -10
mthca_alloc_db 1321 1311 -10
mthca_setup_hca 1067 1055 -12
mthca_WRITE_MTT 35 22 -13
mthca_WRITE_MGM 40 27 -13
mthca_UNMAP_ICM_AUX 36 23 -13
mthca_UNMAP_FA 36 23 -13
mthca_SYS_DIS 36 23 -13
mthca_SYNC_TPT 36 23 -13
mthca_SW2HW_SRQ 35 22 -13
mthca_SW2HW_MPT 35 22 -13
mthca_SW2HW_EQ 35 22 -13
mthca_SW2HW_CQ 35 22 -13
mthca_RUN_FW 36 23 -13
mthca_DISABLE_LAM 36 23 -13
mthca_CLOSE_IB 36 23 -13
mthca_CLOSE_HCA 38 25 -13
mthca_ARM_SRQ 39 26 -13
mthca_free_icms 178 164 -14
mthca_QUERY_DDR 389 375 -14
mthca_resize_cq 1063 1048 -15
mthca_unmap_eq_icm 123 107 -16
mthca_map_eq_icm 396 380 -16
mthca_cmd_box 90 74 -16
mthca_SET_IB 433 417 -16
mthca_RESIZE_CQ 369 353 -16
mthca_MAP_ICM_page 240 224 -16
mthca_MAP_EQ 183 167 -16
mthca_INIT_IB 473 457 -16
mthca_INIT_HCA 745 729 -16
mthca_map_user_db 816 798 -18
mthca_SYS_EN 157 139 -18
mthca_cleanup_qp_table 78 59 -19
mthca_cleanup_eq_table 168 149 -19
mthca_UNMAP_ICM 143 121 -22
mthca_modify_srq 172 149 -23
mthca_unmap_fmr 198 174 -24
mthca_query_qp 814 790 -24
mthca_query_pkey 343 319 -24
mthca_SET_ICM_SIZE 34 10 -24
mthca_QUERY_DEV_LIM 1870 1846 -24
mthca_map_cmd 1130 1105 -25
mthca_ENABLE_LAM 401 375 -26
mthca_modify_port 247 220 -27
mthca_query_device 884 850 -34
mthca_NOP 75 41 -34
mthca_table_get 287 249 -38
mthca_init_qp_table 333 293 -40
mthca_MODIFY_QP 348 308 -40
mthca_close_hca 131 89 -42
mthca_free_eq 435 390 -45
mthca_query_port 755 705 -50
mthca_free_cq 581 528 -53
mthca_alloc_icm_table 578 524 -54
mthca_multicast_attach 1041 986 -55
mthca_init_hca 326 271 -55
mthca_query_gid 487 431 -56
mthca_free_srq 524 468 -56
mthca_free_mr 168 111 -57
mthca_create_eq 1560 1501 -59
mthca_multicast_detach 790 728 -62
mthca_write_mtt 918 854 -64
mthca_register_device 1406 1342 -64
mthca_fmr_alloc 947 883 -64
mthca_mr_alloc 652 582 -70
mthca_process_mad 1242 1164 -78
mthca_dev_lim 910 830 -80
find_mgm 482 400 -82
mthca_modify_qp 3852 3753 -99
mthca_init_cq 1281 1181 -100
mthca_alloc_srq 1719 1610 -109
mthca_init_eq_table 1807 1679 -128
mthca_init_tavor 761 491 -270
mthca_init_arbel 2617 2098 -519
Signed-off-by: Goldwyn Rodrigues <rgoldwyn@suse.de>
Diffstat (limited to 'drivers/infiniband/hw/mthca')
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_cmd.c | 276 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_cmd.h | 93 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_cq.c | 15 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_eq.c | 43 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_mad.c | 15 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_main.c | 173 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_mcg.c | 101 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_memfree.c | 43 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_mr.c | 35 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_provider.c | 77 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_qp.c | 49 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_srq.c | 33 |
12 files changed, 342 insertions, 611 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c index 7bfa2a164955..3082b3b3d620 100644 --- a/drivers/infiniband/hw/mthca/mthca_cmd.c +++ b/drivers/infiniband/hw/mthca/mthca_cmd.c | |||
@@ -301,6 +301,38 @@ static int mthca_cmd_post(struct mthca_dev *dev, | |||
301 | return err; | 301 | return err; |
302 | } | 302 | } |
303 | 303 | ||
304 | |||
305 | static int mthca_status_to_errno(u8 status) | ||
306 | { | ||
307 | static const int trans_table[] = { | ||
308 | [MTHCA_CMD_STAT_INTERNAL_ERR] = -EIO, | ||
309 | [MTHCA_CMD_STAT_BAD_OP] = -EPERM, | ||
310 | [MTHCA_CMD_STAT_BAD_PARAM] = -EINVAL, | ||
311 | [MTHCA_CMD_STAT_BAD_SYS_STATE] = -ENXIO, | ||
312 | [MTHCA_CMD_STAT_BAD_RESOURCE] = -EBADF, | ||
313 | [MTHCA_CMD_STAT_RESOURCE_BUSY] = -EBUSY, | ||
314 | [MTHCA_CMD_STAT_DDR_MEM_ERR] = -ENOMEM, | ||
315 | [MTHCA_CMD_STAT_EXCEED_LIM] = -ENOMEM, | ||
316 | [MTHCA_CMD_STAT_BAD_RES_STATE] = -EBADF, | ||
317 | [MTHCA_CMD_STAT_BAD_INDEX] = -EBADF, | ||
318 | [MTHCA_CMD_STAT_BAD_NVMEM] = -EFAULT, | ||
319 | [MTHCA_CMD_STAT_BAD_QPEE_STATE] = -EINVAL, | ||
320 | [MTHCA_CMD_STAT_BAD_SEG_PARAM] = -EFAULT, | ||
321 | [MTHCA_CMD_STAT_REG_BOUND] = -EBUSY, | ||
322 | [MTHCA_CMD_STAT_LAM_NOT_PRE] = -EAGAIN, | ||
323 | [MTHCA_CMD_STAT_BAD_PKT] = -EBADMSG, | ||
324 | [MTHCA_CMD_STAT_BAD_SIZE] = -ENOMEM, | ||
325 | }; | ||
326 | |||
327 | if (status >= ARRAY_SIZE(trans_table) || | ||
328 | (status != MTHCA_CMD_STAT_OK | ||
329 | && trans_table[status] == 0)) | ||
330 | return -EINVAL; | ||
331 | |||
332 | return trans_table[status]; | ||
333 | } | ||
334 | |||
335 | |||
304 | static int mthca_cmd_poll(struct mthca_dev *dev, | 336 | static int mthca_cmd_poll(struct mthca_dev *dev, |
305 | u64 in_param, | 337 | u64 in_param, |
306 | u64 *out_param, | 338 | u64 *out_param, |
@@ -308,11 +340,11 @@ static int mthca_cmd_poll(struct mthca_dev *dev, | |||
308 | u32 in_modifier, | 340 | u32 in_modifier, |
309 | u8 op_modifier, | 341 | u8 op_modifier, |
310 | u16 op, | 342 | u16 op, |
311 | unsigned long timeout, | 343 | unsigned long timeout) |
312 | u8 *status) | ||
313 | { | 344 | { |
314 | int err = 0; | 345 | int err = 0; |
315 | unsigned long end; | 346 | unsigned long end; |
347 | u8 status; | ||
316 | 348 | ||
317 | down(&dev->cmd.poll_sem); | 349 | down(&dev->cmd.poll_sem); |
318 | 350 | ||
@@ -341,7 +373,12 @@ static int mthca_cmd_poll(struct mthca_dev *dev, | |||
341 | (u64) be32_to_cpu((__force __be32) | 373 | (u64) be32_to_cpu((__force __be32) |
342 | __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4)); | 374 | __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4)); |
343 | 375 | ||
344 | *status = be32_to_cpu((__force __be32) __raw_readl(dev->hcr + HCR_STATUS_OFFSET)) >> 24; | 376 | status = be32_to_cpu((__force __be32) __raw_readl(dev->hcr + HCR_STATUS_OFFSET)) >> 24; |
377 | if (status) { | ||
378 | mthca_dbg(dev, "Command %02x completed with status %02x\n", | ||
379 | op, status); | ||
380 | err = mthca_status_to_errno(status); | ||
381 | } | ||
345 | 382 | ||
346 | out: | 383 | out: |
347 | up(&dev->cmd.poll_sem); | 384 | up(&dev->cmd.poll_sem); |
@@ -374,8 +411,7 @@ static int mthca_cmd_wait(struct mthca_dev *dev, | |||
374 | u32 in_modifier, | 411 | u32 in_modifier, |
375 | u8 op_modifier, | 412 | u8 op_modifier, |
376 | u16 op, | 413 | u16 op, |
377 | unsigned long timeout, | 414 | unsigned long timeout) |
378 | u8 *status) | ||
379 | { | 415 | { |
380 | int err = 0; | 416 | int err = 0; |
381 | struct mthca_cmd_context *context; | 417 | struct mthca_cmd_context *context; |
@@ -407,10 +443,11 @@ static int mthca_cmd_wait(struct mthca_dev *dev, | |||
407 | if (err) | 443 | if (err) |
408 | goto out; | 444 | goto out; |
409 | 445 | ||
410 | *status = context->status; | 446 | if (context->status) { |
411 | if (*status) | ||
412 | mthca_dbg(dev, "Command %02x completed with status %02x\n", | 447 | mthca_dbg(dev, "Command %02x completed with status %02x\n", |
413 | op, *status); | 448 | op, context->status); |
449 | err = mthca_status_to_errno(context->status); | ||
450 | } | ||
414 | 451 | ||
415 | if (out_is_imm) | 452 | if (out_is_imm) |
416 | *out_param = context->out_param; | 453 | *out_param = context->out_param; |
@@ -432,17 +469,16 @@ static int mthca_cmd_box(struct mthca_dev *dev, | |||
432 | u32 in_modifier, | 469 | u32 in_modifier, |
433 | u8 op_modifier, | 470 | u8 op_modifier, |
434 | u16 op, | 471 | u16 op, |
435 | unsigned long timeout, | 472 | unsigned long timeout) |
436 | u8 *status) | ||
437 | { | 473 | { |
438 | if (dev->cmd.flags & MTHCA_CMD_USE_EVENTS) | 474 | if (dev->cmd.flags & MTHCA_CMD_USE_EVENTS) |
439 | return mthca_cmd_wait(dev, in_param, &out_param, 0, | 475 | return mthca_cmd_wait(dev, in_param, &out_param, 0, |
440 | in_modifier, op_modifier, op, | 476 | in_modifier, op_modifier, op, |
441 | timeout, status); | 477 | timeout); |
442 | else | 478 | else |
443 | return mthca_cmd_poll(dev, in_param, &out_param, 0, | 479 | return mthca_cmd_poll(dev, in_param, &out_param, 0, |
444 | in_modifier, op_modifier, op, | 480 | in_modifier, op_modifier, op, |
445 | timeout, status); | 481 | timeout); |
446 | } | 482 | } |
447 | 483 | ||
448 | /* Invoke a command with no output parameter */ | 484 | /* Invoke a command with no output parameter */ |
@@ -451,11 +487,10 @@ static int mthca_cmd(struct mthca_dev *dev, | |||
451 | u32 in_modifier, | 487 | u32 in_modifier, |
452 | u8 op_modifier, | 488 | u8 op_modifier, |
453 | u16 op, | 489 | u16 op, |
454 | unsigned long timeout, | 490 | unsigned long timeout) |
455 | u8 *status) | ||
456 | { | 491 | { |
457 | return mthca_cmd_box(dev, in_param, 0, in_modifier, | 492 | return mthca_cmd_box(dev, in_param, 0, in_modifier, |
458 | op_modifier, op, timeout, status); | 493 | op_modifier, op, timeout); |
459 | } | 494 | } |
460 | 495 | ||
461 | /* | 496 | /* |
@@ -469,17 +504,16 @@ static int mthca_cmd_imm(struct mthca_dev *dev, | |||
469 | u32 in_modifier, | 504 | u32 in_modifier, |
470 | u8 op_modifier, | 505 | u8 op_modifier, |
471 | u16 op, | 506 | u16 op, |
472 | unsigned long timeout, | 507 | unsigned long timeout) |
473 | u8 *status) | ||
474 | { | 508 | { |
475 | if (dev->cmd.flags & MTHCA_CMD_USE_EVENTS) | 509 | if (dev->cmd.flags & MTHCA_CMD_USE_EVENTS) |
476 | return mthca_cmd_wait(dev, in_param, out_param, 1, | 510 | return mthca_cmd_wait(dev, in_param, out_param, 1, |
477 | in_modifier, op_modifier, op, | 511 | in_modifier, op_modifier, op, |
478 | timeout, status); | 512 | timeout); |
479 | else | 513 | else |
480 | return mthca_cmd_poll(dev, in_param, out_param, 1, | 514 | return mthca_cmd_poll(dev, in_param, out_param, 1, |
481 | in_modifier, op_modifier, op, | 515 | in_modifier, op_modifier, op, |
482 | timeout, status); | 516 | timeout); |
483 | } | 517 | } |
484 | 518 | ||
485 | int mthca_cmd_init(struct mthca_dev *dev) | 519 | int mthca_cmd_init(struct mthca_dev *dev) |
@@ -596,14 +630,14 @@ void mthca_free_mailbox(struct mthca_dev *dev, struct mthca_mailbox *mailbox) | |||
596 | kfree(mailbox); | 630 | kfree(mailbox); |
597 | } | 631 | } |
598 | 632 | ||
599 | int mthca_SYS_EN(struct mthca_dev *dev, u8 *status) | 633 | int mthca_SYS_EN(struct mthca_dev *dev) |
600 | { | 634 | { |
601 | u64 out; | 635 | u64 out; |
602 | int ret; | 636 | int ret; |
603 | 637 | ||
604 | ret = mthca_cmd_imm(dev, 0, &out, 0, 0, CMD_SYS_EN, CMD_TIME_CLASS_D, status); | 638 | ret = mthca_cmd_imm(dev, 0, &out, 0, 0, CMD_SYS_EN, CMD_TIME_CLASS_D); |
605 | 639 | ||
606 | if (*status == MTHCA_CMD_STAT_DDR_MEM_ERR) | 640 | if (ret == -ENOMEM) |
607 | mthca_warn(dev, "SYS_EN DDR error: syn=%x, sock=%d, " | 641 | mthca_warn(dev, "SYS_EN DDR error: syn=%x, sock=%d, " |
608 | "sladdr=%d, SPD source=%s\n", | 642 | "sladdr=%d, SPD source=%s\n", |
609 | (int) (out >> 6) & 0xf, (int) (out >> 4) & 3, | 643 | (int) (out >> 6) & 0xf, (int) (out >> 4) & 3, |
@@ -612,13 +646,13 @@ int mthca_SYS_EN(struct mthca_dev *dev, u8 *status) | |||
612 | return ret; | 646 | return ret; |
613 | } | 647 | } |
614 | 648 | ||
615 | int mthca_SYS_DIS(struct mthca_dev *dev, u8 *status) | 649 | int mthca_SYS_DIS(struct mthca_dev *dev) |
616 | { | 650 | { |
617 | return mthca_cmd(dev, 0, 0, 0, CMD_SYS_DIS, CMD_TIME_CLASS_C, status); | 651 | return mthca_cmd(dev, 0, 0, 0, CMD_SYS_DIS, CMD_TIME_CLASS_C); |
618 | } | 652 | } |
619 | 653 | ||
620 | static int mthca_map_cmd(struct mthca_dev *dev, u16 op, struct mthca_icm *icm, | 654 | static int mthca_map_cmd(struct mthca_dev *dev, u16 op, struct mthca_icm *icm, |
621 | u64 virt, u8 *status) | 655 | u64 virt) |
622 | { | 656 | { |
623 | struct mthca_mailbox *mailbox; | 657 | struct mthca_mailbox *mailbox; |
624 | struct mthca_icm_iter iter; | 658 | struct mthca_icm_iter iter; |
@@ -666,8 +700,8 @@ static int mthca_map_cmd(struct mthca_dev *dev, u16 op, struct mthca_icm *icm, | |||
666 | 700 | ||
667 | if (++nent == MTHCA_MAILBOX_SIZE / 16) { | 701 | if (++nent == MTHCA_MAILBOX_SIZE / 16) { |
668 | err = mthca_cmd(dev, mailbox->dma, nent, 0, op, | 702 | err = mthca_cmd(dev, mailbox->dma, nent, 0, op, |
669 | CMD_TIME_CLASS_B, status); | 703 | CMD_TIME_CLASS_B); |
670 | if (err || *status) | 704 | if (err) |
671 | goto out; | 705 | goto out; |
672 | nent = 0; | 706 | nent = 0; |
673 | } | 707 | } |
@@ -676,7 +710,7 @@ static int mthca_map_cmd(struct mthca_dev *dev, u16 op, struct mthca_icm *icm, | |||
676 | 710 | ||
677 | if (nent) | 711 | if (nent) |
678 | err = mthca_cmd(dev, mailbox->dma, nent, 0, op, | 712 | err = mthca_cmd(dev, mailbox->dma, nent, 0, op, |
679 | CMD_TIME_CLASS_B, status); | 713 | CMD_TIME_CLASS_B); |
680 | 714 | ||
681 | switch (op) { | 715 | switch (op) { |
682 | case CMD_MAP_FA: | 716 | case CMD_MAP_FA: |
@@ -696,19 +730,19 @@ out: | |||
696 | return err; | 730 | return err; |
697 | } | 731 | } |
698 | 732 | ||
699 | int mthca_MAP_FA(struct mthca_dev *dev, struct mthca_icm *icm, u8 *status) | 733 | int mthca_MAP_FA(struct mthca_dev *dev, struct mthca_icm *icm) |
700 | { | 734 | { |
701 | return mthca_map_cmd(dev, CMD_MAP_FA, icm, -1, status); | 735 | return mthca_map_cmd(dev, CMD_MAP_FA, icm, -1); |
702 | } | 736 | } |
703 | 737 | ||
704 | int mthca_UNMAP_FA(struct mthca_dev *dev, u8 *status) | 738 | int mthca_UNMAP_FA(struct mthca_dev *dev) |
705 | { | 739 | { |
706 | return mthca_cmd(dev, 0, 0, 0, CMD_UNMAP_FA, CMD_TIME_CLASS_B, status); | 740 | return mthca_cmd(dev, 0, 0, 0, CMD_UNMAP_FA, CMD_TIME_CLASS_B); |
707 | } | 741 | } |
708 | 742 | ||
709 | int mthca_RUN_FW(struct mthca_dev *dev, u8 *status) | 743 | int mthca_RUN_FW(struct mthca_dev *dev) |
710 | { | 744 | { |
711 | return mthca_cmd(dev, 0, 0, 0, CMD_RUN_FW, CMD_TIME_CLASS_A, status); | 745 | return mthca_cmd(dev, 0, 0, 0, CMD_RUN_FW, CMD_TIME_CLASS_A); |
712 | } | 746 | } |
713 | 747 | ||
714 | static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base) | 748 | static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base) |
@@ -737,7 +771,7 @@ static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base) | |||
737 | mthca_dbg(dev, "Mapped doorbell page for posting FW commands\n"); | 771 | mthca_dbg(dev, "Mapped doorbell page for posting FW commands\n"); |
738 | } | 772 | } |
739 | 773 | ||
740 | int mthca_QUERY_FW(struct mthca_dev *dev, u8 *status) | 774 | int mthca_QUERY_FW(struct mthca_dev *dev) |
741 | { | 775 | { |
742 | struct mthca_mailbox *mailbox; | 776 | struct mthca_mailbox *mailbox; |
743 | u32 *outbox; | 777 | u32 *outbox; |
@@ -771,7 +805,7 @@ int mthca_QUERY_FW(struct mthca_dev *dev, u8 *status) | |||
771 | outbox = mailbox->buf; | 805 | outbox = mailbox->buf; |
772 | 806 | ||
773 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_FW, | 807 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_FW, |
774 | CMD_TIME_CLASS_A, status); | 808 | CMD_TIME_CLASS_A); |
775 | 809 | ||
776 | if (err) | 810 | if (err) |
777 | goto out; | 811 | goto out; |
@@ -843,7 +877,7 @@ out: | |||
843 | return err; | 877 | return err; |
844 | } | 878 | } |
845 | 879 | ||
846 | int mthca_ENABLE_LAM(struct mthca_dev *dev, u8 *status) | 880 | int mthca_ENABLE_LAM(struct mthca_dev *dev) |
847 | { | 881 | { |
848 | struct mthca_mailbox *mailbox; | 882 | struct mthca_mailbox *mailbox; |
849 | u8 info; | 883 | u8 info; |
@@ -864,14 +898,11 @@ int mthca_ENABLE_LAM(struct mthca_dev *dev, u8 *status) | |||
864 | outbox = mailbox->buf; | 898 | outbox = mailbox->buf; |
865 | 899 | ||
866 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_ENABLE_LAM, | 900 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_ENABLE_LAM, |
867 | CMD_TIME_CLASS_C, status); | 901 | CMD_TIME_CLASS_C); |
868 | 902 | ||
869 | if (err) | 903 | if (err) |
870 | goto out; | 904 | goto out; |
871 | 905 | ||
872 | if (*status == MTHCA_CMD_STAT_LAM_NOT_PRE) | ||
873 | goto out; | ||
874 | |||
875 | MTHCA_GET(dev->ddr_start, outbox, ENABLE_LAM_START_OFFSET); | 906 | MTHCA_GET(dev->ddr_start, outbox, ENABLE_LAM_START_OFFSET); |
876 | MTHCA_GET(dev->ddr_end, outbox, ENABLE_LAM_END_OFFSET); | 907 | MTHCA_GET(dev->ddr_end, outbox, ENABLE_LAM_END_OFFSET); |
877 | MTHCA_GET(info, outbox, ENABLE_LAM_INFO_OFFSET); | 908 | MTHCA_GET(info, outbox, ENABLE_LAM_INFO_OFFSET); |
@@ -896,12 +927,12 @@ out: | |||
896 | return err; | 927 | return err; |
897 | } | 928 | } |
898 | 929 | ||
899 | int mthca_DISABLE_LAM(struct mthca_dev *dev, u8 *status) | 930 | int mthca_DISABLE_LAM(struct mthca_dev *dev) |
900 | { | 931 | { |
901 | return mthca_cmd(dev, 0, 0, 0, CMD_SYS_DIS, CMD_TIME_CLASS_C, status); | 932 | return mthca_cmd(dev, 0, 0, 0, CMD_SYS_DIS, CMD_TIME_CLASS_C); |
902 | } | 933 | } |
903 | 934 | ||
904 | int mthca_QUERY_DDR(struct mthca_dev *dev, u8 *status) | 935 | int mthca_QUERY_DDR(struct mthca_dev *dev) |
905 | { | 936 | { |
906 | struct mthca_mailbox *mailbox; | 937 | struct mthca_mailbox *mailbox; |
907 | u8 info; | 938 | u8 info; |
@@ -922,7 +953,7 @@ int mthca_QUERY_DDR(struct mthca_dev *dev, u8 *status) | |||
922 | outbox = mailbox->buf; | 953 | outbox = mailbox->buf; |
923 | 954 | ||
924 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_DDR, | 955 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_DDR, |
925 | CMD_TIME_CLASS_A, status); | 956 | CMD_TIME_CLASS_A); |
926 | 957 | ||
927 | if (err) | 958 | if (err) |
928 | goto out; | 959 | goto out; |
@@ -952,7 +983,7 @@ out: | |||
952 | } | 983 | } |
953 | 984 | ||
954 | int mthca_QUERY_DEV_LIM(struct mthca_dev *dev, | 985 | int mthca_QUERY_DEV_LIM(struct mthca_dev *dev, |
955 | struct mthca_dev_lim *dev_lim, u8 *status) | 986 | struct mthca_dev_lim *dev_lim) |
956 | { | 987 | { |
957 | struct mthca_mailbox *mailbox; | 988 | struct mthca_mailbox *mailbox; |
958 | u32 *outbox; | 989 | u32 *outbox; |
@@ -1028,7 +1059,7 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev, | |||
1028 | outbox = mailbox->buf; | 1059 | outbox = mailbox->buf; |
1029 | 1060 | ||
1030 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_DEV_LIM, | 1061 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_DEV_LIM, |
1031 | CMD_TIME_CLASS_A, status); | 1062 | CMD_TIME_CLASS_A); |
1032 | 1063 | ||
1033 | if (err) | 1064 | if (err) |
1034 | goto out; | 1065 | goto out; |
@@ -1232,7 +1263,7 @@ static void get_board_id(void *vsd, char *board_id) | |||
1232 | } | 1263 | } |
1233 | 1264 | ||
1234 | int mthca_QUERY_ADAPTER(struct mthca_dev *dev, | 1265 | int mthca_QUERY_ADAPTER(struct mthca_dev *dev, |
1235 | struct mthca_adapter *adapter, u8 *status) | 1266 | struct mthca_adapter *adapter) |
1236 | { | 1267 | { |
1237 | struct mthca_mailbox *mailbox; | 1268 | struct mthca_mailbox *mailbox; |
1238 | u32 *outbox; | 1269 | u32 *outbox; |
@@ -1251,7 +1282,7 @@ int mthca_QUERY_ADAPTER(struct mthca_dev *dev, | |||
1251 | outbox = mailbox->buf; | 1282 | outbox = mailbox->buf; |
1252 | 1283 | ||
1253 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_ADAPTER, | 1284 | err = mthca_cmd_box(dev, 0, mailbox->dma, 0, 0, CMD_QUERY_ADAPTER, |
1254 | CMD_TIME_CLASS_A, status); | 1285 | CMD_TIME_CLASS_A); |
1255 | 1286 | ||
1256 | if (err) | 1287 | if (err) |
1257 | goto out; | 1288 | goto out; |
@@ -1275,8 +1306,7 @@ out: | |||
1275 | } | 1306 | } |
1276 | 1307 | ||
1277 | int mthca_INIT_HCA(struct mthca_dev *dev, | 1308 | int mthca_INIT_HCA(struct mthca_dev *dev, |
1278 | struct mthca_init_hca_param *param, | 1309 | struct mthca_init_hca_param *param) |
1279 | u8 *status) | ||
1280 | { | 1310 | { |
1281 | struct mthca_mailbox *mailbox; | 1311 | struct mthca_mailbox *mailbox; |
1282 | __be32 *inbox; | 1312 | __be32 *inbox; |
@@ -1393,7 +1423,8 @@ int mthca_INIT_HCA(struct mthca_dev *dev, | |||
1393 | MTHCA_PUT(inbox, param->uarc_base, INIT_HCA_UAR_CTX_BASE_OFFSET); | 1423 | MTHCA_PUT(inbox, param->uarc_base, INIT_HCA_UAR_CTX_BASE_OFFSET); |
1394 | } | 1424 | } |
1395 | 1425 | ||
1396 | err = mthca_cmd(dev, mailbox->dma, 0, 0, CMD_INIT_HCA, CMD_TIME_CLASS_D, status); | 1426 | err = mthca_cmd(dev, mailbox->dma, 0, 0, |
1427 | CMD_INIT_HCA, CMD_TIME_CLASS_D); | ||
1397 | 1428 | ||
1398 | mthca_free_mailbox(dev, mailbox); | 1429 | mthca_free_mailbox(dev, mailbox); |
1399 | return err; | 1430 | return err; |
@@ -1401,7 +1432,7 @@ int mthca_INIT_HCA(struct mthca_dev *dev, | |||
1401 | 1432 | ||
1402 | int mthca_INIT_IB(struct mthca_dev *dev, | 1433 | int mthca_INIT_IB(struct mthca_dev *dev, |
1403 | struct mthca_init_ib_param *param, | 1434 | struct mthca_init_ib_param *param, |
1404 | int port, u8 *status) | 1435 | int port) |
1405 | { | 1436 | { |
1406 | struct mthca_mailbox *mailbox; | 1437 | struct mthca_mailbox *mailbox; |
1407 | u32 *inbox; | 1438 | u32 *inbox; |
@@ -1445,24 +1476,24 @@ int mthca_INIT_IB(struct mthca_dev *dev, | |||
1445 | MTHCA_PUT(inbox, param->si_guid, INIT_IB_SI_GUID_OFFSET); | 1476 | MTHCA_PUT(inbox, param->si_guid, INIT_IB_SI_GUID_OFFSET); |
1446 | 1477 | ||
1447 | err = mthca_cmd(dev, mailbox->dma, port, 0, CMD_INIT_IB, | 1478 | err = mthca_cmd(dev, mailbox->dma, port, 0, CMD_INIT_IB, |
1448 | CMD_TIME_CLASS_A, status); | 1479 | CMD_TIME_CLASS_A); |
1449 | 1480 | ||
1450 | mthca_free_mailbox(dev, mailbox); | 1481 | mthca_free_mailbox(dev, mailbox); |
1451 | return err; | 1482 | return err; |
1452 | } | 1483 | } |
1453 | 1484 | ||
1454 | int mthca_CLOSE_IB(struct mthca_dev *dev, int port, u8 *status) | 1485 | int mthca_CLOSE_IB(struct mthca_dev *dev, int port) |
1455 | { | 1486 | { |
1456 | return mthca_cmd(dev, 0, port, 0, CMD_CLOSE_IB, CMD_TIME_CLASS_A, status); | 1487 | return mthca_cmd(dev, 0, port, 0, CMD_CLOSE_IB, CMD_TIME_CLASS_A); |
1457 | } | 1488 | } |
1458 | 1489 | ||
1459 | int mthca_CLOSE_HCA(struct mthca_dev *dev, int panic, u8 *status) | 1490 | int mthca_CLOSE_HCA(struct mthca_dev *dev, int panic) |
1460 | { | 1491 | { |
1461 | return mthca_cmd(dev, 0, 0, panic, CMD_CLOSE_HCA, CMD_TIME_CLASS_C, status); | 1492 | return mthca_cmd(dev, 0, 0, panic, CMD_CLOSE_HCA, CMD_TIME_CLASS_C); |
1462 | } | 1493 | } |
1463 | 1494 | ||
1464 | int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param, | 1495 | int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param, |
1465 | int port, u8 *status) | 1496 | int port) |
1466 | { | 1497 | { |
1467 | struct mthca_mailbox *mailbox; | 1498 | struct mthca_mailbox *mailbox; |
1468 | u32 *inbox; | 1499 | u32 *inbox; |
@@ -1491,18 +1522,18 @@ int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param, | |||
1491 | MTHCA_PUT(inbox, param->si_guid, SET_IB_SI_GUID_OFFSET); | 1522 | MTHCA_PUT(inbox, param->si_guid, SET_IB_SI_GUID_OFFSET); |
1492 | 1523 | ||
1493 | err = mthca_cmd(dev, mailbox->dma, port, 0, CMD_SET_IB, | 1524 | err = mthca_cmd(dev, mailbox->dma, port, 0, CMD_SET_IB, |
1494 | CMD_TIME_CLASS_B, status); | 1525 | CMD_TIME_CLASS_B); |
1495 | 1526 | ||
1496 | mthca_free_mailbox(dev, mailbox); | 1527 | mthca_free_mailbox(dev, mailbox); |
1497 | return err; | 1528 | return err; |
1498 | } | 1529 | } |
1499 | 1530 | ||
1500 | int mthca_MAP_ICM(struct mthca_dev *dev, struct mthca_icm *icm, u64 virt, u8 *status) | 1531 | int mthca_MAP_ICM(struct mthca_dev *dev, struct mthca_icm *icm, u64 virt) |
1501 | { | 1532 | { |
1502 | return mthca_map_cmd(dev, CMD_MAP_ICM, icm, virt, status); | 1533 | return mthca_map_cmd(dev, CMD_MAP_ICM, icm, virt); |
1503 | } | 1534 | } |
1504 | 1535 | ||
1505 | int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt, u8 *status) | 1536 | int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt) |
1506 | { | 1537 | { |
1507 | struct mthca_mailbox *mailbox; | 1538 | struct mthca_mailbox *mailbox; |
1508 | __be64 *inbox; | 1539 | __be64 *inbox; |
@@ -1517,7 +1548,7 @@ int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt, u8 *status | |||
1517 | inbox[1] = cpu_to_be64(dma_addr); | 1548 | inbox[1] = cpu_to_be64(dma_addr); |
1518 | 1549 | ||
1519 | err = mthca_cmd(dev, mailbox->dma, 1, 0, CMD_MAP_ICM, | 1550 | err = mthca_cmd(dev, mailbox->dma, 1, 0, CMD_MAP_ICM, |
1520 | CMD_TIME_CLASS_B, status); | 1551 | CMD_TIME_CLASS_B); |
1521 | 1552 | ||
1522 | mthca_free_mailbox(dev, mailbox); | 1553 | mthca_free_mailbox(dev, mailbox); |
1523 | 1554 | ||
@@ -1528,31 +1559,31 @@ int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt, u8 *status | |||
1528 | return err; | 1559 | return err; |
1529 | } | 1560 | } |
1530 | 1561 | ||
1531 | int mthca_UNMAP_ICM(struct mthca_dev *dev, u64 virt, u32 page_count, u8 *status) | 1562 | int mthca_UNMAP_ICM(struct mthca_dev *dev, u64 virt, u32 page_count) |
1532 | { | 1563 | { |
1533 | mthca_dbg(dev, "Unmapping %d pages at %llx from ICM.\n", | 1564 | mthca_dbg(dev, "Unmapping %d pages at %llx from ICM.\n", |
1534 | page_count, (unsigned long long) virt); | 1565 | page_count, (unsigned long long) virt); |
1535 | 1566 | ||
1536 | return mthca_cmd(dev, virt, page_count, 0, CMD_UNMAP_ICM, CMD_TIME_CLASS_B, status); | 1567 | return mthca_cmd(dev, virt, page_count, 0, |
1568 | CMD_UNMAP_ICM, CMD_TIME_CLASS_B); | ||
1537 | } | 1569 | } |
1538 | 1570 | ||
1539 | int mthca_MAP_ICM_AUX(struct mthca_dev *dev, struct mthca_icm *icm, u8 *status) | 1571 | int mthca_MAP_ICM_AUX(struct mthca_dev *dev, struct mthca_icm *icm) |
1540 | { | 1572 | { |
1541 | return mthca_map_cmd(dev, CMD_MAP_ICM_AUX, icm, -1, status); | 1573 | return mthca_map_cmd(dev, CMD_MAP_ICM_AUX, icm, -1); |
1542 | } | 1574 | } |
1543 | 1575 | ||
1544 | int mthca_UNMAP_ICM_AUX(struct mthca_dev *dev, u8 *status) | 1576 | int mthca_UNMAP_ICM_AUX(struct mthca_dev *dev) |
1545 | { | 1577 | { |
1546 | return mthca_cmd(dev, 0, 0, 0, CMD_UNMAP_ICM_AUX, CMD_TIME_CLASS_B, status); | 1578 | return mthca_cmd(dev, 0, 0, 0, CMD_UNMAP_ICM_AUX, CMD_TIME_CLASS_B); |
1547 | } | 1579 | } |
1548 | 1580 | ||
1549 | int mthca_SET_ICM_SIZE(struct mthca_dev *dev, u64 icm_size, u64 *aux_pages, | 1581 | int mthca_SET_ICM_SIZE(struct mthca_dev *dev, u64 icm_size, u64 *aux_pages) |
1550 | u8 *status) | ||
1551 | { | 1582 | { |
1552 | int ret = mthca_cmd_imm(dev, icm_size, aux_pages, 0, 0, CMD_SET_ICM_SIZE, | 1583 | int ret = mthca_cmd_imm(dev, icm_size, aux_pages, 0, |
1553 | CMD_TIME_CLASS_A, status); | 1584 | 0, CMD_SET_ICM_SIZE, CMD_TIME_CLASS_A); |
1554 | 1585 | ||
1555 | if (ret || status) | 1586 | if (ret) |
1556 | return ret; | 1587 | return ret; |
1557 | 1588 | ||
1558 | /* | 1589 | /* |
@@ -1566,74 +1597,73 @@ int mthca_SET_ICM_SIZE(struct mthca_dev *dev, u64 icm_size, u64 *aux_pages, | |||
1566 | } | 1597 | } |
1567 | 1598 | ||
1568 | int mthca_SW2HW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1599 | int mthca_SW2HW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1569 | int mpt_index, u8 *status) | 1600 | int mpt_index) |
1570 | { | 1601 | { |
1571 | return mthca_cmd(dev, mailbox->dma, mpt_index, 0, CMD_SW2HW_MPT, | 1602 | return mthca_cmd(dev, mailbox->dma, mpt_index, 0, CMD_SW2HW_MPT, |
1572 | CMD_TIME_CLASS_B, status); | 1603 | CMD_TIME_CLASS_B); |
1573 | } | 1604 | } |
1574 | 1605 | ||
1575 | int mthca_HW2SW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1606 | int mthca_HW2SW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1576 | int mpt_index, u8 *status) | 1607 | int mpt_index) |
1577 | { | 1608 | { |
1578 | return mthca_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, | 1609 | return mthca_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, |
1579 | !mailbox, CMD_HW2SW_MPT, | 1610 | !mailbox, CMD_HW2SW_MPT, |
1580 | CMD_TIME_CLASS_B, status); | 1611 | CMD_TIME_CLASS_B); |
1581 | } | 1612 | } |
1582 | 1613 | ||
1583 | int mthca_WRITE_MTT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1614 | int mthca_WRITE_MTT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1584 | int num_mtt, u8 *status) | 1615 | int num_mtt) |
1585 | { | 1616 | { |
1586 | return mthca_cmd(dev, mailbox->dma, num_mtt, 0, CMD_WRITE_MTT, | 1617 | return mthca_cmd(dev, mailbox->dma, num_mtt, 0, CMD_WRITE_MTT, |
1587 | CMD_TIME_CLASS_B, status); | 1618 | CMD_TIME_CLASS_B); |
1588 | } | 1619 | } |
1589 | 1620 | ||
1590 | int mthca_SYNC_TPT(struct mthca_dev *dev, u8 *status) | 1621 | int mthca_SYNC_TPT(struct mthca_dev *dev) |
1591 | { | 1622 | { |
1592 | return mthca_cmd(dev, 0, 0, 0, CMD_SYNC_TPT, CMD_TIME_CLASS_B, status); | 1623 | return mthca_cmd(dev, 0, 0, 0, CMD_SYNC_TPT, CMD_TIME_CLASS_B); |
1593 | } | 1624 | } |
1594 | 1625 | ||
1595 | int mthca_MAP_EQ(struct mthca_dev *dev, u64 event_mask, int unmap, | 1626 | int mthca_MAP_EQ(struct mthca_dev *dev, u64 event_mask, int unmap, |
1596 | int eq_num, u8 *status) | 1627 | int eq_num) |
1597 | { | 1628 | { |
1598 | mthca_dbg(dev, "%s mask %016llx for eqn %d\n", | 1629 | mthca_dbg(dev, "%s mask %016llx for eqn %d\n", |
1599 | unmap ? "Clearing" : "Setting", | 1630 | unmap ? "Clearing" : "Setting", |
1600 | (unsigned long long) event_mask, eq_num); | 1631 | (unsigned long long) event_mask, eq_num); |
1601 | return mthca_cmd(dev, event_mask, (unmap << 31) | eq_num, | 1632 | return mthca_cmd(dev, event_mask, (unmap << 31) | eq_num, |
1602 | 0, CMD_MAP_EQ, CMD_TIME_CLASS_B, status); | 1633 | 0, CMD_MAP_EQ, CMD_TIME_CLASS_B); |
1603 | } | 1634 | } |
1604 | 1635 | ||
1605 | int mthca_SW2HW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1636 | int mthca_SW2HW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1606 | int eq_num, u8 *status) | 1637 | int eq_num) |
1607 | { | 1638 | { |
1608 | return mthca_cmd(dev, mailbox->dma, eq_num, 0, CMD_SW2HW_EQ, | 1639 | return mthca_cmd(dev, mailbox->dma, eq_num, 0, CMD_SW2HW_EQ, |
1609 | CMD_TIME_CLASS_A, status); | 1640 | CMD_TIME_CLASS_A); |
1610 | } | 1641 | } |
1611 | 1642 | ||
1612 | int mthca_HW2SW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1643 | int mthca_HW2SW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1613 | int eq_num, u8 *status) | 1644 | int eq_num) |
1614 | { | 1645 | { |
1615 | return mthca_cmd_box(dev, 0, mailbox->dma, eq_num, 0, | 1646 | return mthca_cmd_box(dev, 0, mailbox->dma, eq_num, 0, |
1616 | CMD_HW2SW_EQ, | 1647 | CMD_HW2SW_EQ, |
1617 | CMD_TIME_CLASS_A, status); | 1648 | CMD_TIME_CLASS_A); |
1618 | } | 1649 | } |
1619 | 1650 | ||
1620 | int mthca_SW2HW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1651 | int mthca_SW2HW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1621 | int cq_num, u8 *status) | 1652 | int cq_num) |
1622 | { | 1653 | { |
1623 | return mthca_cmd(dev, mailbox->dma, cq_num, 0, CMD_SW2HW_CQ, | 1654 | return mthca_cmd(dev, mailbox->dma, cq_num, 0, CMD_SW2HW_CQ, |
1624 | CMD_TIME_CLASS_A, status); | 1655 | CMD_TIME_CLASS_A); |
1625 | } | 1656 | } |
1626 | 1657 | ||
1627 | int mthca_HW2SW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1658 | int mthca_HW2SW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1628 | int cq_num, u8 *status) | 1659 | int cq_num) |
1629 | { | 1660 | { |
1630 | return mthca_cmd_box(dev, 0, mailbox->dma, cq_num, 0, | 1661 | return mthca_cmd_box(dev, 0, mailbox->dma, cq_num, 0, |
1631 | CMD_HW2SW_CQ, | 1662 | CMD_HW2SW_CQ, |
1632 | CMD_TIME_CLASS_A, status); | 1663 | CMD_TIME_CLASS_A); |
1633 | } | 1664 | } |
1634 | 1665 | ||
1635 | int mthca_RESIZE_CQ(struct mthca_dev *dev, int cq_num, u32 lkey, u8 log_size, | 1666 | int mthca_RESIZE_CQ(struct mthca_dev *dev, int cq_num, u32 lkey, u8 log_size) |
1636 | u8 *status) | ||
1637 | { | 1667 | { |
1638 | struct mthca_mailbox *mailbox; | 1668 | struct mthca_mailbox *mailbox; |
1639 | __be32 *inbox; | 1669 | __be32 *inbox; |
@@ -1657,44 +1687,43 @@ int mthca_RESIZE_CQ(struct mthca_dev *dev, int cq_num, u32 lkey, u8 log_size, | |||
1657 | MTHCA_PUT(inbox, lkey, RESIZE_CQ_LKEY_OFFSET); | 1687 | MTHCA_PUT(inbox, lkey, RESIZE_CQ_LKEY_OFFSET); |
1658 | 1688 | ||
1659 | err = mthca_cmd(dev, mailbox->dma, cq_num, 1, CMD_RESIZE_CQ, | 1689 | err = mthca_cmd(dev, mailbox->dma, cq_num, 1, CMD_RESIZE_CQ, |
1660 | CMD_TIME_CLASS_B, status); | 1690 | CMD_TIME_CLASS_B); |
1661 | 1691 | ||
1662 | mthca_free_mailbox(dev, mailbox); | 1692 | mthca_free_mailbox(dev, mailbox); |
1663 | return err; | 1693 | return err; |
1664 | } | 1694 | } |
1665 | 1695 | ||
1666 | int mthca_SW2HW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1696 | int mthca_SW2HW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1667 | int srq_num, u8 *status) | 1697 | int srq_num) |
1668 | { | 1698 | { |
1669 | return mthca_cmd(dev, mailbox->dma, srq_num, 0, CMD_SW2HW_SRQ, | 1699 | return mthca_cmd(dev, mailbox->dma, srq_num, 0, CMD_SW2HW_SRQ, |
1670 | CMD_TIME_CLASS_A, status); | 1700 | CMD_TIME_CLASS_A); |
1671 | } | 1701 | } |
1672 | 1702 | ||
1673 | int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1703 | int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1674 | int srq_num, u8 *status) | 1704 | int srq_num) |
1675 | { | 1705 | { |
1676 | return mthca_cmd_box(dev, 0, mailbox->dma, srq_num, 0, | 1706 | return mthca_cmd_box(dev, 0, mailbox->dma, srq_num, 0, |
1677 | CMD_HW2SW_SRQ, | 1707 | CMD_HW2SW_SRQ, |
1678 | CMD_TIME_CLASS_A, status); | 1708 | CMD_TIME_CLASS_A); |
1679 | } | 1709 | } |
1680 | 1710 | ||
1681 | int mthca_QUERY_SRQ(struct mthca_dev *dev, u32 num, | 1711 | int mthca_QUERY_SRQ(struct mthca_dev *dev, u32 num, |
1682 | struct mthca_mailbox *mailbox, u8 *status) | 1712 | struct mthca_mailbox *mailbox) |
1683 | { | 1713 | { |
1684 | return mthca_cmd_box(dev, 0, mailbox->dma, num, 0, | 1714 | return mthca_cmd_box(dev, 0, mailbox->dma, num, 0, |
1685 | CMD_QUERY_SRQ, CMD_TIME_CLASS_A, status); | 1715 | CMD_QUERY_SRQ, CMD_TIME_CLASS_A); |
1686 | } | 1716 | } |
1687 | 1717 | ||
1688 | int mthca_ARM_SRQ(struct mthca_dev *dev, int srq_num, int limit, u8 *status) | 1718 | int mthca_ARM_SRQ(struct mthca_dev *dev, int srq_num, int limit) |
1689 | { | 1719 | { |
1690 | return mthca_cmd(dev, limit, srq_num, 0, CMD_ARM_SRQ, | 1720 | return mthca_cmd(dev, limit, srq_num, 0, CMD_ARM_SRQ, |
1691 | CMD_TIME_CLASS_B, status); | 1721 | CMD_TIME_CLASS_B); |
1692 | } | 1722 | } |
1693 | 1723 | ||
1694 | int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur, | 1724 | int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur, |
1695 | enum ib_qp_state next, u32 num, int is_ee, | 1725 | enum ib_qp_state next, u32 num, int is_ee, |
1696 | struct mthca_mailbox *mailbox, u32 optmask, | 1726 | struct mthca_mailbox *mailbox, u32 optmask) |
1697 | u8 *status) | ||
1698 | { | 1727 | { |
1699 | static const u16 op[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = { | 1728 | static const u16 op[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = { |
1700 | [IB_QPS_RESET] = { | 1729 | [IB_QPS_RESET] = { |
@@ -1755,7 +1784,7 @@ int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur, | |||
1755 | 1784 | ||
1756 | err = mthca_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, | 1785 | err = mthca_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, |
1757 | (!!is_ee << 24) | num, op_mod, | 1786 | (!!is_ee << 24) | num, op_mod, |
1758 | op[cur][next], CMD_TIME_CLASS_C, status); | 1787 | op[cur][next], CMD_TIME_CLASS_C); |
1759 | 1788 | ||
1760 | if (0 && mailbox) { | 1789 | if (0 && mailbox) { |
1761 | int i; | 1790 | int i; |
@@ -1789,21 +1818,20 @@ int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur, | |||
1789 | } | 1818 | } |
1790 | 1819 | ||
1791 | err = mthca_cmd(dev, mailbox->dma, optmask | (!!is_ee << 24) | num, | 1820 | err = mthca_cmd(dev, mailbox->dma, optmask | (!!is_ee << 24) | num, |
1792 | op_mod, op[cur][next], CMD_TIME_CLASS_C, status); | 1821 | op_mod, op[cur][next], CMD_TIME_CLASS_C); |
1793 | } | 1822 | } |
1794 | 1823 | ||
1795 | return err; | 1824 | return err; |
1796 | } | 1825 | } |
1797 | 1826 | ||
1798 | int mthca_QUERY_QP(struct mthca_dev *dev, u32 num, int is_ee, | 1827 | int mthca_QUERY_QP(struct mthca_dev *dev, u32 num, int is_ee, |
1799 | struct mthca_mailbox *mailbox, u8 *status) | 1828 | struct mthca_mailbox *mailbox) |
1800 | { | 1829 | { |
1801 | return mthca_cmd_box(dev, 0, mailbox->dma, (!!is_ee << 24) | num, 0, | 1830 | return mthca_cmd_box(dev, 0, mailbox->dma, (!!is_ee << 24) | num, 0, |
1802 | CMD_QUERY_QPEE, CMD_TIME_CLASS_A, status); | 1831 | CMD_QUERY_QPEE, CMD_TIME_CLASS_A); |
1803 | } | 1832 | } |
1804 | 1833 | ||
1805 | int mthca_CONF_SPECIAL_QP(struct mthca_dev *dev, int type, u32 qpn, | 1834 | int mthca_CONF_SPECIAL_QP(struct mthca_dev *dev, int type, u32 qpn) |
1806 | u8 *status) | ||
1807 | { | 1835 | { |
1808 | u8 op_mod; | 1836 | u8 op_mod; |
1809 | 1837 | ||
@@ -1825,12 +1853,12 @@ int mthca_CONF_SPECIAL_QP(struct mthca_dev *dev, int type, u32 qpn, | |||
1825 | } | 1853 | } |
1826 | 1854 | ||
1827 | return mthca_cmd(dev, 0, qpn, op_mod, CMD_CONF_SPECIAL_QP, | 1855 | return mthca_cmd(dev, 0, qpn, op_mod, CMD_CONF_SPECIAL_QP, |
1828 | CMD_TIME_CLASS_B, status); | 1856 | CMD_TIME_CLASS_B); |
1829 | } | 1857 | } |
1830 | 1858 | ||
1831 | int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey, | 1859 | int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey, |
1832 | int port, struct ib_wc *in_wc, struct ib_grh *in_grh, | 1860 | int port, struct ib_wc *in_wc, struct ib_grh *in_grh, |
1833 | void *in_mad, void *response_mad, u8 *status) | 1861 | void *in_mad, void *response_mad) |
1834 | { | 1862 | { |
1835 | struct mthca_mailbox *inmailbox, *outmailbox; | 1863 | struct mthca_mailbox *inmailbox, *outmailbox; |
1836 | void *inbox; | 1864 | void *inbox; |
@@ -1897,9 +1925,9 @@ int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey, | |||
1897 | 1925 | ||
1898 | err = mthca_cmd_box(dev, inmailbox->dma, outmailbox->dma, | 1926 | err = mthca_cmd_box(dev, inmailbox->dma, outmailbox->dma, |
1899 | in_modifier, op_modifier, | 1927 | in_modifier, op_modifier, |
1900 | CMD_MAD_IFC, CMD_TIME_CLASS_C, status); | 1928 | CMD_MAD_IFC, CMD_TIME_CLASS_C); |
1901 | 1929 | ||
1902 | if (!err && !*status) | 1930 | if (!err) |
1903 | memcpy(response_mad, outmailbox->buf, 256); | 1931 | memcpy(response_mad, outmailbox->buf, 256); |
1904 | 1932 | ||
1905 | mthca_free_mailbox(dev, inmailbox); | 1933 | mthca_free_mailbox(dev, inmailbox); |
@@ -1908,33 +1936,33 @@ int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey, | |||
1908 | } | 1936 | } |
1909 | 1937 | ||
1910 | int mthca_READ_MGM(struct mthca_dev *dev, int index, | 1938 | int mthca_READ_MGM(struct mthca_dev *dev, int index, |
1911 | struct mthca_mailbox *mailbox, u8 *status) | 1939 | struct mthca_mailbox *mailbox) |
1912 | { | 1940 | { |
1913 | return mthca_cmd_box(dev, 0, mailbox->dma, index, 0, | 1941 | return mthca_cmd_box(dev, 0, mailbox->dma, index, 0, |
1914 | CMD_READ_MGM, CMD_TIME_CLASS_A, status); | 1942 | CMD_READ_MGM, CMD_TIME_CLASS_A); |
1915 | } | 1943 | } |
1916 | 1944 | ||
1917 | int mthca_WRITE_MGM(struct mthca_dev *dev, int index, | 1945 | int mthca_WRITE_MGM(struct mthca_dev *dev, int index, |
1918 | struct mthca_mailbox *mailbox, u8 *status) | 1946 | struct mthca_mailbox *mailbox) |
1919 | { | 1947 | { |
1920 | return mthca_cmd(dev, mailbox->dma, index, 0, CMD_WRITE_MGM, | 1948 | return mthca_cmd(dev, mailbox->dma, index, 0, CMD_WRITE_MGM, |
1921 | CMD_TIME_CLASS_A, status); | 1949 | CMD_TIME_CLASS_A); |
1922 | } | 1950 | } |
1923 | 1951 | ||
1924 | int mthca_MGID_HASH(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 1952 | int mthca_MGID_HASH(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
1925 | u16 *hash, u8 *status) | 1953 | u16 *hash) |
1926 | { | 1954 | { |
1927 | u64 imm; | 1955 | u64 imm; |
1928 | int err; | 1956 | int err; |
1929 | 1957 | ||
1930 | err = mthca_cmd_imm(dev, mailbox->dma, &imm, 0, 0, CMD_MGID_HASH, | 1958 | err = mthca_cmd_imm(dev, mailbox->dma, &imm, 0, 0, CMD_MGID_HASH, |
1931 | CMD_TIME_CLASS_A, status); | 1959 | CMD_TIME_CLASS_A); |
1932 | 1960 | ||
1933 | *hash = imm; | 1961 | *hash = imm; |
1934 | return err; | 1962 | return err; |
1935 | } | 1963 | } |
1936 | 1964 | ||
1937 | int mthca_NOP(struct mthca_dev *dev, u8 *status) | 1965 | int mthca_NOP(struct mthca_dev *dev) |
1938 | { | 1966 | { |
1939 | return mthca_cmd(dev, 0, 0x1f, 0, CMD_NOP, msecs_to_jiffies(100), status); | 1967 | return mthca_cmd(dev, 0, 0x1f, 0, CMD_NOP, msecs_to_jiffies(100)); |
1940 | } | 1968 | } |
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.h b/drivers/infiniband/hw/mthca/mthca_cmd.h index 6efd3265f248..f952244c54de 100644 --- a/drivers/infiniband/hw/mthca/mthca_cmd.h +++ b/drivers/infiniband/hw/mthca/mthca_cmd.h | |||
@@ -252,79 +252,74 @@ struct mthca_mailbox *mthca_alloc_mailbox(struct mthca_dev *dev, | |||
252 | gfp_t gfp_mask); | 252 | gfp_t gfp_mask); |
253 | void mthca_free_mailbox(struct mthca_dev *dev, struct mthca_mailbox *mailbox); | 253 | void mthca_free_mailbox(struct mthca_dev *dev, struct mthca_mailbox *mailbox); |
254 | 254 | ||
255 | int mthca_SYS_EN(struct mthca_dev *dev, u8 *status); | 255 | int mthca_SYS_EN(struct mthca_dev *dev); |
256 | int mthca_SYS_DIS(struct mthca_dev *dev, u8 *status); | 256 | int mthca_SYS_DIS(struct mthca_dev *dev); |
257 | int mthca_MAP_FA(struct mthca_dev *dev, struct mthca_icm *icm, u8 *status); | 257 | int mthca_MAP_FA(struct mthca_dev *dev, struct mthca_icm *icm); |
258 | int mthca_UNMAP_FA(struct mthca_dev *dev, u8 *status); | 258 | int mthca_UNMAP_FA(struct mthca_dev *dev); |
259 | int mthca_RUN_FW(struct mthca_dev *dev, u8 *status); | 259 | int mthca_RUN_FW(struct mthca_dev *dev); |
260 | int mthca_QUERY_FW(struct mthca_dev *dev, u8 *status); | 260 | int mthca_QUERY_FW(struct mthca_dev *dev); |
261 | int mthca_ENABLE_LAM(struct mthca_dev *dev, u8 *status); | 261 | int mthca_ENABLE_LAM(struct mthca_dev *dev); |
262 | int mthca_DISABLE_LAM(struct mthca_dev *dev, u8 *status); | 262 | int mthca_DISABLE_LAM(struct mthca_dev *dev); |
263 | int mthca_QUERY_DDR(struct mthca_dev *dev, u8 *status); | 263 | int mthca_QUERY_DDR(struct mthca_dev *dev); |
264 | int mthca_QUERY_DEV_LIM(struct mthca_dev *dev, | 264 | int mthca_QUERY_DEV_LIM(struct mthca_dev *dev, |
265 | struct mthca_dev_lim *dev_lim, u8 *status); | 265 | struct mthca_dev_lim *dev_lim); |
266 | int mthca_QUERY_ADAPTER(struct mthca_dev *dev, | 266 | int mthca_QUERY_ADAPTER(struct mthca_dev *dev, |
267 | struct mthca_adapter *adapter, u8 *status); | 267 | struct mthca_adapter *adapter); |
268 | int mthca_INIT_HCA(struct mthca_dev *dev, | 268 | int mthca_INIT_HCA(struct mthca_dev *dev, |
269 | struct mthca_init_hca_param *param, | 269 | struct mthca_init_hca_param *param); |
270 | u8 *status); | ||
271 | int mthca_INIT_IB(struct mthca_dev *dev, | 270 | int mthca_INIT_IB(struct mthca_dev *dev, |
272 | struct mthca_init_ib_param *param, | 271 | struct mthca_init_ib_param *param, |
273 | int port, u8 *status); | 272 | int port); |
274 | int mthca_CLOSE_IB(struct mthca_dev *dev, int port, u8 *status); | 273 | int mthca_CLOSE_IB(struct mthca_dev *dev, int port); |
275 | int mthca_CLOSE_HCA(struct mthca_dev *dev, int panic, u8 *status); | 274 | int mthca_CLOSE_HCA(struct mthca_dev *dev, int panic); |
276 | int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param, | 275 | int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param, |
277 | int port, u8 *status); | 276 | int port); |
278 | int mthca_MAP_ICM(struct mthca_dev *dev, struct mthca_icm *icm, u64 virt, u8 *status); | 277 | int mthca_MAP_ICM(struct mthca_dev *dev, struct mthca_icm *icm, u64 virt); |
279 | int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt, u8 *status); | 278 | int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt); |
280 | int mthca_UNMAP_ICM(struct mthca_dev *dev, u64 virt, u32 page_count, u8 *status); | 279 | int mthca_UNMAP_ICM(struct mthca_dev *dev, u64 virt, u32 page_count); |
281 | int mthca_MAP_ICM_AUX(struct mthca_dev *dev, struct mthca_icm *icm, u8 *status); | 280 | int mthca_MAP_ICM_AUX(struct mthca_dev *dev, struct mthca_icm *icm); |
282 | int mthca_UNMAP_ICM_AUX(struct mthca_dev *dev, u8 *status); | 281 | int mthca_UNMAP_ICM_AUX(struct mthca_dev *dev); |
283 | int mthca_SET_ICM_SIZE(struct mthca_dev *dev, u64 icm_size, u64 *aux_pages, | 282 | int mthca_SET_ICM_SIZE(struct mthca_dev *dev, u64 icm_size, u64 *aux_pages); |
284 | u8 *status); | ||
285 | int mthca_SW2HW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 283 | int mthca_SW2HW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
286 | int mpt_index, u8 *status); | 284 | int mpt_index); |
287 | int mthca_HW2SW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 285 | int mthca_HW2SW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
288 | int mpt_index, u8 *status); | 286 | int mpt_index); |
289 | int mthca_WRITE_MTT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 287 | int mthca_WRITE_MTT(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
290 | int num_mtt, u8 *status); | 288 | int num_mtt); |
291 | int mthca_SYNC_TPT(struct mthca_dev *dev, u8 *status); | 289 | int mthca_SYNC_TPT(struct mthca_dev *dev); |
292 | int mthca_MAP_EQ(struct mthca_dev *dev, u64 event_mask, int unmap, | 290 | int mthca_MAP_EQ(struct mthca_dev *dev, u64 event_mask, int unmap, |
293 | int eq_num, u8 *status); | 291 | int eq_num); |
294 | int mthca_SW2HW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 292 | int mthca_SW2HW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
295 | int eq_num, u8 *status); | 293 | int eq_num); |
296 | int mthca_HW2SW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 294 | int mthca_HW2SW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
297 | int eq_num, u8 *status); | 295 | int eq_num); |
298 | int mthca_SW2HW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 296 | int mthca_SW2HW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
299 | int cq_num, u8 *status); | 297 | int cq_num); |
300 | int mthca_HW2SW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 298 | int mthca_HW2SW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
301 | int cq_num, u8 *status); | 299 | int cq_num); |
302 | int mthca_RESIZE_CQ(struct mthca_dev *dev, int cq_num, u32 lkey, u8 log_size, | 300 | int mthca_RESIZE_CQ(struct mthca_dev *dev, int cq_num, u32 lkey, u8 log_size); |
303 | u8 *status); | ||
304 | int mthca_SW2HW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 301 | int mthca_SW2HW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
305 | int srq_num, u8 *status); | 302 | int srq_num); |
306 | int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 303 | int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
307 | int srq_num, u8 *status); | 304 | int srq_num); |
308 | int mthca_QUERY_SRQ(struct mthca_dev *dev, u32 num, | 305 | int mthca_QUERY_SRQ(struct mthca_dev *dev, u32 num, |
309 | struct mthca_mailbox *mailbox, u8 *status); | 306 | struct mthca_mailbox *mailbox); |
310 | int mthca_ARM_SRQ(struct mthca_dev *dev, int srq_num, int limit, u8 *status); | 307 | int mthca_ARM_SRQ(struct mthca_dev *dev, int srq_num, int limit); |
311 | int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur, | 308 | int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur, |
312 | enum ib_qp_state next, u32 num, int is_ee, | 309 | enum ib_qp_state next, u32 num, int is_ee, |
313 | struct mthca_mailbox *mailbox, u32 optmask, | 310 | struct mthca_mailbox *mailbox, u32 optmask); |
314 | u8 *status); | ||
315 | int mthca_QUERY_QP(struct mthca_dev *dev, u32 num, int is_ee, | 311 | int mthca_QUERY_QP(struct mthca_dev *dev, u32 num, int is_ee, |
316 | struct mthca_mailbox *mailbox, u8 *status); | 312 | struct mthca_mailbox *mailbox); |
317 | int mthca_CONF_SPECIAL_QP(struct mthca_dev *dev, int type, u32 qpn, | 313 | int mthca_CONF_SPECIAL_QP(struct mthca_dev *dev, int type, u32 qpn); |
318 | u8 *status); | ||
319 | int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey, | 314 | int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey, |
320 | int port, struct ib_wc *in_wc, struct ib_grh *in_grh, | 315 | int port, struct ib_wc *in_wc, struct ib_grh *in_grh, |
321 | void *in_mad, void *response_mad, u8 *status); | 316 | void *in_mad, void *response_mad); |
322 | int mthca_READ_MGM(struct mthca_dev *dev, int index, | 317 | int mthca_READ_MGM(struct mthca_dev *dev, int index, |
323 | struct mthca_mailbox *mailbox, u8 *status); | 318 | struct mthca_mailbox *mailbox); |
324 | int mthca_WRITE_MGM(struct mthca_dev *dev, int index, | 319 | int mthca_WRITE_MGM(struct mthca_dev *dev, int index, |
325 | struct mthca_mailbox *mailbox, u8 *status); | 320 | struct mthca_mailbox *mailbox); |
326 | int mthca_MGID_HASH(struct mthca_dev *dev, struct mthca_mailbox *mailbox, | 321 | int mthca_MGID_HASH(struct mthca_dev *dev, struct mthca_mailbox *mailbox, |
327 | u16 *hash, u8 *status); | 322 | u16 *hash); |
328 | int mthca_NOP(struct mthca_dev *dev, u8 *status); | 323 | int mthca_NOP(struct mthca_dev *dev); |
329 | 324 | ||
330 | #endif /* MTHCA_CMD_H */ | 325 | #endif /* MTHCA_CMD_H */ |
diff --git a/drivers/infiniband/hw/mthca/mthca_cq.c b/drivers/infiniband/hw/mthca/mthca_cq.c index 18ee3fa4b88c..53157b86a1ba 100644 --- a/drivers/infiniband/hw/mthca/mthca_cq.c +++ b/drivers/infiniband/hw/mthca/mthca_cq.c | |||
@@ -779,7 +779,6 @@ int mthca_init_cq(struct mthca_dev *dev, int nent, | |||
779 | struct mthca_mailbox *mailbox; | 779 | struct mthca_mailbox *mailbox; |
780 | struct mthca_cq_context *cq_context; | 780 | struct mthca_cq_context *cq_context; |
781 | int err = -ENOMEM; | 781 | int err = -ENOMEM; |
782 | u8 status; | ||
783 | 782 | ||
784 | cq->ibcq.cqe = nent - 1; | 783 | cq->ibcq.cqe = nent - 1; |
785 | cq->is_kernel = !ctx; | 784 | cq->is_kernel = !ctx; |
@@ -847,19 +846,12 @@ int mthca_init_cq(struct mthca_dev *dev, int nent, | |||
847 | cq_context->state_db = cpu_to_be32(cq->arm_db_index); | 846 | cq_context->state_db = cpu_to_be32(cq->arm_db_index); |
848 | } | 847 | } |
849 | 848 | ||
850 | err = mthca_SW2HW_CQ(dev, mailbox, cq->cqn, &status); | 849 | err = mthca_SW2HW_CQ(dev, mailbox, cq->cqn); |
851 | if (err) { | 850 | if (err) { |
852 | mthca_warn(dev, "SW2HW_CQ failed (%d)\n", err); | 851 | mthca_warn(dev, "SW2HW_CQ failed (%d)\n", err); |
853 | goto err_out_free_mr; | 852 | goto err_out_free_mr; |
854 | } | 853 | } |
855 | 854 | ||
856 | if (status) { | ||
857 | mthca_warn(dev, "SW2HW_CQ returned status 0x%02x\n", | ||
858 | status); | ||
859 | err = -EINVAL; | ||
860 | goto err_out_free_mr; | ||
861 | } | ||
862 | |||
863 | spin_lock_irq(&dev->cq_table.lock); | 855 | spin_lock_irq(&dev->cq_table.lock); |
864 | if (mthca_array_set(&dev->cq_table.cq, | 856 | if (mthca_array_set(&dev->cq_table.cq, |
865 | cq->cqn & (dev->limits.num_cqs - 1), | 857 | cq->cqn & (dev->limits.num_cqs - 1), |
@@ -915,7 +907,6 @@ void mthca_free_cq(struct mthca_dev *dev, | |||
915 | { | 907 | { |
916 | struct mthca_mailbox *mailbox; | 908 | struct mthca_mailbox *mailbox; |
917 | int err; | 909 | int err; |
918 | u8 status; | ||
919 | 910 | ||
920 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); | 911 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); |
921 | if (IS_ERR(mailbox)) { | 912 | if (IS_ERR(mailbox)) { |
@@ -923,11 +914,9 @@ void mthca_free_cq(struct mthca_dev *dev, | |||
923 | return; | 914 | return; |
924 | } | 915 | } |
925 | 916 | ||
926 | err = mthca_HW2SW_CQ(dev, mailbox, cq->cqn, &status); | 917 | err = mthca_HW2SW_CQ(dev, mailbox, cq->cqn); |
927 | if (err) | 918 | if (err) |
928 | mthca_warn(dev, "HW2SW_CQ failed (%d)\n", err); | 919 | mthca_warn(dev, "HW2SW_CQ failed (%d)\n", err); |
929 | else if (status) | ||
930 | mthca_warn(dev, "HW2SW_CQ returned status 0x%02x\n", status); | ||
931 | 920 | ||
932 | if (0) { | 921 | if (0) { |
933 | __be32 *ctx = mailbox->buf; | 922 | __be32 *ctx = mailbox->buf; |
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c index 76785c653c13..7c9d35f39d75 100644 --- a/drivers/infiniband/hw/mthca/mthca_eq.c +++ b/drivers/infiniband/hw/mthca/mthca_eq.c | |||
@@ -474,7 +474,6 @@ static int mthca_create_eq(struct mthca_dev *dev, | |||
474 | struct mthca_eq_context *eq_context; | 474 | struct mthca_eq_context *eq_context; |
475 | int err = -ENOMEM; | 475 | int err = -ENOMEM; |
476 | int i; | 476 | int i; |
477 | u8 status; | ||
478 | 477 | ||
479 | eq->dev = dev; | 478 | eq->dev = dev; |
480 | eq->nent = roundup_pow_of_two(max(nent, 2)); | 479 | eq->nent = roundup_pow_of_two(max(nent, 2)); |
@@ -543,15 +542,9 @@ static int mthca_create_eq(struct mthca_dev *dev, | |||
543 | eq_context->intr = intr; | 542 | eq_context->intr = intr; |
544 | eq_context->lkey = cpu_to_be32(eq->mr.ibmr.lkey); | 543 | eq_context->lkey = cpu_to_be32(eq->mr.ibmr.lkey); |
545 | 544 | ||
546 | err = mthca_SW2HW_EQ(dev, mailbox, eq->eqn, &status); | 545 | err = mthca_SW2HW_EQ(dev, mailbox, eq->eqn); |
547 | if (err) { | 546 | if (err) { |
548 | mthca_warn(dev, "SW2HW_EQ failed (%d)\n", err); | 547 | mthca_warn(dev, "SW2HW_EQ returned %d\n", err); |
549 | goto err_out_free_mr; | ||
550 | } | ||
551 | if (status) { | ||
552 | mthca_warn(dev, "SW2HW_EQ returned status 0x%02x\n", | ||
553 | status); | ||
554 | err = -EINVAL; | ||
555 | goto err_out_free_mr; | 548 | goto err_out_free_mr; |
556 | } | 549 | } |
557 | 550 | ||
@@ -597,7 +590,6 @@ static void mthca_free_eq(struct mthca_dev *dev, | |||
597 | { | 590 | { |
598 | struct mthca_mailbox *mailbox; | 591 | struct mthca_mailbox *mailbox; |
599 | int err; | 592 | int err; |
600 | u8 status; | ||
601 | int npages = (eq->nent * MTHCA_EQ_ENTRY_SIZE + PAGE_SIZE - 1) / | 593 | int npages = (eq->nent * MTHCA_EQ_ENTRY_SIZE + PAGE_SIZE - 1) / |
602 | PAGE_SIZE; | 594 | PAGE_SIZE; |
603 | int i; | 595 | int i; |
@@ -606,11 +598,9 @@ static void mthca_free_eq(struct mthca_dev *dev, | |||
606 | if (IS_ERR(mailbox)) | 598 | if (IS_ERR(mailbox)) |
607 | return; | 599 | return; |
608 | 600 | ||
609 | err = mthca_HW2SW_EQ(dev, mailbox, eq->eqn, &status); | 601 | err = mthca_HW2SW_EQ(dev, mailbox, eq->eqn); |
610 | if (err) | 602 | if (err) |
611 | mthca_warn(dev, "HW2SW_EQ failed (%d)\n", err); | 603 | mthca_warn(dev, "HW2SW_EQ returned %d\n", err); |
612 | if (status) | ||
613 | mthca_warn(dev, "HW2SW_EQ returned status 0x%02x\n", status); | ||
614 | 604 | ||
615 | dev->eq_table.arm_mask &= ~eq->eqn_mask; | 605 | dev->eq_table.arm_mask &= ~eq->eqn_mask; |
616 | 606 | ||
@@ -738,7 +728,6 @@ static void mthca_unmap_eq_regs(struct mthca_dev *dev) | |||
738 | int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt) | 728 | int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt) |
739 | { | 729 | { |
740 | int ret; | 730 | int ret; |
741 | u8 status; | ||
742 | 731 | ||
743 | /* | 732 | /* |
744 | * We assume that mapping one page is enough for the whole EQ | 733 | * We assume that mapping one page is enough for the whole EQ |
@@ -757,9 +746,7 @@ int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt) | |||
757 | return -ENOMEM; | 746 | return -ENOMEM; |
758 | } | 747 | } |
759 | 748 | ||
760 | ret = mthca_MAP_ICM_page(dev, dev->eq_table.icm_dma, icm_virt, &status); | 749 | ret = mthca_MAP_ICM_page(dev, dev->eq_table.icm_dma, icm_virt); |
761 | if (!ret && status) | ||
762 | ret = -EINVAL; | ||
763 | if (ret) { | 750 | if (ret) { |
764 | pci_unmap_page(dev->pdev, dev->eq_table.icm_dma, PAGE_SIZE, | 751 | pci_unmap_page(dev->pdev, dev->eq_table.icm_dma, PAGE_SIZE, |
765 | PCI_DMA_BIDIRECTIONAL); | 752 | PCI_DMA_BIDIRECTIONAL); |
@@ -771,9 +758,7 @@ int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt) | |||
771 | 758 | ||
772 | void mthca_unmap_eq_icm(struct mthca_dev *dev) | 759 | void mthca_unmap_eq_icm(struct mthca_dev *dev) |
773 | { | 760 | { |
774 | u8 status; | 761 | mthca_UNMAP_ICM(dev, dev->eq_table.icm_virt, 1); |
775 | |||
776 | mthca_UNMAP_ICM(dev, dev->eq_table.icm_virt, 1, &status); | ||
777 | pci_unmap_page(dev->pdev, dev->eq_table.icm_dma, PAGE_SIZE, | 762 | pci_unmap_page(dev->pdev, dev->eq_table.icm_dma, PAGE_SIZE, |
778 | PCI_DMA_BIDIRECTIONAL); | 763 | PCI_DMA_BIDIRECTIONAL); |
779 | __free_page(dev->eq_table.icm_page); | 764 | __free_page(dev->eq_table.icm_page); |
@@ -782,7 +767,6 @@ void mthca_unmap_eq_icm(struct mthca_dev *dev) | |||
782 | int mthca_init_eq_table(struct mthca_dev *dev) | 767 | int mthca_init_eq_table(struct mthca_dev *dev) |
783 | { | 768 | { |
784 | int err; | 769 | int err; |
785 | u8 status; | ||
786 | u8 intr; | 770 | u8 intr; |
787 | int i; | 771 | int i; |
788 | 772 | ||
@@ -864,22 +848,16 @@ int mthca_init_eq_table(struct mthca_dev *dev) | |||
864 | } | 848 | } |
865 | 849 | ||
866 | err = mthca_MAP_EQ(dev, async_mask(dev), | 850 | err = mthca_MAP_EQ(dev, async_mask(dev), |
867 | 0, dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn, &status); | 851 | 0, dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn); |
868 | if (err) | 852 | if (err) |
869 | mthca_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n", | 853 | mthca_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n", |
870 | dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn, err); | 854 | dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn, err); |
871 | if (status) | ||
872 | mthca_warn(dev, "MAP_EQ for async EQ %d returned status 0x%02x\n", | ||
873 | dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn, status); | ||
874 | 855 | ||
875 | err = mthca_MAP_EQ(dev, MTHCA_CMD_EVENT_MASK, | 856 | err = mthca_MAP_EQ(dev, MTHCA_CMD_EVENT_MASK, |
876 | 0, dev->eq_table.eq[MTHCA_EQ_CMD].eqn, &status); | 857 | 0, dev->eq_table.eq[MTHCA_EQ_CMD].eqn); |
877 | if (err) | 858 | if (err) |
878 | mthca_warn(dev, "MAP_EQ for cmd EQ %d failed (%d)\n", | 859 | mthca_warn(dev, "MAP_EQ for cmd EQ %d failed (%d)\n", |
879 | dev->eq_table.eq[MTHCA_EQ_CMD].eqn, err); | 860 | dev->eq_table.eq[MTHCA_EQ_CMD].eqn, err); |
880 | if (status) | ||
881 | mthca_warn(dev, "MAP_EQ for cmd EQ %d returned status 0x%02x\n", | ||
882 | dev->eq_table.eq[MTHCA_EQ_CMD].eqn, status); | ||
883 | 861 | ||
884 | for (i = 0; i < MTHCA_NUM_EQ; ++i) | 862 | for (i = 0; i < MTHCA_NUM_EQ; ++i) |
885 | if (mthca_is_memfree(dev)) | 863 | if (mthca_is_memfree(dev)) |
@@ -909,15 +887,14 @@ err_out_free: | |||
909 | 887 | ||
910 | void mthca_cleanup_eq_table(struct mthca_dev *dev) | 888 | void mthca_cleanup_eq_table(struct mthca_dev *dev) |
911 | { | 889 | { |
912 | u8 status; | ||
913 | int i; | 890 | int i; |
914 | 891 | ||
915 | mthca_free_irqs(dev); | 892 | mthca_free_irqs(dev); |
916 | 893 | ||
917 | mthca_MAP_EQ(dev, async_mask(dev), | 894 | mthca_MAP_EQ(dev, async_mask(dev), |
918 | 1, dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn, &status); | 895 | 1, dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn); |
919 | mthca_MAP_EQ(dev, MTHCA_CMD_EVENT_MASK, | 896 | mthca_MAP_EQ(dev, MTHCA_CMD_EVENT_MASK, |
920 | 1, dev->eq_table.eq[MTHCA_EQ_CMD].eqn, &status); | 897 | 1, dev->eq_table.eq[MTHCA_EQ_CMD].eqn); |
921 | 898 | ||
922 | for (i = 0; i < MTHCA_NUM_EQ; ++i) | 899 | for (i = 0; i < MTHCA_NUM_EQ; ++i) |
923 | mthca_free_eq(dev, &dev->eq_table.eq[i]); | 900 | mthca_free_eq(dev, &dev->eq_table.eq[i]); |
diff --git a/drivers/infiniband/hw/mthca/mthca_mad.c b/drivers/infiniband/hw/mthca/mthca_mad.c index 03a59534f59e..b6f7f457fc55 100644 --- a/drivers/infiniband/hw/mthca/mthca_mad.c +++ b/drivers/infiniband/hw/mthca/mthca_mad.c | |||
@@ -201,7 +201,6 @@ int mthca_process_mad(struct ib_device *ibdev, | |||
201 | struct ib_mad *out_mad) | 201 | struct ib_mad *out_mad) |
202 | { | 202 | { |
203 | int err; | 203 | int err; |
204 | u8 status; | ||
205 | u16 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE); | 204 | u16 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE); |
206 | u16 prev_lid = 0; | 205 | u16 prev_lid = 0; |
207 | struct ib_port_attr pattr; | 206 | struct ib_port_attr pattr; |
@@ -252,17 +251,11 @@ int mthca_process_mad(struct ib_device *ibdev, | |||
252 | err = mthca_MAD_IFC(to_mdev(ibdev), | 251 | err = mthca_MAD_IFC(to_mdev(ibdev), |
253 | mad_flags & IB_MAD_IGNORE_MKEY, | 252 | mad_flags & IB_MAD_IGNORE_MKEY, |
254 | mad_flags & IB_MAD_IGNORE_BKEY, | 253 | mad_flags & IB_MAD_IGNORE_BKEY, |
255 | port_num, in_wc, in_grh, in_mad, out_mad, | 254 | port_num, in_wc, in_grh, in_mad, out_mad); |
256 | &status); | 255 | if (err == -EBADMSG) |
257 | if (err) { | ||
258 | mthca_err(to_mdev(ibdev), "MAD_IFC failed\n"); | ||
259 | return IB_MAD_RESULT_FAILURE; | ||
260 | } | ||
261 | if (status == MTHCA_CMD_STAT_BAD_PKT) | ||
262 | return IB_MAD_RESULT_SUCCESS; | 256 | return IB_MAD_RESULT_SUCCESS; |
263 | if (status) { | 257 | else if (err) { |
264 | mthca_err(to_mdev(ibdev), "MAD_IFC returned status %02x\n", | 258 | mthca_err(to_mdev(ibdev), "MAD_IFC returned %d\n", err); |
265 | status); | ||
266 | return IB_MAD_RESULT_FAILURE; | 259 | return IB_MAD_RESULT_FAILURE; |
267 | } | 260 | } |
268 | 261 | ||
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c index f24b79b805f2..f9834766e37b 100644 --- a/drivers/infiniband/hw/mthca/mthca_main.c +++ b/drivers/infiniband/hw/mthca/mthca_main.c | |||
@@ -165,19 +165,14 @@ static int mthca_tune_pci(struct mthca_dev *mdev) | |||
165 | static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) | 165 | static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) |
166 | { | 166 | { |
167 | int err; | 167 | int err; |
168 | u8 status; | ||
169 | 168 | ||
170 | mdev->limits.mtt_seg_size = (1 << log_mtts_per_seg) * 8; | 169 | mdev->limits.mtt_seg_size = (1 << log_mtts_per_seg) * 8; |
171 | err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); | 170 | err = mthca_QUERY_DEV_LIM(mdev, dev_lim); |
172 | if (err) { | 171 | if (err) { |
173 | mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); | 172 | mthca_err(mdev, "QUERY_DEV_LIM command returned %d" |
173 | ", aborting.\n", err); | ||
174 | return err; | 174 | return err; |
175 | } | 175 | } |
176 | if (status) { | ||
177 | mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " | ||
178 | "aborting.\n", status); | ||
179 | return -EINVAL; | ||
180 | } | ||
181 | if (dev_lim->min_page_sz > PAGE_SIZE) { | 176 | if (dev_lim->min_page_sz > PAGE_SIZE) { |
182 | mthca_err(mdev, "HCA minimum page size of %d bigger than " | 177 | mthca_err(mdev, "HCA minimum page size of %d bigger than " |
183 | "kernel PAGE_SIZE of %ld, aborting.\n", | 178 | "kernel PAGE_SIZE of %ld, aborting.\n", |
@@ -293,49 +288,32 @@ static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) | |||
293 | static int mthca_init_tavor(struct mthca_dev *mdev) | 288 | static int mthca_init_tavor(struct mthca_dev *mdev) |
294 | { | 289 | { |
295 | s64 size; | 290 | s64 size; |
296 | u8 status; | ||
297 | int err; | 291 | int err; |
298 | struct mthca_dev_lim dev_lim; | 292 | struct mthca_dev_lim dev_lim; |
299 | struct mthca_profile profile; | 293 | struct mthca_profile profile; |
300 | struct mthca_init_hca_param init_hca; | 294 | struct mthca_init_hca_param init_hca; |
301 | 295 | ||
302 | err = mthca_SYS_EN(mdev, &status); | 296 | err = mthca_SYS_EN(mdev); |
303 | if (err) { | 297 | if (err) { |
304 | mthca_err(mdev, "SYS_EN command failed, aborting.\n"); | 298 | mthca_err(mdev, "SYS_EN command returned %d, aborting.\n", err); |
305 | return err; | 299 | return err; |
306 | } | 300 | } |
307 | if (status) { | ||
308 | mthca_err(mdev, "SYS_EN returned status 0x%02x, " | ||
309 | "aborting.\n", status); | ||
310 | return -EINVAL; | ||
311 | } | ||
312 | 301 | ||
313 | err = mthca_QUERY_FW(mdev, &status); | 302 | err = mthca_QUERY_FW(mdev); |
314 | if (err) { | 303 | if (err) { |
315 | mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); | 304 | mthca_err(mdev, "QUERY_FW command returned %d," |
316 | goto err_disable; | 305 | " aborting.\n", err); |
317 | } | ||
318 | if (status) { | ||
319 | mthca_err(mdev, "QUERY_FW returned status 0x%02x, " | ||
320 | "aborting.\n", status); | ||
321 | err = -EINVAL; | ||
322 | goto err_disable; | 306 | goto err_disable; |
323 | } | 307 | } |
324 | err = mthca_QUERY_DDR(mdev, &status); | 308 | err = mthca_QUERY_DDR(mdev); |
325 | if (err) { | 309 | if (err) { |
326 | mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); | 310 | mthca_err(mdev, "QUERY_DDR command returned %d, aborting.\n", err); |
327 | goto err_disable; | ||
328 | } | ||
329 | if (status) { | ||
330 | mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " | ||
331 | "aborting.\n", status); | ||
332 | err = -EINVAL; | ||
333 | goto err_disable; | 311 | goto err_disable; |
334 | } | 312 | } |
335 | 313 | ||
336 | err = mthca_dev_lim(mdev, &dev_lim); | 314 | err = mthca_dev_lim(mdev, &dev_lim); |
337 | if (err) { | 315 | if (err) { |
338 | mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); | 316 | mthca_err(mdev, "QUERY_DEV_LIM command returned %d, aborting.\n", err); |
339 | goto err_disable; | 317 | goto err_disable; |
340 | } | 318 | } |
341 | 319 | ||
@@ -351,29 +329,22 @@ static int mthca_init_tavor(struct mthca_dev *mdev) | |||
351 | goto err_disable; | 329 | goto err_disable; |
352 | } | 330 | } |
353 | 331 | ||
354 | err = mthca_INIT_HCA(mdev, &init_hca, &status); | 332 | err = mthca_INIT_HCA(mdev, &init_hca); |
355 | if (err) { | 333 | if (err) { |
356 | mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); | 334 | mthca_err(mdev, "INIT_HCA command returned %d, aborting.\n", err); |
357 | goto err_disable; | ||
358 | } | ||
359 | if (status) { | ||
360 | mthca_err(mdev, "INIT_HCA returned status 0x%02x, " | ||
361 | "aborting.\n", status); | ||
362 | err = -EINVAL; | ||
363 | goto err_disable; | 335 | goto err_disable; |
364 | } | 336 | } |
365 | 337 | ||
366 | return 0; | 338 | return 0; |
367 | 339 | ||
368 | err_disable: | 340 | err_disable: |
369 | mthca_SYS_DIS(mdev, &status); | 341 | mthca_SYS_DIS(mdev); |
370 | 342 | ||
371 | return err; | 343 | return err; |
372 | } | 344 | } |
373 | 345 | ||
374 | static int mthca_load_fw(struct mthca_dev *mdev) | 346 | static int mthca_load_fw(struct mthca_dev *mdev) |
375 | { | 347 | { |
376 | u8 status; | ||
377 | int err; | 348 | int err; |
378 | 349 | ||
379 | /* FIXME: use HCA-attached memory for FW if present */ | 350 | /* FIXME: use HCA-attached memory for FW if present */ |
@@ -386,31 +357,21 @@ static int mthca_load_fw(struct mthca_dev *mdev) | |||
386 | return -ENOMEM; | 357 | return -ENOMEM; |
387 | } | 358 | } |
388 | 359 | ||
389 | err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); | 360 | err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm); |
390 | if (err) { | 361 | if (err) { |
391 | mthca_err(mdev, "MAP_FA command failed, aborting.\n"); | 362 | mthca_err(mdev, "MAP_FA command returned %d, aborting.\n", err); |
392 | goto err_free; | ||
393 | } | ||
394 | if (status) { | ||
395 | mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); | ||
396 | err = -EINVAL; | ||
397 | goto err_free; | 363 | goto err_free; |
398 | } | 364 | } |
399 | err = mthca_RUN_FW(mdev, &status); | 365 | err = mthca_RUN_FW(mdev); |
400 | if (err) { | 366 | if (err) { |
401 | mthca_err(mdev, "RUN_FW command failed, aborting.\n"); | 367 | mthca_err(mdev, "RUN_FW command returned %d, aborting.\n", err); |
402 | goto err_unmap_fa; | ||
403 | } | ||
404 | if (status) { | ||
405 | mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); | ||
406 | err = -EINVAL; | ||
407 | goto err_unmap_fa; | 368 | goto err_unmap_fa; |
408 | } | 369 | } |
409 | 370 | ||
410 | return 0; | 371 | return 0; |
411 | 372 | ||
412 | err_unmap_fa: | 373 | err_unmap_fa: |
413 | mthca_UNMAP_FA(mdev, &status); | 374 | mthca_UNMAP_FA(mdev); |
414 | 375 | ||
415 | err_free: | 376 | err_free: |
416 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); | 377 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); |
@@ -423,19 +384,13 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
423 | u64 icm_size) | 384 | u64 icm_size) |
424 | { | 385 | { |
425 | u64 aux_pages; | 386 | u64 aux_pages; |
426 | u8 status; | ||
427 | int err; | 387 | int err; |
428 | 388 | ||
429 | err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); | 389 | err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages); |
430 | if (err) { | 390 | if (err) { |
431 | mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); | 391 | mthca_err(mdev, "SET_ICM_SIZE command returned %d, aborting.\n", err); |
432 | return err; | 392 | return err; |
433 | } | 393 | } |
434 | if (status) { | ||
435 | mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " | ||
436 | "aborting.\n", status); | ||
437 | return -EINVAL; | ||
438 | } | ||
439 | 394 | ||
440 | mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", | 395 | mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", |
441 | (unsigned long long) icm_size >> 10, | 396 | (unsigned long long) icm_size >> 10, |
@@ -448,14 +403,9 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
448 | return -ENOMEM; | 403 | return -ENOMEM; |
449 | } | 404 | } |
450 | 405 | ||
451 | err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); | 406 | err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm); |
452 | if (err) { | 407 | if (err) { |
453 | mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); | 408 | mthca_err(mdev, "MAP_ICM_AUX returned %d, aborting.\n", err); |
454 | goto err_free_aux; | ||
455 | } | ||
456 | if (status) { | ||
457 | mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); | ||
458 | err = -EINVAL; | ||
459 | goto err_free_aux; | 409 | goto err_free_aux; |
460 | } | 410 | } |
461 | 411 | ||
@@ -596,7 +546,7 @@ err_unmap_eq: | |||
596 | mthca_unmap_eq_icm(mdev); | 546 | mthca_unmap_eq_icm(mdev); |
597 | 547 | ||
598 | err_unmap_aux: | 548 | err_unmap_aux: |
599 | mthca_UNMAP_ICM_AUX(mdev, &status); | 549 | mthca_UNMAP_ICM_AUX(mdev); |
600 | 550 | ||
601 | err_free_aux: | 551 | err_free_aux: |
602 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); | 552 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); |
@@ -606,7 +556,6 @@ err_free_aux: | |||
606 | 556 | ||
607 | static void mthca_free_icms(struct mthca_dev *mdev) | 557 | static void mthca_free_icms(struct mthca_dev *mdev) |
608 | { | 558 | { |
609 | u8 status; | ||
610 | 559 | ||
611 | mthca_free_icm_table(mdev, mdev->mcg_table.table); | 560 | mthca_free_icm_table(mdev, mdev->mcg_table.table); |
612 | if (mdev->mthca_flags & MTHCA_FLAG_SRQ) | 561 | if (mdev->mthca_flags & MTHCA_FLAG_SRQ) |
@@ -619,7 +568,7 @@ static void mthca_free_icms(struct mthca_dev *mdev) | |||
619 | mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); | 568 | mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); |
620 | mthca_unmap_eq_icm(mdev); | 569 | mthca_unmap_eq_icm(mdev); |
621 | 570 | ||
622 | mthca_UNMAP_ICM_AUX(mdev, &status); | 571 | mthca_UNMAP_ICM_AUX(mdev); |
623 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); | 572 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); |
624 | } | 573 | } |
625 | 574 | ||
@@ -629,43 +578,32 @@ static int mthca_init_arbel(struct mthca_dev *mdev) | |||
629 | struct mthca_profile profile; | 578 | struct mthca_profile profile; |
630 | struct mthca_init_hca_param init_hca; | 579 | struct mthca_init_hca_param init_hca; |
631 | s64 icm_size; | 580 | s64 icm_size; |
632 | u8 status; | ||
633 | int err; | 581 | int err; |
634 | 582 | ||
635 | err = mthca_QUERY_FW(mdev, &status); | 583 | err = mthca_QUERY_FW(mdev); |
636 | if (err) { | 584 | if (err) { |
637 | mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); | 585 | mthca_err(mdev, "QUERY_FW command failed %d, aborting.\n", err); |
638 | return err; | 586 | return err; |
639 | } | 587 | } |
640 | if (status) { | ||
641 | mthca_err(mdev, "QUERY_FW returned status 0x%02x, " | ||
642 | "aborting.\n", status); | ||
643 | return -EINVAL; | ||
644 | } | ||
645 | 588 | ||
646 | err = mthca_ENABLE_LAM(mdev, &status); | 589 | err = mthca_ENABLE_LAM(mdev); |
647 | if (err) { | 590 | if (err == -EAGAIN) { |
648 | mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); | ||
649 | return err; | ||
650 | } | ||
651 | if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { | ||
652 | mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); | 591 | mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); |
653 | mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; | 592 | mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; |
654 | } else if (status) { | 593 | } else if (err) { |
655 | mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " | 594 | mthca_err(mdev, "ENABLE_LAM returned %d, aborting.\n", err); |
656 | "aborting.\n", status); | 595 | return err; |
657 | return -EINVAL; | ||
658 | } | 596 | } |
659 | 597 | ||
660 | err = mthca_load_fw(mdev); | 598 | err = mthca_load_fw(mdev); |
661 | if (err) { | 599 | if (err) { |
662 | mthca_err(mdev, "Failed to start FW, aborting.\n"); | 600 | mthca_err(mdev, "Loading FW returned %d, aborting.\n", err); |
663 | goto err_disable; | 601 | goto err_disable; |
664 | } | 602 | } |
665 | 603 | ||
666 | err = mthca_dev_lim(mdev, &dev_lim); | 604 | err = mthca_dev_lim(mdev, &dev_lim); |
667 | if (err) { | 605 | if (err) { |
668 | mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); | 606 | mthca_err(mdev, "QUERY_DEV_LIM returned %d, aborting.\n", err); |
669 | goto err_stop_fw; | 607 | goto err_stop_fw; |
670 | } | 608 | } |
671 | 609 | ||
@@ -685,15 +623,9 @@ static int mthca_init_arbel(struct mthca_dev *mdev) | |||
685 | if (err) | 623 | if (err) |
686 | goto err_stop_fw; | 624 | goto err_stop_fw; |
687 | 625 | ||
688 | err = mthca_INIT_HCA(mdev, &init_hca, &status); | 626 | err = mthca_INIT_HCA(mdev, &init_hca); |
689 | if (err) { | 627 | if (err) { |
690 | mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); | 628 | mthca_err(mdev, "INIT_HCA command returned %d, aborting.\n", err); |
691 | goto err_free_icm; | ||
692 | } | ||
693 | if (status) { | ||
694 | mthca_err(mdev, "INIT_HCA returned status 0x%02x, " | ||
695 | "aborting.\n", status); | ||
696 | err = -EINVAL; | ||
697 | goto err_free_icm; | 629 | goto err_free_icm; |
698 | } | 630 | } |
699 | 631 | ||
@@ -703,37 +635,34 @@ err_free_icm: | |||
703 | mthca_free_icms(mdev); | 635 | mthca_free_icms(mdev); |
704 | 636 | ||
705 | err_stop_fw: | 637 | err_stop_fw: |
706 | mthca_UNMAP_FA(mdev, &status); | 638 | mthca_UNMAP_FA(mdev); |
707 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); | 639 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); |
708 | 640 | ||
709 | err_disable: | 641 | err_disable: |
710 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) | 642 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) |
711 | mthca_DISABLE_LAM(mdev, &status); | 643 | mthca_DISABLE_LAM(mdev); |
712 | 644 | ||
713 | return err; | 645 | return err; |
714 | } | 646 | } |
715 | 647 | ||
716 | static void mthca_close_hca(struct mthca_dev *mdev) | 648 | static void mthca_close_hca(struct mthca_dev *mdev) |
717 | { | 649 | { |
718 | u8 status; | 650 | mthca_CLOSE_HCA(mdev, 0); |
719 | |||
720 | mthca_CLOSE_HCA(mdev, 0, &status); | ||
721 | 651 | ||
722 | if (mthca_is_memfree(mdev)) { | 652 | if (mthca_is_memfree(mdev)) { |
723 | mthca_free_icms(mdev); | 653 | mthca_free_icms(mdev); |
724 | 654 | ||
725 | mthca_UNMAP_FA(mdev, &status); | 655 | mthca_UNMAP_FA(mdev); |
726 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); | 656 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); |
727 | 657 | ||
728 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) | 658 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) |
729 | mthca_DISABLE_LAM(mdev, &status); | 659 | mthca_DISABLE_LAM(mdev); |
730 | } else | 660 | } else |
731 | mthca_SYS_DIS(mdev, &status); | 661 | mthca_SYS_DIS(mdev); |
732 | } | 662 | } |
733 | 663 | ||
734 | static int mthca_init_hca(struct mthca_dev *mdev) | 664 | static int mthca_init_hca(struct mthca_dev *mdev) |
735 | { | 665 | { |
736 | u8 status; | ||
737 | int err; | 666 | int err; |
738 | struct mthca_adapter adapter; | 667 | struct mthca_adapter adapter; |
739 | 668 | ||
@@ -745,15 +674,9 @@ static int mthca_init_hca(struct mthca_dev *mdev) | |||
745 | if (err) | 674 | if (err) |
746 | return err; | 675 | return err; |
747 | 676 | ||
748 | err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); | 677 | err = mthca_QUERY_ADAPTER(mdev, &adapter); |
749 | if (err) { | 678 | if (err) { |
750 | mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); | 679 | mthca_err(mdev, "QUERY_ADAPTER command returned %d, aborting.\n", err); |
751 | goto err_close; | ||
752 | } | ||
753 | if (status) { | ||
754 | mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " | ||
755 | "aborting.\n", status); | ||
756 | err = -EINVAL; | ||
757 | goto err_close; | 680 | goto err_close; |
758 | } | 681 | } |
759 | 682 | ||
@@ -772,7 +695,6 @@ err_close: | |||
772 | static int mthca_setup_hca(struct mthca_dev *dev) | 695 | static int mthca_setup_hca(struct mthca_dev *dev) |
773 | { | 696 | { |
774 | int err; | 697 | int err; |
775 | u8 status; | ||
776 | 698 | ||
777 | MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); | 699 | MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); |
778 | 700 | ||
@@ -833,8 +755,8 @@ static int mthca_setup_hca(struct mthca_dev *dev) | |||
833 | goto err_eq_table_free; | 755 | goto err_eq_table_free; |
834 | } | 756 | } |
835 | 757 | ||
836 | err = mthca_NOP(dev, &status); | 758 | err = mthca_NOP(dev); |
837 | if (err || status) { | 759 | if (err) { |
838 | if (dev->mthca_flags & MTHCA_FLAG_MSI_X) { | 760 | if (dev->mthca_flags & MTHCA_FLAG_MSI_X) { |
839 | mthca_warn(dev, "NOP command failed to generate interrupt " | 761 | mthca_warn(dev, "NOP command failed to generate interrupt " |
840 | "(IRQ %d).\n", | 762 | "(IRQ %d).\n", |
@@ -1166,7 +1088,6 @@ err_disable_pdev: | |||
1166 | static void __mthca_remove_one(struct pci_dev *pdev) | 1088 | static void __mthca_remove_one(struct pci_dev *pdev) |
1167 | { | 1089 | { |
1168 | struct mthca_dev *mdev = pci_get_drvdata(pdev); | 1090 | struct mthca_dev *mdev = pci_get_drvdata(pdev); |
1169 | u8 status; | ||
1170 | int p; | 1091 | int p; |
1171 | 1092 | ||
1172 | if (mdev) { | 1093 | if (mdev) { |
@@ -1174,7 +1095,7 @@ static void __mthca_remove_one(struct pci_dev *pdev) | |||
1174 | mthca_unregister_device(mdev); | 1095 | mthca_unregister_device(mdev); |
1175 | 1096 | ||
1176 | for (p = 1; p <= mdev->limits.num_ports; ++p) | 1097 | for (p = 1; p <= mdev->limits.num_ports; ++p) |
1177 | mthca_CLOSE_IB(mdev, p, &status); | 1098 | mthca_CLOSE_IB(mdev, p); |
1178 | 1099 | ||
1179 | mthca_cleanup_mcg_table(mdev); | 1100 | mthca_cleanup_mcg_table(mdev); |
1180 | mthca_cleanup_av_table(mdev); | 1101 | mthca_cleanup_av_table(mdev); |
diff --git a/drivers/infiniband/hw/mthca/mthca_mcg.c b/drivers/infiniband/hw/mthca/mthca_mcg.c index 515790a606e6..6304ae8f4a6c 100644 --- a/drivers/infiniband/hw/mthca/mthca_mcg.c +++ b/drivers/infiniband/hw/mthca/mthca_mcg.c | |||
@@ -68,7 +68,6 @@ static int find_mgm(struct mthca_dev *dev, | |||
68 | struct mthca_mgm *mgm = mgm_mailbox->buf; | 68 | struct mthca_mgm *mgm = mgm_mailbox->buf; |
69 | u8 *mgid; | 69 | u8 *mgid; |
70 | int err; | 70 | int err; |
71 | u8 status; | ||
72 | 71 | ||
73 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); | 72 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); |
74 | if (IS_ERR(mailbox)) | 73 | if (IS_ERR(mailbox)) |
@@ -77,12 +76,9 @@ static int find_mgm(struct mthca_dev *dev, | |||
77 | 76 | ||
78 | memcpy(mgid, gid, 16); | 77 | memcpy(mgid, gid, 16); |
79 | 78 | ||
80 | err = mthca_MGID_HASH(dev, mailbox, hash, &status); | 79 | err = mthca_MGID_HASH(dev, mailbox, hash); |
81 | if (err) | 80 | if (err) { |
82 | goto out; | 81 | mthca_err(dev, "MGID_HASH failed (%d)\n", err); |
83 | if (status) { | ||
84 | mthca_err(dev, "MGID_HASH returned status %02x\n", status); | ||
85 | err = -EINVAL; | ||
86 | goto out; | 82 | goto out; |
87 | } | 83 | } |
88 | 84 | ||
@@ -93,12 +89,9 @@ static int find_mgm(struct mthca_dev *dev, | |||
93 | *prev = -1; | 89 | *prev = -1; |
94 | 90 | ||
95 | do { | 91 | do { |
96 | err = mthca_READ_MGM(dev, *index, mgm_mailbox, &status); | 92 | err = mthca_READ_MGM(dev, *index, mgm_mailbox); |
97 | if (err) | 93 | if (err) { |
98 | goto out; | 94 | mthca_err(dev, "READ_MGM failed (%d)\n", err); |
99 | if (status) { | ||
100 | mthca_err(dev, "READ_MGM returned status %02x\n", status); | ||
101 | err = -EINVAL; | ||
102 | goto out; | 95 | goto out; |
103 | } | 96 | } |
104 | 97 | ||
@@ -134,7 +127,6 @@ int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |||
134 | int link = 0; | 127 | int link = 0; |
135 | int i; | 128 | int i; |
136 | int err; | 129 | int err; |
137 | u8 status; | ||
138 | 130 | ||
139 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); | 131 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); |
140 | if (IS_ERR(mailbox)) | 132 | if (IS_ERR(mailbox)) |
@@ -160,12 +152,9 @@ int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |||
160 | goto out; | 152 | goto out; |
161 | } | 153 | } |
162 | 154 | ||
163 | err = mthca_READ_MGM(dev, index, mailbox, &status); | 155 | err = mthca_READ_MGM(dev, index, mailbox); |
164 | if (err) | 156 | if (err) { |
165 | goto out; | 157 | mthca_err(dev, "READ_MGM failed (%d)\n", err); |
166 | if (status) { | ||
167 | mthca_err(dev, "READ_MGM returned status %02x\n", status); | ||
168 | err = -EINVAL; | ||
169 | goto out; | 158 | goto out; |
170 | } | 159 | } |
171 | memset(mgm, 0, sizeof *mgm); | 160 | memset(mgm, 0, sizeof *mgm); |
@@ -189,11 +178,9 @@ int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |||
189 | goto out; | 178 | goto out; |
190 | } | 179 | } |
191 | 180 | ||
192 | err = mthca_WRITE_MGM(dev, index, mailbox, &status); | 181 | err = mthca_WRITE_MGM(dev, index, mailbox); |
193 | if (err) | 182 | if (err) { |
194 | goto out; | 183 | mthca_err(dev, "WRITE_MGM failed %d\n", err); |
195 | if (status) { | ||
196 | mthca_err(dev, "WRITE_MGM returned status %02x\n", status); | ||
197 | err = -EINVAL; | 184 | err = -EINVAL; |
198 | goto out; | 185 | goto out; |
199 | } | 186 | } |
@@ -201,24 +188,17 @@ int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |||
201 | if (!link) | 188 | if (!link) |
202 | goto out; | 189 | goto out; |
203 | 190 | ||
204 | err = mthca_READ_MGM(dev, prev, mailbox, &status); | 191 | err = mthca_READ_MGM(dev, prev, mailbox); |
205 | if (err) | 192 | if (err) { |
206 | goto out; | 193 | mthca_err(dev, "READ_MGM failed %d\n", err); |
207 | if (status) { | ||
208 | mthca_err(dev, "READ_MGM returned status %02x\n", status); | ||
209 | err = -EINVAL; | ||
210 | goto out; | 194 | goto out; |
211 | } | 195 | } |
212 | 196 | ||
213 | mgm->next_gid_index = cpu_to_be32(index << 6); | 197 | mgm->next_gid_index = cpu_to_be32(index << 6); |
214 | 198 | ||
215 | err = mthca_WRITE_MGM(dev, prev, mailbox, &status); | 199 | err = mthca_WRITE_MGM(dev, prev, mailbox); |
216 | if (err) | 200 | if (err) |
217 | goto out; | 201 | mthca_err(dev, "WRITE_MGM returned %d\n", err); |
218 | if (status) { | ||
219 | mthca_err(dev, "WRITE_MGM returned status %02x\n", status); | ||
220 | err = -EINVAL; | ||
221 | } | ||
222 | 202 | ||
223 | out: | 203 | out: |
224 | if (err && link && index != -1) { | 204 | if (err && link && index != -1) { |
@@ -240,7 +220,6 @@ int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |||
240 | int prev, index; | 220 | int prev, index; |
241 | int i, loc; | 221 | int i, loc; |
242 | int err; | 222 | int err; |
243 | u8 status; | ||
244 | 223 | ||
245 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); | 224 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); |
246 | if (IS_ERR(mailbox)) | 225 | if (IS_ERR(mailbox)) |
@@ -275,12 +254,9 @@ int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |||
275 | mgm->qp[loc] = mgm->qp[i - 1]; | 254 | mgm->qp[loc] = mgm->qp[i - 1]; |
276 | mgm->qp[i - 1] = 0; | 255 | mgm->qp[i - 1] = 0; |
277 | 256 | ||
278 | err = mthca_WRITE_MGM(dev, index, mailbox, &status); | 257 | err = mthca_WRITE_MGM(dev, index, mailbox); |
279 | if (err) | 258 | if (err) { |
280 | goto out; | 259 | mthca_err(dev, "WRITE_MGM returned %d\n", err); |
281 | if (status) { | ||
282 | mthca_err(dev, "WRITE_MGM returned status %02x\n", status); | ||
283 | err = -EINVAL; | ||
284 | goto out; | 260 | goto out; |
285 | } | 261 | } |
286 | 262 | ||
@@ -292,24 +268,17 @@ int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |||
292 | int amgm_index_to_free = be32_to_cpu(mgm->next_gid_index) >> 6; | 268 | int amgm_index_to_free = be32_to_cpu(mgm->next_gid_index) >> 6; |
293 | if (amgm_index_to_free) { | 269 | if (amgm_index_to_free) { |
294 | err = mthca_READ_MGM(dev, amgm_index_to_free, | 270 | err = mthca_READ_MGM(dev, amgm_index_to_free, |
295 | mailbox, &status); | 271 | mailbox); |
296 | if (err) | 272 | if (err) { |
297 | goto out; | 273 | mthca_err(dev, "READ_MGM returned %d\n", err); |
298 | if (status) { | ||
299 | mthca_err(dev, "READ_MGM returned status %02x\n", | ||
300 | status); | ||
301 | err = -EINVAL; | ||
302 | goto out; | 274 | goto out; |
303 | } | 275 | } |
304 | } else | 276 | } else |
305 | memset(mgm->gid, 0, 16); | 277 | memset(mgm->gid, 0, 16); |
306 | 278 | ||
307 | err = mthca_WRITE_MGM(dev, index, mailbox, &status); | 279 | err = mthca_WRITE_MGM(dev, index, mailbox); |
308 | if (err) | 280 | if (err) { |
309 | goto out; | 281 | mthca_err(dev, "WRITE_MGM returned %d\n", err); |
310 | if (status) { | ||
311 | mthca_err(dev, "WRITE_MGM returned status %02x\n", status); | ||
312 | err = -EINVAL; | ||
313 | goto out; | 282 | goto out; |
314 | } | 283 | } |
315 | if (amgm_index_to_free) { | 284 | if (amgm_index_to_free) { |
@@ -319,23 +288,17 @@ int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |||
319 | } else { | 288 | } else { |
320 | /* Remove entry from AMGM */ | 289 | /* Remove entry from AMGM */ |
321 | int curr_next_index = be32_to_cpu(mgm->next_gid_index) >> 6; | 290 | int curr_next_index = be32_to_cpu(mgm->next_gid_index) >> 6; |
322 | err = mthca_READ_MGM(dev, prev, mailbox, &status); | 291 | err = mthca_READ_MGM(dev, prev, mailbox); |
323 | if (err) | 292 | if (err) { |
324 | goto out; | 293 | mthca_err(dev, "READ_MGM returned %d\n", err); |
325 | if (status) { | ||
326 | mthca_err(dev, "READ_MGM returned status %02x\n", status); | ||
327 | err = -EINVAL; | ||
328 | goto out; | 294 | goto out; |
329 | } | 295 | } |
330 | 296 | ||
331 | mgm->next_gid_index = cpu_to_be32(curr_next_index << 6); | 297 | mgm->next_gid_index = cpu_to_be32(curr_next_index << 6); |
332 | 298 | ||
333 | err = mthca_WRITE_MGM(dev, prev, mailbox, &status); | 299 | err = mthca_WRITE_MGM(dev, prev, mailbox); |
334 | if (err) | 300 | if (err) { |
335 | goto out; | 301 | mthca_err(dev, "WRITE_MGM returned %d\n", err); |
336 | if (status) { | ||
337 | mthca_err(dev, "WRITE_MGM returned status %02x\n", status); | ||
338 | err = -EINVAL; | ||
339 | goto out; | 302 | goto out; |
340 | } | 303 | } |
341 | BUG_ON(index < dev->limits.num_mgms); | 304 | BUG_ON(index < dev->limits.num_mgms); |
diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.c b/drivers/infiniband/hw/mthca/mthca_memfree.c index 8c2a83732b5d..7d2e42dd6926 100644 --- a/drivers/infiniband/hw/mthca/mthca_memfree.c +++ b/drivers/infiniband/hw/mthca/mthca_memfree.c | |||
@@ -223,7 +223,6 @@ int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int ob | |||
223 | { | 223 | { |
224 | int i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE; | 224 | int i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE; |
225 | int ret = 0; | 225 | int ret = 0; |
226 | u8 status; | ||
227 | 226 | ||
228 | mutex_lock(&table->mutex); | 227 | mutex_lock(&table->mutex); |
229 | 228 | ||
@@ -240,8 +239,8 @@ int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int ob | |||
240 | goto out; | 239 | goto out; |
241 | } | 240 | } |
242 | 241 | ||
243 | if (mthca_MAP_ICM(dev, table->icm[i], table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | 242 | if (mthca_MAP_ICM(dev, table->icm[i], |
244 | &status) || status) { | 243 | table->virt + i * MTHCA_TABLE_CHUNK_SIZE)) { |
245 | mthca_free_icm(dev, table->icm[i], table->coherent); | 244 | mthca_free_icm(dev, table->icm[i], table->coherent); |
246 | table->icm[i] = NULL; | 245 | table->icm[i] = NULL; |
247 | ret = -ENOMEM; | 246 | ret = -ENOMEM; |
@@ -258,7 +257,6 @@ out: | |||
258 | void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj) | 257 | void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj) |
259 | { | 258 | { |
260 | int i; | 259 | int i; |
261 | u8 status; | ||
262 | 260 | ||
263 | if (!mthca_is_memfree(dev)) | 261 | if (!mthca_is_memfree(dev)) |
264 | return; | 262 | return; |
@@ -269,8 +267,7 @@ void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int o | |||
269 | 267 | ||
270 | if (--table->icm[i]->refcount == 0) { | 268 | if (--table->icm[i]->refcount == 0) { |
271 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | 269 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, |
272 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, | 270 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE); |
273 | &status); | ||
274 | mthca_free_icm(dev, table->icm[i], table->coherent); | 271 | mthca_free_icm(dev, table->icm[i], table->coherent); |
275 | table->icm[i] = NULL; | 272 | table->icm[i] = NULL; |
276 | } | 273 | } |
@@ -366,7 +363,6 @@ struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, | |||
366 | int num_icm; | 363 | int num_icm; |
367 | unsigned chunk_size; | 364 | unsigned chunk_size; |
368 | int i; | 365 | int i; |
369 | u8 status; | ||
370 | 366 | ||
371 | obj_per_chunk = MTHCA_TABLE_CHUNK_SIZE / obj_size; | 367 | obj_per_chunk = MTHCA_TABLE_CHUNK_SIZE / obj_size; |
372 | num_icm = DIV_ROUND_UP(nobj, obj_per_chunk); | 368 | num_icm = DIV_ROUND_UP(nobj, obj_per_chunk); |
@@ -396,8 +392,8 @@ struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, | |||
396 | __GFP_NOWARN, use_coherent); | 392 | __GFP_NOWARN, use_coherent); |
397 | if (!table->icm[i]) | 393 | if (!table->icm[i]) |
398 | goto err; | 394 | goto err; |
399 | if (mthca_MAP_ICM(dev, table->icm[i], virt + i * MTHCA_TABLE_CHUNK_SIZE, | 395 | if (mthca_MAP_ICM(dev, table->icm[i], |
400 | &status) || status) { | 396 | virt + i * MTHCA_TABLE_CHUNK_SIZE)) { |
401 | mthca_free_icm(dev, table->icm[i], table->coherent); | 397 | mthca_free_icm(dev, table->icm[i], table->coherent); |
402 | table->icm[i] = NULL; | 398 | table->icm[i] = NULL; |
403 | goto err; | 399 | goto err; |
@@ -416,8 +412,7 @@ err: | |||
416 | for (i = 0; i < num_icm; ++i) | 412 | for (i = 0; i < num_icm; ++i) |
417 | if (table->icm[i]) { | 413 | if (table->icm[i]) { |
418 | mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE, | 414 | mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE, |
419 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, | 415 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE); |
420 | &status); | ||
421 | mthca_free_icm(dev, table->icm[i], table->coherent); | 416 | mthca_free_icm(dev, table->icm[i], table->coherent); |
422 | } | 417 | } |
423 | 418 | ||
@@ -429,13 +424,12 @@ err: | |||
429 | void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table) | 424 | void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table) |
430 | { | 425 | { |
431 | int i; | 426 | int i; |
432 | u8 status; | ||
433 | 427 | ||
434 | for (i = 0; i < table->num_icm; ++i) | 428 | for (i = 0; i < table->num_icm; ++i) |
435 | if (table->icm[i]) { | 429 | if (table->icm[i]) { |
436 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | 430 | mthca_UNMAP_ICM(dev, |
437 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, | 431 | table->virt + i * MTHCA_TABLE_CHUNK_SIZE, |
438 | &status); | 432 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE); |
439 | mthca_free_icm(dev, table->icm[i], table->coherent); | 433 | mthca_free_icm(dev, table->icm[i], table->coherent); |
440 | } | 434 | } |
441 | 435 | ||
@@ -454,7 +448,6 @@ int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar, | |||
454 | { | 448 | { |
455 | struct page *pages[1]; | 449 | struct page *pages[1]; |
456 | int ret = 0; | 450 | int ret = 0; |
457 | u8 status; | ||
458 | int i; | 451 | int i; |
459 | 452 | ||
460 | if (!mthca_is_memfree(dev)) | 453 | if (!mthca_is_memfree(dev)) |
@@ -494,9 +487,7 @@ int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar, | |||
494 | } | 487 | } |
495 | 488 | ||
496 | ret = mthca_MAP_ICM_page(dev, sg_dma_address(&db_tab->page[i].mem), | 489 | ret = mthca_MAP_ICM_page(dev, sg_dma_address(&db_tab->page[i].mem), |
497 | mthca_uarc_virt(dev, uar, i), &status); | 490 | mthca_uarc_virt(dev, uar, i)); |
498 | if (!ret && status) | ||
499 | ret = -EINVAL; | ||
500 | if (ret) { | 491 | if (ret) { |
501 | pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); | 492 | pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); |
502 | put_page(sg_page(&db_tab->page[i].mem)); | 493 | put_page(sg_page(&db_tab->page[i].mem)); |
@@ -557,14 +548,13 @@ void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar, | |||
557 | struct mthca_user_db_table *db_tab) | 548 | struct mthca_user_db_table *db_tab) |
558 | { | 549 | { |
559 | int i; | 550 | int i; |
560 | u8 status; | ||
561 | 551 | ||
562 | if (!mthca_is_memfree(dev)) | 552 | if (!mthca_is_memfree(dev)) |
563 | return; | 553 | return; |
564 | 554 | ||
565 | for (i = 0; i < dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; ++i) { | 555 | for (i = 0; i < dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; ++i) { |
566 | if (db_tab->page[i].uvirt) { | 556 | if (db_tab->page[i].uvirt) { |
567 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, uar, i), 1, &status); | 557 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, uar, i), 1); |
568 | pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); | 558 | pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); |
569 | put_page(sg_page(&db_tab->page[i].mem)); | 559 | put_page(sg_page(&db_tab->page[i].mem)); |
570 | } | 560 | } |
@@ -581,7 +571,6 @@ int mthca_alloc_db(struct mthca_dev *dev, enum mthca_db_type type, | |||
581 | int i, j; | 571 | int i, j; |
582 | struct mthca_db_page *page; | 572 | struct mthca_db_page *page; |
583 | int ret = 0; | 573 | int ret = 0; |
584 | u8 status; | ||
585 | 574 | ||
586 | mutex_lock(&dev->db_tab->mutex); | 575 | mutex_lock(&dev->db_tab->mutex); |
587 | 576 | ||
@@ -644,9 +633,7 @@ alloc: | |||
644 | memset(page->db_rec, 0, MTHCA_ICM_PAGE_SIZE); | 633 | memset(page->db_rec, 0, MTHCA_ICM_PAGE_SIZE); |
645 | 634 | ||
646 | ret = mthca_MAP_ICM_page(dev, page->mapping, | 635 | ret = mthca_MAP_ICM_page(dev, page->mapping, |
647 | mthca_uarc_virt(dev, &dev->driver_uar, i), &status); | 636 | mthca_uarc_virt(dev, &dev->driver_uar, i)); |
648 | if (!ret && status) | ||
649 | ret = -EINVAL; | ||
650 | if (ret) { | 637 | if (ret) { |
651 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, | 638 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
652 | page->db_rec, page->mapping); | 639 | page->db_rec, page->mapping); |
@@ -678,7 +665,6 @@ void mthca_free_db(struct mthca_dev *dev, int type, int db_index) | |||
678 | { | 665 | { |
679 | int i, j; | 666 | int i, j; |
680 | struct mthca_db_page *page; | 667 | struct mthca_db_page *page; |
681 | u8 status; | ||
682 | 668 | ||
683 | i = db_index / MTHCA_DB_REC_PER_PAGE; | 669 | i = db_index / MTHCA_DB_REC_PER_PAGE; |
684 | j = db_index % MTHCA_DB_REC_PER_PAGE; | 670 | j = db_index % MTHCA_DB_REC_PER_PAGE; |
@@ -694,7 +680,7 @@ void mthca_free_db(struct mthca_dev *dev, int type, int db_index) | |||
694 | 680 | ||
695 | if (bitmap_empty(page->used, MTHCA_DB_REC_PER_PAGE) && | 681 | if (bitmap_empty(page->used, MTHCA_DB_REC_PER_PAGE) && |
696 | i >= dev->db_tab->max_group1 - 1) { | 682 | i >= dev->db_tab->max_group1 - 1) { |
697 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status); | 683 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1); |
698 | 684 | ||
699 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, | 685 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
700 | page->db_rec, page->mapping); | 686 | page->db_rec, page->mapping); |
@@ -745,7 +731,6 @@ int mthca_init_db_tab(struct mthca_dev *dev) | |||
745 | void mthca_cleanup_db_tab(struct mthca_dev *dev) | 731 | void mthca_cleanup_db_tab(struct mthca_dev *dev) |
746 | { | 732 | { |
747 | int i; | 733 | int i; |
748 | u8 status; | ||
749 | 734 | ||
750 | if (!mthca_is_memfree(dev)) | 735 | if (!mthca_is_memfree(dev)) |
751 | return; | 736 | return; |
@@ -763,7 +748,7 @@ void mthca_cleanup_db_tab(struct mthca_dev *dev) | |||
763 | if (!bitmap_empty(dev->db_tab->page[i].used, MTHCA_DB_REC_PER_PAGE)) | 748 | if (!bitmap_empty(dev->db_tab->page[i].used, MTHCA_DB_REC_PER_PAGE)) |
764 | mthca_warn(dev, "Kernel UARC page %d not empty\n", i); | 749 | mthca_warn(dev, "Kernel UARC page %d not empty\n", i); |
765 | 750 | ||
766 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status); | 751 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1); |
767 | 752 | ||
768 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, | 753 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
769 | dev->db_tab->page[i].db_rec, | 754 | dev->db_tab->page[i].db_rec, |
diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c index 44045c8846db..ab876f928a1b 100644 --- a/drivers/infiniband/hw/mthca/mthca_mr.c +++ b/drivers/infiniband/hw/mthca/mthca_mr.c | |||
@@ -257,7 +257,6 @@ static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, | |||
257 | struct mthca_mailbox *mailbox; | 257 | struct mthca_mailbox *mailbox; |
258 | __be64 *mtt_entry; | 258 | __be64 *mtt_entry; |
259 | int err = 0; | 259 | int err = 0; |
260 | u8 status; | ||
261 | int i; | 260 | int i; |
262 | 261 | ||
263 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); | 262 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); |
@@ -281,17 +280,11 @@ static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, | |||
281 | if (i & 1) | 280 | if (i & 1) |
282 | mtt_entry[i + 2] = 0; | 281 | mtt_entry[i + 2] = 0; |
283 | 282 | ||
284 | err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1, &status); | 283 | err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1); |
285 | if (err) { | 284 | if (err) { |
286 | mthca_warn(dev, "WRITE_MTT failed (%d)\n", err); | 285 | mthca_warn(dev, "WRITE_MTT failed (%d)\n", err); |
287 | goto out; | 286 | goto out; |
288 | } | 287 | } |
289 | if (status) { | ||
290 | mthca_warn(dev, "WRITE_MTT returned status 0x%02x\n", | ||
291 | status); | ||
292 | err = -EINVAL; | ||
293 | goto out; | ||
294 | } | ||
295 | 288 | ||
296 | list_len -= i; | 289 | list_len -= i; |
297 | start_index += i; | 290 | start_index += i; |
@@ -441,7 +434,6 @@ int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift, | |||
441 | u32 key; | 434 | u32 key; |
442 | int i; | 435 | int i; |
443 | int err; | 436 | int err; |
444 | u8 status; | ||
445 | 437 | ||
446 | WARN_ON(buffer_size_shift >= 32); | 438 | WARN_ON(buffer_size_shift >= 32); |
447 | 439 | ||
@@ -497,16 +489,10 @@ int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift, | |||
497 | } | 489 | } |
498 | 490 | ||
499 | err = mthca_SW2HW_MPT(dev, mailbox, | 491 | err = mthca_SW2HW_MPT(dev, mailbox, |
500 | key & (dev->limits.num_mpts - 1), | 492 | key & (dev->limits.num_mpts - 1)); |
501 | &status); | ||
502 | if (err) { | 493 | if (err) { |
503 | mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); | 494 | mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); |
504 | goto err_out_mailbox; | 495 | goto err_out_mailbox; |
505 | } else if (status) { | ||
506 | mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n", | ||
507 | status); | ||
508 | err = -EINVAL; | ||
509 | goto err_out_mailbox; | ||
510 | } | 496 | } |
511 | 497 | ||
512 | mthca_free_mailbox(dev, mailbox); | 498 | mthca_free_mailbox(dev, mailbox); |
@@ -567,17 +553,12 @@ static void mthca_free_region(struct mthca_dev *dev, u32 lkey) | |||
567 | void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr) | 553 | void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr) |
568 | { | 554 | { |
569 | int err; | 555 | int err; |
570 | u8 status; | ||
571 | 556 | ||
572 | err = mthca_HW2SW_MPT(dev, NULL, | 557 | err = mthca_HW2SW_MPT(dev, NULL, |
573 | key_to_hw_index(dev, mr->ibmr.lkey) & | 558 | key_to_hw_index(dev, mr->ibmr.lkey) & |
574 | (dev->limits.num_mpts - 1), | 559 | (dev->limits.num_mpts - 1)); |
575 | &status); | ||
576 | if (err) | 560 | if (err) |
577 | mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err); | 561 | mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err); |
578 | else if (status) | ||
579 | mthca_warn(dev, "HW2SW_MPT returned status 0x%02x\n", | ||
580 | status); | ||
581 | 562 | ||
582 | mthca_free_region(dev, mr->ibmr.lkey); | 563 | mthca_free_region(dev, mr->ibmr.lkey); |
583 | mthca_free_mtt(dev, mr->mtt); | 564 | mthca_free_mtt(dev, mr->mtt); |
@@ -590,7 +571,6 @@ int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd, | |||
590 | struct mthca_mailbox *mailbox; | 571 | struct mthca_mailbox *mailbox; |
591 | u64 mtt_seg; | 572 | u64 mtt_seg; |
592 | u32 key, idx; | 573 | u32 key, idx; |
593 | u8 status; | ||
594 | int list_len = mr->attr.max_pages; | 574 | int list_len = mr->attr.max_pages; |
595 | int err = -ENOMEM; | 575 | int err = -ENOMEM; |
596 | int i; | 576 | int i; |
@@ -672,18 +652,11 @@ int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd, | |||
672 | } | 652 | } |
673 | 653 | ||
674 | err = mthca_SW2HW_MPT(dev, mailbox, | 654 | err = mthca_SW2HW_MPT(dev, mailbox, |
675 | key & (dev->limits.num_mpts - 1), | 655 | key & (dev->limits.num_mpts - 1)); |
676 | &status); | ||
677 | if (err) { | 656 | if (err) { |
678 | mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); | 657 | mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); |
679 | goto err_out_mailbox_free; | 658 | goto err_out_mailbox_free; |
680 | } | 659 | } |
681 | if (status) { | ||
682 | mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n", | ||
683 | status); | ||
684 | err = -EINVAL; | ||
685 | goto err_out_mailbox_free; | ||
686 | } | ||
687 | 660 | ||
688 | mthca_free_mailbox(dev, mailbox); | 661 | mthca_free_mailbox(dev, mailbox); |
689 | return 0; | 662 | return 0; |
diff --git a/drivers/infiniband/hw/mthca/mthca_provider.c b/drivers/infiniband/hw/mthca/mthca_provider.c index 1e0b4b6074ad..365fe0e14192 100644 --- a/drivers/infiniband/hw/mthca/mthca_provider.c +++ b/drivers/infiniband/hw/mthca/mthca_provider.c | |||
@@ -63,8 +63,6 @@ static int mthca_query_device(struct ib_device *ibdev, | |||
63 | int err = -ENOMEM; | 63 | int err = -ENOMEM; |
64 | struct mthca_dev *mdev = to_mdev(ibdev); | 64 | struct mthca_dev *mdev = to_mdev(ibdev); |
65 | 65 | ||
66 | u8 status; | ||
67 | |||
68 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); | 66 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); |
69 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); | 67 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); |
70 | if (!in_mad || !out_mad) | 68 | if (!in_mad || !out_mad) |
@@ -78,14 +76,9 @@ static int mthca_query_device(struct ib_device *ibdev, | |||
78 | in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; | 76 | in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; |
79 | 77 | ||
80 | err = mthca_MAD_IFC(mdev, 1, 1, | 78 | err = mthca_MAD_IFC(mdev, 1, 1, |
81 | 1, NULL, NULL, in_mad, out_mad, | 79 | 1, NULL, NULL, in_mad, out_mad); |
82 | &status); | ||
83 | if (err) | 80 | if (err) |
84 | goto out; | 81 | goto out; |
85 | if (status) { | ||
86 | err = -EINVAL; | ||
87 | goto out; | ||
88 | } | ||
89 | 82 | ||
90 | props->device_cap_flags = mdev->device_cap_flags; | 83 | props->device_cap_flags = mdev->device_cap_flags; |
91 | props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & | 84 | props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & |
@@ -141,7 +134,6 @@ static int mthca_query_port(struct ib_device *ibdev, | |||
141 | struct ib_smp *in_mad = NULL; | 134 | struct ib_smp *in_mad = NULL; |
142 | struct ib_smp *out_mad = NULL; | 135 | struct ib_smp *out_mad = NULL; |
143 | int err = -ENOMEM; | 136 | int err = -ENOMEM; |
144 | u8 status; | ||
145 | 137 | ||
146 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); | 138 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); |
147 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); | 139 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); |
@@ -155,14 +147,9 @@ static int mthca_query_port(struct ib_device *ibdev, | |||
155 | in_mad->attr_mod = cpu_to_be32(port); | 147 | in_mad->attr_mod = cpu_to_be32(port); |
156 | 148 | ||
157 | err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, | 149 | err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, |
158 | port, NULL, NULL, in_mad, out_mad, | 150 | port, NULL, NULL, in_mad, out_mad); |
159 | &status); | ||
160 | if (err) | 151 | if (err) |
161 | goto out; | 152 | goto out; |
162 | if (status) { | ||
163 | err = -EINVAL; | ||
164 | goto out; | ||
165 | } | ||
166 | 153 | ||
167 | props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); | 154 | props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); |
168 | props->lmc = out_mad->data[34] & 0x7; | 155 | props->lmc = out_mad->data[34] & 0x7; |
@@ -214,7 +201,6 @@ static int mthca_modify_port(struct ib_device *ibdev, | |||
214 | struct mthca_set_ib_param set_ib; | 201 | struct mthca_set_ib_param set_ib; |
215 | struct ib_port_attr attr; | 202 | struct ib_port_attr attr; |
216 | int err; | 203 | int err; |
217 | u8 status; | ||
218 | 204 | ||
219 | if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex)) | 205 | if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex)) |
220 | return -ERESTARTSYS; | 206 | return -ERESTARTSYS; |
@@ -229,14 +215,9 @@ static int mthca_modify_port(struct ib_device *ibdev, | |||
229 | set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & | 215 | set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & |
230 | ~props->clr_port_cap_mask; | 216 | ~props->clr_port_cap_mask; |
231 | 217 | ||
232 | err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status); | 218 | err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port); |
233 | if (err) | 219 | if (err) |
234 | goto out; | 220 | goto out; |
235 | if (status) { | ||
236 | err = -EINVAL; | ||
237 | goto out; | ||
238 | } | ||
239 | |||
240 | out: | 221 | out: |
241 | mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); | 222 | mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); |
242 | return err; | 223 | return err; |
@@ -248,7 +229,6 @@ static int mthca_query_pkey(struct ib_device *ibdev, | |||
248 | struct ib_smp *in_mad = NULL; | 229 | struct ib_smp *in_mad = NULL; |
249 | struct ib_smp *out_mad = NULL; | 230 | struct ib_smp *out_mad = NULL; |
250 | int err = -ENOMEM; | 231 | int err = -ENOMEM; |
251 | u8 status; | ||
252 | 232 | ||
253 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); | 233 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); |
254 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); | 234 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); |
@@ -260,14 +240,9 @@ static int mthca_query_pkey(struct ib_device *ibdev, | |||
260 | in_mad->attr_mod = cpu_to_be32(index / 32); | 240 | in_mad->attr_mod = cpu_to_be32(index / 32); |
261 | 241 | ||
262 | err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, | 242 | err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, |
263 | port, NULL, NULL, in_mad, out_mad, | 243 | port, NULL, NULL, in_mad, out_mad); |
264 | &status); | ||
265 | if (err) | 244 | if (err) |
266 | goto out; | 245 | goto out; |
267 | if (status) { | ||
268 | err = -EINVAL; | ||
269 | goto out; | ||
270 | } | ||
271 | 246 | ||
272 | *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); | 247 | *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); |
273 | 248 | ||
@@ -283,7 +258,6 @@ static int mthca_query_gid(struct ib_device *ibdev, u8 port, | |||
283 | struct ib_smp *in_mad = NULL; | 258 | struct ib_smp *in_mad = NULL; |
284 | struct ib_smp *out_mad = NULL; | 259 | struct ib_smp *out_mad = NULL; |
285 | int err = -ENOMEM; | 260 | int err = -ENOMEM; |
286 | u8 status; | ||
287 | 261 | ||
288 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); | 262 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); |
289 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); | 263 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); |
@@ -295,14 +269,9 @@ static int mthca_query_gid(struct ib_device *ibdev, u8 port, | |||
295 | in_mad->attr_mod = cpu_to_be32(port); | 269 | in_mad->attr_mod = cpu_to_be32(port); |
296 | 270 | ||
297 | err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, | 271 | err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, |
298 | port, NULL, NULL, in_mad, out_mad, | 272 | port, NULL, NULL, in_mad, out_mad); |
299 | &status); | ||
300 | if (err) | 273 | if (err) |
301 | goto out; | 274 | goto out; |
302 | if (status) { | ||
303 | err = -EINVAL; | ||
304 | goto out; | ||
305 | } | ||
306 | 275 | ||
307 | memcpy(gid->raw, out_mad->data + 8, 8); | 276 | memcpy(gid->raw, out_mad->data + 8, 8); |
308 | 277 | ||
@@ -311,14 +280,9 @@ static int mthca_query_gid(struct ib_device *ibdev, u8 port, | |||
311 | in_mad->attr_mod = cpu_to_be32(index / 8); | 280 | in_mad->attr_mod = cpu_to_be32(index / 8); |
312 | 281 | ||
313 | err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, | 282 | err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, |
314 | port, NULL, NULL, in_mad, out_mad, | 283 | port, NULL, NULL, in_mad, out_mad); |
315 | &status); | ||
316 | if (err) | 284 | if (err) |
317 | goto out; | 285 | goto out; |
318 | if (status) { | ||
319 | err = -EINVAL; | ||
320 | goto out; | ||
321 | } | ||
322 | 286 | ||
323 | memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); | 287 | memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); |
324 | 288 | ||
@@ -800,7 +764,6 @@ static int mthca_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *uda | |||
800 | struct mthca_cq *cq = to_mcq(ibcq); | 764 | struct mthca_cq *cq = to_mcq(ibcq); |
801 | struct mthca_resize_cq ucmd; | 765 | struct mthca_resize_cq ucmd; |
802 | u32 lkey; | 766 | u32 lkey; |
803 | u8 status; | ||
804 | int ret; | 767 | int ret; |
805 | 768 | ||
806 | if (entries < 1 || entries > dev->limits.max_cqes) | 769 | if (entries < 1 || entries > dev->limits.max_cqes) |
@@ -827,9 +790,7 @@ static int mthca_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *uda | |||
827 | lkey = ucmd.lkey; | 790 | lkey = ucmd.lkey; |
828 | } | 791 | } |
829 | 792 | ||
830 | ret = mthca_RESIZE_CQ(dev, cq->cqn, lkey, ilog2(entries), &status); | 793 | ret = mthca_RESIZE_CQ(dev, cq->cqn, lkey, ilog2(entries)); |
831 | if (status) | ||
832 | ret = -EINVAL; | ||
833 | 794 | ||
834 | if (ret) { | 795 | if (ret) { |
835 | if (cq->resize_buf) { | 796 | if (cq->resize_buf) { |
@@ -1161,7 +1122,6 @@ static int mthca_unmap_fmr(struct list_head *fmr_list) | |||
1161 | { | 1122 | { |
1162 | struct ib_fmr *fmr; | 1123 | struct ib_fmr *fmr; |
1163 | int err; | 1124 | int err; |
1164 | u8 status; | ||
1165 | struct mthca_dev *mdev = NULL; | 1125 | struct mthca_dev *mdev = NULL; |
1166 | 1126 | ||
1167 | list_for_each_entry(fmr, fmr_list, list) { | 1127 | list_for_each_entry(fmr, fmr_list, list) { |
@@ -1182,12 +1142,8 @@ static int mthca_unmap_fmr(struct list_head *fmr_list) | |||
1182 | list_for_each_entry(fmr, fmr_list, list) | 1142 | list_for_each_entry(fmr, fmr_list, list) |
1183 | mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr)); | 1143 | mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr)); |
1184 | 1144 | ||
1185 | err = mthca_SYNC_TPT(mdev, &status); | 1145 | err = mthca_SYNC_TPT(mdev); |
1186 | if (err) | 1146 | return err; |
1187 | return err; | ||
1188 | if (status) | ||
1189 | return -EINVAL; | ||
1190 | return 0; | ||
1191 | } | 1147 | } |
1192 | 1148 | ||
1193 | static ssize_t show_rev(struct device *device, struct device_attribute *attr, | 1149 | static ssize_t show_rev(struct device *device, struct device_attribute *attr, |
@@ -1253,7 +1209,6 @@ static int mthca_init_node_data(struct mthca_dev *dev) | |||
1253 | struct ib_smp *in_mad = NULL; | 1209 | struct ib_smp *in_mad = NULL; |
1254 | struct ib_smp *out_mad = NULL; | 1210 | struct ib_smp *out_mad = NULL; |
1255 | int err = -ENOMEM; | 1211 | int err = -ENOMEM; |
1256 | u8 status; | ||
1257 | 1212 | ||
1258 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); | 1213 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); |
1259 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); | 1214 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); |
@@ -1264,28 +1219,18 @@ static int mthca_init_node_data(struct mthca_dev *dev) | |||
1264 | in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; | 1219 | in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; |
1265 | 1220 | ||
1266 | err = mthca_MAD_IFC(dev, 1, 1, | 1221 | err = mthca_MAD_IFC(dev, 1, 1, |
1267 | 1, NULL, NULL, in_mad, out_mad, | 1222 | 1, NULL, NULL, in_mad, out_mad); |
1268 | &status); | ||
1269 | if (err) | 1223 | if (err) |
1270 | goto out; | 1224 | goto out; |
1271 | if (status) { | ||
1272 | err = -EINVAL; | ||
1273 | goto out; | ||
1274 | } | ||
1275 | 1225 | ||
1276 | memcpy(dev->ib_dev.node_desc, out_mad->data, 64); | 1226 | memcpy(dev->ib_dev.node_desc, out_mad->data, 64); |
1277 | 1227 | ||
1278 | in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; | 1228 | in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; |
1279 | 1229 | ||
1280 | err = mthca_MAD_IFC(dev, 1, 1, | 1230 | err = mthca_MAD_IFC(dev, 1, 1, |
1281 | 1, NULL, NULL, in_mad, out_mad, | 1231 | 1, NULL, NULL, in_mad, out_mad); |
1282 | &status); | ||
1283 | if (err) | 1232 | if (err) |
1284 | goto out; | 1233 | goto out; |
1285 | if (status) { | ||
1286 | err = -EINVAL; | ||
1287 | goto out; | ||
1288 | } | ||
1289 | 1234 | ||
1290 | if (mthca_is_memfree(dev)) | 1235 | if (mthca_is_memfree(dev)) |
1291 | dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); | 1236 | dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); |
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c index a34c9d38e822..9601049e14d0 100644 --- a/drivers/infiniband/hw/mthca/mthca_qp.c +++ b/drivers/infiniband/hw/mthca/mthca_qp.c | |||
@@ -308,7 +308,6 @@ static void store_attrs(struct mthca_sqp *sqp, const struct ib_qp_attr *attr, | |||
308 | static void init_port(struct mthca_dev *dev, int port) | 308 | static void init_port(struct mthca_dev *dev, int port) |
309 | { | 309 | { |
310 | int err; | 310 | int err; |
311 | u8 status; | ||
312 | struct mthca_init_ib_param param; | 311 | struct mthca_init_ib_param param; |
313 | 312 | ||
314 | memset(¶m, 0, sizeof param); | 313 | memset(¶m, 0, sizeof param); |
@@ -319,11 +318,9 @@ static void init_port(struct mthca_dev *dev, int port) | |||
319 | param.gid_cap = dev->limits.gid_table_len; | 318 | param.gid_cap = dev->limits.gid_table_len; |
320 | param.pkey_cap = dev->limits.pkey_table_len; | 319 | param.pkey_cap = dev->limits.pkey_table_len; |
321 | 320 | ||
322 | err = mthca_INIT_IB(dev, ¶m, port, &status); | 321 | err = mthca_INIT_IB(dev, ¶m, port); |
323 | if (err) | 322 | if (err) |
324 | mthca_warn(dev, "INIT_IB failed, return code %d.\n", err); | 323 | mthca_warn(dev, "INIT_IB failed, return code %d.\n", err); |
325 | if (status) | ||
326 | mthca_warn(dev, "INIT_IB returned status %02x.\n", status); | ||
327 | } | 324 | } |
328 | 325 | ||
329 | static __be32 get_hw_access_flags(struct mthca_qp *qp, const struct ib_qp_attr *attr, | 326 | static __be32 get_hw_access_flags(struct mthca_qp *qp, const struct ib_qp_attr *attr, |
@@ -433,7 +430,6 @@ int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_m | |||
433 | struct mthca_qp_param *qp_param; | 430 | struct mthca_qp_param *qp_param; |
434 | struct mthca_qp_context *context; | 431 | struct mthca_qp_context *context; |
435 | int mthca_state; | 432 | int mthca_state; |
436 | u8 status; | ||
437 | 433 | ||
438 | mutex_lock(&qp->mutex); | 434 | mutex_lock(&qp->mutex); |
439 | 435 | ||
@@ -448,12 +444,9 @@ int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_m | |||
448 | goto out; | 444 | goto out; |
449 | } | 445 | } |
450 | 446 | ||
451 | err = mthca_QUERY_QP(dev, qp->qpn, 0, mailbox, &status); | 447 | err = mthca_QUERY_QP(dev, qp->qpn, 0, mailbox); |
452 | if (err) | 448 | if (err) { |
453 | goto out_mailbox; | 449 | mthca_warn(dev, "QUERY_QP failed (%d)\n", err); |
454 | if (status) { | ||
455 | mthca_warn(dev, "QUERY_QP returned status %02x\n", status); | ||
456 | err = -EINVAL; | ||
457 | goto out_mailbox; | 450 | goto out_mailbox; |
458 | } | 451 | } |
459 | 452 | ||
@@ -555,7 +548,6 @@ static int __mthca_modify_qp(struct ib_qp *ibqp, | |||
555 | struct mthca_qp_param *qp_param; | 548 | struct mthca_qp_param *qp_param; |
556 | struct mthca_qp_context *qp_context; | 549 | struct mthca_qp_context *qp_context; |
557 | u32 sqd_event = 0; | 550 | u32 sqd_event = 0; |
558 | u8 status; | ||
559 | int err = -EINVAL; | 551 | int err = -EINVAL; |
560 | 552 | ||
561 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); | 553 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); |
@@ -781,13 +773,10 @@ static int __mthca_modify_qp(struct ib_qp *ibqp, | |||
781 | sqd_event = 1 << 31; | 773 | sqd_event = 1 << 31; |
782 | 774 | ||
783 | err = mthca_MODIFY_QP(dev, cur_state, new_state, qp->qpn, 0, | 775 | err = mthca_MODIFY_QP(dev, cur_state, new_state, qp->qpn, 0, |
784 | mailbox, sqd_event, &status); | 776 | mailbox, sqd_event); |
785 | if (err) | 777 | if (err) { |
786 | goto out_mailbox; | 778 | mthca_warn(dev, "modify QP %d->%d returned %d.\n", |
787 | if (status) { | 779 | cur_state, new_state, err); |
788 | mthca_warn(dev, "modify QP %d->%d returned status %02x.\n", | ||
789 | cur_state, new_state, status); | ||
790 | err = -EINVAL; | ||
791 | goto out_mailbox; | 780 | goto out_mailbox; |
792 | } | 781 | } |
793 | 782 | ||
@@ -817,7 +806,7 @@ static int __mthca_modify_qp(struct ib_qp *ibqp, | |||
817 | cur_state != IB_QPS_ERR && | 806 | cur_state != IB_QPS_ERR && |
818 | (new_state == IB_QPS_RESET || | 807 | (new_state == IB_QPS_RESET || |
819 | new_state == IB_QPS_ERR)) | 808 | new_state == IB_QPS_ERR)) |
820 | mthca_CLOSE_IB(dev, qp->port, &status); | 809 | mthca_CLOSE_IB(dev, qp->port); |
821 | } | 810 | } |
822 | 811 | ||
823 | /* | 812 | /* |
@@ -1429,7 +1418,6 @@ static inline int get_qp_refcount(struct mthca_dev *dev, struct mthca_qp *qp) | |||
1429 | void mthca_free_qp(struct mthca_dev *dev, | 1418 | void mthca_free_qp(struct mthca_dev *dev, |
1430 | struct mthca_qp *qp) | 1419 | struct mthca_qp *qp) |
1431 | { | 1420 | { |
1432 | u8 status; | ||
1433 | struct mthca_cq *send_cq; | 1421 | struct mthca_cq *send_cq; |
1434 | struct mthca_cq *recv_cq; | 1422 | struct mthca_cq *recv_cq; |
1435 | 1423 | ||
@@ -1454,7 +1442,7 @@ void mthca_free_qp(struct mthca_dev *dev, | |||
1454 | 1442 | ||
1455 | if (qp->state != IB_QPS_RESET) | 1443 | if (qp->state != IB_QPS_RESET) |
1456 | mthca_MODIFY_QP(dev, qp->state, IB_QPS_RESET, qp->qpn, 0, | 1444 | mthca_MODIFY_QP(dev, qp->state, IB_QPS_RESET, qp->qpn, 0, |
1457 | NULL, 0, &status); | 1445 | NULL, 0); |
1458 | 1446 | ||
1459 | /* | 1447 | /* |
1460 | * If this is a userspace QP, the buffers, MR, CQs and so on | 1448 | * If this is a userspace QP, the buffers, MR, CQs and so on |
@@ -2263,7 +2251,6 @@ void mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send, | |||
2263 | int mthca_init_qp_table(struct mthca_dev *dev) | 2251 | int mthca_init_qp_table(struct mthca_dev *dev) |
2264 | { | 2252 | { |
2265 | int err; | 2253 | int err; |
2266 | u8 status; | ||
2267 | int i; | 2254 | int i; |
2268 | 2255 | ||
2269 | spin_lock_init(&dev->qp_table.lock); | 2256 | spin_lock_init(&dev->qp_table.lock); |
@@ -2290,15 +2277,10 @@ int mthca_init_qp_table(struct mthca_dev *dev) | |||
2290 | 2277 | ||
2291 | for (i = 0; i < 2; ++i) { | 2278 | for (i = 0; i < 2; ++i) { |
2292 | err = mthca_CONF_SPECIAL_QP(dev, i ? IB_QPT_GSI : IB_QPT_SMI, | 2279 | err = mthca_CONF_SPECIAL_QP(dev, i ? IB_QPT_GSI : IB_QPT_SMI, |
2293 | dev->qp_table.sqp_start + i * 2, | 2280 | dev->qp_table.sqp_start + i * 2); |
2294 | &status); | 2281 | if (err) { |
2295 | if (err) | ||
2296 | goto err_out; | ||
2297 | if (status) { | ||
2298 | mthca_warn(dev, "CONF_SPECIAL_QP returned " | 2282 | mthca_warn(dev, "CONF_SPECIAL_QP returned " |
2299 | "status %02x, aborting.\n", | 2283 | "%d, aborting.\n", err); |
2300 | status); | ||
2301 | err = -EINVAL; | ||
2302 | goto err_out; | 2284 | goto err_out; |
2303 | } | 2285 | } |
2304 | } | 2286 | } |
@@ -2306,7 +2288,7 @@ int mthca_init_qp_table(struct mthca_dev *dev) | |||
2306 | 2288 | ||
2307 | err_out: | 2289 | err_out: |
2308 | for (i = 0; i < 2; ++i) | 2290 | for (i = 0; i < 2; ++i) |
2309 | mthca_CONF_SPECIAL_QP(dev, i, 0, &status); | 2291 | mthca_CONF_SPECIAL_QP(dev, i, 0); |
2310 | 2292 | ||
2311 | mthca_array_cleanup(&dev->qp_table.qp, dev->limits.num_qps); | 2293 | mthca_array_cleanup(&dev->qp_table.qp, dev->limits.num_qps); |
2312 | mthca_alloc_cleanup(&dev->qp_table.alloc); | 2294 | mthca_alloc_cleanup(&dev->qp_table.alloc); |
@@ -2317,10 +2299,9 @@ int mthca_init_qp_table(struct mthca_dev *dev) | |||
2317 | void mthca_cleanup_qp_table(struct mthca_dev *dev) | 2299 | void mthca_cleanup_qp_table(struct mthca_dev *dev) |
2318 | { | 2300 | { |
2319 | int i; | 2301 | int i; |
2320 | u8 status; | ||
2321 | 2302 | ||
2322 | for (i = 0; i < 2; ++i) | 2303 | for (i = 0; i < 2; ++i) |
2323 | mthca_CONF_SPECIAL_QP(dev, i, 0, &status); | 2304 | mthca_CONF_SPECIAL_QP(dev, i, 0); |
2324 | 2305 | ||
2325 | mthca_array_cleanup(&dev->qp_table.qp, dev->limits.num_qps); | 2306 | mthca_array_cleanup(&dev->qp_table.qp, dev->limits.num_qps); |
2326 | mthca_alloc_cleanup(&dev->qp_table.alloc); | 2307 | mthca_alloc_cleanup(&dev->qp_table.alloc); |
diff --git a/drivers/infiniband/hw/mthca/mthca_srq.c b/drivers/infiniband/hw/mthca/mthca_srq.c index 4fabe62aab8a..d22f970480c0 100644 --- a/drivers/infiniband/hw/mthca/mthca_srq.c +++ b/drivers/infiniband/hw/mthca/mthca_srq.c | |||
@@ -200,7 +200,6 @@ int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd, | |||
200 | struct ib_srq_attr *attr, struct mthca_srq *srq) | 200 | struct ib_srq_attr *attr, struct mthca_srq *srq) |
201 | { | 201 | { |
202 | struct mthca_mailbox *mailbox; | 202 | struct mthca_mailbox *mailbox; |
203 | u8 status; | ||
204 | int ds; | 203 | int ds; |
205 | int err; | 204 | int err; |
206 | 205 | ||
@@ -266,18 +265,12 @@ int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd, | |||
266 | else | 265 | else |
267 | mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf); | 266 | mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf); |
268 | 267 | ||
269 | err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn, &status); | 268 | err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn); |
270 | 269 | ||
271 | if (err) { | 270 | if (err) { |
272 | mthca_warn(dev, "SW2HW_SRQ failed (%d)\n", err); | 271 | mthca_warn(dev, "SW2HW_SRQ failed (%d)\n", err); |
273 | goto err_out_free_buf; | 272 | goto err_out_free_buf; |
274 | } | 273 | } |
275 | if (status) { | ||
276 | mthca_warn(dev, "SW2HW_SRQ returned status 0x%02x\n", | ||
277 | status); | ||
278 | err = -EINVAL; | ||
279 | goto err_out_free_buf; | ||
280 | } | ||
281 | 274 | ||
282 | spin_lock_irq(&dev->srq_table.lock); | 275 | spin_lock_irq(&dev->srq_table.lock); |
283 | if (mthca_array_set(&dev->srq_table.srq, | 276 | if (mthca_array_set(&dev->srq_table.srq, |
@@ -299,11 +292,9 @@ int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd, | |||
299 | return 0; | 292 | return 0; |
300 | 293 | ||
301 | err_out_free_srq: | 294 | err_out_free_srq: |
302 | err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status); | 295 | err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn); |
303 | if (err) | 296 | if (err) |
304 | mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err); | 297 | mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err); |
305 | else if (status) | ||
306 | mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status); | ||
307 | 298 | ||
308 | err_out_free_buf: | 299 | err_out_free_buf: |
309 | if (!pd->ibpd.uobject) | 300 | if (!pd->ibpd.uobject) |
@@ -340,7 +331,6 @@ void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq) | |||
340 | { | 331 | { |
341 | struct mthca_mailbox *mailbox; | 332 | struct mthca_mailbox *mailbox; |
342 | int err; | 333 | int err; |
343 | u8 status; | ||
344 | 334 | ||
345 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); | 335 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); |
346 | if (IS_ERR(mailbox)) { | 336 | if (IS_ERR(mailbox)) { |
@@ -348,11 +338,9 @@ void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq) | |||
348 | return; | 338 | return; |
349 | } | 339 | } |
350 | 340 | ||
351 | err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status); | 341 | err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn); |
352 | if (err) | 342 | if (err) |
353 | mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err); | 343 | mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err); |
354 | else if (status) | ||
355 | mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status); | ||
356 | 344 | ||
357 | spin_lock_irq(&dev->srq_table.lock); | 345 | spin_lock_irq(&dev->srq_table.lock); |
358 | mthca_array_clear(&dev->srq_table.srq, | 346 | mthca_array_clear(&dev->srq_table.srq, |
@@ -378,8 +366,7 @@ int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr, | |||
378 | { | 366 | { |
379 | struct mthca_dev *dev = to_mdev(ibsrq->device); | 367 | struct mthca_dev *dev = to_mdev(ibsrq->device); |
380 | struct mthca_srq *srq = to_msrq(ibsrq); | 368 | struct mthca_srq *srq = to_msrq(ibsrq); |
381 | int ret; | 369 | int ret = 0; |
382 | u8 status; | ||
383 | 370 | ||
384 | /* We don't support resizing SRQs (yet?) */ | 371 | /* We don't support resizing SRQs (yet?) */ |
385 | if (attr_mask & IB_SRQ_MAX_WR) | 372 | if (attr_mask & IB_SRQ_MAX_WR) |
@@ -391,16 +378,11 @@ int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr, | |||
391 | return -EINVAL; | 378 | return -EINVAL; |
392 | 379 | ||
393 | mutex_lock(&srq->mutex); | 380 | mutex_lock(&srq->mutex); |
394 | ret = mthca_ARM_SRQ(dev, srq->srqn, attr->srq_limit, &status); | 381 | ret = mthca_ARM_SRQ(dev, srq->srqn, attr->srq_limit); |
395 | mutex_unlock(&srq->mutex); | 382 | mutex_unlock(&srq->mutex); |
396 | |||
397 | if (ret) | ||
398 | return ret; | ||
399 | if (status) | ||
400 | return -EINVAL; | ||
401 | } | 383 | } |
402 | 384 | ||
403 | return 0; | 385 | return ret; |
404 | } | 386 | } |
405 | 387 | ||
406 | int mthca_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr) | 388 | int mthca_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr) |
@@ -410,14 +392,13 @@ int mthca_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr) | |||
410 | struct mthca_mailbox *mailbox; | 392 | struct mthca_mailbox *mailbox; |
411 | struct mthca_arbel_srq_context *arbel_ctx; | 393 | struct mthca_arbel_srq_context *arbel_ctx; |
412 | struct mthca_tavor_srq_context *tavor_ctx; | 394 | struct mthca_tavor_srq_context *tavor_ctx; |
413 | u8 status; | ||
414 | int err; | 395 | int err; |
415 | 396 | ||
416 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); | 397 | mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); |
417 | if (IS_ERR(mailbox)) | 398 | if (IS_ERR(mailbox)) |
418 | return PTR_ERR(mailbox); | 399 | return PTR_ERR(mailbox); |
419 | 400 | ||
420 | err = mthca_QUERY_SRQ(dev, srq->srqn, mailbox, &status); | 401 | err = mthca_QUERY_SRQ(dev, srq->srqn, mailbox); |
421 | if (err) | 402 | if (err) |
422 | goto out; | 403 | goto out; |
423 | 404 | ||