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authorPeter Oruba <peter.oruba@amd.com>2007-08-10 16:54:33 -0400
committerRoland Dreier <rolandd@cisco.com>2007-10-09 22:59:07 -0400
commita855b1a7423ac83c76638f156d79c854b0feb94d (patch)
tree548ea2d78e8850dadffd7cc664045ac5adb7b8d5 /drivers/infiniband/hw/mthca/mthca_main.c
parent3c10c7c929b30e8813d15960cb97f95a0b2ba615 (diff)
IB/mthca: Use PCI-X/PCI-Express read control interfaces
These driver changes incorporate the proposed PCI-X / PCI-Express read byte count interface. Reading and setting those values doesn't take place "manually", instead wrapping functions are called to allow quirks for some PCI bridges. Signed-off by: Peter Oruba <peter.oruba@amd.com> Based on work by Stephen Hemminger <shemminger@linux-foundation.org> Cc: Roland Dreier <rolandd@cisco.com> Cc: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/mthca/mthca_main.c')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_main.c33
1 files changed, 8 insertions, 25 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c
index 04c1520524cd..60de6f93869e 100644
--- a/drivers/infiniband/hw/mthca/mthca_main.c
+++ b/drivers/infiniband/hw/mthca/mthca_main.c
@@ -137,40 +137,23 @@ static const char mthca_version[] __devinitdata =
137 137
138static int mthca_tune_pci(struct mthca_dev *mdev) 138static int mthca_tune_pci(struct mthca_dev *mdev)
139{ 139{
140 int cap;
141 u16 val;
142
143 if (!tune_pci) 140 if (!tune_pci)
144 return 0; 141 return 0;
145 142
146 /* First try to max out Read Byte Count */ 143 /* First try to max out Read Byte Count */
147 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX); 144 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) {
148 if (cap) { 145 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) {
149 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) { 146 mthca_err(mdev, "Couldn't set PCI-X max read count, "
150 mthca_err(mdev, "Couldn't read PCI-X command register, " 147 "aborting.\n");
151 "aborting.\n");
152 return -ENODEV;
153 }
154 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
155 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
156 mthca_err(mdev, "Couldn't write PCI-X command register, "
157 "aborting.\n");
158 return -ENODEV; 148 return -ENODEV;
159 } 149 }
160 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 150 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
161 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 151 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
162 152
163 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP); 153 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) {
164 if (cap) { 154 if (pcie_set_readrq(mdev->pdev, 4096)) {
165 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) { 155 mthca_err(mdev, "Couldn't write PCI Express read request, "
166 mthca_err(mdev, "Couldn't read PCI Express device control " 156 "aborting.\n");
167 "register, aborting.\n");
168 return -ENODEV;
169 }
170 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
171 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
172 mthca_err(mdev, "Couldn't write PCI Express device control "
173 "register, aborting.\n");
174 return -ENODEV; 157 return -ENODEV;
175 } 158 }
176 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 159 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)