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authorRalph Campbell <ralph.campbell@qlogic.com>2008-04-17 00:09:29 -0400
committerRoland Dreier <rolandd@cisco.com>2008-04-17 00:09:29 -0400
commit9355fb6a064723c71e80e9c78de3140b43bfb52d (patch)
treedd0fffeb6633aed6cb2c946a05bf33e05f2e9436 /drivers/infiniband/hw/ipath/ipath_stats.c
parent2ba3f56eb402672ff83601b5990b219d39577636 (diff)
IB/ipath: Add support for 7220 receive queue changes
Newer HCAs have a HW option to write a sequence number to each receive queue entry and avoid a separate DMA of the tail register to memory. This patch adds support for these changes. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_stats.c')
-rw-r--r--drivers/infiniband/hw/ipath/ipath_stats.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_stats.c b/drivers/infiniband/hw/ipath/ipath_stats.c
index 57eb1d549785..adff2f10dc0e 100644
--- a/drivers/infiniband/hw/ipath/ipath_stats.c
+++ b/drivers/infiniband/hw/ipath/ipath_stats.c
@@ -136,6 +136,7 @@ static void ipath_qcheck(struct ipath_devdata *dd)
136 struct ipath_portdata *pd = dd->ipath_pd[0]; 136 struct ipath_portdata *pd = dd->ipath_pd[0];
137 size_t blen = 0; 137 size_t blen = 0;
138 char buf[128]; 138 char buf[128];
139 u32 hdrqtail;
139 140
140 *buf = 0; 141 *buf = 0;
141 if (pd->port_hdrqfull != dd->ipath_p0_hdrqfull) { 142 if (pd->port_hdrqfull != dd->ipath_p0_hdrqfull) {
@@ -174,17 +175,18 @@ static void ipath_qcheck(struct ipath_devdata *dd)
174 if (blen) 175 if (blen)
175 ipath_dbg("%s\n", buf); 176 ipath_dbg("%s\n", buf);
176 177
177 if (pd->port_head != (u32) 178 hdrqtail = ipath_get_hdrqtail(pd);
178 le64_to_cpu(*dd->ipath_hdrqtailptr)) { 179 if (pd->port_head != hdrqtail) {
179 if (dd->ipath_lastport0rcv_cnt == 180 if (dd->ipath_lastport0rcv_cnt ==
180 ipath_stats.sps_port0pkts) { 181 ipath_stats.sps_port0pkts) {
181 ipath_cdbg(PKT, "missing rcv interrupts? " 182 ipath_cdbg(PKT, "missing rcv interrupts? "
182 "port0 hd=%llx tl=%x; port0pkts %llx\n", 183 "port0 hd=%x tl=%x; port0pkts %llx; write"
183 (unsigned long long) 184 " hd (w/intr)\n",
184 le64_to_cpu(*dd->ipath_hdrqtailptr), 185 pd->port_head, hdrqtail,
185 pd->port_head,
186 (unsigned long long) 186 (unsigned long long)
187 ipath_stats.sps_port0pkts); 187 ipath_stats.sps_port0pkts);
188 ipath_write_ureg(dd, ur_rcvhdrhead, hdrqtail |
189 dd->ipath_rhdrhead_intr_off, pd->port_port);
188 } 190 }
189 dd->ipath_lastport0rcv_cnt = ipath_stats.sps_port0pkts; 191 dd->ipath_lastport0rcv_cnt = ipath_stats.sps_port0pkts;
190 } 192 }