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authorRalph Campbell <ralph.campbell@qlogic.com>2008-01-07 00:02:34 -0500
committerRoland Dreier <rolandd@cisco.com>2008-01-25 17:15:38 -0500
commit3029fcc3d44530601f19fd8f551ac195d3a918d7 (patch)
treedf486443f140a8d47fab8bda9552744c3201b865 /drivers/infiniband/hw/ipath/ipath_iba6120.c
parent6c719cae0b91f577738dfb4007baee28f03e48a5 (diff)
IB/ipath: Export hardware counters more consistently
Various hardware counters are exported via the ipath file system (since it is binary data). The old file format was very dependent on the HW offsets for these registers. Newer HCA chips can have different counters at different offsets. This patch adds a level of indirection to make the file format consistent across HCAs. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_iba6120.c')
-rw-r--r--drivers/infiniband/hw/ipath/ipath_iba6120.c153
1 files changed, 150 insertions, 3 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_iba6120.c b/drivers/infiniband/hw/ipath/ipath_iba6120.c
index e6893ebc59d4..97ae11793973 100644
--- a/drivers/infiniband/hw/ipath/ipath_iba6120.c
+++ b/drivers/infiniband/hw/ipath/ipath_iba6120.c
@@ -145,10 +145,57 @@ struct _infinipath_do_not_use_kernel_regs {
145 unsigned long long Reserved12; 145 unsigned long long Reserved12;
146}; 146};
147 147
148#define IPATH_KREG_OFFSET(field) (offsetof(struct \ 148struct _infinipath_do_not_use_counters {
149 _infinipath_do_not_use_kernel_regs, field) / sizeof(u64)) 149 __u64 LBIntCnt;
150 __u64 LBFlowStallCnt;
151 __u64 Reserved1;
152 __u64 TxUnsupVLErrCnt;
153 __u64 TxDataPktCnt;
154 __u64 TxFlowPktCnt;
155 __u64 TxDwordCnt;
156 __u64 TxLenErrCnt;
157 __u64 TxMaxMinLenErrCnt;
158 __u64 TxUnderrunCnt;
159 __u64 TxFlowStallCnt;
160 __u64 TxDroppedPktCnt;
161 __u64 RxDroppedPktCnt;
162 __u64 RxDataPktCnt;
163 __u64 RxFlowPktCnt;
164 __u64 RxDwordCnt;
165 __u64 RxLenErrCnt;
166 __u64 RxMaxMinLenErrCnt;
167 __u64 RxICRCErrCnt;
168 __u64 RxVCRCErrCnt;
169 __u64 RxFlowCtrlErrCnt;
170 __u64 RxBadFormatCnt;
171 __u64 RxLinkProblemCnt;
172 __u64 RxEBPCnt;
173 __u64 RxLPCRCErrCnt;
174 __u64 RxBufOvflCnt;
175 __u64 RxTIDFullErrCnt;
176 __u64 RxTIDValidErrCnt;
177 __u64 RxPKeyMismatchCnt;
178 __u64 RxP0HdrEgrOvflCnt;
179 __u64 RxP1HdrEgrOvflCnt;
180 __u64 RxP2HdrEgrOvflCnt;
181 __u64 RxP3HdrEgrOvflCnt;
182 __u64 RxP4HdrEgrOvflCnt;
183 __u64 RxP5HdrEgrOvflCnt;
184 __u64 RxP6HdrEgrOvflCnt;
185 __u64 RxP7HdrEgrOvflCnt;
186 __u64 RxP8HdrEgrOvflCnt;
187 __u64 Reserved6;
188 __u64 Reserved7;
189 __u64 IBStatusChangeCnt;
190 __u64 IBLinkErrRecoveryCnt;
191 __u64 IBLinkDownedCnt;
192 __u64 IBSymbolErrCnt;
193};
194
195#define IPATH_KREG_OFFSET(field) (offsetof( \
196 struct _infinipath_do_not_use_kernel_regs, field) / sizeof(u64))
150#define IPATH_CREG_OFFSET(field) (offsetof( \ 197#define IPATH_CREG_OFFSET(field) (offsetof( \
151 struct infinipath_counters, field) / sizeof(u64)) 198 struct _infinipath_do_not_use_counters, field) / sizeof(u64))
152 199
153static const struct ipath_kregs ipath_pe_kregs = { 200static const struct ipath_kregs ipath_pe_kregs = {
154 .kr_control = IPATH_KREG_OFFSET(Control), 201 .kr_control = IPATH_KREG_OFFSET(Control),
@@ -1368,6 +1415,105 @@ static void ipath_pe_free_irq(struct ipath_devdata *dd)
1368 dd->ipath_irq = 0; 1415 dd->ipath_irq = 0;
1369} 1416}
1370 1417
1418static void ipath_pe_read_counters(struct ipath_devdata *dd,
1419 struct infinipath_counters *cntrs)
1420{
1421 cntrs->LBIntCnt =
1422 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(LBIntCnt));
1423 cntrs->LBFlowStallCnt =
1424 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(LBFlowStallCnt));
1425 cntrs->TxSDmaDescCnt = 0;
1426 cntrs->TxUnsupVLErrCnt =
1427 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxUnsupVLErrCnt));
1428 cntrs->TxDataPktCnt =
1429 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxDataPktCnt));
1430 cntrs->TxFlowPktCnt =
1431 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxFlowPktCnt));
1432 cntrs->TxDwordCnt =
1433 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxDwordCnt));
1434 cntrs->TxLenErrCnt =
1435 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxLenErrCnt));
1436 cntrs->TxMaxMinLenErrCnt =
1437 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxMaxMinLenErrCnt));
1438 cntrs->TxUnderrunCnt =
1439 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxUnderrunCnt));
1440 cntrs->TxFlowStallCnt =
1441 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxFlowStallCnt));
1442 cntrs->TxDroppedPktCnt =
1443 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(TxDroppedPktCnt));
1444 cntrs->RxDroppedPktCnt =
1445 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxDroppedPktCnt));
1446 cntrs->RxDataPktCnt =
1447 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxDataPktCnt));
1448 cntrs->RxFlowPktCnt =
1449 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxFlowPktCnt));
1450 cntrs->RxDwordCnt =
1451 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxDwordCnt));
1452 cntrs->RxLenErrCnt =
1453 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxLenErrCnt));
1454 cntrs->RxMaxMinLenErrCnt =
1455 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxMaxMinLenErrCnt));
1456 cntrs->RxICRCErrCnt =
1457 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxICRCErrCnt));
1458 cntrs->RxVCRCErrCnt =
1459 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxVCRCErrCnt));
1460 cntrs->RxFlowCtrlErrCnt =
1461 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxFlowCtrlErrCnt));
1462 cntrs->RxBadFormatCnt =
1463 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxBadFormatCnt));
1464 cntrs->RxLinkProblemCnt =
1465 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxLinkProblemCnt));
1466 cntrs->RxEBPCnt =
1467 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxEBPCnt));
1468 cntrs->RxLPCRCErrCnt =
1469 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxLPCRCErrCnt));
1470 cntrs->RxBufOvflCnt =
1471 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxBufOvflCnt));
1472 cntrs->RxTIDFullErrCnt =
1473 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxTIDFullErrCnt));
1474 cntrs->RxTIDValidErrCnt =
1475 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxTIDValidErrCnt));
1476 cntrs->RxPKeyMismatchCnt =
1477 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxPKeyMismatchCnt));
1478 cntrs->RxP0HdrEgrOvflCnt =
1479 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxP0HdrEgrOvflCnt));
1480 cntrs->RxP1HdrEgrOvflCnt =
1481 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxP1HdrEgrOvflCnt));
1482 cntrs->RxP2HdrEgrOvflCnt =
1483 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxP2HdrEgrOvflCnt));
1484 cntrs->RxP3HdrEgrOvflCnt =
1485 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxP3HdrEgrOvflCnt));
1486 cntrs->RxP4HdrEgrOvflCnt =
1487 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(RxP4HdrEgrOvflCnt));
1488 cntrs->RxP5HdrEgrOvflCnt = 0;
1489 cntrs->RxP6HdrEgrOvflCnt = 0;
1490 cntrs->RxP7HdrEgrOvflCnt = 0;
1491 cntrs->RxP8HdrEgrOvflCnt = 0;
1492 cntrs->RxP9HdrEgrOvflCnt = 0;
1493 cntrs->RxP10HdrEgrOvflCnt = 0;
1494 cntrs->RxP11HdrEgrOvflCnt = 0;
1495 cntrs->RxP12HdrEgrOvflCnt = 0;
1496 cntrs->RxP13HdrEgrOvflCnt = 0;
1497 cntrs->RxP14HdrEgrOvflCnt = 0;
1498 cntrs->RxP15HdrEgrOvflCnt = 0;
1499 cntrs->RxP16HdrEgrOvflCnt = 0;
1500 cntrs->IBStatusChangeCnt =
1501 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(IBStatusChangeCnt));
1502 cntrs->IBLinkErrRecoveryCnt =
1503 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(IBLinkErrRecoveryCnt));
1504 cntrs->IBLinkDownedCnt =
1505 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(IBLinkDownedCnt));
1506 cntrs->IBSymbolErrCnt =
1507 ipath_snap_cntr(dd, IPATH_CREG_OFFSET(IBSymbolErrCnt));
1508 cntrs->RxVL15DroppedPktCnt = 0;
1509 cntrs->RxOtherLocalPhyErrCnt = 0;
1510 cntrs->PcieRetryBufDiagQwordCnt = 0;
1511 cntrs->ExcessBufferOvflCnt = dd->ipath_overrun_thresh_errs;
1512 cntrs->LocalLinkIntegrityErrCnt = dd->ipath_lli_errs;
1513 cntrs->RxVlErrCnt = 0;
1514 cntrs->RxDlidFltrCnt = 0;
1515}
1516
1371/* 1517/*
1372 * On platforms using this chip, and not having ordered WC stores, we 1518 * On platforms using this chip, and not having ordered WC stores, we
1373 * can get TXE parity errors due to speculative reads to the PIO buffers, 1519 * can get TXE parity errors due to speculative reads to the PIO buffers,
@@ -1427,6 +1573,7 @@ void ipath_init_iba6120_funcs(struct ipath_devdata *dd)
1427 1573
1428 /* initialize chip-specific variables */ 1574 /* initialize chip-specific variables */
1429 dd->ipath_f_tidtemplate = ipath_pe_tidtemplate; 1575 dd->ipath_f_tidtemplate = ipath_pe_tidtemplate;
1576 dd->ipath_f_read_counters = ipath_pe_read_counters;
1430 1577
1431 /* 1578 /*
1432 * setup the register offsets, since they are different for each 1579 * setup the register offsets, since they are different for each