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authorLen Brown <len.brown@intel.com>2013-11-09 00:30:17 -0500
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-11-12 17:13:50 -0500
commitfab04b2208dd1d4121319f0096c5a5f4b70abc54 (patch)
treef014dad6b4b4dea6cfc0c2a4100ec0767fe8e7d0 /drivers/idle
parentf612a4fbdc8d6c77eb3721557f64bf0653ee5299 (diff)
intel_idle: Support Intel Atom Processor C2000 Product Family
Support the "Intel(R) Atom(TM) Processor C2000 Product Family", formerly code-named Avoton. It is based on the next generation Intel Atom processor architecture, formerly code-named Silvermont. Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/idle')
-rw-r--r--drivers/idle/intel_idle.c24
1 files changed, 23 insertions, 1 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 3f95a533c1a8..afd3c683c73b 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * intel_idle.c - native hardware idle loop for modern Intel processors 2 * intel_idle.c - native hardware idle loop for modern Intel processors
3 * 3 *
4 * Copyright (c) 2010, Intel Corporation. 4 * Copyright (c) 2013, Intel Corporation.
5 * Len Brown <len.brown@intel.com> 5 * Len Brown <len.brown@intel.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -329,6 +329,22 @@ static struct cpuidle_state atom_cstates[] __initdata = {
329 { 329 {
330 .enter = NULL } 330 .enter = NULL }
331}; 331};
332static struct cpuidle_state avn_cstates[CPUIDLE_STATE_MAX] = {
333 {
334 .name = "C1-AVN",
335 .desc = "MWAIT 0x00",
336 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
337 .exit_latency = 2,
338 .target_residency = 2,
339 .enter = &intel_idle },
340 {
341 .name = "C6-AVN",
342 .desc = "MWAIT 0x51",
343 .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
344 .exit_latency = 15,
345 .target_residency = 45,
346 .enter = &intel_idle },
347};
332 348
333/** 349/**
334 * intel_idle 350 * intel_idle
@@ -462,6 +478,11 @@ static const struct idle_cpu idle_cpu_hsw = {
462 .disable_promotion_to_c1e = true, 478 .disable_promotion_to_c1e = true,
463}; 479};
464 480
481static const struct idle_cpu idle_cpu_avn = {
482 .state_table = avn_cstates,
483 .disable_promotion_to_c1e = true,
484};
485
465#define ICPU(model, cpu) \ 486#define ICPU(model, cpu) \
466 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } 487 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
467 488
@@ -483,6 +504,7 @@ static const struct x86_cpu_id intel_idle_ids[] = {
483 ICPU(0x3f, idle_cpu_hsw), 504 ICPU(0x3f, idle_cpu_hsw),
484 ICPU(0x45, idle_cpu_hsw), 505 ICPU(0x45, idle_cpu_hsw),
485 ICPU(0x46, idle_cpu_hsw), 506 ICPU(0x46, idle_cpu_hsw),
507 ICPU(0x4D, idle_cpu_avn),
486 {} 508 {}
487}; 509};
488MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); 510MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);