diff options
author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2007-09-11 16:28:36 -0400 |
---|---|---|
committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-09-11 16:28:36 -0400 |
commit | 2808b0a96a05ac8e826b5380eb2d30a10586707a (patch) | |
tree | 55d8a98a780e7ddb2bda7af2ae083836870166c3 /drivers/ide | |
parent | 6c3c22f3cb2b7cd0a42a024b93db76b5c3133d37 (diff) |
hpt366: UltraDMA filter for SATA cards (take 2)
The Marvell bridge chips used on HighPoint SATA cards do not seem to support
the UltraDMA modes 1, 2, and 3 as well as any MWDMA modes, so the driver needs
to account for this in the udma_filter() method. In order to achieve that, do
the following changes:
- install the method for all chips, not only HPT36x/370 and improve the code
formatting by killing the extra tabs while at it;
- add to the end of the 'switch' statement in the method cases for HPT372[AN]
and HPT374 chips upon which the known SATA cards are based;
- use hwif->ultra_mask as a default mask for the ide_dma_filter() method to
behave correctly;
- move the HPT370[A] cases below the HPT36x case for consistency.
While at it, replace the explicit UltraDMA mode masks with ATA_UDMA* constants
all over the driver...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Bob Ham <rah@bash.sh>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide')
-rw-r--r-- | drivers/ide/pci/hpt366.c | 96 |
1 files changed, 49 insertions, 47 deletions
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index f87eec970574..39f1c89f7c86 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/ide/pci/hpt366.c Version 1.11 Aug 11, 2007 | 2 | * linux/drivers/ide/pci/hpt366.c Version 1.12 Aug 19, 2007 |
3 | * | 3 | * |
4 | * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> | 4 | * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> |
5 | * Portions Copyright (C) 2001 Sun Microsystems, Inc. | 5 | * Portions Copyright (C) 2001 Sun Microsystems, Inc. |
@@ -114,6 +114,7 @@ | |||
114 | * unify HPT36x/37x timing setup code and the speedproc handlers by joining | 114 | * unify HPT36x/37x timing setup code and the speedproc handlers by joining |
115 | * the register setting lists into the table indexed by the clock selected | 115 | * the register setting lists into the table indexed by the clock selected |
116 | * - set the correct hwif->ultra_mask for each individual chip | 116 | * - set the correct hwif->ultra_mask for each individual chip |
117 | * - add UltraDMA mode filtering for the HPT37[24] based SATA cards | ||
117 | * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> | 118 | * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> |
118 | */ | 119 | */ |
119 | 120 | ||
@@ -518,42 +519,44 @@ static int check_in_drive_list(ide_drive_t *drive, const char **list) | |||
518 | } | 519 | } |
519 | 520 | ||
520 | /* | 521 | /* |
521 | * Note for the future; the SATA hpt37x we must set | 522 | * The Marvell bridge chips used on the HighPoint SATA cards do not seem |
522 | * either PIO or UDMA modes 0,4,5 | 523 | * to support the UltraDMA modes 1, 2, and 3 as well as any MWDMA modes... |
523 | */ | 524 | */ |
524 | 525 | ||
525 | static u8 hpt3xx_udma_filter(ide_drive_t *drive) | 526 | static u8 hpt3xx_udma_filter(ide_drive_t *drive) |
526 | { | 527 | { |
527 | struct hpt_info *info = pci_get_drvdata(HWIF(drive)->pci_dev); | 528 | ide_hwif_t *hwif = HWIF(drive); |
528 | u8 mask; | 529 | struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); |
530 | u8 mask = hwif->ultra_mask; | ||
529 | 531 | ||
530 | switch (info->chip_type) { | 532 | switch (info->chip_type) { |
531 | case HPT370A: | ||
532 | if (!HPT370_ALLOW_ATA100_5 || | ||
533 | check_in_drive_list(drive, bad_ata100_5)) | ||
534 | return 0x1f; | ||
535 | else | ||
536 | return 0x3f; | ||
537 | case HPT370: | ||
538 | if (!HPT370_ALLOW_ATA100_5 || | ||
539 | check_in_drive_list(drive, bad_ata100_5)) | ||
540 | mask = 0x1f; | ||
541 | else | ||
542 | mask = 0x3f; | ||
543 | break; | ||
544 | case HPT36x: | 533 | case HPT36x: |
545 | if (!HPT366_ALLOW_ATA66_4 || | 534 | if (!HPT366_ALLOW_ATA66_4 || |
546 | check_in_drive_list(drive, bad_ata66_4)) | 535 | check_in_drive_list(drive, bad_ata66_4)) |
547 | mask = 0x0f; | 536 | mask = ATA_UDMA3; |
548 | else | ||
549 | mask = 0x1f; | ||
550 | 537 | ||
551 | if (!HPT366_ALLOW_ATA66_3 || | 538 | if (!HPT366_ALLOW_ATA66_3 || |
552 | check_in_drive_list(drive, bad_ata66_3)) | 539 | check_in_drive_list(drive, bad_ata66_3)) |
553 | mask = 0x07; | 540 | mask = ATA_UDMA2; |
554 | break; | 541 | break; |
542 | case HPT370: | ||
543 | if (!HPT370_ALLOW_ATA100_5 || | ||
544 | check_in_drive_list(drive, bad_ata100_5)) | ||
545 | mask = ATA_UDMA4; | ||
546 | break; | ||
547 | case HPT370A: | ||
548 | if (!HPT370_ALLOW_ATA100_5 || | ||
549 | check_in_drive_list(drive, bad_ata100_5)) | ||
550 | return ATA_UDMA4; | ||
551 | case HPT372 : | ||
552 | case HPT372A: | ||
553 | case HPT372N: | ||
554 | case HPT374 : | ||
555 | if (ide_dev_is_sata(drive->id)) | ||
556 | mask &= ~0x0e; | ||
557 | /* Fall thru */ | ||
555 | default: | 558 | default: |
556 | return 0x7f; | 559 | return mask; |
557 | } | 560 | } |
558 | 561 | ||
559 | return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask; | 562 | return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask; |
@@ -1236,25 +1239,24 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha | |||
1236 | 1239 | ||
1237 | static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) | 1240 | static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) |
1238 | { | 1241 | { |
1239 | struct pci_dev *dev = hwif->pci_dev; | 1242 | struct pci_dev *dev = hwif->pci_dev; |
1240 | struct hpt_info *info = pci_get_drvdata(dev); | 1243 | struct hpt_info *info = pci_get_drvdata(dev); |
1241 | int serialize = HPT_SERIALIZE_IO; | 1244 | int serialize = HPT_SERIALIZE_IO; |
1242 | u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; | 1245 | u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; |
1243 | u8 chip_type = info->chip_type; | 1246 | u8 chip_type = info->chip_type; |
1244 | u8 new_mcr, old_mcr = 0; | 1247 | u8 new_mcr, old_mcr = 0; |
1245 | 1248 | ||
1246 | /* Cache the channel's MISC. control registers' offset */ | 1249 | /* Cache the channel's MISC. control registers' offset */ |
1247 | hwif->select_data = hwif->channel ? 0x54 : 0x50; | 1250 | hwif->select_data = hwif->channel ? 0x54 : 0x50; |
1248 | 1251 | ||
1249 | hwif->tuneproc = &hpt3xx_tune_drive; | 1252 | hwif->tuneproc = &hpt3xx_tune_drive; |
1250 | hwif->speedproc = &hpt3xx_tune_chipset; | 1253 | hwif->speedproc = &hpt3xx_tune_chipset; |
1251 | hwif->quirkproc = &hpt3xx_quirkproc; | 1254 | hwif->quirkproc = &hpt3xx_quirkproc; |
1252 | hwif->intrproc = &hpt3xx_intrproc; | 1255 | hwif->intrproc = &hpt3xx_intrproc; |
1253 | hwif->maskproc = &hpt3xx_maskproc; | 1256 | hwif->maskproc = &hpt3xx_maskproc; |
1254 | hwif->busproc = &hpt3xx_busproc; | 1257 | hwif->busproc = &hpt3xx_busproc; |
1255 | 1258 | ||
1256 | if (chip_type <= HPT370A) | 1259 | hwif->udma_filter = &hpt3xx_udma_filter; |
1257 | hwif->udma_filter = &hpt3xx_udma_filter; | ||
1258 | 1260 | ||
1259 | /* | 1261 | /* |
1260 | * HPT3xxN chips have some complications: | 1262 | * HPT3xxN chips have some complications: |
@@ -1504,19 +1506,19 @@ static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) | |||
1504 | d->host_flags |= IDE_HFLAG_SINGLE; | 1506 | d->host_flags |= IDE_HFLAG_SINGLE; |
1505 | d->enablebits[0].mask = d->enablebits[0].val = 0x10; | 1507 | d->enablebits[0].mask = d->enablebits[0].val = 0x10; |
1506 | 1508 | ||
1507 | d->udma_mask = HPT366_ALLOW_ATA66_3 ? | 1509 | d->udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? |
1508 | (HPT366_ALLOW_ATA66_4 ? 0x1f : 0x0f) : 0x07; | 1510 | ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2; |
1509 | break; | 1511 | break; |
1510 | case 3: | 1512 | case 3: |
1511 | case 4: | 1513 | case 4: |
1512 | d->udma_mask = HPT370_ALLOW_ATA100_5 ? 0x3f : 0x1f; | 1514 | d->udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4; |
1513 | break; | 1515 | break; |
1514 | default: | 1516 | default: |
1515 | rev = 6; | 1517 | rev = 6; |
1516 | /* fall thru */ | 1518 | /* fall thru */ |
1517 | case 5: | 1519 | case 5: |
1518 | case 6: | 1520 | case 6: |
1519 | d->udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f; | 1521 | d->udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5; |
1520 | break; | 1522 | break; |
1521 | } | 1523 | } |
1522 | 1524 | ||
@@ -1577,7 +1579,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { | |||
1577 | .init_dma = init_dma_hpt366, | 1579 | .init_dma = init_dma_hpt366, |
1578 | .autodma = AUTODMA, | 1580 | .autodma = AUTODMA, |
1579 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1581 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1580 | .udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f, | 1582 | .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
1581 | .bootable = OFF_BOARD, | 1583 | .bootable = OFF_BOARD, |
1582 | .extra = 240, | 1584 | .extra = 240, |
1583 | .pio_mask = ATA_PIO4, | 1585 | .pio_mask = ATA_PIO4, |
@@ -1589,7 +1591,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { | |||
1589 | .init_dma = init_dma_hpt366, | 1591 | .init_dma = init_dma_hpt366, |
1590 | .autodma = AUTODMA, | 1592 | .autodma = AUTODMA, |
1591 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1593 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1592 | .udma_mask = HPT302_ALLOW_ATA133_6 ? 0x7f : 0x3f, | 1594 | .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
1593 | .bootable = OFF_BOARD, | 1595 | .bootable = OFF_BOARD, |
1594 | .extra = 240, | 1596 | .extra = 240, |
1595 | .pio_mask = ATA_PIO4, | 1597 | .pio_mask = ATA_PIO4, |
@@ -1601,7 +1603,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { | |||
1601 | .init_dma = init_dma_hpt366, | 1603 | .init_dma = init_dma_hpt366, |
1602 | .autodma = AUTODMA, | 1604 | .autodma = AUTODMA, |
1603 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1605 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1604 | .udma_mask = HPT371_ALLOW_ATA133_6 ? 0x7f : 0x3f, | 1606 | .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
1605 | .bootable = OFF_BOARD, | 1607 | .bootable = OFF_BOARD, |
1606 | .extra = 240, | 1608 | .extra = 240, |
1607 | .pio_mask = ATA_PIO4, | 1609 | .pio_mask = ATA_PIO4, |
@@ -1613,7 +1615,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { | |||
1613 | .init_dma = init_dma_hpt366, | 1615 | .init_dma = init_dma_hpt366, |
1614 | .autodma = AUTODMA, | 1616 | .autodma = AUTODMA, |
1615 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1617 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1616 | .udma_mask = 0x3f, | 1618 | .udma_mask = ATA_UDMA5, |
1617 | .bootable = OFF_BOARD, | 1619 | .bootable = OFF_BOARD, |
1618 | .extra = 240, | 1620 | .extra = 240, |
1619 | .pio_mask = ATA_PIO4, | 1621 | .pio_mask = ATA_PIO4, |
@@ -1625,7 +1627,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { | |||
1625 | .init_dma = init_dma_hpt366, | 1627 | .init_dma = init_dma_hpt366, |
1626 | .autodma = AUTODMA, | 1628 | .autodma = AUTODMA, |
1627 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1629 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1628 | .udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f, | 1630 | .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
1629 | .bootable = OFF_BOARD, | 1631 | .bootable = OFF_BOARD, |
1630 | .extra = 240, | 1632 | .extra = 240, |
1631 | .pio_mask = ATA_PIO4, | 1633 | .pio_mask = ATA_PIO4, |