Merge branch 'linus' into release

1 files changed, 16 insertions, 11 deletions

diff --git a/drivers/ide/cmd64x.c b/drivers/ide/cmd64x.c
index 935385c77e06..2f9688d87ecd 100644
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -115,7 +115,7 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_
  */
 static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
 {
-        ide_hwif_t *hwif        = HWIF(drive);
+        ide_hwif_t *hwif        = drive->hwif;
         struct pci_dev *dev     = to_pci_dev(hwif->dev);
         struct ide_timing *t    = ide_timing_find_mode(XFER_PIO_0 + pio);
         unsigned int cycle_time;
@@ -138,10 +138,12 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
          * the slowest address setup timing ourselves.
          */
         if (hwif->channel) {
-                ide_drive_t *drives = hwif->drives;
+                ide_drive_t *pair = ide_get_pair_dev(drive);
 
                 drive->drive_data = setup_count;
-                setup_count = max(drives[0].drive_data, drives[1].drive_data);
+
+                if (pair)
+                        setup_count = max_t(u8, setup_count, pair->drive_data);
         }
 
         if (setup_count > 5)            /* shouldn't actually happen... */
@@ -180,7 +182,7 @@ static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio)
 
 static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
 {
-        ide_hwif_t *hwif        = HWIF(drive);
+        ide_hwif_t *hwif        = drive->hwif;
         struct pci_dev *dev     = to_pci_dev(hwif->dev);
         u8 unit                 = drive->dn & 0x01;
         u8 regU = 0, pciU       = hwif->channel ? UDIDETCR1 : UDIDETCR0;
@@ -226,7 +228,7 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
 
 static int cmd648_dma_end(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif        = HWIF(drive);
+        ide_hwif_t *hwif        = drive->hwif;
         unsigned long base      = hwif->dma_base - (hwif->channel * 8);
         int err                 = ide_dma_end(drive);
         u8  irq_mask            = hwif->channel ? MRDMODE_INTR_CH1 :
@@ -242,7 +244,7 @@ static int cmd648_dma_end(ide_drive_t *drive)
 
 static int cmd64x_dma_end(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif        = HWIF(drive);
+        ide_hwif_t *hwif        = drive->hwif;
         struct pci_dev *dev     = to_pci_dev(hwif->dev);
         int irq_reg             = hwif->channel ? ARTTIM23 : CFR;
         u8  irq_mask            = hwif->channel ? ARTTIM23_INTR_CH1 :
@@ -259,7 +261,7 @@ static int cmd64x_dma_end(ide_drive_t *drive)
 
 static int cmd648_dma_test_irq(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif        = HWIF(drive);
+        ide_hwif_t *hwif        = drive->hwif;
         unsigned long base      = hwif->dma_base - (hwif->channel * 8);
         u8 irq_mask             = hwif->channel ? MRDMODE_INTR_CH1 :
                                                   MRDMODE_INTR_CH0;
@@ -282,7 +284,7 @@ static int cmd648_dma_test_irq(ide_drive_t *drive)
 
 static int cmd64x_dma_test_irq(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif        = HWIF(drive);
+        ide_hwif_t *hwif        = drive->hwif;
         struct pci_dev *dev     = to_pci_dev(hwif->dev);
         int irq_reg             = hwif->channel ? ARTTIM23 : CFR;
         u8  irq_mask            = hwif->channel ? ARTTIM23_INTR_CH1 :
@@ -313,7 +315,7 @@ static int cmd64x_dma_test_irq(ide_drive_t *drive)
 
 static int cmd646_1_dma_end(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif = HWIF(drive);
+        ide_hwif_t *hwif = drive->hwif;
         u8 dma_stat = 0, dma_cmd = 0;
 
         drive->waiting_for_dma = 0;
@@ -383,6 +385,7 @@ static const struct ide_dma_ops cmd64x_dma_ops = {
         .dma_test_irq           = cmd64x_dma_test_irq,
         .dma_lost_irq           = ide_dma_lost_irq,
         .dma_timeout            = ide_dma_timeout,
+        .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
 static const struct ide_dma_ops cmd646_rev1_dma_ops = {
@@ -394,6 +397,7 @@ static const struct ide_dma_ops cmd646_rev1_dma_ops = {
         .dma_test_irq           = ide_dma_test_irq,
         .dma_lost_irq           = ide_dma_lost_irq,
         .dma_timeout            = ide_dma_timeout,
+        .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
 static const struct ide_dma_ops cmd648_dma_ops = {
@@ -405,6 +409,7 @@ static const struct ide_dma_ops cmd648_dma_ops = {
         .dma_test_irq           = cmd648_dma_test_irq,
         .dma_lost_irq           = ide_dma_lost_irq,
         .dma_timeout            = ide_dma_timeout,
+        .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
 static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
@@ -424,10 +429,10 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
                 .name           = DRV_NAME,
                 .init_chipset   = init_chipset_cmd64x,
                 .enablebits     = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
-                .chipset        = ide_cmd646,
                 .port_ops       = &cmd64x_port_ops,
                 .dma_ops        = &cmd648_dma_ops,
-                .host_flags     = IDE_HFLAG_ABUSE_PREFETCH,
+                .host_flags     = IDE_HFLAG_SERIALIZE |
+                                  IDE_HFLAG_ABUSE_PREFETCH,
                 .pio_mask       = ATA_PIO5,
                 .mwdma_mask     = ATA_MWDMA2,
                 .udma_mask      = ATA_UDMA2,