Merge tag 'v3.16-rc5' into sched/core, to refresh the branch before applying bigger tree-wide changes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

5 files changed, 1133 insertions, 0 deletions

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 620d1004a1e7..9f7d5859cf65 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -676,6 +676,16 @@ config I2C_RIIC
           This driver can also be built as a module.  If so, the module
           will be called i2c-riic.
 
+config I2C_RK3X
+        tristate "Rockchip RK3xxx I2C adapter"
+        depends on OF
+        help
+          Say Y here to include support for the I2C adapter in Rockchip RK3xxx
+          SoCs.
+
+          This driver can also be built as a module. If so, the module will
+          be called i2c-rk3x.
+
 config HAVE_S3C2410_I2C
         bool
         help
@@ -764,6 +774,19 @@ config I2C_STU300
           This driver can also be built as a module. If so, the module
           will be called i2c-stu300.
 
+config I2C_SUN6I_P2WI
+        tristate "Allwinner sun6i internal P2WI controller"
+        depends on RESET_CONTROLLER
+        depends on MACH_SUN6I || COMPILE_TEST
+        help
+          If you say yes to this option, support will be included for the
+          P2WI (Push/Pull 2 Wire Interface) controller embedded in some sunxi
+          SOCs.
+          The P2WI looks like an SMBus controller (which supports only byte
+          accesses), except that it only supports one slave device.
+          This interface is used to connect to specific PMIC devices (like the
+          AXP221).
+
 config I2C_TEGRA
         tristate "NVIDIA Tegra internal I2C controller"
         depends on ARCH_TEGRA
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 298692cc6000..dd9a7f8e873f 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_I2C_PXA)		+= i2c-pxa.o
 obj-$(CONFIG_I2C_PXA_PCI)       += i2c-pxa-pci.o
 obj-$(CONFIG_I2C_QUP)           += i2c-qup.o
 obj-$(CONFIG_I2C_RIIC)          += i2c-riic.o
+obj-$(CONFIG_I2C_RK3X)          += i2c-rk3x.o
 obj-$(CONFIG_I2C_S3C2410)       += i2c-s3c2410.o
 obj-$(CONFIG_I2C_S6000)         += i2c-s6000.o
 obj-$(CONFIG_I2C_SH7760)        += i2c-sh7760.o
@@ -74,6 +75,7 @@ obj-$(CONFIG_I2C_SIMTEC)	+= i2c-simtec.o
 obj-$(CONFIG_I2C_SIRF)          += i2c-sirf.o
 obj-$(CONFIG_I2C_ST)            += i2c-st.o
 obj-$(CONFIG_I2C_STU300)        += i2c-stu300.o
+obj-$(CONFIG_I2C_SUN6I_P2WI)    += i2c-sun6i-p2wi.o
 obj-$(CONFIG_I2C_TEGRA)         += i2c-tegra.o
 obj-$(CONFIG_I2C_VERSATILE)     += i2c-versatile.o
 obj-$(CONFIG_I2C_WMT)           += i2c-wmt.o
diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
new file mode 100644
index 000000000000..a9791509966a
--- /dev/null
+++ b/drivers/i2c/busses/i2c-rk3x.c
@@ -0,0 +1,763 @@
+/*
+ * Driver for I2C adapter in Rockchip RK3xxx SoC
+ *
+ * Max Schwarz <max.schwarz@online.de>
+ * based on the patches by Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/spinlock.h>
+#include <linux/clk.h>
+#include <linux/wait.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+
+
+/* Register Map */
+#define REG_CON        0x00 /* control register */
+#define REG_CLKDIV     0x04 /* clock divisor register */
+#define REG_MRXADDR    0x08 /* slave address for REGISTER_TX */
+#define REG_MRXRADDR   0x0c /* slave register address for REGISTER_TX */
+#define REG_MTXCNT     0x10 /* number of bytes to be transmitted */
+#define REG_MRXCNT     0x14 /* number of bytes to be received */
+#define REG_IEN        0x18 /* interrupt enable */
+#define REG_IPD        0x1c /* interrupt pending */
+#define REG_FCNT       0x20 /* finished count */
+
+/* Data buffer offsets */
+#define TXBUFFER_BASE 0x100
+#define RXBUFFER_BASE 0x200
+
+/* REG_CON bits */
+#define REG_CON_EN        BIT(0)
+enum {
+        REG_CON_MOD_TX = 0,      /* transmit data */
+        REG_CON_MOD_REGISTER_TX, /* select register and restart */
+        REG_CON_MOD_RX,          /* receive data */
+        REG_CON_MOD_REGISTER_RX, /* broken: transmits read addr AND writes
+                                  * register addr */
+};
+#define REG_CON_MOD(mod)  ((mod) << 1)
+#define REG_CON_MOD_MASK  (BIT(1) | BIT(2))
+#define REG_CON_START     BIT(3)
+#define REG_CON_STOP      BIT(4)
+#define REG_CON_LASTACK   BIT(5) /* 1: send NACK after last received byte */
+#define REG_CON_ACTACK    BIT(6) /* 1: stop if NACK is received */
+
+/* REG_MRXADDR bits */
+#define REG_MRXADDR_VALID(x) BIT(24 + (x)) /* [x*8+7:x*8] of MRX[R]ADDR valid */
+
+/* REG_IEN/REG_IPD bits */
+#define REG_INT_BTF       BIT(0) /* a byte was transmitted */
+#define REG_INT_BRF       BIT(1) /* a byte was received */
+#define REG_INT_MBTF      BIT(2) /* master data transmit finished */
+#define REG_INT_MBRF      BIT(3) /* master data receive finished */
+#define REG_INT_START     BIT(4) /* START condition generated */
+#define REG_INT_STOP      BIT(5) /* STOP condition generated */
+#define REG_INT_NAKRCV    BIT(6) /* NACK received */
+#define REG_INT_ALL       0x7f
+
+/* Constants */
+#define WAIT_TIMEOUT      200 /* ms */
+#define DEFAULT_SCL_RATE  (100 * 1000) /* Hz */
+
+enum rk3x_i2c_state {
+        STATE_IDLE,
+        STATE_START,
+        STATE_READ,
+        STATE_WRITE,
+        STATE_STOP
+};
+
+/**
+ * @grf_offset: offset inside the grf regmap for setting the i2c type
+ */
+struct rk3x_i2c_soc_data {
+        int grf_offset;
+};
+
+struct rk3x_i2c {
+        struct i2c_adapter adap;
+        struct device *dev;
+        struct rk3x_i2c_soc_data *soc_data;
+
+        /* Hardware resources */
+        void __iomem *regs;
+        struct clk *clk;
+
+        /* Settings */
+        unsigned int scl_frequency;
+
+        /* Synchronization & notification */
+        spinlock_t lock;
+        wait_queue_head_t wait;
+        bool busy;
+
+        /* Current message */
+        struct i2c_msg *msg;
+        u8 addr;
+        unsigned int mode;
+        bool is_last_msg;
+
+        /* I2C state machine */
+        enum rk3x_i2c_state state;
+        unsigned int processed; /* sent/received bytes */
+        int error;