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authorLinus Torvalds <torvalds@linux-foundation.org>2012-11-23 16:59:26 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-11-23 16:59:26 -0500
commit33f145934025e2f51e866993f09e04a1d1650649 (patch)
tree82fc648488e32ef43c2e97da78a0a5d1064e76ef /drivers/i2c
parentf470b8c25815d94a200a7248bf3e04df6e3dea42 (diff)
parent958f9889950ef257f601c4902137caff291d5dd7 (diff)
Merge branch 'i2c-embedded/for-current' of git://git.pengutronix.de/git/wsa/linux
Pull i2c fixes from Wolfram Sang: "Bugfixes for the i2c subsystem. Except for a few one-liners, there is mainly one revert because of an overlooked dependency. Since there is no linux-next at the moment, I did some extra testing, and all was fine for me." * 'i2c-embedded/for-current' of git://git.pengutronix.de/git/wsa/linux: i2c: mxs: Handle i2c DMA failure properly i2c: s3c2410: Fix code to free gpios i2c: omap: ensure writes to dev->buf_len are ordered Revert "ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints" i2c: at91: fix SMBus quick command
Diffstat (limited to 'drivers/i2c')
-rw-r--r--drivers/i2c/busses/i2c-at91.c7
-rw-r--r--drivers/i2c/busses/i2c-mxs.c2
-rw-r--r--drivers/i2c/busses/i2c-omap.c36
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c1
4 files changed, 26 insertions, 20 deletions
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index aa59a254be2c..c02bf208084f 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -39,6 +39,7 @@
39#define AT91_TWI_STOP 0x0002 /* Send a Stop Condition */ 39#define AT91_TWI_STOP 0x0002 /* Send a Stop Condition */
40#define AT91_TWI_MSEN 0x0004 /* Master Transfer Enable */ 40#define AT91_TWI_MSEN 0x0004 /* Master Transfer Enable */
41#define AT91_TWI_SVDIS 0x0020 /* Slave Transfer Disable */ 41#define AT91_TWI_SVDIS 0x0020 /* Slave Transfer Disable */
42#define AT91_TWI_QUICK 0x0040 /* SMBus quick command */
42#define AT91_TWI_SWRST 0x0080 /* Software Reset */ 43#define AT91_TWI_SWRST 0x0080 /* Software Reset */
43 44
44#define AT91_TWI_MMR 0x0004 /* Master Mode Register */ 45#define AT91_TWI_MMR 0x0004 /* Master Mode Register */
@@ -212,7 +213,11 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
212 213
213 INIT_COMPLETION(dev->cmd_complete); 214 INIT_COMPLETION(dev->cmd_complete);
214 dev->transfer_status = 0; 215 dev->transfer_status = 0;
215 if (dev->msg->flags & I2C_M_RD) { 216
217 if (!dev->buf_len) {
218 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_QUICK);
219 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
220 } else if (dev->msg->flags & I2C_M_RD) {
216 unsigned start_flags = AT91_TWI_START; 221 unsigned start_flags = AT91_TWI_START;
217 222
218 if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) { 223 if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) {
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index 286ca1917820..0670da79ee5e 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -287,12 +287,14 @@ read_init_dma_fail:
287select_init_dma_fail: 287select_init_dma_fail:
288 dma_unmap_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE); 288 dma_unmap_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE);
289select_init_pio_fail: 289select_init_pio_fail:
290 dmaengine_terminate_all(i2c->dmach);
290 return -EINVAL; 291 return -EINVAL;
291 292
292/* Write failpath. */ 293/* Write failpath. */
293write_init_dma_fail: 294write_init_dma_fail:
294 dma_unmap_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE); 295 dma_unmap_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE);
295write_init_pio_fail: 296write_init_pio_fail:
297 dmaengine_terminate_all(i2c->dmach);
296 return -EINVAL; 298 return -EINVAL;
297} 299}
298 300
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index db31eaed6ea5..3525c9e62cb0 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -43,7 +43,6 @@
43#include <linux/slab.h> 43#include <linux/slab.h>
44#include <linux/i2c-omap.h> 44#include <linux/i2c-omap.h>
45#include <linux/pm_runtime.h> 45#include <linux/pm_runtime.h>
46#include <linux/pm_qos.h>
47 46
48/* I2C controller revisions */ 47/* I2C controller revisions */
49#define OMAP_I2C_OMAP1_REV_2 0x20 48#define OMAP_I2C_OMAP1_REV_2 0x20
@@ -187,8 +186,9 @@ struct omap_i2c_dev {
187 int reg_shift; /* bit shift for I2C register addresses */ 186 int reg_shift; /* bit shift for I2C register addresses */
188 struct completion cmd_complete; 187 struct completion cmd_complete;
189 struct resource *ioarea; 188 struct resource *ioarea;
190 u32 latency; /* maximum MPU wkup latency */ 189 u32 latency; /* maximum mpu wkup latency */
191 struct pm_qos_request pm_qos_request; 190 void (*set_mpu_wkup_lat)(struct device *dev,
191 long latency);
192 u32 speed; /* Speed of bus in kHz */ 192 u32 speed; /* Speed of bus in kHz */
193 u32 dtrev; /* extra revision from DT */ 193 u32 dtrev; /* extra revision from DT */
194 u32 flags; 194 u32 flags;
@@ -494,7 +494,9 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev *dev, u8 size, bool is_rx)
494 dev->b_hw = 1; /* Enable hardware fixes */ 494 dev->b_hw = 1; /* Enable hardware fixes */
495 495
496 /* calculate wakeup latency constraint for MPU */ 496 /* calculate wakeup latency constraint for MPU */
497 dev->latency = (1000000 * dev->threshold) / (1000 * dev->speed / 8); 497 if (dev->set_mpu_wkup_lat != NULL)
498 dev->latency = (1000000 * dev->threshold) /
499 (1000 * dev->speed / 8);
498} 500}
499 501
500/* 502/*
@@ -522,6 +524,9 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
522 dev->buf = msg->buf; 524 dev->buf = msg->buf;
523 dev->buf_len = msg->len; 525 dev->buf_len = msg->len;
524 526
527 /* make sure writes to dev->buf_len are ordered */
528 barrier();
529
525 omap_i2c_write_reg(dev, OMAP_I2C_CNT_REG, dev->buf_len); 530 omap_i2c_write_reg(dev, OMAP_I2C_CNT_REG, dev->buf_len);
526 531
527 /* Clear the FIFO Buffers */ 532 /* Clear the FIFO Buffers */
@@ -579,7 +584,6 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
579 */ 584 */
580 timeout = wait_for_completion_timeout(&dev->cmd_complete, 585 timeout = wait_for_completion_timeout(&dev->cmd_complete,
581 OMAP_I2C_TIMEOUT); 586 OMAP_I2C_TIMEOUT);
582 dev->buf_len = 0;
583 if (timeout == 0) { 587 if (timeout == 0) {
584 dev_err(dev->dev, "controller timed out\n"); 588 dev_err(dev->dev, "controller timed out\n");
585 omap_i2c_init(dev); 589 omap_i2c_init(dev);
@@ -629,16 +633,8 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
629 if (r < 0) 633 if (r < 0)
630 goto out; 634 goto out;
631 635
632 /* 636 if (dev->set_mpu_wkup_lat != NULL)
633 * When waiting for completion of a i2c transfer, we need to 637 dev->set_mpu_wkup_lat(dev->dev, dev->latency);
634 * set a wake up latency constraint for the MPU. This is to
635 * ensure quick enough wakeup from idle, when transfer
636 * completes.
637 */
638 if (dev->latency)
639 pm_qos_add_request(&dev->pm_qos_request,
640 PM_QOS_CPU_DMA_LATENCY,
641 dev->latency);
642 638
643 for (i = 0; i < num; i++) { 639 for (i = 0; i < num; i++) {
644 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1))); 640 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)));
@@ -646,8 +642,8 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
646 break; 642 break;
647 } 643 }
648 644
649 if (dev->latency) 645 if (dev->set_mpu_wkup_lat != NULL)
650 pm_qos_remove_request(&dev->pm_qos_request); 646 dev->set_mpu_wkup_lat(dev->dev, -1);
651 647
652 if (r == 0) 648 if (r == 0)
653 r = num; 649 r = num;
@@ -1104,6 +1100,7 @@ omap_i2c_probe(struct platform_device *pdev)
1104 } else if (pdata != NULL) { 1100 } else if (pdata != NULL) {
1105 dev->speed = pdata->clkrate; 1101 dev->speed = pdata->clkrate;
1106 dev->flags = pdata->flags; 1102 dev->flags = pdata->flags;
1103 dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat;
1107 dev->dtrev = pdata->rev; 1104 dev->dtrev = pdata->rev;
1108 } 1105 }
1109 1106
@@ -1159,8 +1156,9 @@ omap_i2c_probe(struct platform_device *pdev)
1159 dev->b_hw = 1; /* Enable hardware fixes */ 1156 dev->b_hw = 1; /* Enable hardware fixes */
1160 1157
1161 /* calculate wakeup latency constraint for MPU */ 1158 /* calculate wakeup latency constraint for MPU */
1162 dev->latency = (1000000 * dev->fifo_size) / 1159 if (dev->set_mpu_wkup_lat != NULL)
1163 (1000 * dev->speed / 8); 1160 dev->latency = (1000000 * dev->fifo_size) /
1161 (1000 * dev->speed / 8);
1164 } 1162 }
1165 1163
1166 /* reset ASAP, clearing any IRQs */ 1164 /* reset ASAP, clearing any IRQs */
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 3e0335f1fc60..9d902725bac9 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -806,6 +806,7 @@ static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
806 dev_err(i2c->dev, "invalid gpio[%d]: %d\n", idx, gpio); 806 dev_err(i2c->dev, "invalid gpio[%d]: %d\n", idx, gpio);
807 goto free_gpio; 807 goto free_gpio;
808 } 808 }
809 i2c->gpios[idx] = gpio;
809 810
810 ret = gpio_request(gpio, "i2c-bus"); 811 ret = gpio_request(gpio, "i2c-bus");
811 if (ret) { 812 if (ret) {