diff options
| author | Jingchang Lu <b35083@freescale.com> | 2013-08-07 05:05:39 -0400 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2013-08-15 10:12:47 -0400 |
| commit | 1d5ef2a83e3097408924b5eea8d7750bbde21e45 (patch) | |
| tree | cf5cac56d518145477e54175bd796f7569e32f23 /drivers/i2c | |
| parent | 0fc1347a7fdbcc25204f737998b824fc46662afd (diff) | |
i2c: imx: wrap registers read/write to inline function
wrap the readb(), writeb() into inline function calls.
It would make the driver more clearer to support platform
with different register offset.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c')
| -rw-r--r-- | drivers/i2c/busses/i2c-imx.c | 80 |
1 files changed, 46 insertions, 34 deletions
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index cbea84bfb0e8..1a3c60854f79 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c | |||
| @@ -160,6 +160,18 @@ static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx) | |||
| 160 | return i2c_imx->devtype == IMX1_I2C; | 160 | return i2c_imx->devtype == IMX1_I2C; |
| 161 | } | 161 | } |
| 162 | 162 | ||
| 163 | static inline void imx_i2c_write_reg(unsigned int val, | ||
| 164 | struct imx_i2c_struct *i2c_imx, unsigned int reg) | ||
| 165 | { | ||
| 166 | writeb(val, i2c_imx->base + reg); | ||
| 167 | } | ||
| 168 | |||
| 169 | static inline unsigned char imx_i2c_read_reg(struct imx_i2c_struct *i2c_imx, | ||
| 170 | unsigned int reg) | ||
| 171 | { | ||
| 172 | return readb(i2c_imx->base + reg); | ||
| 173 | } | ||
| 174 | |||
| 163 | /** Functions for IMX I2C adapter driver *************************************** | 175 | /** Functions for IMX I2C adapter driver *************************************** |
| 164 | *******************************************************************************/ | 176 | *******************************************************************************/ |
| 165 | 177 | ||
| @@ -171,7 +183,7 @@ static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) | |||
| 171 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 183 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
| 172 | 184 | ||
| 173 | while (1) { | 185 | while (1) { |
| 174 | temp = readb(i2c_imx->base + IMX_I2C_I2SR); | 186 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); |
| 175 | if (for_busy && (temp & I2SR_IBB)) | 187 | if (for_busy && (temp & I2SR_IBB)) |
| 176 | break; | 188 | break; |
| 177 | if (!for_busy && !(temp & I2SR_IBB)) | 189 | if (!for_busy && !(temp & I2SR_IBB)) |
| @@ -202,7 +214,7 @@ static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) | |||
| 202 | 214 | ||
| 203 | static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) | 215 | static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) |
| 204 | { | 216 | { |
| 205 | if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) { | 217 | if (imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR) & I2SR_RXAK) { |
| 206 | dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); | 218 | dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); |
| 207 | return -EIO; /* No ACK */ | 219 | return -EIO; /* No ACK */ |
| 208 | } | 220 | } |
| @@ -219,25 +231,25 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) | |||
| 219 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 231 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
| 220 | 232 | ||
| 221 | clk_prepare_enable(i2c_imx->clk); | 233 | clk_prepare_enable(i2c_imx->clk); |
| 222 | writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR); | 234 | imx_i2c_write_reg(i2c_imx->ifdr, i2c_imx, IMX_I2C_IFDR); |
| 223 | /* Enable I2C controller */ | 235 | /* Enable I2C controller */ |
| 224 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | 236 | imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR); |
| 225 | writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); | 237 | imx_i2c_write_reg(I2CR_IEN, i2c_imx, IMX_I2C_I2CR); |
| 226 | 238 | ||
| 227 | /* Wait controller to be stable */ | 239 | /* Wait controller to be stable */ |
| 228 | udelay(50); | 240 | udelay(50); |
| 229 | 241 | ||
| 230 | /* Start I2C transaction */ | 242 | /* Start I2C transaction */ |
| 231 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 243 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); |
| 232 | temp |= I2CR_MSTA; | 244 | temp |= I2CR_MSTA; |
| 233 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 245 | imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); |
| 234 | result = i2c_imx_bus_busy(i2c_imx, 1); | 246 | result = i2c_imx_bus_busy(i2c_imx, 1); |
| 235 | if (result) | 247 | if (result) |
| 236 | return result; | 248 | return result; |
| 237 | i2c_imx->stopped = 0; | 249 | i2c_imx->stopped = 0; |
| 238 | 250 | ||
| 239 | temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; | 251 | temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; |
| 240 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 252 | imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); |
| 241 | return result; | 253 | return result; |
| 242 | } | 254 | } |
| 243 | 255 | ||
| @@ -248,9 +260,9 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) | |||
| 248 | if (!i2c_imx->stopped) { | 260 | if (!i2c_imx->stopped) { |
| 249 | /* Stop I2C transaction */ | 261 | /* Stop I2C transaction */ |
| 250 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 262 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
| 251 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 263 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); |
| 252 | temp &= ~(I2CR_MSTA | I2CR_MTX); | 264 | temp &= ~(I2CR_MSTA | I2CR_MTX); |
| 253 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 265 | imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); |
| 254 | } | 266 | } |
| 255 | if (is_imx1_i2c(i2c_imx)) { | 267 | if (is_imx1_i2c(i2c_imx)) { |
| 256 | /* | 268 | /* |
| @@ -266,7 +278,7 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) | |||
| 266 | } | 278 | } |
| 267 | 279 | ||
| 268 | /* Disable I2C controller */ | 280 | /* Disable I2C controller */ |
| 269 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); | 281 | imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR); |
| 270 | clk_disable_unprepare(i2c_imx->clk); | 282 | clk_disable_unprepare(i2c_imx->clk); |
| 271 | } | 283 | } |
| 272 | 284 | ||
| @@ -313,12 +325,12 @@ static irqreturn_t i2c_imx_isr(int irq, void *dev_id) | |||
| 313 | struct imx_i2c_struct *i2c_imx = dev_id; | 325 | struct imx_i2c_struct *i2c_imx = dev_id; |
| 314 | unsigned int temp; | 326 | unsigned int temp; |
| 315 | 327 | ||
| 316 | temp = readb(i2c_imx->base + IMX_I2C_I2SR); | 328 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); |
| 317 | if (temp & I2SR_IIF) { | 329 | if (temp & I2SR_IIF) { |
| 318 | /* save status register */ | 330 | /* save status register */ |
| 319 | i2c_imx->i2csr = temp; | 331 | i2c_imx->i2csr = temp; |
| 320 | temp &= ~I2SR_IIF; | 332 | temp &= ~I2SR_IIF; |
| 321 | writeb(temp, i2c_imx->base + IMX_I2C_I2SR); | 333 | imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR); |
| 322 | wake_up(&i2c_imx->queue); | 334 | wake_up(&i2c_imx->queue); |
| 323 | return IRQ_HANDLED; | 335 | return IRQ_HANDLED; |
| 324 | } | 336 | } |
| @@ -334,7 +346,7 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |||
| 334 | __func__, msgs->addr << 1); | 346 | __func__, msgs->addr << 1); |
| 335 | 347 | ||
| 336 | /* write slave address */ | 348 | /* write slave address */ |
| 337 | writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR); | 349 | imx_i2c_write_reg(msgs->addr << 1, i2c_imx, IMX_I2C_I2DR); |
| 338 | result = i2c_imx_trx_complete(i2c_imx); | 350 | result = i2c_imx_trx_complete(i2c_imx); |
| 339 | if (result) | 351 | if (result) |
| 340 | return result; | 352 | return result; |
| @@ -348,7 +360,7 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |||
| 348 | dev_dbg(&i2c_imx->adapter.dev, | 360 | dev_dbg(&i2c_imx->adapter.dev, |
| 349 | "<%s> write byte: B%d=0x%X\n", | 361 | "<%s> write byte: B%d=0x%X\n", |
| 350 | __func__, i, msgs->buf[i]); | 362 | __func__, i, msgs->buf[i]); |
| 351 | writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR); | 363 | imx_i2c_write_reg(msgs->buf[i], i2c_imx, IMX_I2C_I2DR); |
| 352 | result = i2c_imx_trx_complete(i2c_imx); | 364 | result = i2c_imx_trx_complete(i2c_imx); |
| 353 | if (result) | 365 | if (result) |
| 354 | return result; | 366 | return result; |
| @@ -369,7 +381,7 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |||
| 369 | __func__, (msgs->addr << 1) | 0x01); | 381 | __func__, (msgs->addr << 1) | 0x01); |
| 370 | 382 | ||
| 371 | /* write slave address */ | 383 | /* write slave address */ |
| 372 | writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR); | 384 | imx_i2c_write_reg((msgs->addr << 1) | 0x01, i2c_imx, IMX_I2C_I2DR); |
| 373 | result = i2c_imx_trx_complete(i2c_imx); | 385 | result = i2c_imx_trx_complete(i2c_imx); |
| 374 | if (result) | 386 | if (result) |
| 375 | return result; | 387 | return result; |
| @@ -380,12 +392,12 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |||
| 380 | dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); | 392 | dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); |
| 381 | 393 | ||
| 382 | /* setup bus to read data */ | 394 | /* setup bus to read data */ |
| 383 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 395 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); |
| 384 | temp &= ~I2CR_MTX; | 396 | temp &= ~I2CR_MTX; |
| 385 | if (msgs->len - 1) | 397 | if (msgs->len - 1) |
| 386 | temp &= ~I2CR_TXAK; | 398 | temp &= ~I2CR_TXAK; |
| 387 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 399 | imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); |
| 388 | readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */ | 400 | imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */ |
| 389 | 401 | ||
| 390 | dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); | 402 | dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); |
| 391 | 403 | ||
| @@ -399,19 +411,19 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |||
| 399 | controller from generating another clock cycle */ | 411 | controller from generating another clock cycle */ |
| 400 | dev_dbg(&i2c_imx->adapter.dev, | 412 | dev_dbg(&i2c_imx->adapter.dev, |
| 401 | "<%s> clear MSTA\n", __func__); | 413 | "<%s> clear MSTA\n", __func__); |
| 402 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 414 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); |
| 403 | temp &= ~(I2CR_MSTA | I2CR_MTX); | 415 | temp &= ~(I2CR_MSTA | I2CR_MTX); |
| 404 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 416 | imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); |
| 405 | i2c_imx_bus_busy(i2c_imx, 0); | 417 | i2c_imx_bus_busy(i2c_imx, 0); |
| 406 | i2c_imx->stopped = 1; | 418 | i2c_imx->stopped = 1; |
| 407 | } else if (i == (msgs->len - 2)) { | 419 | } else if (i == (msgs->len - 2)) { |
| 408 | dev_dbg(&i2c_imx->adapter.dev, | 420 | dev_dbg(&i2c_imx->adapter.dev, |
| 409 | "<%s> set TXAK\n", __func__); | 421 | "<%s> set TXAK\n", __func__); |
| 410 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 422 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); |
| 411 | temp |= I2CR_TXAK; | 423 | temp |= I2CR_TXAK; |
| 412 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 424 | imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); |
| 413 | } | 425 | } |
| 414 | msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR); | 426 | msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); |
| 415 | dev_dbg(&i2c_imx->adapter.dev, | 427 | dev_dbg(&i2c_imx->adapter.dev, |
| 416 | "<%s> read byte: B%d=0x%X\n", | 428 | "<%s> read byte: B%d=0x%X\n", |
| 417 | __func__, i, msgs->buf[i]); | 429 | __func__, i, msgs->buf[i]); |
| @@ -438,9 +450,9 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter, | |||
| 438 | if (i) { | 450 | if (i) { |
| 439 | dev_dbg(&i2c_imx->adapter.dev, | 451 | dev_dbg(&i2c_imx->adapter.dev, |
| 440 | "<%s> repeated start\n", __func__); | 452 | "<%s> repeated start\n", __func__); |
| 441 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 453 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); |
| 442 | temp |= I2CR_RSTA; | 454 | temp |= I2CR_RSTA; |
| 443 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 455 | imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); |
| 444 | result = i2c_imx_bus_busy(i2c_imx, 1); | 456 | result = i2c_imx_bus_busy(i2c_imx, 1); |
| 445 | if (result) | 457 | if (result) |
| 446 | goto fail0; | 458 | goto fail0; |
| @@ -449,13 +461,13 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter, | |||
| 449 | "<%s> transfer message: %d\n", __func__, i); | 461 | "<%s> transfer message: %d\n", __func__, i); |
| 450 | /* write/read data */ | 462 | /* write/read data */ |
| 451 | #ifdef CONFIG_I2C_DEBUG_BUS | 463 | #ifdef CONFIG_I2C_DEBUG_BUS |
| 452 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 464 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); |
| 453 | dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " | 465 | dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " |
| 454 | "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, | 466 | "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, |
| 455 | (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), | 467 | (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), |
| 456 | (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), | 468 | (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), |
| 457 | (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); | 469 | (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); |
| 458 | temp = readb(i2c_imx->base + IMX_I2C_I2SR); | 470 | temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); |
| 459 | dev_dbg(&i2c_imx->adapter.dev, | 471 | dev_dbg(&i2c_imx->adapter.dev, |
| 460 | "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " | 472 | "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " |
| 461 | "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, | 473 | "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, |
| @@ -575,8 +587,8 @@ static int __init i2c_imx_probe(struct platform_device *pdev) | |||
| 575 | i2c_imx_set_clk(i2c_imx, bitrate); | 587 | i2c_imx_set_clk(i2c_imx, bitrate); |
| 576 | 588 | ||
| 577 | /* Set up chip registers to defaults */ | 589 | /* Set up chip registers to defaults */ |
| 578 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); | 590 | imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR); |
| 579 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | 591 | imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR); |
| 580 | 592 | ||
| 581 | /* Add I2C adapter */ | 593 | /* Add I2C adapter */ |
| 582 | ret = i2c_add_numbered_adapter(&i2c_imx->adapter); | 594 | ret = i2c_add_numbered_adapter(&i2c_imx->adapter); |
| @@ -612,10 +624,10 @@ static int __exit i2c_imx_remove(struct platform_device *pdev) | |||
| 612 | i2c_del_adapter(&i2c_imx->adapter); | 624 | i2c_del_adapter(&i2c_imx->adapter); |
| 613 | 625 | ||
| 614 | /* setup chip registers to defaults */ | 626 | /* setup chip registers to defaults */ |
| 615 | writeb(0, i2c_imx->base + IMX_I2C_IADR); | 627 | imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IADR); |
| 616 | writeb(0, i2c_imx->base + IMX_I2C_IFDR); | 628 | imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IFDR); |
| 617 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); | 629 | imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR); |
| 618 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | 630 | imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR); |
| 619 | 631 | ||
| 620 | return 0; | 632 | return 0; |
| 621 | } | 633 | } |
