Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master

1 files changed, 77 insertions, 41 deletions

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 827da0858136..389ac6032a7b 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -37,6 +37,7 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 /* I2C controller revisions */
 #define OMAP_I2C_REV_2                  0x20
@@ -49,24 +50,24 @@
 #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
 
 #define OMAP_I2C_REV_REG                0x00
-#define OMAP_I2C_IE_REG                 0x04
-#define OMAP_I2C_STAT_REG               0x08
-#define OMAP_I2C_IV_REG                 0x0c
+#define OMAP_I2C_IE_REG                 0x01
+#define OMAP_I2C_STAT_REG               0x02
+#define OMAP_I2C_IV_REG                 0x03
 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG                 0x0c
-#define OMAP_I2C_SYSS_REG               0x10
-#define OMAP_I2C_BUF_REG                0x14
-#define OMAP_I2C_CNT_REG                0x18
-#define OMAP_I2C_DATA_REG               0x1c
-#define OMAP_I2C_SYSC_REG               0x20
-#define OMAP_I2C_CON_REG                0x24
-#define OMAP_I2C_OA_REG                 0x28
-#define OMAP_I2C_SA_REG                 0x2c
-#define OMAP_I2C_PSC_REG                0x30
-#define OMAP_I2C_SCLL_REG               0x34
-#define OMAP_I2C_SCLH_REG               0x38
-#define OMAP_I2C_SYSTEST_REG            0x3c
-#define OMAP_I2C_BUFSTAT_REG            0x40
+#define OMAP_I2C_WE_REG                 0x03
+#define OMAP_I2C_SYSS_REG               0x04
+#define OMAP_I2C_BUF_REG                0x05
+#define OMAP_I2C_CNT_REG                0x06
+#define OMAP_I2C_DATA_REG               0x07
+#define OMAP_I2C_SYSC_REG               0x08
+#define OMAP_I2C_CON_REG                0x09
+#define OMAP_I2C_OA_REG                 0x0a
+#define OMAP_I2C_SA_REG                 0x0b
+#define OMAP_I2C_PSC_REG                0x0c
+#define OMAP_I2C_SCLL_REG               0x0d
+#define OMAP_I2C_SCLH_REG               0x0e
+#define OMAP_I2C_SYSTEST_REG            0x0f
+#define OMAP_I2C_BUFSTAT_REG            0x10
 
 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
 #define OMAP_I2C_IE_XDR         (1 << 14)       /* TX Buffer drain int enable */
@@ -161,6 +162,7 @@ struct omap_i2c_dev {
         struct device           *dev;
         void __iomem            *base;          /* virtual */
         int                     irq;
+        int                     reg_shift;      /* bit shift for I2C register addresses */
         struct clk              *iclk;          /* Interface clock */
         struct clk              *fclk;          /* Functional clock */
         struct completion       cmd_complete;
@@ -178,17 +180,23 @@ struct omap_i2c_dev {
         unsigned                b_hw:1;         /* bad h/w fixes */
         unsigned                idle:1;
         u16                     iestate;        /* Saved interrupt register */
+        u16                     pscstate;
+        u16                     scllstate;
+        u16                     sclhstate;
+        u16                     bufstate;
+        u16                     syscstate;
+        u16                     westate;
 };
 
 static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
                                       int reg, u16 val)
 {
-        __raw_writew(val, i2c_dev->base + reg);
+        __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
 }
 
 static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 {
-        return __raw_readw(i2c_dev->base + reg);
+        return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
 }
 
 static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
@@ -230,7 +238,22 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
 
         clk_enable(dev->iclk);
         clk_enable(dev->fclk);
+        if (cpu_is_omap34xx()) {
+                omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
+                omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->scllstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->sclhstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, dev->bufstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, dev->syscstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
+                omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
+        }
         dev->idle = 0;
+
+        /*
+         * Don't write to this register if the IE state is 0 as it can
+         * cause deadlock.
+         */
         if (dev->iestate)
                 omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
 }
@@ -258,13 +281,18 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
 
 static int omap_i2c_init(struct omap_i2c_dev *dev)
 {
-        u16 psc = 0, scll = 0, sclh = 0;
+        u16 psc = 0, scll = 0, sclh = 0, buf = 0;
         u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0;
         unsigned long fclk_rate = 12000000;
         unsigned long timeout;
         unsigned long internal_clk = 0;
 
         if (dev->rev >= OMAP_I2C_REV_2) {
+                /* Disable I2C controller before soft reset */
+                omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
+                        omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) &
+                                ~(OMAP_I2C_CON_EN));
+
                 omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK);
                 /* For some reason we need to set the EN bit before the
                  * reset done bit gets set. */
@@ -287,24 +315,22 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
                                            SYSC_AUTOIDLE_MASK);
 
                 } else if (dev->rev >= OMAP_I2C_REV_ON_3430) {
-                        u32 v;
-
-                        v = SYSC_AUTOIDLE_MASK;
-                        v |= SYSC_ENAWAKEUP_MASK;
-                        v |= (SYSC_IDLEMODE_SMART <<
+                        dev->syscstate = SYSC_AUTOIDLE_MASK;
+                        dev->syscstate |= SYSC_ENAWAKEUP_MASK;
+                        dev->syscstate |= (SYSC_IDLEMODE_SMART <<
                               __ffs(SYSC_SIDLEMODE_MASK));
-                        v |= (SYSC_CLOCKACTIVITY_FCLK <<
+                        dev->syscstate |= (SYSC_CLOCKACTIVITY_FCLK <<
                               __ffs(SYSC_CLOCKACTIVITY_MASK));
 
-                        omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, v);
+                        omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG,
+                                                        dev->syscstate);
                         /*
                          * Enabling all wakup sources to stop I2C freezing on
                          * WFI instruction.
                          * REVISIT: Some wkup sources might not be needed.
                          */
-                        omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
-                                                        OMAP_I2C_WE_ALL);
-
+                        dev->westate = OMAP_I2C_WE_ALL;
+                        omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
                 }
         }
         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
@@ -394,23 +420,28 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
         omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, scll);
         omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, sclh);
 
-        if (dev->fifo_size)
-                /* Note: setup required fifo size - 1 */
-                omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG,
-                                        (dev->fifo_size - 1) << 8 | /* RTRSH */
-                                        OMAP_I2C_BUF_RXFIF_CLR |
-                                        (dev->fifo_size - 1) | /* XTRSH */
-                                        OMAP_I2C_BUF_TXFIF_CLR);
+        if (dev->fifo_size) {
+                /* Note: setup required fifo size - 1. RTRSH and XTRSH */
+                buf = (dev->fifo_size - 1) << 8 | OMAP_I2C_BUF_RXFIF_CLR |
+                        (dev->fifo_size - 1) | OMAP_I2C_BUF_TXFIF_CLR;
+                omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf);
+        }
 
         /* Take the I2C module out of reset: */
         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
 
         /* Enable interrupts */
-        omap_i2c_write_reg(dev, OMAP_I2C_IE_REG,
-                        (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY |
+        dev->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY |
                         OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
                         OMAP_I2C_IE_AL)  | ((dev->fifo_size) ?
-                                (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0));
+                                (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0);
+        omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
+        if (cpu_is_omap34xx()) {
+                dev->pscstate = psc;
+                dev->scllstate = scll;
+                dev->sclhstate = sclh;
+                dev->bufstate = buf;
+        }
         return 0;
 }
 
@@ -820,7 +851,7 @@ static const struct i2c_algorithm omap_i2c_algo = {
         .functionality  = omap_i2c_func,
 };
 
-static int __init
+static int __devinit
 omap_i2c_probe(struct platform_device *pdev)
 {
         struct omap_i2c_dev     *dev;
@@ -872,6 +903,11 @@ omap_i2c_probe(struct platform_device *pdev)
 
         platform_set_drvdata(pdev, dev);
 
+        if (cpu_is_omap7xx())
+                dev->reg_shift = 1;
+        else
+                dev->reg_shift = 2;
+
         if ((r = omap_i2c_get_clocks(dev)) != 0)
                 goto err_iounmap;