aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/i2c/busses/i2c-keywest.c
diff options
context:
space:
mode:
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-01-06 19:35:26 -0500
committerPaul Mackerras <paulus@samba.org>2006-01-08 23:47:17 -0500
commita28d3af2a26c89aaa6470ca36edb212e05143d67 (patch)
tree765472fcde19c3717c6bde60fef2702394718c36 /drivers/i2c/busses/i2c-keywest.c
parent730745a5c45093982112ddc94cee6a9973455641 (diff)
[PATCH] 2/5 powerpc: Rework PowerMac i2c part 2
This is the continuation of the previous patch. This one removes the old PowerMac i2c drivers (i2c-keywest and i2c-pmac-smu) and replaces them both with a single stub driver that uses the new PowerMac low i2c layer. Now that i2c-keywest is gone, the low-i2c code is extended to support interrupt driver transfers. All i2c busses now appear as platform devices. Compatibility with existing drivers should be maintained as the i2c bus names have been kept identical, except for the SMU bus but in that later case, all users has been fixed. With that patch added, matching a device node to an i2c_adapter becomes trivial. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-keywest.c')
-rw-r--r--drivers/i2c/busses/i2c-keywest.c754
1 files changed, 0 insertions, 754 deletions
diff --git a/drivers/i2c/busses/i2c-keywest.c b/drivers/i2c/busses/i2c-keywest.c
deleted file mode 100644
index 93e7080e3bc5..000000000000
--- a/drivers/i2c/busses/i2c-keywest.c
+++ /dev/null
@@ -1,754 +0,0 @@
1/*
2 i2c Support for Apple Keywest I2C Bus Controller
3
4 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
5
6 Original work by
7
8 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23
24 Changes:
25
26 2001/12/13 BenH New implementation
27 2001/12/15 BenH Add support for "byte" and "quick"
28 transfers. Add i2c_xfer routine.
29 2003/09/21 BenH Rework state machine with Paulus help
30 2004/01/21 BenH Merge in Greg KH changes, polled mode is back
31 2004/02/05 BenH Merge 64 bits fixes from the g5 ppc64 tree
32
33 My understanding of the various modes supported by keywest are:
34
35 - Dumb mode : not implemented, probably direct tweaking of lines
36 - Standard mode : simple i2c transaction of type
37 S Addr R/W A Data A Data ... T
38 - Standard sub mode : combined 8 bit subaddr write with data read
39 S Addr R/W A SubAddr A Data A Data ... T
40 - Combined mode : Subaddress and Data sequences appended with no stop
41 S Addr R/W A SubAddr S Addr R/W A Data A Data ... T
42
43 Currently, this driver uses only Standard mode for i2c xfer, and
44 smbus byte & quick transfers ; and uses StandardSub mode for
45 other smbus transfers instead of combined as we need that for the
46 sound driver to be happy
47*/
48
49#include <linux/module.h>
50#include <linux/kernel.h>
51#include <linux/ioport.h>
52#include <linux/pci.h>
53#include <linux/types.h>
54#include <linux/delay.h>
55#include <linux/i2c.h>
56#include <linux/init.h>
57#include <linux/mm.h>
58#include <linux/timer.h>
59#include <linux/spinlock.h>
60#include <linux/completion.h>
61#include <linux/interrupt.h>
62
63#include <asm/io.h>
64#include <asm/prom.h>
65#include <asm/machdep.h>
66#include <asm/pmac_feature.h>
67#include <asm/pmac_low_i2c.h>
68
69#include "i2c-keywest.h"
70
71#undef POLLED_MODE
72
73/* Some debug macros */
74#define WRONG_STATE(name) do {\
75 pr_debug("KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
76 name, __kw_state_names[iface->state], isr); \
77 } while(0)
78
79#ifdef DEBUG
80static const char *__kw_state_names[] = {
81 "state_idle",
82 "state_addr",
83 "state_read",
84 "state_write",
85 "state_stop",
86 "state_dead"
87};
88#endif /* DEBUG */
89
90MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
91MODULE_DESCRIPTION("I2C driver for Apple's Keywest");
92MODULE_LICENSE("GPL");
93
94#ifdef POLLED_MODE
95/* Don't schedule, the g5 fan controller is too
96 * timing sensitive
97 */
98static u8
99wait_interrupt(struct keywest_iface* iface)
100{
101 int i;
102 u8 isr;
103
104 for (i = 0; i < 200000; i++) {
105 isr = read_reg(reg_isr) & KW_I2C_IRQ_MASK;
106 if (isr != 0)
107 return isr;
108 udelay(10);
109 }
110 return isr;
111}
112#endif /* POLLED_MODE */
113
114static void
115do_stop(struct keywest_iface* iface, int result)
116{
117 write_reg(reg_control, KW_I2C_CTL_STOP);
118 iface->state = state_stop;
119 iface->result = result;
120}
121
122/* Main state machine for standard & standard sub mode */
123static void
124handle_interrupt(struct keywest_iface *iface, u8 isr)
125{
126 int ack;
127
128 if (isr == 0) {
129 if (iface->state != state_stop) {
130 pr_debug("KW: Timeout !\n");
131 do_stop(iface, -EIO);
132 }
133 if (iface->state == state_stop) {
134 ack = read_reg(reg_status);
135 if (!(ack & KW_I2C_STAT_BUSY)) {
136 iface->state = state_idle;
137 write_reg(reg_ier, 0x00);
138#ifndef POLLED_MODE
139 complete(&iface->complete);
140#endif /* POLLED_MODE */
141 }
142 }
143 return;
144 }
145
146 if (isr & KW_I2C_IRQ_ADDR) {
147 ack = read_reg(reg_status);
148 if (iface->state != state_addr) {
149 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
150 WRONG_STATE("KW_I2C_IRQ_ADDR");
151 do_stop(iface, -EIO);
152 return;
153 }
154 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
155 iface->state = state_stop;
156 iface->result = -ENODEV;
157 pr_debug("KW: NAK on address\n");
158 } else {
159 /* Handle rw "quick" mode */
160 if (iface->datalen == 0) {
161 do_stop(iface, 0);
162 } else if (iface->read_write == I2C_SMBUS_READ) {
163 iface->state = state_read;
164 if (iface->datalen > 1)
165 write_reg(reg_control, KW_I2C_CTL_AAK);
166 } else {
167 iface->state = state_write;
168 write_reg(reg_data, *(iface->data++));
169 iface->datalen--;
170 }
171 }
172 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
173 }
174
175 if (isr & KW_I2C_IRQ_DATA) {
176 if (iface->state == state_read) {
177 *(iface->data++) = read_reg(reg_data);
178 write_reg(reg_isr, KW_I2C_IRQ_DATA);
179 iface->datalen--;
180 if (iface->datalen == 0)
181 iface->state = state_stop;
182 else if (iface->datalen == 1)
183 write_reg(reg_control, 0);
184 } else if (iface->state == state_write) {
185 /* Check ack status */
186 ack = read_reg(reg_status);
187 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
188 pr_debug("KW: nack on data write (%x): %x\n",
189 iface->data[-1], ack);
190 do_stop(iface, -EIO);
191 } else if (iface->datalen) {
192 write_reg(reg_data, *(iface->data++));
193 iface->datalen--;
194 } else {
195 write_reg(reg_control, KW_I2C_CTL_STOP);
196 iface->state = state_stop;
197 iface->result = 0;
198 }
199 write_reg(reg_isr, KW_I2C_IRQ_DATA);
200 } else {
201 write_reg(reg_isr, KW_I2C_IRQ_DATA);
202 WRONG_STATE("KW_I2C_IRQ_DATA");
203 if (iface->state != state_stop)
204 do_stop(iface, -EIO);
205 }
206 }
207
208 if (isr & KW_I2C_IRQ_STOP) {
209 write_reg(reg_isr, KW_I2C_IRQ_STOP);
210 if (iface->state != state_stop) {
211 WRONG_STATE("KW_I2C_IRQ_STOP");
212 iface->result = -EIO;
213 }
214 iface->state = state_idle;
215 write_reg(reg_ier, 0x00);
216#ifndef POLLED_MODE
217 complete(&iface->complete);
218#endif /* POLLED_MODE */
219 }
220
221 if (isr & KW_I2C_IRQ_START)
222 write_reg(reg_isr, KW_I2C_IRQ_START);
223}
224
225#ifndef POLLED_MODE
226
227/* Interrupt handler */
228static irqreturn_t
229keywest_irq(int irq, void *dev_id, struct pt_regs *regs)
230{
231 struct keywest_iface *iface = (struct keywest_iface *)dev_id;
232 unsigned long flags;
233
234 spin_lock_irqsave(&iface->lock, flags);
235 del_timer(&iface->timeout_timer);
236 handle_interrupt(iface, read_reg(reg_isr));
237 if (iface->state != state_idle) {
238 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
239 add_timer(&iface->timeout_timer);
240 }
241 spin_unlock_irqrestore(&iface->lock, flags);
242 return IRQ_HANDLED;
243}
244
245static void
246keywest_timeout(unsigned long data)
247{
248 struct keywest_iface *iface = (struct keywest_iface *)data;
249 unsigned long flags;
250
251 pr_debug("timeout !\n");
252 spin_lock_irqsave(&iface->lock, flags);
253 handle_interrupt(iface, read_reg(reg_isr));
254 if (iface->state != state_idle) {
255 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
256 add_timer(&iface->timeout_timer);
257 }
258 spin_unlock_irqrestore(&iface->lock, flags);
259}
260
261#endif /* POLLED_MODE */
262
263/*
264 * SMBUS-type transfer entrypoint
265 */
266static s32
267keywest_smbus_xfer( struct i2c_adapter* adap,
268 u16 addr,
269 unsigned short flags,
270 char read_write,
271 u8 command,
272 int size,
273 union i2c_smbus_data* data)
274{
275 struct keywest_chan* chan = i2c_get_adapdata(adap);
276 struct keywest_iface* iface = chan->iface;
277 int len;
278 u8* buffer;
279 u16 cur_word;
280 int rc = 0;
281
282 if (iface->state == state_dead)
283 return -ENXIO;
284
285 /* Prepare datas & select mode */
286 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
287 switch (size) {
288 case I2C_SMBUS_QUICK:
289 len = 0;
290 buffer = NULL;
291 iface->cur_mode |= KW_I2C_MODE_STANDARD;
292 break;
293 case I2C_SMBUS_BYTE:
294 len = 1;
295 buffer = &data->byte;
296 iface->cur_mode |= KW_I2C_MODE_STANDARD;
297 break;
298 case I2C_SMBUS_BYTE_DATA:
299 len = 1;
300 buffer = &data->byte;
301 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
302 break;
303 case I2C_SMBUS_WORD_DATA:
304 len = 2;
305 cur_word = cpu_to_le16(data->word);
306 buffer = (u8 *)&cur_word;
307 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
308 break;
309 case I2C_SMBUS_BLOCK_DATA:
310 len = data->block[0];
311 buffer = &data->block[1];
312 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
313 break;
314 default:
315 return -1;
316 }
317
318 /* Turn a standardsub read into a combined mode access */
319 if (read_write == I2C_SMBUS_READ
320 && (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB) {
321 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
322 iface->cur_mode |= KW_I2C_MODE_COMBINED;
323 }
324
325 /* Original driver had this limitation */
326 if (len > 32)
327 len = 32;
328
329 if (pmac_low_i2c_lock(iface->node))
330 return -ENXIO;
331
332 pr_debug("chan: %d, addr: 0x%x, transfer len: %d, read: %d\n",
333 chan->chan_no, addr, len, read_write == I2C_SMBUS_READ);
334
335 iface->data = buffer;
336 iface->datalen = len;
337 iface->state = state_addr;
338 iface->result = 0;
339 iface->read_write = read_write;
340
341 /* Setup channel & clear pending irqs */
342 write_reg(reg_isr, read_reg(reg_isr));
343 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
344 write_reg(reg_status, 0);
345
346 /* Set up address and r/w bit */
347 write_reg(reg_addr,
348 (addr << 1) | ((read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
349
350 /* Set up the sub address */
351 if ((iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
352 || (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
353 write_reg(reg_subaddr, command);
354
355#ifndef POLLED_MODE
356 /* Arm timeout */
357 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
358 add_timer(&iface->timeout_timer);
359#endif
360
361 /* Start sending address & enable interrupt*/
362 write_reg(reg_control, KW_I2C_CTL_XADDR);
363 write_reg(reg_ier, KW_I2C_IRQ_MASK);
364
365#ifdef POLLED_MODE
366 pr_debug("using polled mode...\n");
367 /* State machine, to turn into an interrupt handler */
368 while(iface->state != state_idle) {
369 unsigned long flags;
370
371 u8 isr = wait_interrupt(iface);
372 spin_lock_irqsave(&iface->lock, flags);
373 handle_interrupt(iface, isr);
374 spin_unlock_irqrestore(&iface->lock, flags);
375 }
376#else /* POLLED_MODE */
377 pr_debug("using interrupt mode...\n");
378 wait_for_completion(&iface->complete);
379#endif /* POLLED_MODE */
380
381 rc = iface->result;
382 pr_debug("transfer done, result: %d\n", rc);
383
384 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && read_write == I2C_SMBUS_READ)
385 data->word = le16_to_cpu(cur_word);
386
387 /* Release sem */
388 pmac_low_i2c_unlock(iface->node);
389
390 return rc;
391}
392
393/*
394 * Generic i2c master transfer entrypoint
395 */
396static int
397keywest_xfer( struct i2c_adapter *adap,
398 struct i2c_msg *msgs,
399 int num)
400{
401 struct keywest_chan* chan = i2c_get_adapdata(adap);
402 struct keywest_iface* iface = chan->iface;
403 struct i2c_msg *pmsg;
404 int i, completed;
405 int rc = 0;
406
407 if (iface->state == state_dead)
408 return -ENXIO;
409
410 if (pmac_low_i2c_lock(iface->node))
411 return -ENXIO;
412
413 /* Set adapter to standard mode */
414 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
415 iface->cur_mode |= KW_I2C_MODE_STANDARD;
416
417 completed = 0;
418 for (i = 0; rc >= 0 && i < num;) {
419 u8 addr;
420
421 pmsg = &msgs[i++];
422 addr = pmsg->addr;
423 if (pmsg->flags & I2C_M_TEN) {
424 printk(KERN_ERR "i2c-keywest: 10 bits addr not supported !\n");
425 rc = -EINVAL;
426 break;
427 }
428 pr_debug("xfer: chan: %d, doing %s %d bytes to 0x%02x - %d of %d messages\n",
429 chan->chan_no,
430 pmsg->flags & I2C_M_RD ? "read" : "write",
431 pmsg->len, addr, i, num);
432
433 /* Setup channel & clear pending irqs */
434 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
435 write_reg(reg_isr, read_reg(reg_isr));
436 write_reg(reg_status, 0);
437
438 iface->data = pmsg->buf;
439 iface->datalen = pmsg->len;
440 iface->state = state_addr;
441 iface->result = 0;
442 if (pmsg->flags & I2C_M_RD)
443 iface->read_write = I2C_SMBUS_READ;
444 else
445 iface->read_write = I2C_SMBUS_WRITE;
446
447 /* Set up address and r/w bit */
448 if (pmsg->flags & I2C_M_REV_DIR_ADDR)
449 addr ^= 1;
450 write_reg(reg_addr,
451 (addr << 1) |
452 ((iface->read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
453
454#ifndef POLLED_MODE
455 /* Arm timeout */
456 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
457 add_timer(&iface->timeout_timer);
458#endif
459
460 /* Start sending address & enable interrupt*/
461 write_reg(reg_ier, KW_I2C_IRQ_MASK);
462 write_reg(reg_control, KW_I2C_CTL_XADDR);
463
464#ifdef POLLED_MODE
465 pr_debug("using polled mode...\n");
466 /* State machine, to turn into an interrupt handler */
467 while(iface->state != state_idle) {
468 u8 isr = wait_interrupt(iface);
469 handle_interrupt(iface, isr);
470 }
471#else /* POLLED_MODE */
472 pr_debug("using interrupt mode...\n");
473 wait_for_completion(&iface->complete);
474#endif /* POLLED_MODE */
475
476 rc = iface->result;
477 if (rc == 0)
478 completed++;
479 pr_debug("transfer done, result: %d\n", rc);
480 }
481
482 /* Release sem */
483 pmac_low_i2c_unlock(iface->node);
484
485 return completed;
486}
487
488static u32
489keywest_func(struct i2c_adapter * adapter)
490{
491 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
492 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
493 I2C_FUNC_SMBUS_BLOCK_DATA;
494}
495
496/* For now, we only handle combined mode (smbus) */
497static struct i2c_algorithm keywest_algorithm = {
498 .smbus_xfer = keywest_smbus_xfer,
499 .master_xfer = keywest_xfer,
500 .functionality = keywest_func,
501};
502
503
504static int
505create_iface(struct device_node *np, struct device *dev)
506{
507 unsigned long steps;
508 unsigned bsteps, tsize, i, nchan;
509 struct keywest_iface* iface;
510 u32 *psteps, *prate, *addrp;
511 int rc;
512
513 if (np->n_intrs < 1) {
514 printk(KERN_ERR "%s: Missing interrupt !\n",
515 np->full_name);
516 return -ENODEV;
517 }
518 addrp = (u32 *)get_property(np, "AAPL,address", NULL);
519 if (addrp == NULL) {
520 printk(KERN_ERR "%s: Can't find address !\n",
521 np->full_name);
522 return -ENODEV;
523 }
524
525 if (pmac_low_i2c_lock(np))
526 return -ENODEV;
527
528 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
529 steps = psteps ? (*psteps) : 0x10;
530
531 /* Hrm... maybe we can be smarter here */
532 for (bsteps = 0; (steps & 0x01) == 0; bsteps++)
533 steps >>= 1;
534
535 if (np->parent->name[0] == 'u')
536 nchan = 2;
537 else
538 nchan = 1;
539
540 tsize = sizeof(struct keywest_iface) +
541 (sizeof(struct keywest_chan) + 4) * nchan;
542 iface = kzalloc(tsize, GFP_KERNEL);
543 if (iface == NULL) {
544 printk(KERN_ERR "i2c-keywest: can't allocate inteface !\n");
545 pmac_low_i2c_unlock(np);
546 return -ENOMEM;
547 }
548 spin_lock_init(&iface->lock);
549 init_completion(&iface->complete);
550 iface->node = of_node_get(np);
551 iface->bsteps = bsteps;
552 iface->chan_count = nchan;
553 iface->state = state_idle;
554 iface->irq = np->intrs[0].line;
555 iface->channels = (struct keywest_chan *)
556 (((unsigned long)(iface + 1) + 3UL) & ~3UL);
557 iface->base = ioremap(*addrp, 0x1000);
558 if (!iface->base) {
559 printk(KERN_ERR "i2c-keywest: can't map inteface !\n");
560 kfree(iface);
561 pmac_low_i2c_unlock(np);
562 return -ENOMEM;
563 }
564
565#ifndef POLLED_MODE
566 init_timer(&iface->timeout_timer);
567 iface->timeout_timer.function = keywest_timeout;
568 iface->timeout_timer.data = (unsigned long)iface;
569#endif
570
571 /* Select interface rate */
572 iface->cur_mode = KW_I2C_MODE_100KHZ;
573 prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
574 if (prate) switch(*prate) {
575 case 100:
576 iface->cur_mode = KW_I2C_MODE_100KHZ;
577 break;
578 case 50:
579 iface->cur_mode = KW_I2C_MODE_50KHZ;
580 break;
581 case 25:
582 iface->cur_mode = KW_I2C_MODE_25KHZ;
583 break;
584 default:
585 printk(KERN_WARNING "i2c-keywest: unknown rate %ldKhz, using 100KHz\n",
586 (long)*prate);
587 }
588
589 /* Select standard mode by default */
590 iface->cur_mode |= KW_I2C_MODE_STANDARD;
591
592 /* Write mode */
593 write_reg(reg_mode, iface->cur_mode);
594
595 /* Switch interrupts off & clear them*/
596 write_reg(reg_ier, 0x00);
597 write_reg(reg_isr, KW_I2C_IRQ_MASK);
598
599#ifndef POLLED_MODE
600 /* Request chip interrupt */
601 rc = request_irq(iface->irq, keywest_irq, SA_INTERRUPT, "keywest i2c", iface);
602 if (rc) {
603 printk(KERN_ERR "i2c-keywest: can't get IRQ %d !\n", iface->irq);
604 iounmap(iface->base);
605 kfree(iface);
606 pmac_low_i2c_unlock(np);
607 return -ENODEV;
608 }
609#endif /* POLLED_MODE */
610
611 pmac_low_i2c_unlock(np);
612 dev_set_drvdata(dev, iface);
613
614 for (i=0; i<nchan; i++) {
615 struct keywest_chan* chan = &iface->channels[i];
616
617 sprintf(chan->adapter.name, "%s %d", np->parent->name, i);
618 chan->iface = iface;
619 chan->chan_no = i;
620 chan->adapter.algo = &keywest_algorithm;
621 chan->adapter.algo_data = NULL;
622 chan->adapter.client_register = NULL;
623 chan->adapter.client_unregister = NULL;
624 i2c_set_adapdata(&chan->adapter, chan);
625 chan->adapter.dev.parent = dev;
626
627 rc = i2c_add_adapter(&chan->adapter);
628 if (rc) {
629 printk("i2c-keywest.c: Adapter %s registration failed\n",
630 chan->adapter.name);
631 i2c_set_adapdata(&chan->adapter, NULL);
632 }
633 }
634
635 printk(KERN_INFO "Found KeyWest i2c on \"%s\", %d channel%s, stepping: %d bits\n",
636 np->parent->name, nchan, nchan > 1 ? "s" : "", bsteps);
637
638 return 0;
639}
640
641static int
642dispose_iface(struct device *dev)
643{
644 struct keywest_iface *iface = dev_get_drvdata(dev);
645 int i, rc;
646
647 /* Make sure we stop all activity */
648 if (pmac_low_i2c_lock(iface->node))
649 return -ENODEV;
650
651#ifndef POLLED_MODE
652 spin_lock_irq(&iface->lock);
653 while (iface->state != state_idle) {
654 spin_unlock_irq(&iface->lock);
655 msleep(100);
656 spin_lock_irq(&iface->lock);
657 }
658#endif /* POLLED_MODE */
659 iface->state = state_dead;
660#ifndef POLLED_MODE
661 spin_unlock_irq(&iface->lock);
662 free_irq(iface->irq, iface);
663#endif /* POLLED_MODE */
664
665 pmac_low_i2c_unlock(iface->node);
666
667 /* Release all channels */
668 for (i=0; i<iface->chan_count; i++) {
669 struct keywest_chan* chan = &iface->channels[i];
670 if (i2c_get_adapdata(&chan->adapter) == NULL)
671 continue;
672 rc = i2c_del_adapter(&chan->adapter);
673 i2c_set_adapdata(&chan->adapter, NULL);
674 /* We aren't that prepared to deal with this... */
675 if (rc)
676 printk("i2c-keywest.c: i2c_del_adapter failed, that's bad !\n");
677 }
678 iounmap(iface->base);
679 dev_set_drvdata(dev, NULL);
680 of_node_put(iface->node);
681 kfree(iface);
682
683 return 0;
684}
685
686static int
687create_iface_macio(struct macio_dev* dev, const struct of_device_id *match)
688{
689 return create_iface(dev->ofdev.node, &dev->ofdev.dev);
690}
691
692static int
693dispose_iface_macio(struct macio_dev* dev)
694{
695 return dispose_iface(&dev->ofdev.dev);
696}
697
698static int
699create_iface_of_platform(struct of_device* dev, const struct of_device_id *match)
700{
701 return create_iface(dev->node, &dev->dev);
702}
703
704static int
705dispose_iface_of_platform(struct of_device* dev)
706{
707 return dispose_iface(&dev->dev);
708}
709
710static struct of_device_id i2c_keywest_match[] =
711{
712 {
713 .type = "i2c",
714 .compatible = "keywest"
715 },
716 {},
717};
718
719static struct macio_driver i2c_keywest_macio_driver =
720{
721 .owner = THIS_MODULE,
722 .name = "i2c-keywest",
723 .match_table = i2c_keywest_match,
724 .probe = create_iface_macio,
725 .remove = dispose_iface_macio
726};
727
728static struct of_platform_driver i2c_keywest_of_platform_driver =
729{
730 .owner = THIS_MODULE,
731 .name = "i2c-keywest",
732 .match_table = i2c_keywest_match,
733 .probe = create_iface_of_platform,
734 .remove = dispose_iface_of_platform
735};
736
737static int __init
738i2c_keywest_init(void)
739{
740 of_register_driver(&i2c_keywest_of_platform_driver);
741 macio_register_driver(&i2c_keywest_macio_driver);
742
743 return 0;
744}
745
746static void __exit
747i2c_keywest_cleanup(void)
748{
749 of_unregister_driver(&i2c_keywest_of_platform_driver);
750 macio_unregister_driver(&i2c_keywest_macio_driver);
751}
752
753module_init(i2c_keywest_init);
754module_exit(i2c_keywest_cleanup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 01:19:22 -0500