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authorAravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>2014-08-14 19:15:27 -0400
committerGuenter Roeck <linux@roeck-us.net>2014-09-22 14:14:52 -0400
commitf89ce2706d8341c921b96e13a00b951a10eed308 (patch)
treef31401a24a911459bec16aad13ab81eeeda56286 /drivers/hwmon
parent4222eb5f2b4fe9a0f50b283ba25111c595723429 (diff)
hwmon: (k10temp) Add support for F15h M60h
This patch adds temperature monitoring support for F15h M60h processor. - Add new pci device id for the relevant processor - The functionality of REG_REPORTED_TEMPERATURE is moved to D0F0xBC_xD820_0CA4 [Reported Temperature Control] - So, use this to get CUR_TEMP value - Since we need an indirect register access, protect this with a mutex lock - Add Kconfig, Doc entries to indicate support for this processor. Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com> Acked-by: Borislav Petkov <bp@suse.de> Acked-by: Clemens Ladisch <clemens@ladisch.de> [Guenter Roeck: Declare new mutex and function static] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'drivers/hwmon')
-rw-r--r--drivers/hwmon/Kconfig4
-rw-r--r--drivers/hwmon/k10temp.c35
2 files changed, 34 insertions, 5 deletions
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f00d048aa583..4289a4fa1a03 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -280,8 +280,8 @@ config SENSORS_K10TEMP
280 If you say yes here you get support for the temperature 280 If you say yes here you get support for the temperature
281 sensor(s) inside your CPU. Supported are later revisions of 281 sensor(s) inside your CPU. Supported are later revisions of
282 the AMD Family 10h and all revisions of the AMD Family 11h, 282 the AMD Family 10h and all revisions of the AMD Family 11h,
283 12h (Llano), 14h (Brazos), 15h (Bulldozer/Trinity/Kaveri) and 283 12h (Llano), 14h (Brazos), 15h (Bulldozer/Trinity/Kaveri/Carrizo)
284 16h (Kabini/Mullins) microarchitectures. 284 and 16h (Kabini/Mullins) microarchitectures.
285 285
286 This driver can also be built as a module. If so, the module 286 This driver can also be built as a module. If so, the module
287 will be called k10temp. 287 will be called k10temp.
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index f7b46f68ef43..730bdf702377 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -33,6 +33,9 @@ static bool force;
33module_param(force, bool, 0444); 33module_param(force, bool, 0444);
34MODULE_PARM_DESC(force, "force loading on processors with erratum 319"); 34MODULE_PARM_DESC(force, "force loading on processors with erratum 319");
35 35
36/* Provide lock for writing to NB_SMU_IND_ADDR */
37static DEFINE_MUTEX(nb_smu_ind_mutex);
38
36/* CPUID function 0x80000001, ebx */ 39/* CPUID function 0x80000001, ebx */
37#define CPUID_PKGTYPE_MASK 0xf0000000 40#define CPUID_PKGTYPE_MASK 0xf0000000
38#define CPUID_PKGTYPE_F 0x00000000 41#define CPUID_PKGTYPE_F 0x00000000
@@ -51,13 +54,38 @@ MODULE_PARM_DESC(force, "force loading on processors with erratum 319");
51#define REG_NORTHBRIDGE_CAPABILITIES 0xe8 54#define REG_NORTHBRIDGE_CAPABILITIES 0xe8
52#define NB_CAP_HTC 0x00000400 55#define NB_CAP_HTC 0x00000400
53 56
57/*
58 * For F15h M60h, functionality of REG_REPORTED_TEMPERATURE
59 * has been moved to D0F0xBC_xD820_0CA4 [Reported Temperature
60 * Control]
61 */
62#define F15H_M60H_REPORTED_TEMP_CTRL_OFFSET 0xd8200ca4
63#define PCI_DEVICE_ID_AMD_15H_M60H_NB_F3 0x1573
64
65static void amd_nb_smu_index_read(struct pci_dev *pdev, unsigned int devfn,
66 int offset, u32 *val)
67{
68 mutex_lock(&nb_smu_ind_mutex);
69 pci_bus_write_config_dword(pdev->bus, devfn,
70 0xb8, offset);
71 pci_bus_read_config_dword(pdev->bus, devfn,
72 0xbc, val);
73 mutex_unlock(&nb_smu_ind_mutex);
74}
75
54static ssize_t show_temp(struct device *dev, 76static ssize_t show_temp(struct device *dev,
55 struct device_attribute *attr, char *buf) 77 struct device_attribute *attr, char *buf)
56{ 78{
57 u32 regval; 79 u32 regval;
58 80 struct pci_dev *pdev = to_pci_dev(dev);
59 pci_read_config_dword(to_pci_dev(dev), 81
60 REG_REPORTED_TEMPERATURE, &regval); 82 if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model == 0x60) {
83 amd_nb_smu_index_read(pdev, PCI_DEVFN(0, 0),
84 F15H_M60H_REPORTED_TEMP_CTRL_OFFSET,
85 &regval);
86 } else {
87 pci_read_config_dword(pdev, REG_REPORTED_TEMPERATURE, &regval);
88 }
61 return sprintf(buf, "%u\n", (regval >> 21) * 125); 89 return sprintf(buf, "%u\n", (regval >> 21) * 125);
62} 90}
63 91
@@ -211,6 +239,7 @@ static const struct pci_device_id k10temp_id_table[] = {
211 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) }, 239 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) },
212 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) }, 240 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) },
213 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) }, 241 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) },
242 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F3) },
214 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, 243 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
215 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, 244 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
216 {} 245 {}