hwmon: (coretemp) Improve support for TjMax detection on Atom CPUs

Atom CPUs don't have a register to retrieve TjMax. Detection so far was
incomplete. Use the X86 model ID to improve it.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>

1 files changed, 25 insertions, 0 deletions

diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 42c2f431ea51..22716833739a 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -191,6 +191,24 @@ static ssize_t show_temp(struct device *dev,
         return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
 }
 
+struct tjmax {
+        char const *id;
+        int tjmax;
+};
+
+static struct tjmax __cpuinitconst tjmax_table[] = {
+        { "CPU D410", 100000 },
+        { "CPU D425", 100000 },
+        { "CPU D510", 100000 },
+        { "CPU D525", 100000 },
+        { "CPU N450", 100000 },
+        { "CPU N455", 100000 },
+        { "CPU N470", 100000 },
+        { "CPU N475", 100000 },
+        { "CPU  230", 100000 },
+        { "CPU  330", 125000 },
+};
+
 static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
                                   struct device *dev)
 {
@@ -202,6 +220,13 @@ static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
         int err;
         u32 eax, edx;
         struct pci_dev *host_bridge;
+        int i;
+
+        /* explicit tjmax table entries override heuristics */
+        for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
+                if (strstr(c->x86_model_id, tjmax_table[i].id))
+                        return tjmax_table[i].tjmax;
+        }
 
         /* Early chips have no MSR for TjMax */