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authorDave Airlie <airlied@redhat.com>2013-01-20 22:25:30 -0500
committerDave Airlie <airlied@redhat.com>2013-01-20 22:25:30 -0500
commitffb5fd53ef27df22a6850019ecb5488686a573f1 (patch)
tree10c32d0646febe9f52ffe92759069f37d21a5e8c /drivers/gpu
parenta3f5aed42f64878ad98006e27492255381bba061 (diff)
parentb514407547890686572606c9dfa4b7f832db9958 (diff)
Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
More important fixes for 3.9: - error_state improvements to help debug the new scanline wait code added for gen6+ - bug reports started popping up :( patch from Chris Wilson. - fix a panel power sequence confusion between the eDP and lvds detection code resulting in black screens - regression introduce in 3.8 (Jani Nikula) - Chris fixed the root-cause of the ilk relocation vs. evict bug. - Another piece of cargo-culted rc6 lore from Jani, fixes up a regression where a system refused to go into rc6 after suspend sometimes. * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: drm/i915: fix FORCEWAKE posting reads drm/i915: Invalidate the relocation presumed_offsets along the slow path drm/i915/eDP: do not write power sequence registers for ghost eDP drm/i915: Record DERRMR, FORCEWAKE and RING_CTL in error-state
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c3
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h3
-rw-r--r--drivers/gpu/drm/i915/i915_gem_execbuffer.c21
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c11
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c47
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c17
7 files changed, 84 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index e6a11ca85eaf..7944d301518a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -641,6 +641,7 @@ static void i915_ring_error_state(struct seq_file *m,
641 seq_printf(m, "%s command stream:\n", ring_str(ring)); 641 seq_printf(m, "%s command stream:\n", ring_str(ring));
642 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]); 642 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
643 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); 643 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
644 seq_printf(m, " CTL: 0x%08x\n", error->ctl[ring]);
644 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); 645 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
645 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); 646 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
646 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); 647 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
@@ -693,6 +694,8 @@ static int i915_error_state(struct seq_file *m, void *unused)
693 seq_printf(m, "EIR: 0x%08x\n", error->eir); 694 seq_printf(m, "EIR: 0x%08x\n", error->eir);
694 seq_printf(m, "IER: 0x%08x\n", error->ier); 695 seq_printf(m, "IER: 0x%08x\n", error->ier);
695 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); 696 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
697 seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
698 seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
696 seq_printf(m, "CCID: 0x%08x\n", error->ccid); 699 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
697 700
698 for (i = 0; i < dev_priv->num_fence_regs; i++) 701 for (i = 0; i < dev_priv->num_fence_regs; i++)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ed3059575576..12ab3bdea54d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -188,10 +188,13 @@ struct drm_i915_error_state {
188 u32 pgtbl_er; 188 u32 pgtbl_er;
189 u32 ier; 189 u32 ier;
190 u32 ccid; 190 u32 ccid;
191 u32 derrmr;
192 u32 forcewake;
191 bool waiting[I915_NUM_RINGS]; 193 bool waiting[I915_NUM_RINGS];
192 u32 pipestat[I915_MAX_PIPES]; 194 u32 pipestat[I915_MAX_PIPES];
193 u32 tail[I915_NUM_RINGS]; 195 u32 tail[I915_NUM_RINGS];
194 u32 head[I915_NUM_RINGS]; 196 u32 head[I915_NUM_RINGS];
197 u32 ctl[I915_NUM_RINGS];
195 u32 ipeir[I915_NUM_RINGS]; 198 u32 ipeir[I915_NUM_RINGS];
196 u32 ipehr[I915_NUM_RINGS]; 199 u32 ipehr[I915_NUM_RINGS];
197 u32 instdone[I915_NUM_RINGS]; 200 u32 instdone[I915_NUM_RINGS];
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index d6a994a07393..26d08bb58218 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -539,6 +539,8 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
539 total = 0; 539 total = 0;
540 for (i = 0; i < count; i++) { 540 for (i = 0; i < count; i++) {
541 struct drm_i915_gem_relocation_entry __user *user_relocs; 541 struct drm_i915_gem_relocation_entry __user *user_relocs;
542 u64 invalid_offset = (u64)-1;
543 int j;
542 544
543 user_relocs = (void __user *)(uintptr_t)exec[i].relocs_ptr; 545 user_relocs = (void __user *)(uintptr_t)exec[i].relocs_ptr;
544 546
@@ -549,6 +551,25 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
549 goto err; 551 goto err;
550 } 552 }
551 553
554 /* As we do not update the known relocation offsets after
555 * relocating (due to the complexities in lock handling),
556 * we need to mark them as invalid now so that we force the
557 * relocation processing next time. Just in case the target
558 * object is evicted and then rebound into its old
559 * presumed_offset before the next execbuffer - if that
560 * happened we would make the mistake of assuming that the
561 * relocations were valid.
562 */
563 for (j = 0; j < exec[i].relocation_count; j++) {
564 if (copy_to_user(&user_relocs[j].presumed_offset,
565 &invalid_offset,
566 sizeof(invalid_offset))) {
567 ret = -EFAULT;
568 mutex_lock(&dev->struct_mutex);
569 goto err;
570 }
571 }
572
552 reloc_offset[i] = total; 573 reloc_offset[i] = total;
553 total += exec[i].relocation_count; 574 total += exec[i].relocation_count;
554 } 575 }
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2220dec3e5d9..fe843389c7b4 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1157,6 +1157,7 @@ static void i915_record_ring_state(struct drm_device *dev,
1157 error->acthd[ring->id] = intel_ring_get_active_head(ring); 1157 error->acthd[ring->id] = intel_ring_get_active_head(ring);
1158 error->head[ring->id] = I915_READ_HEAD(ring); 1158 error->head[ring->id] = I915_READ_HEAD(ring);
1159 error->tail[ring->id] = I915_READ_TAIL(ring); 1159 error->tail[ring->id] = I915_READ_TAIL(ring);
1160 error->ctl[ring->id] = I915_READ_CTL(ring);
1160 1161
1161 error->cpu_ring_head[ring->id] = ring->head; 1162 error->cpu_ring_head[ring->id] = ring->head;
1162 error->cpu_ring_tail[ring->id] = ring->tail; 1163 error->cpu_ring_tail[ring->id] = ring->tail;
@@ -1251,6 +1252,16 @@ static void i915_capture_error_state(struct drm_device *dev)
1251 else 1252 else
1252 error->ier = I915_READ(IER); 1253 error->ier = I915_READ(IER);
1253 1254
1255 if (INTEL_INFO(dev)->gen >= 6)
1256 error->derrmr = I915_READ(DERRMR);
1257
1258 if (IS_VALLEYVIEW(dev))
1259 error->forcewake = I915_READ(FORCEWAKE_VLV);
1260 else if (INTEL_INFO(dev)->gen >= 7)
1261 error->forcewake = I915_READ(FORCEWAKE_MT);
1262 else if (INTEL_INFO(dev)->gen == 6)
1263 error->forcewake = I915_READ(FORCEWAKE);
1264
1254 for_each_pipe(pipe) 1265 for_each_pipe(pipe)
1255 error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); 1266 error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
1256 1267
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 186ee5c85b51..b401788e1791 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -512,6 +512,8 @@
512#define GEN7_ERR_INT 0x44040 512#define GEN7_ERR_INT 0x44040
513#define ERR_INT_MMIO_UNCLAIMED (1<<13) 513#define ERR_INT_MMIO_UNCLAIMED (1<<13)
514 514
515#define DERRMR 0x44050
516
515/* GM45+ chicken bits -- debug workaround bits that may be required 517/* GM45+ chicken bits -- debug workaround bits that may be required
516 * for various sorts of correct behavior. The top 16 bits of each are 518 * for various sorts of correct behavior. The top 16 bits of each are
517 * the enables for writing to the corresponding low bit. 519 * the enables for writing to the corresponding low bit.
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1b63d55318a0..fb3715b4b09d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2579,7 +2579,8 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
2579 2579
2580static void 2580static void
2581intel_dp_init_panel_power_sequencer(struct drm_device *dev, 2581intel_dp_init_panel_power_sequencer(struct drm_device *dev,
2582 struct intel_dp *intel_dp) 2582 struct intel_dp *intel_dp,
2583 struct edp_power_seq *out)
2583{ 2584{
2584 struct drm_i915_private *dev_priv = dev->dev_private; 2585 struct drm_i915_private *dev_priv = dev->dev_private;
2585 struct edp_power_seq cur, vbt, spec, final; 2586 struct edp_power_seq cur, vbt, spec, final;
@@ -2650,16 +2651,35 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev,
2650 intel_dp->panel_power_cycle_delay = get_delay(t11_t12); 2651 intel_dp->panel_power_cycle_delay = get_delay(t11_t12);
2651#undef get_delay 2652#undef get_delay
2652 2653
2654 DRM_DEBUG_KMS("panel power up delay %d, power down delay %d, power cycle delay %d\n",
2655 intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay,
2656 intel_dp->panel_power_cycle_delay);
2657
2658 DRM_DEBUG_KMS("backlight on delay %d, off delay %d\n",
2659 intel_dp->backlight_on_delay, intel_dp->backlight_off_delay);
2660
2661 if (out)
2662 *out = final;
2663}
2664
2665static void
2666intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
2667 struct intel_dp *intel_dp,