diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2012-04-24 17:59:42 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-03 05:18:15 -0400 |
commit | fa883c62af00c577418a06ffb938d98bd6aba1bc (patch) | |
tree | ce0e4abb49b234e3bf163d793220501a9c2373a1 /drivers/gpu | |
parent | 8b2e326dc7c5aa6952c88656d04d0d81fd85a6f8 (diff) |
drm/i915: Remove redundant initialisation of per-ring IRQ waitqueues
The waitqueues are already initialised during ring initialisation so
kill the redundant and duplicated code to do so in each generations IRQ
installer.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 2dc023d657b0..82bd8b6d3740 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -2085,12 +2085,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev) | |||
2085 | u32 render_irqs; | 2085 | u32 render_irqs; |
2086 | u32 hotplug_mask; | 2086 | u32 hotplug_mask; |
2087 | 2087 | ||
2088 | DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue); | ||
2089 | if (HAS_BSD(dev)) | ||
2090 | DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue); | ||
2091 | if (HAS_BLT(dev)) | ||
2092 | DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue); | ||
2093 | |||
2094 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; | 2088 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
2095 | dev_priv->irq_mask = ~display_mask; | 2089 | dev_priv->irq_mask = ~display_mask; |
2096 | 2090 | ||
@@ -2160,12 +2154,6 @@ static int ivybridge_irq_postinstall(struct drm_device *dev) | |||
2160 | u32 render_irqs; | 2154 | u32 render_irqs; |
2161 | u32 hotplug_mask; | 2155 | u32 hotplug_mask; |
2162 | 2156 | ||
2163 | DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue); | ||
2164 | if (HAS_BSD(dev)) | ||
2165 | DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue); | ||
2166 | if (HAS_BLT(dev)) | ||
2167 | DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue); | ||
2168 | |||
2169 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; | 2157 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
2170 | dev_priv->irq_mask = ~display_mask; | 2158 | dev_priv->irq_mask = ~display_mask; |
2171 | 2159 | ||
@@ -2216,11 +2204,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev) | |||
2216 | 2204 | ||
2217 | dev_priv->irq_mask = ~enable_mask; | 2205 | dev_priv->irq_mask = ~enable_mask; |
2218 | 2206 | ||
2219 | |||
2220 | DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue); | ||
2221 | DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue); | ||
2222 | DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue); | ||
2223 | |||
2224 | dev_priv->pipestat[0] = 0; | 2207 | dev_priv->pipestat[0] = 0; |
2225 | dev_priv->pipestat[1] = 0; | 2208 | dev_priv->pipestat[1] = 0; |
2226 | 2209 | ||