diff options
| author | Christian König <deathsimple@vodafone.de> | 2012-10-22 11:42:36 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2012-10-23 10:23:50 -0400 |
| commit | f9fdffa51dff6744726507c641d8151fadbc7cd7 (patch) | |
| tree | 1f7d3c7212e26329f2de5728baecfcfdf02d4579 /drivers/gpu | |
| parent | 58f8cf56f937840aa3c1416eed29f595159c60a3 (diff) | |
drm/radeon: fix cayman_vm_set_page v2
Handle requests that won't fit into a single packet.
v2: pe needs to increase as well.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 41 |
1 files changed, 23 insertions, 18 deletions
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 19b7fe1248be..81e6a568c29d 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
| @@ -1538,26 +1538,31 @@ void cayman_vm_set_page(struct radeon_device *rdev, uint64_t pe, | |||
| 1538 | { | 1538 | { |
| 1539 | struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index]; | 1539 | struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index]; |
| 1540 | uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); | 1540 | uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); |
| 1541 | int i; | ||
| 1542 | 1541 | ||
| 1543 | radeon_ring_write(ring, PACKET3(PACKET3_ME_WRITE, 1 + count * 2)); | 1542 | while (count) { |
| 1544 | radeon_ring_write(ring, pe); | 1543 | unsigned ndw = 1 + count * 2; |
| 1545 | radeon_ring_write(ring, upper_32_bits(pe) & 0xff); | 1544 | if (ndw > 0x3FFF) |
| 1546 | for (i = 0; i < count; ++i) { | 1545 | ndw = 0x3FFF; |
| 1547 | uint64_t value = 0; | 1546 | |
| 1548 | if (flags & RADEON_VM_PAGE_SYSTEM) { | 1547 | radeon_ring_write(ring, PACKET3(PACKET3_ME_WRITE, ndw)); |
| 1549 | value = radeon_vm_map_gart(rdev, addr); | 1548 | radeon_ring_write(ring, pe); |
| 1550 | value &= 0xFFFFFFFFFFFFF000ULL; | 1549 | radeon_ring_write(ring, upper_32_bits(pe) & 0xff); |
| 1551 | addr += incr; | 1550 | for (; ndw > 1; ndw -= 2, --count, pe += 8) { |
| 1552 | 1551 | uint64_t value = 0; | |
| 1553 | } else if (flags & RADEON_VM_PAGE_VALID) { | 1552 | if (flags & RADEON_VM_PAGE_SYSTEM) { |
| 1554 | value = addr; | 1553 | value = radeon_vm_map_gart(rdev, addr); |
| 1555 | addr += incr; | 1554 | value &= 0xFFFFFFFFFFFFF000ULL; |
| 1556 | } | 1555 | addr += incr; |
| 1556 | |||
| 1557 | } else if (flags & RADEON_VM_PAGE_VALID) { | ||
| 1558 | value = addr; | ||
| 1559 | addr += incr; | ||
| 1560 | } | ||
| 1557 | 1561 | ||
| 1558 | value |= r600_flags; | 1562 | value |= r600_flags; |
| 1559 | radeon_ring_write(ring, value); | 1563 | radeon_ring_write(ring, value); |
| 1560 | radeon_ring_write(ring, upper_32_bits(value)); | 1564 | radeon_ring_write(ring, upper_32_bits(value)); |
| 1565 | } | ||
| 1561 | } | 1566 | } |
| 1562 | } | 1567 | } |
| 1563 | 1568 | ||
